1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Routines for control of the CS8427 via i2c bus
4 * IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic
5 * Copyright (c) by Jaroslav Kysela <perex@perex.cz>
8 #include <linux/slab.h>
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/bitrev.h>
12 #include <linux/module.h>
13 #include <asm/unaligned.h>
14 #include <sound/core.h>
15 #include <sound/control.h>
16 #include <sound/pcm.h>
17 #include <sound/cs8427.h>
18 #include <sound/asoundef.h>
20 static void snd_cs8427_reset(struct snd_i2c_device *cs8427);
22 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
23 MODULE_DESCRIPTION("IEC958 (S/PDIF) receiver & transmitter by Cirrus Logic");
24 MODULE_LICENSE("GPL");
26 #define CS8427_ADDR (0x20>>1) /* fixed address */
28 struct cs8427_stream {
29 struct snd_pcm_substream *substream;
30 char hw_status[24]; /* hardware status */
31 char def_status[24]; /* default status */
32 char pcm_status[24]; /* PCM private status */
34 struct snd_kcontrol *pcm_ctl;
38 unsigned char regmap[0x14]; /* map of first 1 + 13 registers */
40 unsigned int reset_timeout;
41 struct cs8427_stream playback;
42 struct cs8427_stream capture;
45 int snd_cs8427_reg_write(struct snd_i2c_device *device, unsigned char reg,
53 err = snd_i2c_sendbytes(device, buf, 2);
55 snd_printk(KERN_ERR "unable to send bytes 0x%02x:0x%02x "
56 "to CS8427 (%i)\n", buf[0], buf[1], err);
57 return err < 0 ? err : -EIO;
62 EXPORT_SYMBOL(snd_cs8427_reg_write);
64 static int snd_cs8427_reg_read(struct snd_i2c_device *device, unsigned char reg)
69 err = snd_i2c_sendbytes(device, ®, 1);
71 snd_printk(KERN_ERR "unable to send register 0x%x byte "
73 return err < 0 ? err : -EIO;
75 err = snd_i2c_readbytes(device, &buf, 1);
77 snd_printk(KERN_ERR "unable to read register 0x%x byte "
78 "from CS8427\n", reg);
79 return err < 0 ? err : -EIO;
84 static int snd_cs8427_select_corudata(struct snd_i2c_device *device, int udata)
86 struct cs8427 *chip = device->private_data;
89 udata = udata ? CS8427_BSEL : 0;
90 if (udata != (chip->regmap[CS8427_REG_CSDATABUF] & udata)) {
91 chip->regmap[CS8427_REG_CSDATABUF] &= ~CS8427_BSEL;
92 chip->regmap[CS8427_REG_CSDATABUF] |= udata;
93 err = snd_cs8427_reg_write(device, CS8427_REG_CSDATABUF,
94 chip->regmap[CS8427_REG_CSDATABUF]);
101 static int snd_cs8427_send_corudata(struct snd_i2c_device *device,
103 unsigned char *ndata,
106 struct cs8427 *chip = device->private_data;
107 char *hw_data = udata ?
108 chip->playback.hw_udata : chip->playback.hw_status;
109 unsigned char data[32];
112 if (!memcmp(hw_data, ndata, count))
114 err = snd_cs8427_select_corudata(device, udata);
117 memcpy(hw_data, ndata, count);
119 memset(data, 0, sizeof(data));
120 if (memcmp(hw_data, data, count) == 0) {
121 chip->regmap[CS8427_REG_UDATABUF] &= ~CS8427_UBMMASK;
122 chip->regmap[CS8427_REG_UDATABUF] |= CS8427_UBMZEROS |
124 err = snd_cs8427_reg_write(device, CS8427_REG_UDATABUF,
125 chip->regmap[CS8427_REG_UDATABUF]);
126 return err < 0 ? err : 0;
129 data[0] = CS8427_REG_AUTOINC | CS8427_REG_CORU_DATABUF;
130 for (idx = 0; idx < count; idx++)
131 data[idx + 1] = bitrev8(ndata[idx]);
132 if (snd_i2c_sendbytes(device, data, count + 1) != count + 1)
137 static void snd_cs8427_free(struct snd_i2c_device *device)
139 kfree(device->private_data);
142 int snd_cs8427_init(struct snd_i2c_bus *bus,
143 struct snd_i2c_device *device)
145 static unsigned char initvals1[] = {
146 CS8427_REG_CONTROL1 | CS8427_REG_AUTOINC,
147 /* CS8427_REG_CONTROL1: RMCK to OMCK, valid PCM audio, disable mutes,
149 CS8427_SWCLK | CS8427_TCBLDIR,
150 /* CS8427_REG_CONTROL2: hold last valid audio sample, RMCK=256*Fs,
151 normal stereo operation */
153 /* CS8427_REG_DATAFLOW: output drivers normal operation, Tx<=serial,
155 CS8427_TXDSERIAL | CS8427_SPDAES3RECEIVER,
156 /* CS8427_REG_CLOCKSOURCE: Run off, CMCK=256*Fs,
157 output time base = OMCK, input time base = recovered input clock,
158 recovered input clock source is ILRCK changed to AES3INPUT
159 (workaround, see snd_cs8427_reset) */
161 /* CS8427_REG_SERIALINPUT: Serial audio input port data format = I2S,
163 CS8427_SIDEL | CS8427_SILRPOL,
164 /* CS8427_REG_SERIALOUTPUT: Serial audio output port data format
165 = I2S, 24-bit, 64*Fsi */
166 CS8427_SODEL | CS8427_SOLRPOL,
168 static unsigned char initvals2[] = {
169 CS8427_REG_RECVERRMASK | CS8427_REG_AUTOINC,
170 /* CS8427_REG_RECVERRMASK: unmask the input PLL clock, V, confidence,
171 biphase, parity status bits */
172 /* CS8427_UNLOCK | CS8427_V | CS8427_CONF | CS8427_BIP | CS8427_PAR,*/
173 0xff, /* set everything */
174 /* CS8427_REG_CSDATABUF:
175 Registers 32-55 window to CS buffer
176 Inhibit D->E transfers from overwriting first 5 bytes of CS data.
177 Inhibit D->E transfers (all) of CS data.
178 Allow E->F transfer of CS data.
179 One byte mode; both A/B channels get same written CB data.
180 A channel info is output to chip's EMPH* pin. */
181 CS8427_CBMR | CS8427_DETCI,
182 /* CS8427_REG_UDATABUF:
183 Use internal buffer to transmit User (U) data.
184 Chip's U pin is an output.
185 Transmit all O's for user data.
186 Inhibit D->E transfers.
187 Inhibit E->F transfers. */
188 CS8427_UD | CS8427_EFTUI | CS8427_DETUI,
190 struct cs8427 *chip = device->private_data;
192 unsigned char buf[24];
195 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
196 if (err != CS8427_VER8427A) {
197 /* give second chance */
198 snd_printk(KERN_WARNING "invalid CS8427 signature 0x%x: "
199 "let me try again...\n", err);
200 err = snd_cs8427_reg_read(device, CS8427_REG_ID_AND_VER);
202 if (err != CS8427_VER8427A) {
204 snd_printk(KERN_ERR "unable to find CS8427 signature "
205 "(expected 0x%x, read 0x%x),\n",
206 CS8427_VER8427A, err);
207 snd_printk(KERN_ERR " initialization is not completed\n");
210 /* turn off run bit while making changes to configuration */
211 err = snd_cs8427_reg_write(device, CS8427_REG_CLOCKSOURCE, 0x00);
214 /* send initial values */
215 memcpy(chip->regmap + (initvals1[0] & 0x7f), initvals1 + 1, 6);
216 err = snd_i2c_sendbytes(device, initvals1, 7);
218 err = err < 0 ? err : -EIO;
221 /* Turn off CS8427 interrupt stuff that is not used in hardware */
223 /* from address 9 to 15 */
224 buf[0] = 9; /* register */
225 err = snd_i2c_sendbytes(device, buf, 7);
228 /* send transfer initialization sequence */
229 memcpy(chip->regmap + (initvals2[0] & 0x7f), initvals2 + 1, 3);
230 err = snd_i2c_sendbytes(device, initvals2, 4);
232 err = err < 0 ? err : -EIO;
235 /* write default channel status bytes */
236 put_unaligned_le32(SNDRV_PCM_DEFAULT_CON_SPDIF, buf);
237 memset(buf + 4, 0, 24 - 4);
238 if (snd_cs8427_send_corudata(device, 0, buf, 24) < 0)
240 memcpy(chip->playback.def_status, buf, 24);
241 memcpy(chip->playback.pcm_status, buf, 24);
244 /* turn on run bit and rock'n'roll */
245 snd_cs8427_reset(device);
254 EXPORT_SYMBOL(snd_cs8427_init);
256 int snd_cs8427_create(struct snd_i2c_bus *bus,
258 unsigned int reset_timeout,
259 struct snd_i2c_device **r_cs8427)
263 struct snd_i2c_device *device;
265 err = snd_i2c_device_create(bus, "CS8427", CS8427_ADDR | (addr & 7),
269 chip = device->private_data = kzalloc(sizeof(*chip), GFP_KERNEL);
271 snd_i2c_device_free(device);
274 device->private_free = snd_cs8427_free;
276 if (reset_timeout < 1)
278 chip->reset_timeout = reset_timeout;
280 err = snd_cs8427_init(bus, device);
284 #if 0 // it's nice for read tests
289 snd_i2c_sendbytes(device, buf, 1);
290 snd_i2c_readbytes(device, buf, 127);
291 for (xx = 0; xx < 127; xx++)
292 printk(KERN_DEBUG "reg[0x%x] = 0x%x\n", xx+1, buf[xx]);
301 snd_i2c_device_free(device);
302 return err < 0 ? err : -EIO;
305 EXPORT_SYMBOL(snd_cs8427_create);
308 * Reset the chip using run bit, also lock PLL using ILRCK and
309 * put back AES3INPUT. This workaround is described in latest
310 * CS8427 datasheet, otherwise TXDSERIAL will not work.
312 static void snd_cs8427_reset(struct snd_i2c_device *cs8427)
315 unsigned long end_time;
316 int data, aes3input = 0;
318 if (snd_BUG_ON(!cs8427))
320 chip = cs8427->private_data;
321 snd_i2c_lock(cs8427->bus);
322 if ((chip->regmap[CS8427_REG_CLOCKSOURCE] & CS8427_RXDAES3INPUT) ==
323 CS8427_RXDAES3INPUT) /* AES3 bit is set */
325 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~(CS8427_RUN | CS8427_RXDMASK);
326 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
327 chip->regmap[CS8427_REG_CLOCKSOURCE]);
329 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RUN | CS8427_RXDILRCK;
330 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
331 chip->regmap[CS8427_REG_CLOCKSOURCE]);
333 snd_i2c_unlock(cs8427->bus);
334 end_time = jiffies + chip->reset_timeout;
335 while (time_after_eq(end_time, jiffies)) {
336 snd_i2c_lock(cs8427->bus);
337 data = snd_cs8427_reg_read(cs8427, CS8427_REG_RECVERRORS);
338 snd_i2c_unlock(cs8427->bus);
339 if (!(data & CS8427_UNLOCK))
341 schedule_timeout_uninterruptible(1);
343 snd_i2c_lock(cs8427->bus);
344 chip->regmap[CS8427_REG_CLOCKSOURCE] &= ~CS8427_RXDMASK;
346 chip->regmap[CS8427_REG_CLOCKSOURCE] |= CS8427_RXDAES3INPUT;
347 snd_cs8427_reg_write(cs8427, CS8427_REG_CLOCKSOURCE,
348 chip->regmap[CS8427_REG_CLOCKSOURCE]);
349 snd_i2c_unlock(cs8427->bus);
352 static int snd_cs8427_in_status_info(struct snd_kcontrol *kcontrol,
353 struct snd_ctl_elem_info *uinfo)
355 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
357 uinfo->value.integer.min = 0;
358 uinfo->value.integer.max = 255;
362 static int snd_cs8427_in_status_get(struct snd_kcontrol *kcontrol,
363 struct snd_ctl_elem_value *ucontrol)
365 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
368 snd_i2c_lock(device->bus);
369 data = snd_cs8427_reg_read(device, kcontrol->private_value);
370 snd_i2c_unlock(device->bus);
373 ucontrol->value.integer.value[0] = data;
377 static int snd_cs8427_qsubcode_info(struct snd_kcontrol *kcontrol,
378 struct snd_ctl_elem_info *uinfo)
380 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
385 static int snd_cs8427_qsubcode_get(struct snd_kcontrol *kcontrol,
386 struct snd_ctl_elem_value *ucontrol)
388 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
389 unsigned char reg = CS8427_REG_QSUBCODE;
392 snd_i2c_lock(device->bus);
393 err = snd_i2c_sendbytes(device, ®, 1);
395 snd_printk(KERN_ERR "unable to send register 0x%x byte "
397 snd_i2c_unlock(device->bus);
398 return err < 0 ? err : -EIO;
400 err = snd_i2c_readbytes(device, ucontrol->value.bytes.data, 10);
402 snd_printk(KERN_ERR "unable to read Q-subcode bytes "
404 snd_i2c_unlock(device->bus);
405 return err < 0 ? err : -EIO;
407 snd_i2c_unlock(device->bus);
411 static int snd_cs8427_spdif_info(struct snd_kcontrol *kcontrol,
412 struct snd_ctl_elem_info *uinfo)
414 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
419 static int snd_cs8427_spdif_get(struct snd_kcontrol *kcontrol,
420 struct snd_ctl_elem_value *ucontrol)
422 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
423 struct cs8427 *chip = device->private_data;
425 snd_i2c_lock(device->bus);
426 memcpy(ucontrol->value.iec958.status, chip->playback.def_status, 24);
427 snd_i2c_unlock(device->bus);
431 static int snd_cs8427_spdif_put(struct snd_kcontrol *kcontrol,
432 struct snd_ctl_elem_value *ucontrol)
434 struct snd_i2c_device *device = snd_kcontrol_chip(kcontrol);
435 struct cs8427 *chip = device->private_data;
436 unsigned char *status = kcontrol->private_value ?
437 chip->playback.pcm_status : chip->playback.def_status;
438 struct snd_pcm_runtime *runtime = chip->playback.substream ?
439 chip->playback.substream->runtime : NULL;
442 snd_i2c_lock(device->bus);
443 change = memcmp(ucontrol->value.iec958.status, status, 24) != 0;
444 memcpy(status, ucontrol->value.iec958.status, 24);
445 if (change && (kcontrol->private_value ?
446 runtime != NULL : runtime == NULL)) {
447 err = snd_cs8427_send_corudata(device, 0, status, 24);
451 snd_i2c_unlock(device->bus);
455 static int snd_cs8427_spdif_mask_info(struct snd_kcontrol *kcontrol,
456 struct snd_ctl_elem_info *uinfo)
458 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
463 static int snd_cs8427_spdif_mask_get(struct snd_kcontrol *kcontrol,
464 struct snd_ctl_elem_value *ucontrol)
466 memset(ucontrol->value.iec958.status, 0xff, 24);
470 static const struct snd_kcontrol_new snd_cs8427_iec958_controls[] = {
472 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
473 .info = snd_cs8427_in_status_info,
474 .name = "IEC958 CS8427 Input Status",
475 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
476 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
477 .get = snd_cs8427_in_status_get,
481 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
482 .info = snd_cs8427_in_status_info,
483 .name = "IEC958 CS8427 Error Status",
484 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
485 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
486 .get = snd_cs8427_in_status_get,
490 .access = SNDRV_CTL_ELEM_ACCESS_READ,
491 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
492 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
493 .info = snd_cs8427_spdif_mask_info,
494 .get = snd_cs8427_spdif_mask_get,
497 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
498 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
499 .info = snd_cs8427_spdif_info,
500 .get = snd_cs8427_spdif_get,
501 .put = snd_cs8427_spdif_put,
505 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
506 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
507 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
508 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
509 .info = snd_cs8427_spdif_info,
510 .get = snd_cs8427_spdif_get,
511 .put = snd_cs8427_spdif_put,
515 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
516 .info = snd_cs8427_qsubcode_info,
517 .name = "IEC958 Q-subcode Capture Default",
518 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
519 SNDRV_CTL_ELEM_ACCESS_VOLATILE),
520 .get = snd_cs8427_qsubcode_get
523 int snd_cs8427_iec958_build(struct snd_i2c_device *cs8427,
524 struct snd_pcm_substream *play_substream,
525 struct snd_pcm_substream *cap_substream)
527 struct cs8427 *chip = cs8427->private_data;
528 struct snd_kcontrol *kctl;
532 if (snd_BUG_ON(!play_substream || !cap_substream))
534 for (idx = 0; idx < ARRAY_SIZE(snd_cs8427_iec958_controls); idx++) {
535 kctl = snd_ctl_new1(&snd_cs8427_iec958_controls[idx], cs8427);
538 kctl->id.device = play_substream->pcm->device;
539 kctl->id.subdevice = play_substream->number;
540 err = snd_ctl_add(cs8427->bus->card, kctl);
543 if (! strcmp(kctl->id.name,
544 SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM)))
545 chip->playback.pcm_ctl = kctl;
548 chip->playback.substream = play_substream;
549 chip->capture.substream = cap_substream;
550 if (snd_BUG_ON(!chip->playback.pcm_ctl))
555 EXPORT_SYMBOL(snd_cs8427_iec958_build);
557 int snd_cs8427_iec958_active(struct snd_i2c_device *cs8427, int active)
561 if (snd_BUG_ON(!cs8427))
563 chip = cs8427->private_data;
565 memcpy(chip->playback.pcm_status,
566 chip->playback.def_status, 24);
567 chip->playback.pcm_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
569 chip->playback.pcm_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
571 snd_ctl_notify(cs8427->bus->card,
572 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
573 &chip->playback.pcm_ctl->id);
577 EXPORT_SYMBOL(snd_cs8427_iec958_active);
579 int snd_cs8427_iec958_pcm(struct snd_i2c_device *cs8427, unsigned int rate)
585 if (snd_BUG_ON(!cs8427))
587 chip = cs8427->private_data;
588 status = chip->playback.pcm_status;
589 snd_i2c_lock(cs8427->bus);
590 if (status[0] & IEC958_AES0_PROFESSIONAL) {
591 status[0] &= ~IEC958_AES0_PRO_FS;
593 case 32000: status[0] |= IEC958_AES0_PRO_FS_32000; break;
594 case 44100: status[0] |= IEC958_AES0_PRO_FS_44100; break;
595 case 48000: status[0] |= IEC958_AES0_PRO_FS_48000; break;
596 default: status[0] |= IEC958_AES0_PRO_FS_NOTID; break;
599 status[3] &= ~IEC958_AES3_CON_FS;
601 case 32000: status[3] |= IEC958_AES3_CON_FS_32000; break;
602 case 44100: status[3] |= IEC958_AES3_CON_FS_44100; break;
603 case 48000: status[3] |= IEC958_AES3_CON_FS_48000; break;
606 err = snd_cs8427_send_corudata(cs8427, 0, status, 24);
608 snd_ctl_notify(cs8427->bus->card,
609 SNDRV_CTL_EVENT_MASK_VALUE,
610 &chip->playback.pcm_ctl->id);
611 reset = chip->rate != rate;
613 snd_i2c_unlock(cs8427->bus);
615 snd_cs8427_reset(cs8427);
616 return err < 0 ? err : 0;
619 EXPORT_SYMBOL(snd_cs8427_iec958_pcm);