sound/atmel/ac97c.c

   1 /*
   2  * Driver for Atmel AC97C
   3  *
   4  * Copyright (C) 2005-2009 Atmel Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 as published by
   8  * the Free Software Foundation.
   9  */
  10 #include <linux/clk.h>
  11 #include <linux/delay.h>
  12 #include <linux/bitmap.h>
  13 #include <linux/device.h>
  14 #include <linux/dmaengine.h>
  15 #include <linux/dma-mapping.h>
  16 #include <linux/atmel_pdc.h>
  17 #include <linux/init.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/module.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/mutex.h>
  22 #include <linux/gpio.h>
  23 #include <linux/types.h>
  24 #include <linux/io.h>
  25
  26 #include <sound/core.h>
  27 #include <sound/initval.h>
  28 #include <sound/pcm.h>
  29 #include <sound/pcm_params.h>
  30 #include <sound/ac97_codec.h>
  31 #include <sound/atmel-ac97c.h>
  32 #include <sound/memalloc.h>
  33
  34 #include <linux/dw_dmac.h>
  35
  36 #include <mach/cpu.h>
  37 #include <mach/gpio.h>
  38
  39 #ifdef CONFIG_ARCH_AT91
  40 #include <mach/hardware.h>
  41 #endif
  42
  43 #include "ac97c.h"
  44
  45 enum {
  46         DMA_TX_READY = 0,
  47         DMA_RX_READY,
  48         DMA_TX_CHAN_PRESENT,
  49         DMA_RX_CHAN_PRESENT,
  50 };
  51
  52 /* Serialize access to opened variable */
  53 static DEFINE_MUTEX(opened_mutex);
  54
  55 struct atmel_ac97c_dma {
  56         struct dma_chan                 *rx_chan;
  57         struct dma_chan                 *tx_chan;
  58 };
  59
  60 struct atmel_ac97c {
  61         struct clk                      *pclk;
  62         struct platform_device          *pdev;
  63         struct atmel_ac97c_dma          dma;
  64
  65         struct snd_pcm_substream        *playback_substream;
  66         struct snd_pcm_substream        *capture_substream;
  67         struct snd_card                 *card;
  68         struct snd_pcm                  *pcm;
  69         struct snd_ac97                 *ac97;
  70         struct snd_ac97_bus             *ac97_bus;
  71
  72         u64                             cur_format;
  73         unsigned int                    cur_rate;
  74         unsigned long                   flags;
  75         int                             playback_period, capture_period;
  76         /* Serialize access to opened variable */
  77         spinlock_t                      lock;
  78         void __iomem                    *regs;
  79         int                             irq;
  80         int                             opened;
  81         int                             reset_pin;
  82 };
  83
  84 #define get_chip(card) ((struct atmel_ac97c *)(card)->private_data)
  85
  86 #define ac97c_writel(chip, reg, val)                    \
  87         __raw_writel((val), (chip)->regs + AC97C_##reg)
  88 #define ac97c_readl(chip, reg)                          \
  89         __raw_readl((chip)->regs + AC97C_##reg)
  90
  91 /* This function is called by the DMA driver. */
  92 static void atmel_ac97c_dma_playback_period_done(void *arg)
  93 {
  94         struct atmel_ac97c *chip = arg;
  95         snd_pcm_period_elapsed(chip->playback_substream);
  96 }
  97
  98 static void atmel_ac97c_dma_capture_period_done(void *arg)
  99 {
 100         struct atmel_ac97c *chip = arg;
 101         snd_pcm_period_elapsed(chip->capture_substream);
 102 }
 103
 104 static int atmel_ac97c_prepare_dma(struct atmel_ac97c *chip,
 105                 struct snd_pcm_substream *substream,
 106                 enum dma_transfer_direction direction)
 107 {
 108         struct dma_chan                 *chan;
 109         struct dw_cyclic_desc           *cdesc;
 110         struct snd_pcm_runtime          *runtime = substream->runtime;
 111         unsigned long                   buffer_len, period_len;
 112
 113         /*
 114          * We don't do DMA on "complex" transfers, i.e. with
 115          * non-halfword-aligned buffers or lengths.
 116          */
 117         if (runtime->dma_addr & 1 || runtime->buffer_size & 1) {
 118                 dev_dbg(&chip->pdev->dev, "too complex transfer\n");
 119                 return -EINVAL;
 120         }
 121
 122         if (direction == DMA_MEM_TO_DEV)
 123                 chan = chip->dma.tx_chan;
 124         else
 125                 chan = chip->dma.rx_chan;
 126
 127         buffer_len = frames_to_bytes(runtime, runtime->buffer_size);
 128         period_len = frames_to_bytes(runtime, runtime->period_size);
 129
 130         cdesc = dw_dma_cyclic_prep(chan, runtime->dma_addr, buffer_len,
 131                         period_len, direction);
 132         if (IS_ERR(cdesc)) {
 133                 dev_dbg(&chip->pdev->dev, "could not prepare cyclic DMA\n");
 134                 return PTR_ERR(cdesc);
 135         }
 136
 137         if (direction == DMA_MEM_TO_DEV) {
 138                 cdesc->period_callback = atmel_ac97c_dma_playback_period_done;
 139                 set_bit(DMA_TX_READY, &chip->flags);
 140         } else {
 141                 cdesc->period_callback = atmel_ac97c_dma_capture_period_done;
 142                 set_bit(DMA_RX_READY, &chip->flags);
 143         }
 144
 145         cdesc->period_callback_param = chip;
 146
 147         return 0;
 148 }
 149
 150 static struct snd_pcm_hardware atmel_ac97c_hw = {
 151         .info                   = (SNDRV_PCM_INFO_MMAP
 152                                   | SNDRV_PCM_INFO_MMAP_VALID
 153                                   | SNDRV_PCM_INFO_INTERLEAVED
 154                                   | SNDRV_PCM_INFO_BLOCK_TRANSFER
 155                                   | SNDRV_PCM_INFO_JOINT_DUPLEX
 156                                   | SNDRV_PCM_INFO_RESUME
 157                                   | SNDRV_PCM_INFO_PAUSE),
 158         .formats                = (SNDRV_PCM_FMTBIT_S16_BE
 159                                   | SNDRV_PCM_FMTBIT_S16_LE),
 160         .rates                  = (SNDRV_PCM_RATE_CONTINUOUS),
 161         .rate_min               = 4000,
 162         .rate_max               = 48000,
 163         .channels_min           = 1,
 164         .channels_max           = 2,
 165         .buffer_bytes_max       = 2 * 2 * 64 * 2048,
 166         .period_bytes_min       = 4096,
 167         .period_bytes_max       = 4096,
 168         .periods_min            = 6,
 169         .periods_max            = 64,
 170 };
 171
 172 static int atmel_ac97c_playback_open(struct snd_pcm_substream *substream)
 173 {
 174         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 175         struct snd_pcm_runtime *runtime = substream->runtime;
 176
 177         mutex_lock(&opened_mutex);
 178         chip->opened++;
 179         runtime->hw = atmel_ac97c_hw;
 180         if (chip->cur_rate) {
 181                 runtime->hw.rate_min = chip->cur_rate;
 182                 runtime->hw.rate_max = chip->cur_rate;
 183         }
 184         if (chip->cur_format)
 185                 runtime->hw.formats = (1ULL << chip->cur_format);
 186         mutex_unlock(&opened_mutex);
 187         chip->playback_substream = substream;
 188         return 0;
 189 }
 190
 191 static int atmel_ac97c_capture_open(struct snd_pcm_substream *substream)
 192 {
 193         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 194         struct snd_pcm_runtime *runtime = substream->runtime;
 195
 196         mutex_lock(&opened_mutex);
 197         chip->opened++;
 198         runtime->hw = atmel_ac97c_hw;
 199         if (chip->cur_rate) {
 200                 runtime->hw.rate_min = chip->cur_rate;
 201                 runtime->hw.rate_max = chip->cur_rate;
 202         }
 203         if (chip->cur_format)
 204                 runtime->hw.formats = (1ULL << chip->cur_format);
 205         mutex_unlock(&opened_mutex);
 206         chip->capture_substream = substream;
 207         return 0;
 208 }
 209
 210 static int atmel_ac97c_playback_close(struct snd_pcm_substream *substream)
 211 {
 212         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 213
 214         mutex_lock(&opened_mutex);
 215         chip->opened--;
 216         if (!chip->opened) {
 217                 chip->cur_rate = 0;
 218                 chip->cur_format = 0;
 219         }
 220         mutex_unlock(&opened_mutex);
 221
 222         chip->playback_substream = NULL;
 223
 224         return 0;
 225 }
 226
 227 static int atmel_ac97c_capture_close(struct snd_pcm_substream *substream)
 228 {
 229         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 230
 231         mutex_lock(&opened_mutex);
 232         chip->opened--;
 233         if (!chip->opened) {
 234                 chip->cur_rate = 0;
 235                 chip->cur_format = 0;
 236         }
 237         mutex_unlock(&opened_mutex);
 238
 239         chip->capture_substream = NULL;
 240
 241         return 0;
 242 }
 243
 244 static int atmel_ac97c_playback_hw_params(struct snd_pcm_substream *substream,
 245                 struct snd_pcm_hw_params *hw_params)
 246 {
 247         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 248         int retval;
 249
 250         retval = snd_pcm_lib_malloc_pages(substream,
 251                                         params_buffer_bytes(hw_params));
 252         if (retval < 0)
 253                 return retval;
 254         /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
 255         if (cpu_is_at32ap7000()) {
 256                 /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
 257                 if (retval == 1)
 258                         if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
 259                                 dw_dma_cyclic_free(chip->dma.tx_chan);
 260         }
 261         /* Set restrictions to params. */
 262         mutex_lock(&opened_mutex);
 263         chip->cur_rate = params_rate(hw_params);
 264         chip->cur_format = params_format(hw_params);
 265         mutex_unlock(&opened_mutex);
 266
 267         return retval;
 268 }
 269
 270 static int atmel_ac97c_capture_hw_params(struct snd_pcm_substream *substream,
 271                 struct snd_pcm_hw_params *hw_params)
 272 {
 273         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 274         int retval;
 275
 276         retval = snd_pcm_lib_malloc_pages(substream,
 277                                         params_buffer_bytes(hw_params));
 278         if (retval < 0)
 279                 return retval;
 280         /* snd_pcm_lib_malloc_pages returns 1 if buffer is changed. */
 281         if (cpu_is_at32ap7000() && retval == 1)
 282                 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
 283                         dw_dma_cyclic_free(chip->dma.rx_chan);
 284
 285         /* Set restrictions to params. */
 286         mutex_lock(&opened_mutex);
 287         chip->cur_rate = params_rate(hw_params);
 288         chip->cur_format = params_format(hw_params);
 289         mutex_unlock(&opened_mutex);
 290
 291         return retval;
 292 }
 293
 294 static int atmel_ac97c_playback_hw_free(struct snd_pcm_substream *substream)
 295 {
 296         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 297         if (cpu_is_at32ap7000()) {
 298                 if (test_and_clear_bit(DMA_TX_READY, &chip->flags))
 299                         dw_dma_cyclic_free(chip->dma.tx_chan);
 300         }
 301         return snd_pcm_lib_free_pages(substream);
 302 }
 303
 304 static int atmel_ac97c_capture_hw_free(struct snd_pcm_substream *substream)
 305 {
 306         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 307         if (cpu_is_at32ap7000()) {
 308                 if (test_and_clear_bit(DMA_RX_READY, &chip->flags))
 309                         dw_dma_cyclic_free(chip->dma.rx_chan);
 310         }
 311         return snd_pcm_lib_free_pages(substream);
 312 }
 313
 314 static int atmel_ac97c_playback_prepare(struct snd_pcm_substream *substream)
 315 {
 316         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 317         struct snd_pcm_runtime *runtime = substream->runtime;
 318         int block_size = frames_to_bytes(runtime, runtime->period_size);
 319         unsigned long word = ac97c_readl(chip, OCA);
 320         int retval;
 321
 322         chip->playback_period = 0;
 323         word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 324
 325         /* assign channels to AC97C channel A */
 326         switch (runtime->channels) {
 327         case 1:
 328                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
 329                 break;
 330         case 2:
 331                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
 332                         | AC97C_CH_ASSIGN(PCM_RIGHT, A);
 333                 break;
 334         default:
 335                 /* TODO: support more than two channels */
 336                 return -EINVAL;
 337         }
 338         ac97c_writel(chip, OCA, word);
 339
 340         /* configure sample format and size */
 341         word = ac97c_readl(chip, CAMR);
 342         if (chip->opened <= 1)
 343                 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 344         else
 345                 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 346
 347         switch (runtime->format) {
 348         case SNDRV_PCM_FORMAT_S16_LE:
 349                 if (cpu_is_at32ap7000())
 350                         word |= AC97C_CMR_CEM_LITTLE;
 351                 break;
 352         case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
 353                 word &= ~(AC97C_CMR_CEM_LITTLE);
 354                 break;
 355         default:
 356                 word = ac97c_readl(chip, OCA);
 357                 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 358                 ac97c_writel(chip, OCA, word);
 359                 return -EINVAL;
 360         }
 361
 362         /* Enable underrun interrupt on channel A */
 363         word |= AC97C_CSR_UNRUN;
 364
 365         ac97c_writel(chip, CAMR, word);
 366
 367         /* Enable channel A event interrupt */
 368         word = ac97c_readl(chip, IMR);
 369         word |= AC97C_SR_CAEVT;
 370         ac97c_writel(chip, IER, word);
 371
 372         /* set variable rate if needed */
 373         if (runtime->rate != 48000) {
 374                 word = ac97c_readl(chip, MR);
 375                 word |= AC97C_MR_VRA;
 376                 ac97c_writel(chip, MR, word);
 377         } else {
 378                 word = ac97c_readl(chip, MR);
 379                 word &= ~(AC97C_MR_VRA);
 380                 ac97c_writel(chip, MR, word);
 381         }
 382
 383         retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_FRONT_DAC_RATE,
 384                         runtime->rate);
 385         if (retval)
 386                 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
 387                                 runtime->rate);
 388
 389         if (cpu_is_at32ap7000()) {
 390                 if (!test_bit(DMA_TX_READY, &chip->flags))
 391                         retval = atmel_ac97c_prepare_dma(chip, substream,
 392                                         DMA_MEM_TO_DEV);
 393         } else {
 394                 /* Initialize and start the PDC */
 395                 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_TPR);
 396                 writel(block_size / 2, chip->regs + ATMEL_PDC_TCR);
 397                 writel(runtime->dma_addr + block_size,
 398                                 chip->regs + ATMEL_PDC_TNPR);
 399                 writel(block_size / 2, chip->regs + ATMEL_PDC_TNCR);
 400         }
 401
 402         return retval;
 403 }
 404
 405 static int atmel_ac97c_capture_prepare(struct snd_pcm_substream *substream)
 406 {
 407         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 408         struct snd_pcm_runtime *runtime = substream->runtime;
 409         int block_size = frames_to_bytes(runtime, runtime->period_size);
 410         unsigned long word = ac97c_readl(chip, ICA);
 411         int retval;
 412
 413         chip->capture_period = 0;
 414         word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 415
 416         /* assign channels to AC97C channel A */
 417         switch (runtime->channels) {
 418         case 1:
 419                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A);
 420                 break;
 421         case 2:
 422                 word |= AC97C_CH_ASSIGN(PCM_LEFT, A)
 423                         | AC97C_CH_ASSIGN(PCM_RIGHT, A);
 424                 break;
 425         default:
 426                 /* TODO: support more than two channels */
 427                 return -EINVAL;
 428         }
 429         ac97c_writel(chip, ICA, word);
 430
 431         /* configure sample format and size */
 432         word = ac97c_readl(chip, CAMR);
 433         if (chip->opened <= 1)
 434                 word = AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 435         else
 436                 word |= AC97C_CMR_DMAEN | AC97C_CMR_SIZE_16;
 437
 438         switch (runtime->format) {
 439         case SNDRV_PCM_FORMAT_S16_LE:
 440                 if (cpu_is_at32ap7000())
 441                         word |= AC97C_CMR_CEM_LITTLE;
 442                 break;
 443         case SNDRV_PCM_FORMAT_S16_BE: /* fall through */
 444                 word &= ~(AC97C_CMR_CEM_LITTLE);
 445                 break;
 446         default:
 447                 word = ac97c_readl(chip, ICA);
 448                 word &= ~(AC97C_CH_MASK(PCM_LEFT) | AC97C_CH_MASK(PCM_RIGHT));
 449                 ac97c_writel(chip, ICA, word);
 450                 return -EINVAL;
 451         }
 452
 453         /* Enable overrun interrupt on channel A */
 454         word |= AC97C_CSR_OVRUN;
 455
 456         ac97c_writel(chip, CAMR, word);
 457
 458         /* Enable channel A event interrupt */
 459         word = ac97c_readl(chip, IMR);
 460         word |= AC97C_SR_CAEVT;
 461         ac97c_writel(chip, IER, word);
 462
 463         /* set variable rate if needed */
 464         if (runtime->rate != 48000) {
 465                 word = ac97c_readl(chip, MR);
 466                 word |= AC97C_MR_VRA;
 467                 ac97c_writel(chip, MR, word);
 468         } else {
 469                 word = ac97c_readl(chip, MR);
 470                 word &= ~(AC97C_MR_VRA);
 471                 ac97c_writel(chip, MR, word);
 472         }
 473
 474         retval = snd_ac97_set_rate(chip->ac97, AC97_PCM_LR_ADC_RATE,
 475                         runtime->rate);
 476         if (retval)
 477                 dev_dbg(&chip->pdev->dev, "could not set rate %d Hz\n",
 478                                 runtime->rate);
 479
 480         if (cpu_is_at32ap7000()) {
 481                 if (!test_bit(DMA_RX_READY, &chip->flags))
 482                         retval = atmel_ac97c_prepare_dma(chip, substream,
 483                                         DMA_DEV_TO_MEM);
 484         } else {
 485                 /* Initialize and start the PDC */
 486                 writel(runtime->dma_addr, chip->regs + ATMEL_PDC_RPR);
 487                 writel(block_size / 2, chip->regs + ATMEL_PDC_RCR);
 488                 writel(runtime->dma_addr + block_size,
 489                                 chip->regs + ATMEL_PDC_RNPR);
 490                 writel(block_size / 2, chip->regs + ATMEL_PDC_RNCR);
 491         }
 492
 493         return retval;
 494 }
 495
 496 static int
 497 atmel_ac97c_playback_trigger(struct snd_pcm_substream *substream, int cmd)
 498 {
 499         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 500         unsigned long camr, ptcr = 0;
 501         int retval = 0;
 502
 503         camr = ac97c_readl(chip, CAMR);
 504
 505         switch (cmd) {
 506         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
 507         case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
 508         case SNDRV_PCM_TRIGGER_START:
 509                 if (cpu_is_at32ap7000()) {
 510                         retval = dw_dma_cyclic_start(chip->dma.tx_chan);
 511                         if (retval)
 512                                 goto out;
 513                 } else {
 514                         ptcr = ATMEL_PDC_TXTEN;
 515                 }
 516                 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDTX;
 517                 break;
 518         case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
 519         case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
 520         case SNDRV_PCM_TRIGGER_STOP:
 521                 if (cpu_is_at32ap7000())
 522                         dw_dma_cyclic_stop(chip->dma.tx_chan);
 523                 else
 524                         ptcr |= ATMEL_PDC_TXTDIS;
 525                 if (chip->opened <= 1)
 526                         camr &= ~AC97C_CMR_CENA;
 527                 break;
 528         default:
 529                 retval = -EINVAL;
 530                 goto out;
 531         }
 532
 533         ac97c_writel(chip, CAMR, camr);
 534         if (!cpu_is_at32ap7000())
 535                 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
 536 out:
 537         return retval;
 538 }
 539
 540 static int
 541 atmel_ac97c_capture_trigger(struct snd_pcm_substream *substream, int cmd)
 542 {
 543         struct atmel_ac97c *chip = snd_pcm_substream_chip(substream);
 544         unsigned long camr, ptcr = 0;
 545         int retval = 0;
 546
 547         camr = ac97c_readl(chip, CAMR);
 548         ptcr = readl(chip->regs + ATMEL_PDC_PTSR);
 549
 550         switch (cmd) {
 551         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: /* fall through */
 552         case SNDRV_PCM_TRIGGER_RESUME: /* fall through */
 553         case SNDRV_PCM_TRIGGER_START:
 554                 if (cpu_is_at32ap7000()) {
 555                         retval = dw_dma_cyclic_start(chip->dma.rx_chan);
 556                         if (retval)
 557                                 goto out;
 558                 } else {
 559                         ptcr = ATMEL_PDC_RXTEN;
 560                 }
 561                 camr |= AC97C_CMR_CENA | AC97C_CSR_ENDRX;
 562                 break;
 563         case SNDRV_PCM_TRIGGER_PAUSE_PUSH: /* fall through */
 564         case SNDRV_PCM_TRIGGER_SUSPEND: /* fall through */
 565         case SNDRV_PCM_TRIGGER_STOP:
 566                 if (cpu_is_at32ap7000())
 567                         dw_dma_cyclic_stop(chip->dma.rx_chan);
 568                 else
 569                         ptcr |= (ATMEL_PDC_RXTDIS);
 570                 if (chip->opened <= 1)
 571                         camr &= ~AC97C_CMR_CENA;
 572                 break;
 573         default:
 574                 retval = -EINVAL;
 575                 break;
 576         }
 577
 578         ac97c_writel(chip, CAMR, camr);
 579         if (!cpu_is_at32ap7000())
 580                 writel(ptcr, chip->regs + ATMEL_PDC_PTCR);
 581 out:
 582         return retval;
 583 }
 584
 585 static snd_pcm_uframes_t
 586 atmel_ac97c_playback_pointer(struct snd_pcm_substream *substream)
 587 {
 588         struct atmel_ac97c      *chip = snd_pcm_substream_chip(substream);
 589         struct snd_pcm_runtime  *runtime = substream->runtime;
 590         snd_pcm_uframes_t       frames;
 591         unsigned long           bytes;
 592
 593         if (cpu_is_at32ap7000())
 594                 bytes = dw_dma_get_src_addr(chip->dma.tx_chan);
 595         else
 596                 bytes = readl(chip->regs + ATMEL_PDC_TPR);
 597         bytes -= runtime->dma_addr;
 598
 599         frames = bytes_to_frames(runtime, bytes);
 600         if (frames >= runtime->buffer_size)
 601                 frames -= runtime->buffer_size;
 602         return frames;
 603 }
 604
 605 static snd_pcm_uframes_t
 606 atmel_ac97c_capture_pointer(struct snd_pcm_substream *substream)
 607 {
 608         struct atmel_ac97c      *chip = snd_pcm_substream_chip(substream);
 609         struct snd_pcm_runtime  *runtime = substream->runtime;
 610         snd_pcm_uframes_t       frames;
 611         unsigned long           bytes;
 612
 613         if (cpu_is_at32ap7000())
 614                 bytes = dw_dma_get_dst_addr(chip->dma.rx_chan);
 615         else
 616                 bytes = readl(chip->regs + ATMEL_PDC_RPR);
 617         bytes -= runtime->dma_addr;
 618
 619         frames = bytes_to_frames(runtime, bytes);
 620         if (frames >= runtime->buffer_size)
 621                 frames -= runtime->buffer_size;
 622         return frames;
 623 }
 624
 625 static struct snd_pcm_ops atmel_ac97_playback_ops = {
 626         .open           = atmel_ac97c_playback_open,
 627         .close          = atmel_ac97c_playback_close,
 628         .ioctl          = snd_pcm_lib_ioctl,
 629         .hw_params      = atmel_ac97c_playback_hw_params,
 630         .hw_free        = atmel_ac97c_playback_hw_free,
 631         .prepare        = atmel_ac97c_playback_prepare,
 632         .trigger        = atmel_ac97c_playback_trigger,
 633         .pointer        = atmel_ac97c_playback_pointer,
 634 };
 635
 636 static struct snd_pcm_ops atmel_ac97_capture_ops = {
 637         .open           = atmel_ac97c_capture_open,
 638         .close          = atmel_ac97c_capture_close,
 639         .ioctl          = snd_pcm_lib_ioctl,
 640         .hw_params      = atmel_ac97c_capture_hw_params,
 641         .hw_free        = atmel_ac97c_capture_hw_free,
 642         .prepare        = atmel_ac97c_capture_prepare,
 643         .trigger        = atmel_ac97c_capture_trigger,
 644         .pointer        = atmel_ac97c_capture_pointer,
 645 };
 646
 647 static irqreturn_t atmel_ac97c_interrupt(int irq, void *dev)
 648 {
 649         struct atmel_ac97c      *chip  = (struct atmel_ac97c *)dev;
 650         irqreturn_t             retval = IRQ_NONE;
 651         u32                     sr     = ac97c_readl(chip, SR);
 652         u32                     casr   = ac97c_readl(chip, CASR);
 653         u32                     cosr   = ac97c_readl(chip, COSR);
 654         u32                     camr   = ac97c_readl(chip, CAMR);
 655
 656         if (sr & AC97C_SR_CAEVT) {
 657                 struct snd_pcm_runtime *runtime;
 658                 int offset, next_period, block_size;
 659                 dev_dbg(&chip->pdev->dev, "channel A event%s%s%s%s%s%s\n",
 660                                 casr & AC97C_CSR_OVRUN   ? " OVRUN"   : "",
 661                                 casr & AC97C_CSR_RXRDY   ? " RXRDY"   : "",
 662                                 casr & AC97C_CSR_UNRUN   ? " UNRUN"   : "",
 663                                 casr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
 664                                 casr & AC97C_CSR_TXRDY   ? " TXRDY"   : "",
 665                                 !casr                    ? " NONE"    : "");
 666                 if (!cpu_is_at32ap7000()) {
 667                         if ((casr & camr) & AC97C_CSR_ENDTX) {
 668                                 runtime = chip->playback_substream->runtime;
 669                                 block_size = frames_to_bytes(runtime,
 670                                                 runtime->period_size);
 671                                 chip->playback_period++;
 672
 673                                 if (chip->playback_period == runtime->periods)
 674                                         chip->playback_period = 0;
 675                                 next_period = chip->playback_period + 1;
 676                                 if (next_period == runtime->periods)
 677                                         next_period = 0;
 678
 679                                 offset = block_size * next_period;
 680
 681                                 writel(runtime->dma_addr + offset,
 682                                                 chip->regs + ATMEL_PDC_TNPR);
 683                                 writel(block_size / 2,
 684                                                 chip->regs + ATMEL_PDC_TNCR);
 685
 686                                 snd_pcm_period_elapsed(
 687                                                 chip->playback_substream);
 688                         }
 689                         if ((casr & camr) & AC97C_CSR_ENDRX) {
 690                                 runtime = chip->capture_substream->runtime;
 691                                 block_size = frames_to_bytes(runtime,
 692                                                 runtime->period_size);
 693                                 chip->capture_period++;
 694
 695                                 if (chip->capture_period == runtime->periods)
 696                                         chip->capture_period = 0;
 697                                 next_period = chip->capture_period + 1;
 698                                 if (next_period == runtime->periods)
 699                                         next_period = 0;
 700
 701                                 offset = block_size * next_period;
 702
 703                                 writel(runtime->dma_addr + offset,
 704                                                 chip->regs + ATMEL_PDC_RNPR);
 705                                 writel(block_size / 2,
 706                                                 chip->regs + ATMEL_PDC_RNCR);
 707                                 snd_pcm_period_elapsed(chip->capture_substream);
 708                         }
 709                 }
 710                 retval = IRQ_HANDLED;
 711         }
 712
 713         if (sr & AC97C_SR_COEVT) {
 714                 dev_info(&chip->pdev->dev, "codec channel event%s%s%s%s%s\n",
 715                                 cosr & AC97C_CSR_OVRUN   ? " OVRUN"   : "",
 716                                 cosr & AC97C_CSR_RXRDY   ? " RXRDY"   : "",
 717                                 cosr & AC97C_CSR_TXEMPTY ? " TXEMPTY" : "",
 718                                 cosr & AC97C_CSR_TXRDY   ? " TXRDY"   : "",
 719                                 !cosr                    ? " NONE"    : "");
 720                 retval = IRQ_HANDLED;
 721         }
 722
 723         if (retval == IRQ_NONE) {
 724                 dev_err(&chip->pdev->dev, "spurious interrupt sr 0x%08x "
 725                                 "casr 0x%08x cosr 0x%08x\n", sr, casr, cosr);
 726         }
 727
 728         return retval;
 729 }
 730
 731 static struct ac97_pcm at91_ac97_pcm_defs[] __devinitdata = {
 732         /* Playback */
 733         {
 734                 .exclusive = 1,
 735                 .r = { {
 736                         .slots = ((1 << AC97_SLOT_PCM_LEFT)
 737                                   | (1 << AC97_SLOT_PCM_RIGHT)),
 738                 } },
 739         },
 740         /* PCM in */
 741         {
 742                 .stream = 1,
 743                 .exclusive = 1,
 744                 .r = { {
 745                         .slots = ((1 << AC97_SLOT_PCM_LEFT)
 746                                         | (1 << AC97_SLOT_PCM_RIGHT)),
 747                 } }
 748         },
 749         /* Mic in */
 750         {
 751                 .stream = 1,
 752                 .exclusive = 1,
 753                 .r = { {
 754                         .slots = (1<<AC97_SLOT_MIC),
 755                 } }
 756         },
 757 };
 758
 759 static int __devinit atmel_ac97c_pcm_new(struct atmel_ac97c *chip)
 760 {
 761         struct snd_pcm          *pcm;
 762         struct snd_pcm_hardware hw = atmel_ac97c_hw;
 763         int                     capture, playback, retval, err;
 764
 765         capture = test_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
 766         playback = test_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
 767
 768         if (!cpu_is_at32ap7000()) {
 769                 err = snd_ac97_pcm_assign(chip->ac97_bus,
 770                                 ARRAY_SIZE(at91_ac97_pcm_defs),
 771                                 at91_ac97_pcm_defs);
 772                 if (err)
 773                         return err;
 774         }
 775         retval = snd_pcm_new(chip->card, chip->card->shortname,
 776                         chip->pdev->id, playback, capture, &pcm);
 777         if (retval)
 778                 return retval;
 779
 780         if (capture)
 781                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE,
 782                                 &atmel_ac97_capture_ops);
 783         if (playback)
 784                 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK,
 785                                 &atmel_ac97_playback_ops);
 786
 787         retval = snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
 788                         &chip->pdev->dev, hw.periods_min * hw.period_bytes_min,
 789                         hw.buffer_bytes_max);
 790         if (retval)
 791                 return retval;
 792
 793         pcm->private_data = chip;
 794         pcm->info_flags = 0;
 795         strcpy(pcm->name, chip->card->shortname);
 796         chip->pcm = pcm;
 797
 798         return 0;
 799 }
 800
 801 static int atmel_ac97c_mixer_new(struct atmel_ac97c *chip)
 802 {
 803         struct snd_ac97_template template;
 804         memset(&template, 0, sizeof(template));
 805         template.private_data = chip;
 806         return snd_ac97_mixer(chip->ac97_bus, &template, &chip->ac97);
 807 }
 808
 809 static void atmel_ac97c_write(struct snd_ac97 *ac97, unsigned short reg,
 810                 unsigned short val)
 811 {
 812         struct atmel_ac97c *chip = get_chip(ac97);
 813         unsigned long word;
 814         int timeout = 40;
 815
 816         word = (reg & 0x7f) << 16 | val;
 817
 818         do {
 819                 if (ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) {
 820                         ac97c_writel(chip, COTHR, word);
 821                         return;
 822                 }
 823                 udelay(1);
 824         } while (--timeout);
 825
 826         dev_dbg(&chip->pdev->dev, "codec write timeout\n");
 827 }
 828
 829 static unsigned short atmel_ac97c_read(struct snd_ac97 *ac97,
 830                 unsigned short reg)
 831 {
 832         struct atmel_ac97c *chip = get_chip(ac97);
 833         unsigned long word;
 834         int timeout = 40;
 835         int write = 10;
 836
 837         word = (0x80 | (reg & 0x7f)) << 16;
 838
 839         if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0)
 840                 ac97c_readl(chip, CORHR);
 841
 842 retry_write:
 843         timeout = 40;
 844
 845         do {
 846                 if ((ac97c_readl(chip, COSR) & AC97C_CSR_TXRDY) != 0) {
 847                         ac97c_writel(chip, COTHR, word);
 848                         goto read_reg;
 849                 }
 850                 udelay(10);
 851         } while (--timeout);
 852
 853         if (!--write)
 854                 goto timed_out;
 855         goto retry_write;
 856
 857 read_reg:
 858         do {
 859                 if ((ac97c_readl(chip, COSR) & AC97C_CSR_RXRDY) != 0) {
 860                         unsigned short val = ac97c_readl(chip, CORHR);
 861                         return val;
 862                 }
 863                 udelay(10);
 864         } while (--timeout);
 865
 866         if (!--write)
 867                 goto timed_out;
 868         goto retry_write;
 869
 870 timed_out:
 871         dev_dbg(&chip->pdev->dev, "codec read timeout\n");
 872         return 0xffff;
 873 }
 874
 875 static bool filter(struct dma_chan *chan, void *slave)
 876 {
 877         struct dw_dma_slave *dws = slave;
 878
 879         if (dws->dma_dev == chan->device->dev) {
 880                 chan->private = dws;
 881                 return true;
 882         } else
 883                 return false;
 884 }
 885
 886 static void atmel_ac97c_reset(struct atmel_ac97c *chip)
 887 {
 888         ac97c_writel(chip, MR,   0);
 889         ac97c_writel(chip, MR,   AC97C_MR_ENA);
 890         ac97c_writel(chip, CAMR, 0);
 891         ac97c_writel(chip, COMR, 0);
 892
 893         if (gpio_is_valid(chip->reset_pin)) {
 894                 gpio_set_value(chip->reset_pin, 0);
 895                 /* AC97 v2.2 specifications says minimum 1 us. */
 896                 udelay(2);
 897                 gpio_set_value(chip->reset_pin, 1);
 898         } else {
 899                 ac97c_writel(chip, MR, AC97C_MR_WRST | AC97C_MR_ENA);
 900                 udelay(2);
 901                 ac97c_writel(chip, MR, AC97C_MR_ENA);
 902         }
 903 }
 904
 905 static int __devinit atmel_ac97c_probe(struct platform_device *pdev)
 906 {
 907         struct snd_card                 *card;
 908         struct atmel_ac97c              *chip;
 909         struct resource                 *regs;
 910         struct ac97c_platform_data      *pdata;
 911         struct clk                      *pclk;
 912         static struct snd_ac97_bus_ops  ops = {
 913                 .write  = atmel_ac97c_write,
 914                 .read   = atmel_ac97c_read,
 915         };
 916         int                             retval;
 917         int                             irq;
 918
 919         regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 920         if (!regs) {
 921                 dev_dbg(&pdev->dev, "no memory resource\n");
 922                 return -ENXIO;
 923         }
 924
 925         pdata = pdev->dev.platform_data;
 926         if (!pdata) {
 927                 dev_dbg(&pdev->dev, "no platform data\n");
 928                 return -ENXIO;
 929         }
 930
 931         irq = platform_get_irq(pdev, 0);
 932         if (irq < 0) {
 933                 dev_dbg(&pdev->dev, "could not get irq\n");
 934                 return -ENXIO;
 935         }
 936
 937         if (cpu_is_at32ap7000()) {
 938                 pclk = clk_get(&pdev->dev, "pclk");
 939         } else {
 940                 pclk = clk_get(&pdev->dev, "ac97_clk");
 941         }
 942
 943         if (IS_ERR(pclk)) {
 944                 dev_dbg(&pdev->dev, "no peripheral clock\n");
 945                 return PTR_ERR(pclk);
 946         }
 947         clk_enable(pclk);
 948
 949         retval = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
 950                         THIS_MODULE, sizeof(struct atmel_ac97c), &card);
 951         if (retval) {
 952                 dev_dbg(&pdev->dev, "could not create sound card device\n");
 953                 goto err_snd_card_new;
 954         }
 955
 956         chip = get_chip(card);
 957
 958         retval = request_irq(irq, atmel_ac97c_interrupt, 0, "AC97C", chip);
 959         if (retval) {
 960                 dev_dbg(&pdev->dev, "unable to request irq %d\n", irq);
 961                 goto err_request_irq;
 962         }
 963         chip->irq = irq;
 964
 965         spin_lock_init(&chip->lock);
 966
 967         strcpy(card->driver, "Atmel AC97C");
 968         strcpy(card->shortname, "Atmel AC97C");
 969         sprintf(card->longname, "Atmel AC97 controller");
 970
 971         chip->card = card;
 972         chip->pclk = pclk;
 973         chip->pdev = pdev;
 974         chip->regs = ioremap(regs->start, resource_size(regs));
 975
 976         if (!chip->regs) {
 977                 dev_dbg(&pdev->dev, "could not remap register memory\n");
 978                 retval = -ENOMEM;
 979                 goto err_ioremap;
 980         }
 981
 982         if (gpio_is_valid(pdata->reset_pin)) {
 983                 if (gpio_request(pdata->reset_pin, "reset_pin")) {
 984                         dev_dbg(&pdev->dev, "reset pin not available\n");
 985                         chip->reset_pin = -ENODEV;
 986                 } else {
 987                         gpio_direction_output(pdata->reset_pin, 1);
 988                         chip->reset_pin = pdata->reset_pin;
 989                 }
 990         } else {
 991                 chip->reset_pin = -EINVAL;
 992         }
 993
 994         snd_card_set_dev(card, &pdev->dev);
 995
 996         atmel_ac97c_reset(chip);
 997
 998         /* Enable overrun interrupt from codec channel */
 999         ac97c_writel(chip, COMR, AC97C_CSR_OVRUN);
1000         ac97c_writel(chip, IER, ac97c_readl(chip, IMR) | AC97C_SR_COEVT);
1001
1002         retval = snd_ac97_bus(card, 0, &ops, chip, &chip->ac97_bus);
1003         if (retval) {
1004                 dev_dbg(&pdev->dev, "could not register on ac97 bus\n");
1005                 goto err_ac97_bus;
1006         }
1007
1008         retval = atmel_ac97c_mixer_new(chip);
1009         if (retval) {
1010                 dev_dbg(&pdev->dev, "could not register ac97 mixer\n");
1011                 goto err_ac97_bus;
1012         }
1013
1014         if (cpu_is_at32ap7000()) {
1015                 if (pdata->rx_dws.dma_dev) {
1016                         dma_cap_mask_t mask;
1017
1018                         dma_cap_zero(mask);
1019                         dma_cap_set(DMA_SLAVE, mask);
1020
1021                         chip->dma.rx_chan = dma_request_channel(mask, filter,
1022                                                                 &pdata->rx_dws);
1023                         if (chip->dma.rx_chan) {
1024                                 struct dma_slave_config dma_conf = {
1025                                         .src_addr = regs->start + AC97C_CARHR +
1026                                                 2,
1027                                         .src_addr_width =
1028                                                 DMA_SLAVE_BUSWIDTH_2_BYTES,
1029                                         .src_maxburst = 1,
1030                                         .dst_maxburst = 1,
1031                                         .direction = DMA_DEV_TO_MEM,
1032                                         .device_fc = false,
1033                                 };
1034
1035                                 dmaengine_slave_config(chip->dma.rx_chan,
1036                                                 &dma_conf);
1037                         }
1038
1039                         dev_info(&chip->pdev->dev, "using %s for DMA RX\n",
1040                                 dev_name(&chip->dma.rx_chan->dev->device));
1041                         set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1042                 }
1043
1044                 if (pdata->tx_dws.dma_dev) {
1045                         dma_cap_mask_t mask;
1046
1047                         dma_cap_zero(mask);
1048                         dma_cap_set(DMA_SLAVE, mask);
1049
1050                         chip->dma.tx_chan = dma_request_channel(mask, filter,
1051                                                                 &pdata->tx_dws);
1052                         if (chip->dma.tx_chan) {
1053                                 struct dma_slave_config dma_conf = {
1054                                         .dst_addr = regs->start + AC97C_CATHR +
1055                                                 2,
1056                                         .dst_addr_width =
1057                                                 DMA_SLAVE_BUSWIDTH_2_BYTES,
1058                                         .src_maxburst = 1,
1059                                         .dst_maxburst = 1,
1060                                         .direction = DMA_MEM_TO_DEV,
1061                                         .device_fc = false,
1062                                 };
1063
1064                                 dmaengine_slave_config(chip->dma.tx_chan,
1065                                                 &dma_conf);
1066                         }
1067
1068                         dev_info(&chip->pdev->dev, "using %s for DMA TX\n",
1069                                 dev_name(&chip->dma.tx_chan->dev->device));
1070                         set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1071                 }
1072
1073                 if (!test_bit(DMA_RX_CHAN_PRESENT, &chip->flags) &&
1074                                 !test_bit(DMA_TX_CHAN_PRESENT, &chip->flags)) {
1075                         dev_dbg(&pdev->dev, "DMA not available\n");
1076                         retval = -ENODEV;
1077                         goto err_dma;
1078                 }
1079         } else {
1080                 /* Just pretend that we have DMA channel(for at91 i is actually
1081                  * the PDC) */
1082                 set_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1083                 set_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1084         }
1085
1086         retval = atmel_ac97c_pcm_new(chip);
1087         if (retval) {
1088                 dev_dbg(&pdev->dev, "could not register ac97 pcm device\n");
1089                 goto err_dma;
1090         }
1091
1092         retval = snd_card_register(card);
1093         if (retval) {
1094                 dev_dbg(&pdev->dev, "could not register sound card\n");
1095                 goto err_dma;
1096         }
1097
1098         platform_set_drvdata(pdev, card);
1099
1100         dev_info(&pdev->dev, "Atmel AC97 controller at 0x%p, irq = %d\n",
1101                         chip->regs, irq);
1102
1103         return 0;
1104
1105 err_dma:
1106         if (cpu_is_at32ap7000()) {
1107                 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1108                         dma_release_channel(chip->dma.rx_chan);
1109                 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1110                         dma_release_channel(chip->dma.tx_chan);
1111                 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1112                 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1113                 chip->dma.rx_chan = NULL;
1114                 chip->dma.tx_chan = NULL;
1115         }
1116 err_ac97_bus:
1117         snd_card_set_dev(card, NULL);
1118
1119         if (gpio_is_valid(chip->reset_pin))
1120                 gpio_free(chip->reset_pin);
1121
1122         iounmap(chip->regs);
1123 err_ioremap:
1124         free_irq(irq, chip);
1125 err_request_irq:
1126         snd_card_free(card);
1127 err_snd_card_new:
1128         clk_disable(pclk);
1129         clk_put(pclk);
1130         return retval;
1131 }
1132
1133 #ifdef CONFIG_PM_SLEEP
1134 static int atmel_ac97c_suspend(struct device *pdev)
1135 {
1136         struct snd_card *card = dev_get_drvdata(pdev);
1137         struct atmel_ac97c *chip = card->private_data;
1138
1139         if (cpu_is_at32ap7000()) {
1140                 if (test_bit(DMA_RX_READY, &chip->flags))
1141                         dw_dma_cyclic_stop(chip->dma.rx_chan);
1142                 if (test_bit(DMA_TX_READY, &chip->flags))
1143                         dw_dma_cyclic_stop(chip->dma.tx_chan);
1144         }
1145         clk_disable(chip->pclk);
1146
1147         return 0;
1148 }
1149
1150 static int atmel_ac97c_resume(struct device *pdev)
1151 {
1152         struct snd_card *card = dev_get_drvdata(pdev);
1153         struct atmel_ac97c *chip = card->private_data;
1154
1155         clk_enable(chip->pclk);
1156         if (cpu_is_at32ap7000()) {
1157                 if (test_bit(DMA_RX_READY, &chip->flags))
1158                         dw_dma_cyclic_start(chip->dma.rx_chan);
1159                 if (test_bit(DMA_TX_READY, &chip->flags))
1160                         dw_dma_cyclic_start(chip->dma.tx_chan);
1161         }
1162         return 0;
1163 }
1164
1165 static SIMPLE_DEV_PM_OPS(atmel_ac97c_pm, atmel_ac97c_suspend, atmel_ac97c_resume);
1166 #define ATMEL_AC97C_PM_OPS      &atmel_ac97c_pm
1167 #else
1168 #define ATMEL_AC97C_PM_OPS      NULL
1169 #endif
1170
1171 static int __devexit atmel_ac97c_remove(struct platform_device *pdev)
1172 {
1173         struct snd_card *card = platform_get_drvdata(pdev);
1174         struct atmel_ac97c *chip = get_chip(card);
1175
1176         if (gpio_is_valid(chip->reset_pin))
1177                 gpio_free(chip->reset_pin);
1178
1179         ac97c_writel(chip, CAMR, 0);
1180         ac97c_writel(chip, COMR, 0);
1181         ac97c_writel(chip, MR,   0);
1182
1183         clk_disable(chip->pclk);
1184         clk_put(chip->pclk);
1185         iounmap(chip->regs);
1186         free_irq(chip->irq, chip);
1187
1188         if (cpu_is_at32ap7000()) {
1189                 if (test_bit(DMA_RX_CHAN_PRESENT, &chip->flags))
1190                         dma_release_channel(chip->dma.rx_chan);
1191                 if (test_bit(DMA_TX_CHAN_PRESENT, &chip->flags))
1192                         dma_release_channel(chip->dma.tx_chan);
1193                 clear_bit(DMA_RX_CHAN_PRESENT, &chip->flags);
1194                 clear_bit(DMA_TX_CHAN_PRESENT, &chip->flags);
1195                 chip->dma.rx_chan = NULL;
1196                 chip->dma.tx_chan = NULL;
1197         }
1198
1199         snd_card_set_dev(card, NULL);
1200         snd_card_free(card);
1201
1202         platform_set_drvdata(pdev, NULL);
1203
1204         return 0;
1205 }
1206
1207 static struct platform_driver atmel_ac97c_driver = {
1208         .remove         = __devexit_p(atmel_ac97c_remove),
1209         .driver         = {
1210                 .name   = "atmel_ac97c",
1211                 .owner  = THIS_MODULE,
1212                 .pm     = ATMEL_AC97C_PM_OPS,
1213         },
1214 };
1215
1216 static int __init atmel_ac97c_init(void)
1217 {
1218         return platform_driver_probe(&atmel_ac97c_driver,
1219                         atmel_ac97c_probe);
1220 }
1221 module_init(atmel_ac97c_init);
1222
1223 static void __exit atmel_ac97c_exit(void)
1224 {
1225         platform_driver_unregister(&atmel_ac97c_driver);
1226 }
1227 module_exit(atmel_ac97c_exit);
1228
1229 MODULE_LICENSE("GPL");
1230 MODULE_DESCRIPTION("Driver for Atmel AC97 controller");
1231 MODULE_AUTHOR("Hans-Christian Egtvedt <egtvedt@samfundet.no>");