2 * linux/sound/arm/aaci.c - ARM PrimeCell AACI PL041 driver
4 * Copyright (C) 2003 Deep Blue Solutions Ltd, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * Documentation: ARM DDI 0173B
12 #include <linux/module.h>
13 #include <linux/delay.h>
14 #include <linux/init.h>
15 #include <linux/ioport.h>
16 #include <linux/device.h>
17 #include <linux/spinlock.h>
18 #include <linux/interrupt.h>
19 #include <linux/err.h>
20 #include <linux/amba/bus.h>
24 #include <asm/sizes.h>
26 #include <sound/core.h>
27 #include <sound/initval.h>
28 #include <sound/ac97_codec.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
34 #define DRIVER_NAME "aaci-pl041"
37 * PM support is not complete. Turn it off.
41 static void aaci_ac97_select_codec(struct aaci *aaci, struct snd_ac97 *ac97)
43 u32 v, maincr = aaci->maincr | MAINCR_SCRA(ac97->num);
46 * Ensure that the slot 1/2 RX registers are empty.
48 v = readl(aaci->base + AACI_SLFR);
50 readl(aaci->base + AACI_SL2RX);
52 readl(aaci->base + AACI_SL1RX);
54 writel(maincr, aaci->base + AACI_MAINCR);
59 * The recommended use of programming the external codec through slot 1
60 * and slot 2 data is to use the channels during setup routines and the
61 * slot register at any other time. The data written into slot 1, slot 2
62 * and slot 12 registers is transmitted only when their corresponding
63 * SI1TxEn, SI2TxEn and SI12TxEn bits are set in the AACI_MAINCR
66 static void aaci_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
69 struct aaci *aaci = ac97->private_data;
76 mutex_lock(&aaci->ac97_sem);
78 aaci_ac97_select_codec(aaci, ac97);
81 * P54: You must ensure that AACI_SL2TX is always written
82 * to, if required, before data is written to AACI_SL1TX.
84 writel(val << 4, aaci->base + AACI_SL2TX);
85 writel(reg << 12, aaci->base + AACI_SL1TX);
88 * Wait for the transmission of both slots to complete.
91 v = readl(aaci->base + AACI_SLFR);
92 } while ((v & (SLFR_1TXB|SLFR_2TXB)) && --timeout);
95 dev_err(&aaci->dev->dev,
96 "timeout waiting for write to complete\n");
98 mutex_unlock(&aaci->ac97_sem);
102 * Read an AC'97 register.
104 static unsigned short aaci_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
106 struct aaci *aaci = ac97->private_data;
114 mutex_lock(&aaci->ac97_sem);
116 aaci_ac97_select_codec(aaci, ac97);
119 * Write the register address to slot 1.
121 writel((reg << 12) | (1 << 19), aaci->base + AACI_SL1TX);
124 * Wait for the transmission to complete.
127 v = readl(aaci->base + AACI_SLFR);
128 } while ((v & SLFR_1TXB) && --timeout);
131 dev_err(&aaci->dev->dev, "timeout on slot 1 TX busy\n");
137 * Give the AC'97 codec more than enough time
138 * to respond. (42us = ~2 frames at 48kHz.)
143 * Wait for slot 2 to indicate data.
148 v = readl(aaci->base + AACI_SLFR) & (SLFR_1RXV|SLFR_2RXV);
149 } while ((v != (SLFR_1RXV|SLFR_2RXV)) && --timeout);
152 dev_err(&aaci->dev->dev, "timeout on RX valid\n");
158 v = readl(aaci->base + AACI_SL1RX) >> 12;
160 v = readl(aaci->base + AACI_SL2RX) >> 4;
162 } else if (--retries) {
163 dev_warn(&aaci->dev->dev,
164 "ac97 read back fail. retry\n");
167 dev_warn(&aaci->dev->dev,
168 "wrong ac97 register read back (%x != %x)\n",
174 mutex_unlock(&aaci->ac97_sem);
178 static inline void aaci_chan_wait_ready(struct aaci_runtime *aacirun)
184 val = readl(aacirun->base + AACI_SR);
185 } while (val & (SR_TXB|SR_RXB) && timeout--);
193 static void aaci_fifo_irq(struct aaci *aaci, int channel, u32 mask)
195 if (mask & ISR_ORINTR) {
196 dev_warn(&aaci->dev->dev, "RX overrun on chan %d\n", channel);
197 writel(ICLR_RXOEC1 << channel, aaci->base + AACI_INTCLR);
200 if (mask & ISR_RXTOINTR) {
201 dev_warn(&aaci->dev->dev, "RX timeout on chan %d\n", channel);
202 writel(ICLR_RXTOFEC1 << channel, aaci->base + AACI_INTCLR);
205 if (mask & ISR_RXINTR) {
206 struct aaci_runtime *aacirun = &aaci->capture;
209 if (!aacirun->substream || !aacirun->start) {
210 dev_warn(&aaci->dev->dev, "RX interrupt???\n");
211 writel(0, aacirun->base + AACI_IE);
217 unsigned int len = aacirun->fifosz;
220 if (aacirun->bytes <= 0) {
221 aacirun->bytes += aacirun->period;
223 spin_unlock(&aaci->lock);
224 snd_pcm_period_elapsed(aacirun->substream);
225 spin_lock(&aaci->lock);
227 if (!(aacirun->cr & CR_EN))
230 val = readl(aacirun->base + AACI_SR);
231 if (!(val & SR_RXHF))
233 if (!(val & SR_RXFF))
236 aacirun->bytes -= len;
238 /* reading 16 bytes at a time */
239 for( ; len > 0; len -= 16) {
241 "ldmia %1, {r0, r1, r2, r3}\n\t"
242 "stmia %0!, {r0, r1, r2, r3}"
244 : "r" (aacirun->fifo)
245 : "r0", "r1", "r2", "r3", "cc");
247 if (ptr >= aacirun->end)
248 ptr = aacirun->start;
254 if (mask & ISR_URINTR) {
255 dev_dbg(&aaci->dev->dev, "TX underrun on chan %d\n", channel);
256 writel(ICLR_TXUEC1 << channel, aaci->base + AACI_INTCLR);
259 if (mask & ISR_TXINTR) {
260 struct aaci_runtime *aacirun = &aaci->playback;
263 if (!aacirun->substream || !aacirun->start) {
264 dev_warn(&aaci->dev->dev, "TX interrupt???\n");
265 writel(0, aacirun->base + AACI_IE);
271 unsigned int len = aacirun->fifosz;
274 if (aacirun->bytes <= 0) {
275 aacirun->bytes += aacirun->period;
277 spin_unlock(&aaci->lock);
278 snd_pcm_period_elapsed(aacirun->substream);
279 spin_lock(&aaci->lock);
281 if (!(aacirun->cr & CR_EN))
284 val = readl(aacirun->base + AACI_SR);
285 if (!(val & SR_TXHE))
287 if (!(val & SR_TXFE))
290 aacirun->bytes -= len;
292 /* writing 16 bytes at a time */
293 for ( ; len > 0; len -= 16) {
295 "ldmia %0!, {r0, r1, r2, r3}\n\t"
296 "stmia %1, {r0, r1, r2, r3}"
298 : "r" (aacirun->fifo)
299 : "r0", "r1", "r2", "r3", "cc");
301 if (ptr >= aacirun->end)
302 ptr = aacirun->start;
310 static irqreturn_t aaci_irq(int irq, void *devid)
312 struct aaci *aaci = devid;
316 spin_lock(&aaci->lock);
317 mask = readl(aaci->base + AACI_ALLINTS);
320 for (i = 0; i < 4; i++, m >>= 7) {
322 aaci_fifo_irq(aaci, i, m);
326 spin_unlock(&aaci->lock);
328 return mask ? IRQ_HANDLED : IRQ_NONE;
338 unsigned char codec_idx;
339 unsigned char rate_idx;
342 static struct aaci_stream aaci_streams[] = {
345 .rate_idx = AC97_RATES_FRONT_DAC,
347 [ACSTREAM_SURROUND] = {
349 .rate_idx = AC97_RATES_SURR_DAC,
353 .rate_idx = AC97_RATES_LFE_DAC,
357 static inline unsigned int aaci_rate_mask(struct aaci *aaci, int streamid)
359 struct aaci_stream *s = aaci_streams + streamid;
360 return aaci->ac97_bus->codec[s->codec_idx]->rates[s->rate_idx];
363 static unsigned int rate_list[] = {
364 5512, 8000, 11025, 16000, 22050, 32000, 44100,
365 48000, 64000, 88200, 96000, 176400, 192000
369 * Double-rate rule: we can support double rate iff channels == 2
373 aaci_rule_rate_by_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
375 struct aaci *aaci = rule->private;
376 unsigned int rate_mask = SNDRV_PCM_RATE_8000_48000|SNDRV_PCM_RATE_5512;
377 struct snd_interval *c = hw_param_interval(p, SNDRV_PCM_HW_PARAM_CHANNELS);
381 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_LFE);
383 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_SURROUND);
385 rate_mask &= aaci_rate_mask(aaci, ACSTREAM_FRONT);
388 return snd_interval_list(hw_param_interval(p, rule->var),
389 ARRAY_SIZE(rate_list), rate_list,
393 static struct snd_pcm_hardware aaci_hw_info = {
394 .info = SNDRV_PCM_INFO_MMAP |
395 SNDRV_PCM_INFO_MMAP_VALID |
396 SNDRV_PCM_INFO_INTERLEAVED |
397 SNDRV_PCM_INFO_BLOCK_TRANSFER |
398 SNDRV_PCM_INFO_RESUME,
401 * ALSA doesn't support 18-bit or 20-bit packed into 32-bit
402 * words. It also doesn't support 12-bit at all.
404 .formats = SNDRV_PCM_FMTBIT_S16_LE,
406 /* should this be continuous or knot? */
407 .rates = SNDRV_PCM_RATE_CONTINUOUS,
412 .buffer_bytes_max = 64 * 1024,
413 .period_bytes_min = 256,
414 .period_bytes_max = PAGE_SIZE,
416 .periods_max = PAGE_SIZE / 16,
419 static int __aaci_pcm_open(struct aaci *aaci,
420 struct snd_pcm_substream *substream,
421 struct aaci_runtime *aacirun)
423 struct snd_pcm_runtime *runtime = substream->runtime;
426 aacirun->substream = substream;
427 runtime->private_data = aacirun;
428 runtime->hw = aaci_hw_info;
431 * FIXME: ALSA specifies fifo_size in bytes. If we're in normal
432 * mode, each 32-bit word contains one sample. If we're in
433 * compact mode, each 32-bit word contains two samples, effectively
434 * halving the FIFO size. However, we don't know for sure which
435 * we'll be using at this point. We set this to the lower limit.
437 runtime->hw.fifo_size = aaci->fifosize * 2;
440 * Add rule describing hardware rate dependency
441 * on the number of channels.
443 ret = snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
444 aaci_rule_rate_by_channels, aaci,
445 SNDRV_PCM_HW_PARAM_CHANNELS,
446 SNDRV_PCM_HW_PARAM_RATE, -1);
450 ret = request_irq(aaci->dev->irq[0], aaci_irq, IRQF_SHARED|IRQF_DISABLED,
465 static int aaci_pcm_close(struct snd_pcm_substream *substream)
467 struct aaci *aaci = substream->private_data;
468 struct aaci_runtime *aacirun = substream->runtime->private_data;
470 WARN_ON(aacirun->cr & CR_EN);
472 aacirun->substream = NULL;
473 free_irq(aaci->dev->irq[0], aaci);
478 static int aaci_pcm_hw_free(struct snd_pcm_substream *substream)
480 struct aaci_runtime *aacirun = substream->runtime->private_data;
483 * This must not be called with the device enabled.
485 WARN_ON(aacirun->cr & CR_EN);
487 if (aacirun->pcm_open)
488 snd_ac97_pcm_close(aacirun->pcm);
489 aacirun->pcm_open = 0;
492 * Clear out the DMA and any allocated buffers.
494 snd_pcm_lib_free_pages(substream);
499 static int aaci_pcm_hw_params(struct snd_pcm_substream *substream,
500 struct aaci_runtime *aacirun,
501 struct snd_pcm_hw_params *params)
505 aaci_pcm_hw_free(substream);
506 if (aacirun->pcm_open) {
507 snd_ac97_pcm_close(aacirun->pcm);
508 aacirun->pcm_open = 0;
511 err = snd_pcm_lib_malloc_pages(substream,
512 params_buffer_bytes(params));
516 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
517 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
518 params_channels(params),
519 aacirun->pcm->r[0].slots);
521 err = snd_ac97_pcm_open(aacirun->pcm, params_rate(params),
522 params_channels(params),
523 aacirun->pcm->r[0].slots);
528 aacirun->pcm_open = 1;
534 static int aaci_pcm_prepare(struct snd_pcm_substream *substream)
536 struct snd_pcm_runtime *runtime = substream->runtime;
537 struct aaci_runtime *aacirun = runtime->private_data;
539 aacirun->start = (void *)runtime->dma_area;
540 aacirun->end = aacirun->start + runtime->dma_bytes;
541 aacirun->ptr = aacirun->start;
543 aacirun->bytes = frames_to_bytes(runtime, runtime->period_size);
548 static snd_pcm_uframes_t aaci_pcm_pointer(struct snd_pcm_substream *substream)
550 struct snd_pcm_runtime *runtime = substream->runtime;
551 struct aaci_runtime *aacirun = runtime->private_data;
552 ssize_t bytes = aacirun->ptr - aacirun->start;
554 return bytes_to_frames(runtime, bytes);
559 * Playback specific ALSA stuff
561 static const u32 channels_to_txmask[] = {
562 [2] = CR_SL3 | CR_SL4,
563 [4] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8,
564 [6] = CR_SL3 | CR_SL4 | CR_SL7 | CR_SL8 | CR_SL6 | CR_SL9,
568 * We can support two and four channel audio. Unfortunately
569 * six channel audio requires a non-standard channel ordering:
571 * 4 -> FL(3), FR(4), SL(7), SR(8)
572 * 6 -> FL(3), FR(4), SL(7), SR(8), C(6), LFE(9) (required)
573 * FL(3), FR(4), C(6), SL(7), SR(8), LFE(9) (actual)
574 * This requires an ALSA configuration file to correct.
576 static unsigned int channel_list[] = { 2, 4, 6 };
579 aaci_rule_channels(struct snd_pcm_hw_params *p, struct snd_pcm_hw_rule *rule)
581 struct aaci *aaci = rule->private;
582 unsigned int chan_mask = 1 << 0, slots;
585 * pcms[0] is the our 5.1 PCM instance.
587 slots = aaci->ac97_bus->pcms[0].r[0].slots;
588 if (slots & (1 << AC97_SLOT_PCM_SLEFT)) {
590 if (slots & (1 << AC97_SLOT_LFE))
594 return snd_interval_list(hw_param_interval(p, rule->var),
595 ARRAY_SIZE(channel_list), channel_list,
599 static int aaci_pcm_open(struct snd_pcm_substream *substream)
601 struct aaci *aaci = substream->private_data;
605 * Add rule describing channel dependency.
607 ret = snd_pcm_hw_rule_add(substream->runtime, 0,
608 SNDRV_PCM_HW_PARAM_CHANNELS,
609 aaci_rule_channels, aaci,
610 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
614 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
615 ret = __aaci_pcm_open(aaci, substream, &aaci->playback);
617 ret = __aaci_pcm_open(aaci, substream, &aaci->capture);
622 static int aaci_pcm_playback_hw_params(struct snd_pcm_substream *substream,
623 struct snd_pcm_hw_params *params)
625 struct aaci *aaci = substream->private_data;
626 struct aaci_runtime *aacirun = substream->runtime->private_data;
627 unsigned int channels = params_channels(params);
630 WARN_ON(channels >= ARRAY_SIZE(channels_to_txmask) ||
631 !channels_to_txmask[channels]);
633 ret = aaci_pcm_hw_params(substream, aacirun, params);
636 * Enable FIFO, compact mode, 16 bits per sample.
637 * FIXME: double rate slots?
640 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
641 aacirun->cr |= channels_to_txmask[channels];
643 aacirun->fifosz = aaci->fifosize * 4;
644 if (aacirun->cr & CR_COMPACT)
645 aacirun->fifosz >>= 1;
650 static void aaci_pcm_playback_stop(struct aaci_runtime *aacirun)
654 ie = readl(aacirun->base + AACI_IE);
655 ie &= ~(IE_URIE|IE_TXIE);
656 writel(ie, aacirun->base + AACI_IE);
657 aacirun->cr &= ~CR_EN;
658 aaci_chan_wait_ready(aacirun);
659 writel(aacirun->cr, aacirun->base + AACI_TXCR);
662 static void aaci_pcm_playback_start(struct aaci_runtime *aacirun)
666 aaci_chan_wait_ready(aacirun);
667 aacirun->cr |= CR_EN;
669 ie = readl(aacirun->base + AACI_IE);
670 ie |= IE_URIE | IE_TXIE;
671 writel(ie, aacirun->base + AACI_IE);
672 writel(aacirun->cr, aacirun->base + AACI_TXCR);
675 static int aaci_pcm_playback_trigger(struct snd_pcm_substream *substream, int cmd)
677 struct aaci *aaci = substream->private_data;
678 struct aaci_runtime *aacirun = substream->runtime->private_data;
682 spin_lock_irqsave(&aaci->lock, flags);
684 case SNDRV_PCM_TRIGGER_START:
685 aaci_pcm_playback_start(aacirun);
688 case SNDRV_PCM_TRIGGER_RESUME:
689 aaci_pcm_playback_start(aacirun);
692 case SNDRV_PCM_TRIGGER_STOP:
693 aaci_pcm_playback_stop(aacirun);
696 case SNDRV_PCM_TRIGGER_SUSPEND:
697 aaci_pcm_playback_stop(aacirun);
700 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
703 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
709 spin_unlock_irqrestore(&aaci->lock, flags);
714 static struct snd_pcm_ops aaci_playback_ops = {
715 .open = aaci_pcm_open,
716 .close = aaci_pcm_close,
717 .ioctl = snd_pcm_lib_ioctl,
718 .hw_params = aaci_pcm_playback_hw_params,
719 .hw_free = aaci_pcm_hw_free,
720 .prepare = aaci_pcm_prepare,
721 .trigger = aaci_pcm_playback_trigger,
722 .pointer = aaci_pcm_pointer,
725 static int aaci_pcm_capture_hw_params(struct snd_pcm_substream *substream,
726 struct snd_pcm_hw_params *params)
728 struct aaci *aaci = substream->private_data;
729 struct aaci_runtime *aacirun = substream->runtime->private_data;
732 ret = aaci_pcm_hw_params(substream, aacirun, params);
735 aacirun->cr = CR_FEN | CR_COMPACT | CR_SZ16;
737 /* Line in record: slot 3 and 4 */
738 aacirun->cr |= CR_SL3 | CR_SL4;
740 aacirun->fifosz = aaci->fifosize * 4;
742 if (aacirun->cr & CR_COMPACT)
743 aacirun->fifosz >>= 1;
748 static void aaci_pcm_capture_stop(struct aaci_runtime *aacirun)
752 aaci_chan_wait_ready(aacirun);
754 ie = readl(aacirun->base + AACI_IE);
755 ie &= ~(IE_ORIE | IE_RXIE);
756 writel(ie, aacirun->base+AACI_IE);
758 aacirun->cr &= ~CR_EN;
760 writel(aacirun->cr, aacirun->base + AACI_RXCR);
763 static void aaci_pcm_capture_start(struct aaci_runtime *aacirun)
767 aaci_chan_wait_ready(aacirun);
770 /* RX Timeout value: bits 28:17 in RXCR */
771 aacirun->cr |= 0xf << 17;
774 aacirun->cr |= CR_EN;
775 writel(aacirun->cr, aacirun->base + AACI_RXCR);
777 ie = readl(aacirun->base + AACI_IE);
778 ie |= IE_ORIE |IE_RXIE; // overrun and rx interrupt -- half full
779 writel(ie, aacirun->base + AACI_IE);
782 static int aaci_pcm_capture_trigger(struct snd_pcm_substream *substream, int cmd)
784 struct aaci *aaci = substream->private_data;
785 struct aaci_runtime *aacirun = substream->runtime->private_data;
789 spin_lock_irqsave(&aaci->lock, flags);
792 case SNDRV_PCM_TRIGGER_START:
793 aaci_pcm_capture_start(aacirun);
796 case SNDRV_PCM_TRIGGER_RESUME:
797 aaci_pcm_capture_start(aacirun);
800 case SNDRV_PCM_TRIGGER_STOP:
801 aaci_pcm_capture_stop(aacirun);
804 case SNDRV_PCM_TRIGGER_SUSPEND:
805 aaci_pcm_capture_stop(aacirun);
808 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
811 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
818 spin_unlock_irqrestore(&aaci->lock, flags);
823 static int aaci_pcm_capture_prepare(struct snd_pcm_substream *substream)
825 struct snd_pcm_runtime *runtime = substream->runtime;
826 struct aaci *aaci = substream->private_data;
828 aaci_pcm_prepare(substream);
830 /* allow changing of sample rate */
831 aaci_ac97_write(aaci->ac97, AC97_EXTENDED_STATUS, 0x0001); /* VRA */
832 aaci_ac97_write(aaci->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
833 aaci_ac97_write(aaci->ac97, AC97_PCM_MIC_ADC_RATE, runtime->rate);
835 /* Record select: Mic: 0, Aux: 3, Line: 4 */
836 aaci_ac97_write(aaci->ac97, AC97_REC_SEL, 0x0404);
841 static struct snd_pcm_ops aaci_capture_ops = {
842 .open = aaci_pcm_open,
843 .close = aaci_pcm_close,
844 .ioctl = snd_pcm_lib_ioctl,
845 .hw_params = aaci_pcm_capture_hw_params,
846 .hw_free = aaci_pcm_hw_free,
847 .prepare = aaci_pcm_capture_prepare,
848 .trigger = aaci_pcm_capture_trigger,
849 .pointer = aaci_pcm_pointer,
856 static int aaci_do_suspend(struct snd_card *card, unsigned int state)
858 struct aaci *aaci = card->private_data;
859 snd_power_change_state(card, SNDRV_CTL_POWER_D3cold);
860 snd_pcm_suspend_all(aaci->pcm);
864 static int aaci_do_resume(struct snd_card *card, unsigned int state)
866 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
870 static int aaci_suspend(struct amba_device *dev, pm_message_t state)
872 struct snd_card *card = amba_get_drvdata(dev);
873 return card ? aaci_do_suspend(card) : 0;
876 static int aaci_resume(struct amba_device *dev)
878 struct snd_card *card = amba_get_drvdata(dev);
879 return card ? aaci_do_resume(card) : 0;
882 #define aaci_do_suspend NULL
883 #define aaci_do_resume NULL
884 #define aaci_suspend NULL
885 #define aaci_resume NULL
889 static struct ac97_pcm ac97_defs[] __devinitdata = {
890 [0] = { /* Front PCM */
894 .slots = (1 << AC97_SLOT_PCM_LEFT) |
895 (1 << AC97_SLOT_PCM_RIGHT) |
896 (1 << AC97_SLOT_PCM_CENTER) |
897 (1 << AC97_SLOT_PCM_SLEFT) |
898 (1 << AC97_SLOT_PCM_SRIGHT) |
899 (1 << AC97_SLOT_LFE),
908 .slots = (1 << AC97_SLOT_PCM_LEFT) |
909 (1 << AC97_SLOT_PCM_RIGHT),
918 .slots = (1 << AC97_SLOT_MIC),
924 static struct snd_ac97_bus_ops aaci_bus_ops = {
925 .write = aaci_ac97_write,
926 .read = aaci_ac97_read,
929 static int __devinit aaci_probe_ac97(struct aaci *aaci)
931 struct snd_ac97_template ac97_template;
932 struct snd_ac97_bus *ac97_bus;
933 struct snd_ac97 *ac97;
936 writel(0, aaci->base + AC97_POWERDOWN);
938 * Assert AACIRESET for 2us
940 writel(0, aaci->base + AACI_RESET);
942 writel(RESET_NRST, aaci->base + AACI_RESET);
945 * Give the AC'97 codec more than enough time
946 * to wake up. (42us = ~2 frames at 48kHz.)
950 ret = snd_ac97_bus(aaci->card, 0, &aaci_bus_ops, aaci, &ac97_bus);
954 ac97_bus->clock = 48000;
955 aaci->ac97_bus = ac97_bus;
957 memset(&ac97_template, 0, sizeof(struct snd_ac97_template));
958 ac97_template.private_data = aaci;
959 ac97_template.num = 0;
960 ac97_template.scaps = AC97_SCAP_SKIP_MODEM;
962 ret = snd_ac97_mixer(ac97_bus, &ac97_template, &ac97);
968 * Disable AC97 PC Beep input on audio codecs.
970 if (ac97_is_audio(ac97))
971 snd_ac97_write_cache(ac97, AC97_PC_BEEP, 0x801e);
973 ret = snd_ac97_pcm_assign(ac97_bus, ARRAY_SIZE(ac97_defs), ac97_defs);
977 aaci->playback.pcm = &ac97_bus->pcms[0];
978 aaci->capture.pcm = &ac97_bus->pcms[1];
984 static void aaci_free_card(struct snd_card *card)
986 struct aaci *aaci = card->private_data;
991 static struct aaci * __devinit aaci_init_card(struct amba_device *dev)
994 struct snd_card *card;
997 err = snd_card_create(SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1,
998 THIS_MODULE, sizeof(struct aaci), &card);
1002 card->private_free = aaci_free_card;
1004 strlcpy(card->driver, DRIVER_NAME, sizeof(card->driver));
1005 strlcpy(card->shortname, "ARM AC'97 Interface", sizeof(card->shortname));
1006 snprintf(card->longname, sizeof(card->longname),
1007 "%s at 0x%016llx, irq %d",
1008 card->shortname, (unsigned long long)dev->res.start,
1011 aaci = card->private_data;
1012 mutex_init(&aaci->ac97_sem);
1013 spin_lock_init(&aaci->lock);
1017 /* Set MAINCR to allow slot 1 and 2 data IO */
1018 aaci->maincr = MAINCR_IE | MAINCR_SL1RXEN | MAINCR_SL1TXEN |
1019 MAINCR_SL2RXEN | MAINCR_SL2TXEN;
1024 static int __devinit aaci_init_pcm(struct aaci *aaci)
1026 struct snd_pcm *pcm;
1029 ret = snd_pcm_new(aaci->card, "AACI AC'97", 0, 1, 1, &pcm);
1032 pcm->private_data = aaci;
1033 pcm->info_flags = 0;
1035 strlcpy(pcm->name, DRIVER_NAME, sizeof(pcm->name));
1037 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &aaci_playback_ops);
1038 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &aaci_capture_ops);
1039 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1046 static unsigned int __devinit aaci_size_fifo(struct aaci *aaci)
1048 struct aaci_runtime *aacirun = &aaci->playback;
1051 writel(CR_FEN | CR_SZ16 | CR_EN, aacirun->base + AACI_TXCR);
1053 for (i = 0; !(readl(aacirun->base + AACI_SR) & SR_TXFF) && i < 4096; i++)
1054 writel(0, aacirun->fifo);
1056 writel(0, aacirun->base + AACI_TXCR);
1059 * Re-initialise the AACI after the FIFO depth test, to
1060 * ensure that the FIFOs are empty. Unfortunately, merely
1061 * disabling the channel doesn't clear the FIFO.
1063 writel(aaci->maincr & ~MAINCR_IE, aaci->base + AACI_MAINCR);
1064 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1067 * If we hit 4096, we failed. Go back to the specified
1076 static int __devinit aaci_probe(struct amba_device *dev, struct amba_id *id)
1081 ret = amba_request_regions(dev, NULL);
1085 aaci = aaci_init_card(dev);
1091 aaci->base = ioremap(dev->res.start, resource_size(&dev->res));
1098 * Playback uses AACI channel 0
1100 aaci->playback.base = aaci->base + AACI_CSCH1;
1101 aaci->playback.fifo = aaci->base + AACI_DR1;
1104 * Capture uses AACI channel 0
1106 aaci->capture.base = aaci->base + AACI_CSCH1;
1107 aaci->capture.fifo = aaci->base + AACI_DR1;
1109 for (i = 0; i < 4; i++) {
1110 void __iomem *base = aaci->base + i * 0x14;
1112 writel(0, base + AACI_IE);
1113 writel(0, base + AACI_TXCR);
1114 writel(0, base + AACI_RXCR);
1117 writel(0x1fff, aaci->base + AACI_INTCLR);
1118 writel(aaci->maincr, aaci->base + AACI_MAINCR);
1120 ret = aaci_probe_ac97(aaci);
1125 * Size the FIFOs (must be multiple of 16).
1127 aaci->fifosize = aaci_size_fifo(aaci);
1128 if (aaci->fifosize & 15) {
1129 printk(KERN_WARNING "AACI: fifosize = %d not supported\n",
1135 ret = aaci_init_pcm(aaci);
1139 snd_card_set_dev(aaci->card, &dev->dev);
1141 ret = snd_card_register(aaci->card);
1143 dev_info(&dev->dev, "%s, fifo %d\n", aaci->card->longname,
1145 amba_set_drvdata(dev, aaci->card);
1151 snd_card_free(aaci->card);
1152 amba_release_regions(dev);
1156 static int __devexit aaci_remove(struct amba_device *dev)
1158 struct snd_card *card = amba_get_drvdata(dev);
1160 amba_set_drvdata(dev, NULL);
1163 struct aaci *aaci = card->private_data;
1164 writel(0, aaci->base + AACI_MAINCR);
1166 snd_card_free(card);
1167 amba_release_regions(dev);
1173 static struct amba_id aaci_ids[] = {
1181 static struct amba_driver aaci_driver = {
1183 .name = DRIVER_NAME,
1185 .probe = aaci_probe,
1186 .remove = __devexit_p(aaci_remove),
1187 .suspend = aaci_suspend,
1188 .resume = aaci_resume,
1189 .id_table = aaci_ids,
1192 static int __init aaci_init(void)
1194 return amba_driver_register(&aaci_driver);
1197 static void __exit aaci_exit(void)
1199 amba_driver_unregister(&aaci_driver);
1202 module_init(aaci_init);
1203 module_exit(aaci_exit);
1205 MODULE_LICENSE("GPL");
1206 MODULE_DESCRIPTION("ARM PrimeCell PL041 Advanced Audio CODEC Interface driver");