130 unsigned int op0, op1, result, z, s, cy, ov;
132 /* Compute the result. */
133 op0 = State.regs[OP[0]];
134 op1 = State.regs[OP[1]];
137 /* Compute the condition codes. */
139 s = (result & 0x80000000);
140 cy = (result < op0 || result < op1);
141 ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
142 && (op0 & 0x80000000) != (result & 0x80000000));
144 /* Store the result and condition codes. */
145 State.regs[OP[1]] = result;
146 State.psw &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
147 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
148 | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
151 /* add sign_extend(imm5), reg */
155 unsigned int op0, op1, result, z, s, cy, ov;
158 /* Compute the result. */
159 temp = (OP[0] & 0x1f);
160 temp = (temp << 27) >> 27;
162 op1 = State.regs[OP[1]];
165 /* Compute the condition codes. */
167 s = (result & 0x80000000);
168 cy = (result < op0 || result < op1);
169 ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
170 && (op0 & 0x80000000) != (result & 0x80000000));
172 /* Store the result and condition codes. */
173 State.regs[OP[1]] = result;
174 State.psw &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
175 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
176 | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
179 /* addi sign_extend(imm16), reg, reg */
183 unsigned int op0, op1, result, z, s, cy, ov;
186 /* Compute the result. */
187 temp = (OP[0] & 0xffff);
188 temp = (temp << 16) >> 16;
190 op1 = State.regs[OP[1]];
193 /* Compute the condition codes. */
195 s = (result & 0x80000000);
196 cy = (result < op0 || result < op1);
197 ov = ((op0 & 0x80000000) == (op1 & 0x80000000)
198 && (op0 & 0x80000000) != (result & 0x80000000));
200 /* Store the result and condition codes. */
201 State.regs[OP[2]] = result;
202 State.psw &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
203 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
204 | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
211 unsigned int op0, op1, result, z, s, cy, ov;
213 /* Compute the result. */
214 op0 = State.regs[OP[0]];
215 op1 = State.regs[OP[1]];
218 /* Compute the condition codes. */
220 s = (result & 0x80000000);
221 cy = (result < -op0);
222 ov = ((op1 & 0x80000000) != (op0 & 0x80000000)
223 && (op1 & 0x80000000) != (result & 0x80000000));
225 /* Store the result and condition codes. */
226 State.regs[OP[1]] = result;
227 State.psw &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
228 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
229 | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
230 State.regs[OP[1]] = State.regs[OP[0]];
233 /* subr reg1, reg2 */
237 unsigned int op0, op1, result, z, s, cy, ov;
239 /* Compute the result. */
240 op0 = State.regs[OP[0]];
241 op1 = State.regs[OP[1]];
244 /* Compute the condition codes. */
246 s = (result & 0x80000000);
247 cy = (result < -op1);
248 ov = ((op0 & 0x80000000) != (op1 & 0x80000000)
249 && (op0 & 0x80000000) != (result & 0x80000000));
251 /* Store the result and condition codes. */
252 State.regs[OP[1]] = result;
253 State.psw &= ~(PSW_Z | PSW_S | PSW_CY | PSW_OV);
254 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
255 | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
258 /* mulh reg1, reg2 */
262 State.regs[OP[1]] = ((State.regs[OP[1]] & 0xffff)
263 * (State.regs[OP[0]] & 0xffff));
266 /* mulh sign_extend(imm5), reg2
274 value = (value << 27) >> 27;
276 State.regs[OP[1]] = (State.regs[OP[1]] & 0xffff) * value;
279 /* mulhi imm16, reg1, reg2 */
285 value = value & 0xffff;
287 State.regs[OP[2]] = (State.regs[OP[1]] & 0xffff) * value;
290 /* divh reg1, reg2 */
294 unsigned int op0, op1, result, z, s, cy, ov;
297 /* Compute the result. */
298 temp = State.regs[OP[0]] & 0xffff;
299 temp = (temp << 16) >> 16;
301 op1 = State.regs[OP[1]];
303 if (op0 == 0xffffffff && op1 == 0x80000000)
316 /* Compute the condition codes. */
318 s = (result & 0x80000000);
320 /* Store the result and condition codes. */
321 State.regs[OP[1]] = result;
322 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
323 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
324 | (ov ? PSW_OV : 0));
361 State.regs[OP[1]] = State.regs[OP[0]];
364 /* mov sign_extend(imm5), reg */
370 value = (value << 27) >> 27;
371 State.regs[OP[1]] = value;
374 /* movea sign_extend(imm16), reg, reg */
381 value = (value << 16) >> 16;
383 State.regs[OP[2]] = State.regs[OP[1]] + value;
386 /* movhi imm16, reg, reg */
392 value = (value & 0xffff) << 16;
394 State.regs[OP[2]] = State.regs[OP[1]] + value;
432 /* sar zero_extend(imm5),reg1 */
436 unsigned int op0, op1, result, z, s, cy, ov;
439 op1 = State.regs[OP[1]];
440 result = (signed)op1 >> op0;
442 /* Compute the condition codes. */
444 s = (result & 0x80000000);
445 cy = (op1 & (1 << (op0 - 1)));
447 /* Store the result and condition codes. */
448 State.regs[OP[1]] = result;
449 State.psw &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
450 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
451 | (cy ? PSW_CY : 0) | (ov ? PSW_OV : 0));
458 unsigned int op0, op1, result, z, s, cy, ov;
460 op0 = State.regs[OP[0]] & 0x1f;
461 op1 = State.regs[OP[1]];
462 result = (signed)op1 >> op0;
464 /* Compute the condition codes. */
466 s = (result & 0x80000000);
467 cy = (op1 & (1 << (op0 - 1)));
469 /* Store the result and condition codes. */
470 State.regs[OP[1]] = result;
471 State.psw &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
472 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
473 | (cy ? PSW_CY : 0));
476 /* shl zero_extend(imm5),reg1 */
480 unsigned int op0, op1, result, z, s, cy, ov;
483 op1 = State.regs[OP[1]];
486 /* Compute the condition codes. */
488 s = (result & 0x80000000);
489 cy = (op1 & (1 << (32 - op0)));
491 /* Store the result and condition codes. */
492 State.regs[OP[1]] = result;
493 State.psw &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
494 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
495 | (cy ? PSW_CY : 0));
502 unsigned int op0, op1, result, z, s, cy, ov;
504 op0 = State.regs[OP[0]] & 0x1f;
505 op1 = State.regs[OP[1]];
508 /* Compute the condition codes. */
510 s = (result & 0x80000000);
511 cy = (op1 & (1 << (32 - op0)));
513 /* Store the result and condition codes. */
514 State.regs[OP[1]] = result;
515 State.psw &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
516 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
517 | (cy ? PSW_CY : 0));
520 /* shr zero_extend(imm5),reg1 */
524 unsigned int op0, op1, result, z, s, cy, ov;
527 op1 = State.regs[OP[1]];
530 /* Compute the condition codes. */
532 s = (result & 0x80000000);
533 cy = (op1 & (1 << (op0 - 1)));
535 /* Store the result and condition codes. */
536 State.regs[OP[1]] = result;
537 State.psw &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
538 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
539 | (cy ? PSW_CY : 0));
546 unsigned int op0, op1, result, z, s, cy, ov;
548 op0 = State.regs[OP[0]] & 0x1f;
549 op1 = State.regs[OP[1]];
552 /* Compute the condition codes. */
554 s = (result & 0x80000000);
555 cy = (op1 & (1 << (op0 - 1)));
557 /* Store the result and condition codes. */
558 State.regs[OP[1]] = result;
559 State.psw &= ~(PSW_Z | PSW_S | PSW_OV | PSW_CY);
560 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0)
561 | (cy ? PSW_CY : 0));
583 unsigned int op0, op1, result, z, s, cy, ov;
585 /* Compute the result. */
586 op0 = State.regs[OP[0]];
587 op1 = State.regs[OP[1]];
590 /* Compute the condition codes. */
592 s = (result & 0x80000000);
594 /* Store the result and condition codes. */
595 State.regs[OP[1]] = result;
596 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
597 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
600 /* ori zero_extend(imm16), reg, reg */
604 unsigned int op0, op1, result, z, s, cy, ov;
606 op0 = OP[0] & 0xffff;
607 op1 = State.regs[OP[1]];
610 /* Compute the condition codes. */
612 s = (result & 0x80000000);
614 /* Store the result and condition codes. */
615 State.regs[OP[2]] = result;
616 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
617 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
624 unsigned int op0, op1, result, z, s, cy, ov;
626 /* Compute the result. */
627 op0 = State.regs[OP[0]];
628 op1 = State.regs[OP[1]];
631 /* Compute the condition codes. */
633 s = (result & 0x80000000);
635 /* Store the result and condition codes. */
636 State.regs[OP[1]] = result;
637 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
638 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
641 /* andi zero_extend(imm16), reg, reg */
645 unsigned int op0, op1, result, z, s, cy, ov;
647 op0 = OP[0] & 0xffff;
648 op1 = State.regs[OP[1]];
651 /* Compute the condition codes. */
654 /* Store the result and condition codes. */
655 State.regs[OP[2]] = result;
656 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
657 State.psw |= (z ? PSW_Z : 0);
664 unsigned int op0, op1, result, z, s, cy, ov;
666 /* Compute the result. */
667 op0 = State.regs[OP[0]];
668 op1 = State.regs[OP[1]];
671 /* Compute the condition codes. */
673 s = (result & 0x80000000);
675 /* Store the result and condition codes. */
676 State.regs[OP[1]] = result;
677 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
678 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
681 /* xori zero_extend(imm16), reg, reg */
685 unsigned int op0, op1, result, z, s, cy, ov;
687 op0 = OP[0] & 0xffff;
688 op1 = State.regs[OP[1]];
691 /* Compute the condition codes. */
693 s = (result & 0x80000000);
695 /* Store the result and condition codes. */
696 State.regs[OP[2]] = result;
697 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
698 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
705 unsigned int op0, result, z, s, cy, ov;
707 /* Compute the result. */
708 op0 = State.regs[OP[0]];
711 /* Compute the condition codes. */
713 s = (result & 0x80000000);
715 /* Store the result and condition codes. */
716 State.regs[OP[1]] = result;
717 State.psw &= ~(PSW_Z | PSW_S | PSW_OV);
718 State.psw |= ((z ? PSW_Z : 0) | (s ? PSW_S : 0));
741 /* di, not supported */
748 /* ei, not supported */
755 /* halt, not supported */
762 /* reti, not supported */
769 /* trap, not supportd */
776 /* ldsr, not supported */
783 /* stsr, not supported */