3 #include "sim-options.h"
29 /* For compatibility */
34 /* v850 interrupt model */
49 char *interrupt_names[] = {
62 do_interrupt (sd, data)
66 char **interrupt_name = (char**)data;
67 enum interrupt_type inttype;
68 inttype = (interrupt_name - STATE_WATCHPOINTS (sd)->interrupt_names);
69 /* Disable further interrupts. */
71 /* Indicate that we're doing interrupt not exception processing. */
73 if (inttype == int_reset)
78 /* (Might be useful to init other regs with random values.) */
80 else if (inttype == int_nmi)
84 /* We're already working on an NMI, so this one must wait
85 around until the previous one is done. The processor
86 ignores subsequent NMIs, so we don't need to count them. */
87 State.pending_nmi = 1;
93 /* Set the FECC part of the ECR. */
104 /* Clear the EICC part of the ECR, will set below. */
133 /* Should never be possible. */
140 /* These default values correspond to expected usage for the chip. */
146 static long hash PARAMS ((long));
148 static void do_format_1_2 PARAMS ((uint32));
149 static void do_format_3 PARAMS ((uint32));
150 static void do_format_4 PARAMS ((uint32));
151 static void do_format_5 PARAMS ((uint32));
152 static void do_format_6 PARAMS ((uint32));
153 static void do_format_7 PARAMS ((uint32));
154 static void do_format_8 PARAMS ((uint32));
155 static void do_format_9_10 PARAMS ((uint32));
162 struct hash_entry *next;
163 unsigned long opcode;
168 struct hash_entry hash_table[MAX_HASH+1];
175 if ( (insn & 0x0600) == 0
176 || (insn & 0x0700) == 0x0200
177 || (insn & 0x0700) == 0x0600
178 || (insn & 0x0780) == 0x0700)
179 return (insn & 0x07e0) >> 5;
181 if ((insn & 0x0700) == 0x0300
182 || (insn & 0x0700) == 0x0400
183 || (insn & 0x0700) == 0x0500)
184 return (insn & 0x0780) >> 7;
186 if ((insn & 0x07c0) == 0x0780)
187 return (insn & 0x07c0) >> 6;
189 return (insn & 0x07e0) >> 5;
193 static struct hash_entry *
194 lookup_hash (sd, ins)
198 struct hash_entry *h;
200 h = &hash_table[hash(ins)];
202 while ((ins & h->mask) != h->opcode)
206 sim_io_error (sd, "ERROR looking up hash for 0x%lx, PC=0x%lx",
207 (long) ins, (long) PC);
216 sim_open (kind, cb, abfd, argv)
222 SIM_DESC sd = sim_state_alloc (kind, cb);
225 struct hash_entry *h;
228 /* for compatibility */
231 /* FIXME: should be better way of setting up interrupts */
232 STATE_WATCHPOINTS (sd)->pc = &(PC);
233 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
234 STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
235 STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
237 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
240 /* Allocate core managed memory */
242 /* "Mirror" the ROM addresses below 1MB. */
243 sim_do_commandf (sd, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE);
244 /* Chunk of ram adjacent to rom */
245 sim_do_commandf (sd, "memory region 0x100000,0x%lx", V850_LOW_END-0x100000);
246 /* peripheral I/O region - mirror 1K across 4k (0x1000) */
247 sim_do_command (sd, "memory region 0xfff000,0x1000,1024");
248 /* similarly if in the internal RAM region */
249 sim_do_command (sd, "memory region 0xffe000,0x1000,1024");
251 /* getopt will print the error message so we just have to exit if this fails.
252 FIXME: Hmmm... in the case of gdb we need getopt to call
254 if (sim_parse_args (sd, argv) != SIM_RC_OK)
256 /* Uninstall the modules to avoid memory leaks,
257 file descriptor leaks, etc. */
258 sim_module_uninstall (sd);
262 /* check for/establish the a reference program image */
263 if (sim_analyze_program (sd,
264 (STATE_PROG_ARGV (sd) != NULL
265 ? *STATE_PROG_ARGV (sd)
269 sim_module_uninstall (sd);
273 /* establish any remaining configuration options */
274 if (sim_config (sd) != SIM_RC_OK)
276 sim_module_uninstall (sd);
280 if (sim_post_argv_init (sd) != SIM_RC_OK)
282 /* Uninstall the modules to avoid memory leaks,
283 file descriptor leaks, etc. */
284 sim_module_uninstall (sd);
289 /* put all the opcodes in the hash table */
290 for (s = Simops; s->func; s++)
292 h = &hash_table[hash(s->opcode)];
294 /* go to the last entry in the chain */
300 h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
305 h->opcode = s->opcode;
314 sim_close (sd, quitting)
318 sim_module_uninstall (sd);
330 sim_engine_run (sd, next_cpu_nr, siggnal)
340 struct hash_entry * h;
341 /* Fetch the current instruction. */
345 h = lookup_hash (sd, inst);
347 OP[1] = (inst >> 11) & 0x1f;
348 OP[2] = (inst >> 16) & 0xffff;
351 /* fprintf (stderr, "PC = %x, SP = %x\n", PC, SP ); */
355 fprintf (stderr, "NOP encountered!\n");
359 PC += h->ops->func ();
363 sim_io_eprintf (sd, "simulator loop at %lx\n", (long) PC );
367 if (sim_events_tick (sd))
369 sim_events_process (sd);
383 sim_resume (sd, 0, 0);
389 sim_info (sd, verbose)
393 profile_print (sd, STATE_VERBOSE_P (sd), NULL, NULL);
397 sim_create_inferior (sd, prog_bfd, argv, env)
399 struct _bfd *prog_bfd;
403 memset (&State, 0, sizeof (State));
404 if (prog_bfd != NULL)
405 PC = bfd_get_start_address (prog_bfd);
410 sim_fetch_register (sd, rn, memory)
413 unsigned char *memory;
415 *(unsigned32*)memory = H2T_4 (State.regs[rn]);
419 sim_store_register (sd, rn, memory)
422 unsigned char *memory;
424 State.regs[rn] = T2H_4 (*(unsigned32*)memory);
428 sim_do_command (sd, cmd)
432 char *mm_cmd = "memory-map";
433 char *int_cmd = "interrupt";
435 if (sim_args_command (sd, cmd) != SIM_RC_OK)
437 if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
438 sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
439 else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
440 sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
442 sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);