3 #include "sim-options.h"
29 /* For compatibility */
34 /* v850 interrupt model */
49 char *interrupt_names[] = {
62 do_interrupt (sd, data)
66 enum interrupt_type inttype = *(int*)data;
67 /* Disable further interrupts. */
69 /* Indicate that we're doing interrupt not exception processing. */
71 if (inttype == int_reset)
76 /* (Might be useful to init other regs with random values.) */
78 else if (inttype == int_nmi)
82 /* We're already working on an NMI, so this one must wait
83 around until the previous one is done. The processor
84 ignores subsequent NMIs, so we don't need to count them. */
85 State.pending_nmi = 1;
91 /* Set the FECC part of the ECR. */
102 /* Clear the EICC part of the ECR, will set below. */
131 /* Should never be possible. */
138 /* These default values correspond to expected usage for the chip. */
144 static long hash PARAMS ((long));
146 static void do_format_1_2 PARAMS ((uint32));
147 static void do_format_3 PARAMS ((uint32));
148 static void do_format_4 PARAMS ((uint32));
149 static void do_format_5 PARAMS ((uint32));
150 static void do_format_6 PARAMS ((uint32));
151 static void do_format_7 PARAMS ((uint32));
152 static void do_format_8 PARAMS ((uint32));
153 static void do_format_9_10 PARAMS ((uint32));
160 struct hash_entry *next;
161 unsigned long opcode;
166 struct hash_entry hash_table[MAX_HASH+1];
173 if ( (insn & 0x0600) == 0
174 || (insn & 0x0700) == 0x0200
175 || (insn & 0x0700) == 0x0600
176 || (insn & 0x0780) == 0x0700)
177 return (insn & 0x07e0) >> 5;
179 if ((insn & 0x0700) == 0x0300
180 || (insn & 0x0700) == 0x0400
181 || (insn & 0x0700) == 0x0500)
182 return (insn & 0x0780) >> 7;
184 if ((insn & 0x07c0) == 0x0780)
185 return (insn & 0x07c0) >> 6;
187 return (insn & 0x07e0) >> 5;
191 static struct hash_entry *
192 lookup_hash (sd, ins)
196 struct hash_entry *h;
198 h = &hash_table[hash(ins)];
200 while ((ins & h->mask) != h->opcode)
204 sim_io_error (sd, "ERROR looking up hash for 0x%lx, PC=0x%lx",
205 (long) ins, (long) PC);
214 sim_open (kind, cb, abfd, argv)
221 SIM_DESC sd = sim_state_alloc (kind, cb);
224 struct hash_entry *h;
227 /* for compatibility */
230 /* FIXME: should be better way of setting up interrupts */
231 STATE_WATCHPOINTS (sd)->pc = &(PC);
232 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
233 STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
234 STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
236 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
239 /* Allocate core managed memory */
240 /* "Mirror" the ROM addresses below 1MB. */
241 asprintf (&buf, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE);
242 sim_do_command (sd, buf);
244 /* Chunk of ram adjacent to rom */
245 asprintf (&buf, "memory region 0x100000,0x%lx", V850_LOW_END - 0x100000);
246 sim_do_command (sd, buf);
248 /* peripheral I/O region - mirror 1K across 4k (0x1000) */
249 sim_do_command (sd, "memory region 0xfff000,0x1000,1024");
250 /* similarly if in the internal RAM region */
251 sim_do_command (sd, "memory region 0xffe000,0x1000,1024");
253 /* getopt will print the error message so we just have to exit if this fails.
254 FIXME: Hmmm... in the case of gdb we need getopt to call
256 if (sim_parse_args (sd, argv) != SIM_RC_OK)
258 /* Uninstall the modules to avoid memory leaks,
259 file descriptor leaks, etc. */
260 sim_module_uninstall (sd);
264 /* check for/establish the a reference program image */
265 if (sim_analyze_program (sd,
266 (STATE_PROG_ARGV (sd) != NULL
267 ? *STATE_PROG_ARGV (sd)
271 sim_module_uninstall (sd);
275 /* establish any remaining configuration options */
276 if (sim_config (sd) != SIM_RC_OK)
278 sim_module_uninstall (sd);
282 if (sim_post_argv_init (sd) != SIM_RC_OK)
284 /* Uninstall the modules to avoid memory leaks,
285 file descriptor leaks, etc. */
286 sim_module_uninstall (sd);
291 /* put all the opcodes in the hash table */
292 for (s = Simops; s->func; s++)
294 h = &hash_table[hash(s->opcode)];
296 /* go to the last entry in the chain */
302 h->next = (struct hash_entry *) calloc(1,sizeof(struct hash_entry));
307 h->opcode = s->opcode;
316 sim_close (sd, quitting)
320 sim_module_uninstall (sd);
332 sim_engine_run (sd, next_cpu_nr, siggnal)
342 struct hash_entry * h;
343 /* Fetch the current instruction. */
347 h = lookup_hash (sd, inst);
349 OP[1] = (inst >> 11) & 0x1f;
350 OP[2] = (inst >> 16) & 0xffff;
353 /* fprintf (stderr, "PC = %x, SP = %x\n", PC, SP ); */
357 fprintf (stderr, "NOP encountered!\n");
361 PC += h->ops->func ();
365 sim_io_eprintf (sd, "simulator loop at %lx\n", (long) PC );
369 if (sim_events_tick (sd))
371 sim_events_process (sd);
385 sim_resume (sd, 0, 0);
391 sim_info (sd, verbose)
399 sim_create_inferior (sd, prog_bfd, argv, env)
401 struct _bfd *prog_bfd;
405 memset (&State, 0, sizeof (State));
406 if (prog_bfd != NULL)
407 PC = bfd_get_start_address (prog_bfd);
412 sim_fetch_register (sd, rn, memory)
415 unsigned char *memory;
417 *(unsigned32*)memory = H2T_4 (State.regs[rn]);
421 sim_store_register (sd, rn, memory)
424 unsigned char *memory;
426 State.regs[rn] = T2H_4 (*(unsigned32*)memory);
430 sim_do_command (sd, cmd)
434 char *mm_cmd = "memory-map";
435 char *int_cmd = "interrupt";
437 if (sim_args_command (sd, cmd) != SIM_RC_OK)
439 if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
440 sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
441 else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
442 sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
444 sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);