2 #include "sim-options.h"
4 #include "sim-assert.h"
29 static const char * get_insn_name (sim_cpu *, int);
31 /* For compatibility. */
34 /* V850 interrupt model. */
49 const char *interrupt_names[] =
63 do_interrupt (SIM_DESC sd, void *data)
65 const char **interrupt_name = (const char**)data;
66 enum interrupt_type inttype;
67 inttype = (interrupt_name - STATE_WATCHPOINTS (sd)->interrupt_names);
69 /* For a hardware reset, drop everything and jump to the start
71 if (inttype == int_reset)
76 sim_engine_restart (sd, NULL, NULL, NULL_CIA);
79 /* Deliver an NMI when allowed */
80 if (inttype == int_nmi)
84 /* We're already working on an NMI, so this one must wait
85 around until the previous one is done. The processor
86 ignores subsequent NMIs, so we don't need to count them.
87 Just keep re-scheduling a single NMI until it manages to
89 if (STATE_CPU (sd, 0)->pending_nmi != NULL)
90 sim_events_deschedule (sd, STATE_CPU (sd, 0)->pending_nmi);
91 STATE_CPU (sd, 0)->pending_nmi =
92 sim_events_schedule (sd, 1, do_interrupt, data);
97 /* NMI can be delivered. Do not deschedule pending_nmi as
98 that, if still in the event queue, is a second NMI that
99 needs to be delivered later. */
102 /* Set the FECC part of the ECR. */
109 sim_engine_restart (sd, NULL, NULL, NULL_CIA);
113 /* deliver maskable interrupt when allowed */
114 if (inttype > int_nmi && inttype < num_int_types)
116 if ((PSW & PSW_NP) || (PSW & PSW_ID))
118 /* Can't deliver this interrupt, reschedule it for later */
119 sim_events_schedule (sd, 1, do_interrupt, data);
127 /* Disable further interrupts. */
129 /* Indicate that we're doing interrupt not exception processing. */
131 /* Clear the EICC part of the ECR, will set below. */
160 /* Should never be possible. */
161 sim_engine_abort (sd, NULL, NULL_CIA,
162 "do_interrupt - internal error - bad switch");
166 sim_engine_restart (sd, NULL, NULL, NULL_CIA);
169 /* some other interrupt? */
170 sim_engine_abort (sd, NULL, NULL_CIA,
171 "do_interrupt - internal error - interrupt %d unknown",
175 /* Return name of an insn, used by insn profiling. */
178 get_insn_name (sim_cpu *cpu, int i)
180 return itable[i].name;
183 /* These default values correspond to expected usage for the chip. */
189 sim_open (SIM_OPEN_KIND kind,
194 SIM_DESC sd = sim_state_alloc (kind, cb);
197 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
199 /* for compatibility */
202 /* FIXME: should be better way of setting up interrupts */
203 STATE_WATCHPOINTS (sd)->pc = &(PC);
204 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
205 STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
206 STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
208 /* Initialize the mechanism for doing insn profiling. */
209 CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name;
210 CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries;
212 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
215 /* Allocate core managed memory */
217 /* "Mirror" the ROM addresses below 1MB. */
218 sim_do_commandf (sd, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE);
219 /* Chunk of ram adjacent to rom */
220 sim_do_commandf (sd, "memory region 0x100000,0x%lx", V850_LOW_END-0x100000);
221 /* peripheral I/O region - mirror 1K across 4k (0x1000) */
222 sim_do_command (sd, "memory region 0xfff000,0x1000,1024");
223 /* similarly if in the internal RAM region */
224 sim_do_command (sd, "memory region 0xffe000,0x1000,1024");
226 /* getopt will print the error message so we just have to exit if this fails.
227 FIXME: Hmmm... in the case of gdb we need getopt to call
229 if (sim_parse_args (sd, argv) != SIM_RC_OK)
231 /* Uninstall the modules to avoid memory leaks,
232 file descriptor leaks, etc. */
233 sim_module_uninstall (sd);
237 /* check for/establish the a reference program image */
238 if (sim_analyze_program (sd,
239 (STATE_PROG_ARGV (sd) != NULL
240 ? *STATE_PROG_ARGV (sd)
244 sim_module_uninstall (sd);
248 /* establish any remaining configuration options */
249 if (sim_config (sd) != SIM_RC_OK)
251 sim_module_uninstall (sd);
255 if (sim_post_argv_init (sd) != SIM_RC_OK)
257 /* Uninstall the modules to avoid memory leaks,
258 file descriptor leaks, etc. */
259 sim_module_uninstall (sd);
264 /* determine the machine type */
265 if (STATE_ARCHITECTURE (sd) != NULL
266 && (STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850
267 || STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850_rh850))
268 mach = STATE_ARCHITECTURE (sd)->mach;
270 mach = bfd_mach_v850; /* default */
272 /* set machine specific configuration */
277 case bfd_mach_v850e1:
278 case bfd_mach_v850e2:
279 case bfd_mach_v850e2v3:
280 case bfd_mach_v850e3v5:
281 STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT
282 | PSW_CY | PSW_OV | PSW_S | PSW_Z);
291 sim_close (SIM_DESC sd, int quitting)
293 sim_module_uninstall (sd);
297 sim_create_inferior (SIM_DESC sd,
298 struct bfd * prog_bfd,
302 memset (&State, 0, sizeof (State));
303 if (prog_bfd != NULL)
304 PC = bfd_get_start_address (prog_bfd);
309 sim_fetch_register (SIM_DESC sd,
311 unsigned char * memory,
314 *(unsigned32*)memory = H2T_4 (State.regs[rn]);
319 sim_store_register (SIM_DESC sd,
321 unsigned char * memory,
324 State.regs[rn] = T2H_4 (*(unsigned32 *) memory);
329 sim_pc_get (sim_cpu *cpu)