2 #include "sim-options.h"
4 #include "sim-assert.h"
29 static const char * get_insn_name (sim_cpu *, int);
31 /* For compatibility */
36 /* v850 interrupt model */
51 const char *interrupt_names[] = {
64 do_interrupt (sd, data)
68 const char **interrupt_name = (const char**)data;
69 enum interrupt_type inttype;
70 inttype = (interrupt_name - STATE_WATCHPOINTS (sd)->interrupt_names);
72 /* For a hardware reset, drop everything and jump to the start
74 if (inttype == int_reset)
79 sim_engine_restart (sd, NULL, NULL, NULL_CIA);
82 /* Deliver an NMI when allowed */
83 if (inttype == int_nmi)
87 /* We're already working on an NMI, so this one must wait
88 around until the previous one is done. The processor
89 ignores subsequent NMIs, so we don't need to count them.
90 Just keep re-scheduling a single NMI until it manages to
92 if (STATE_CPU (sd, 0)->pending_nmi != NULL)
93 sim_events_deschedule (sd, STATE_CPU (sd, 0)->pending_nmi);
94 STATE_CPU (sd, 0)->pending_nmi =
95 sim_events_schedule (sd, 1, do_interrupt, data);
100 /* NMI can be delivered. Do not deschedule pending_nmi as
101 that, if still in the event queue, is a second NMI that
102 needs to be delivered later. */
105 /* Set the FECC part of the ECR. */
112 sim_engine_restart (sd, NULL, NULL, NULL_CIA);
116 /* deliver maskable interrupt when allowed */
117 if (inttype > int_nmi && inttype < num_int_types)
119 if ((PSW & PSW_NP) || (PSW & PSW_ID))
121 /* Can't deliver this interrupt, reschedule it for later */
122 sim_events_schedule (sd, 1, do_interrupt, data);
130 /* Disable further interrupts. */
132 /* Indicate that we're doing interrupt not exception processing. */
134 /* Clear the EICC part of the ECR, will set below. */
163 /* Should never be possible. */
164 sim_engine_abort (sd, NULL, NULL_CIA,
165 "do_interrupt - internal error - bad switch");
169 sim_engine_restart (sd, NULL, NULL, NULL_CIA);
172 /* some other interrupt? */
173 sim_engine_abort (sd, NULL, NULL_CIA,
174 "do_interrupt - internal error - interrupt %d unknown",
178 /* Return name of an insn, used by insn profiling. */
181 get_insn_name (sim_cpu *cpu, int i)
183 return itable[i].name;
186 /* These default values correspond to expected usage for the chip. */
192 sim_open (kind, cb, abfd, argv)
198 SIM_DESC sd = sim_state_alloc (kind, cb);
201 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
203 /* for compatibility */
206 /* FIXME: should be better way of setting up interrupts */
207 STATE_WATCHPOINTS (sd)->pc = &(PC);
208 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
209 STATE_WATCHPOINTS (sd)->interrupt_handler = do_interrupt;
210 STATE_WATCHPOINTS (sd)->interrupt_names = interrupt_names;
212 /* Initialize the mechanism for doing insn profiling. */
213 CPU_INSN_NAME (STATE_CPU (sd, 0)) = get_insn_name;
214 CPU_MAX_INSNS (STATE_CPU (sd, 0)) = nr_itable_entries;
216 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
219 /* Allocate core managed memory */
221 /* "Mirror" the ROM addresses below 1MB. */
222 sim_do_commandf (sd, "memory region 0,0x100000,0x%lx", V850_ROM_SIZE);
223 /* Chunk of ram adjacent to rom */
224 sim_do_commandf (sd, "memory region 0x100000,0x%lx", V850_LOW_END-0x100000);
225 /* peripheral I/O region - mirror 1K across 4k (0x1000) */
226 sim_do_command (sd, "memory region 0xfff000,0x1000,1024");
227 /* similarly if in the internal RAM region */
228 sim_do_command (sd, "memory region 0xffe000,0x1000,1024");
230 /* getopt will print the error message so we just have to exit if this fails.
231 FIXME: Hmmm... in the case of gdb we need getopt to call
233 if (sim_parse_args (sd, argv) != SIM_RC_OK)
235 /* Uninstall the modules to avoid memory leaks,
236 file descriptor leaks, etc. */
237 sim_module_uninstall (sd);
241 /* check for/establish the a reference program image */
242 if (sim_analyze_program (sd,
243 (STATE_PROG_ARGV (sd) != NULL
244 ? *STATE_PROG_ARGV (sd)
248 sim_module_uninstall (sd);
252 /* establish any remaining configuration options */
253 if (sim_config (sd) != SIM_RC_OK)
255 sim_module_uninstall (sd);
259 if (sim_post_argv_init (sd) != SIM_RC_OK)
261 /* Uninstall the modules to avoid memory leaks,
262 file descriptor leaks, etc. */
263 sim_module_uninstall (sd);
268 /* determine the machine type */
269 if (STATE_ARCHITECTURE (sd) != NULL
270 && (STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850
271 || STATE_ARCHITECTURE (sd)->arch == bfd_arch_v850_rh850))
272 mach = STATE_ARCHITECTURE (sd)->mach;
274 mach = bfd_mach_v850; /* default */
276 /* set machine specific configuration */
281 case bfd_mach_v850e1:
282 case bfd_mach_v850e2:
283 case bfd_mach_v850e2v3:
284 case bfd_mach_v850e3v5:
285 STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT
286 | PSW_CY | PSW_OV | PSW_S | PSW_Z);
295 sim_close (sd, quitting)
299 sim_module_uninstall (sd);
303 sim_create_inferior (sd, prog_bfd, argv, env)
305 struct bfd *prog_bfd;
309 memset (&State, 0, sizeof (State));
310 if (prog_bfd != NULL)
311 PC = bfd_get_start_address (prog_bfd);
316 sim_fetch_register (sd, rn, memory, length)
319 unsigned char *memory;
322 *(unsigned32*)memory = H2T_4 (State.regs[rn]);
327 sim_store_register (sd, rn, memory, length)
330 unsigned char *memory;
333 State.regs[rn] = T2H_4 (*(unsigned32*)memory);