1 //Original:/proj/frio/dv/testcases/seq/se_undefinedinstruction1/se_undefinedinstruction1.dsp
2 // Description: 16 bit "holes" Undefined Instructions in Supervisor Mode
4 # sim: --environment operating
7 .include "testutils.inc"
11 // Constants and Defines
15 include(selfcheck.inc)
21 #define STACKSIZE 0x10 // change for how much stack you need
24 #define ITABLE 0xF0000000
27 GEN_INT_INIT(ITABLE) // set location for interrupt table
30 // Reset/Bootstrap Code
31 // (Here we should set the processor operating modes, initialize registers,
36 INIT_R_REGS(0); // initialize general purpose regs
38 INIT_P_REGS(0); // initialize the pointers
40 INIT_I_REGS(0); // initialize the dsp address regs
45 CLI R1; // inhibit events during MMR writes
47 LD32_LABEL(sp, USTACK); // setup the user stack pointer
50 LD32_LABEL(sp, KSTACK); // setup the kernel stack pointer
51 FP = SP; // and frame pointer
53 LD32(p0, EVT0); // Setup Event Vectors and Handlers
55 P0 += 4; // EVT0 not used (Emulation)
57 P0 += 4; // EVT1 not used (Reset)
59 LD32_LABEL(r0, NHANDLE); // NMI Handler (Int2)
62 LD32_LABEL(r0, XHANDLE); // Exception Handler (Int3)
65 P0 += 4; // EVT4 not used (Global Interrupt Enable)
67 LD32_LABEL(r0, HWHANDLE); // HW Error Handler (Int5)
70 LD32_LABEL(r0, THANDLE); // Timer Handler (Int6)
73 LD32_LABEL(r0, I7HANDLE); // IVG7 Handler
76 LD32_LABEL(r0, I8HANDLE); // IVG8 Handler
79 LD32_LABEL(r0, I9HANDLE); // IVG9 Handler
82 LD32_LABEL(r0, I10HANDLE);// IVG10 Handler
85 LD32_LABEL(r0, I11HANDLE);// IVG11 Handler
88 LD32_LABEL(r0, I12HANDLE);// IVG12 Handler
91 LD32_LABEL(r0, I13HANDLE);// IVG13 Handler
94 LD32_LABEL(r0, I14HANDLE);// IVG14 Handler
97 LD32_LABEL(r0, I15HANDLE);// IVG15 Handler
100 LD32(p0, EVT_OVERRIDE);
104 R1 = -1; // Change this to mask interrupts (*)
105 CSYNC; // wait for MMR writes to finish
106 STI R1; // sync and reenable events (implicit write to IMASK)
110 A0 = 0; // reset accumulators
115 LT0 = r0; // set loop counters to something deterministic
122 ASTAT = r0; // reset other internal regs
124 RETS = r0; // prevent X's breaking LINK instruction
126 // The following code sets up the test for running in USER mode
128 LD32_LABEL(r0, STARTUSER);// One gets to user mode by doing a
129 // ReturnFromInterrupt (RTI)
130 RETI = r0; // We need to load the return address
132 // Comment the following line for a USER Mode test
134 JUMP STARTSUP; // jump to code start for SUPERVISOR mode
139 LD32_LABEL(p1, BEGIN);
143 CLI R1; // inhibit events during write to MMR
144 [ P0 ] = P1; // IVG15 (General) handler (Int 15) load with start
145 CSYNC; // wait for it
146 STI R1; // reenable events with proper imask
148 RAISE 15; // after we RTI, INT 15 should be taken
158 LINK 0; // change for how much stack frame space you need.
162 //*********************************************************************
166 // COMMENT the following line for USER MODE tests
167 [ -- SP ] = RETI; // enable interrupts in supervisor mode
169 // **** YOUR CODE GOES HERE ****
171 // count of UI's will be in r5, which was initialized to 0 by header
203 .dw 0x27 ; // XXX: hardware doesnt trigger illegal exception ?
1005 CHECK_INIT_DEF(p0); //CHECK_INIT(p0, 0xFF7FFFFC);
1006 // Xhandler counts all EXCAUSE = 0x21;
1007 CHECKREG(r5, 830); // count of all 16 bit UI's.
1010 dbg_pass; // End the test
1012 //*********************************************************************
1015 // Handlers for Events
1018 NHANDLE: // NMI Handler 2
1021 XHANDLE: // Exception Handler 3
1022 // 16 bit illegal opcode handler - skips bad instruction
1024 [ -- SP ] = ASTAT; // save what we damage
1025 [ -- SP ] = ( R7:6 );
1028 R7 >>= 26; // only want EXCAUSE
1029 R6 = 0x21; // EXCAUSE 0x21 means I-Fetch Undefined Instruction
1031 IF CC JUMP UNDEFINEDINSTRUCTION; // If EXCAUSE != 0x21 then leave
1033 JUMP.S OUT; // if the EXCAUSE is wrong the test will infinite loop
1035 UNDEFINEDINSTRUCTION:
1036 R7 = RETX; // Fix up return address
1038 R7 += 2; // skip offending 16 bit instruction
1040 RETX = r7; // and put back in RETX
1042 R5 += 1; // Increment global counter
1045 ( R7:6 ) = [ SP ++ ];
1050 HWHANDLE: // HW Error Handler 5
1053 THANDLE: // Timer Handler 6
1056 I7HANDLE: // IVG 7 Handler
1059 I8HANDLE: // IVG 8 Handler
1062 I9HANDLE: // IVG 9 Handler
1065 I10HANDLE: // IVG 10 Handler
1068 I11HANDLE: // IVG 11 Handler
1071 I12HANDLE: // IVG 12 Handler
1074 I13HANDLE: // IVG 13 Handler
1077 I14HANDLE: // IVG 14 Handler
1080 I15HANDLE: // IVG 15 Handler
1084 // padding for the icache
1086 EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0; EXCPT 0;
1096 // Stack Segments (Both Kernel and User)
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