2 * set up pointers to valid data (32Meg), to reduce address violations
6 l0 = 0; l1 = 0; l2 = 0; l3 = 0;
7 p0 = r0; p1 = r0; p2 = r0; p3 = r0; p4 = r0; p5 = r0;
9 i0 = r0; i1 = r0; i2 = r0; i3 = r0;
10 b0 = r0; b1 = r0; b2 = r0; b3 = r0;
15 #elif SE_ALL_BITS == 16
18 # error "Please define SE_ALL_BITS"
22 * execute a test of an opcode space. host test
23 * has to fill out a number of callbacks.
26 * the first insn to start executing
28 * the table of insn ranges and expected seqstat
34 * load current user insn via register P5 into R0.
35 * register R2 is available for caching with se_all_next_insn.
40 * load insn range/seqstat entry from table via register P1
49 * advance current insn to next one for testing. register R2
50 * is retained from se_all_load_insn. write out new insn to
51 * the location via register P5.
53 * se_all_new_insn_stub
55 * for handling of new insns ... generally not needed once done
60 /* Set up exception handler */
65 /* set up the _location */
70 /* Enable single stepping */
74 /* Lower to the code we want to single step through */
78 /* set up pointers to valid data (32Meg), to reduce address violations */
89 /* Make sure exception reason is as we expect */
96 loadsym P4, _location;
104 /* is this the end of the table? */
107 IF CC jump _new_instruction;
109 /* is the opcode (R0) greater than the 2nd entry in the table (R6) */
110 /* if so look at the next line in the table */
114 /* is the opcode (R0) smaller than the first entry in the table (R7) */
115 /* this means it's somewhere between the two lines, and should be legal */
117 if !CC jump _legal_instruction;
119 /* is the current EXCAUSE (R3), the same as the table (R5) */
122 if !CC jump fail_lvl;
125 /* back up, and store the location to search next */
128 /* it matches, so fall through */
129 jump _next_instruction;
134 /* output the insn (R0) and excause (R3) if diff from last */
135 loadsym P0, _last_excause;
138 IF CC jump _next_instruction;
146 IF !CC JUMP fail_lvl;
147 /* it wasn't in the list, and was a single step, so fall through */
152 /* Make sure the opcode isn't in a write buffer */
158 /* set up pointers to valid data (32Meg), to reduce address violations */
168 loadsym P0, fail_lvl;
184 .macro se_all_load_table
190 #ifndef SE_ALL_NEW_INSN_STUB
191 .macro se_all_new_insn_stub
196 .macro se_all_new_insn_log
197 .ifdef BFIN_JTAG_xxxxx
199 #if SE_ALL_BITS == 32
213 loadsym P0, _next_location;