sim/testsuite/sim/bfin/c_logi2op_bitset.s

   1 //Original:/testcases/core/c_logi2op_bitset/c_logi2op_bitset.dsp
   2 // Spec Reference: Logi2op
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10 imm32 r0, 0x00000000;
  11 imm32 r1, 0x00000000;
  12 imm32 r2, 0x00000000;
  13 imm32 r3, 0x00000000;
  14 imm32 r4, 0x00000000;
  15 imm32 r5, 0x00000000;
  16 imm32 r6, 0x00000000;
  17 imm32 r7, 0x00000000;
  18
  19 // bit set
  20 BITSET( R0 , 0 ); /* r0 = 0x00000001 */
  21 BITSET( R1 , 1 ); /* r1 = 0x00000002 */
  22 BITSET( R2 , 2 ); /* r2 = 0x00000004 */
  23 BITSET( R3 , 3 ); /* r3 = 0x00000008 */
  24 BITSET( R4 , 4 ); /* r4 = 0x00000010 */
  25 BITSET( R5 , 5 ); /* r5 = 0x00000020 */
  26 BITSET( R6 , 6 ); /* r6 = 0x00000040 */
  27 BITSET( R7 , 7 ); /* r7 = 0x00000080 */
  28 CHECKREG r0, 0x00000001;
  29 CHECKREG r1, 0x00000002;
  30 CHECKREG r2, 0x00000004;
  31 CHECKREG r3, 0x00000008;
  32 CHECKREG r4, 0x00000010;
  33 CHECKREG r5, 0x00000020;
  34 CHECKREG r6, 0x00000040;
  35 CHECKREG r7, 0x00000080;
  36
  37 // bit set
  38 BITSET( R0 , 8 ); /* r0 = 0x00000100 */
  39 BITSET( R1 , 9 ); /* r1 = 0x00000200 */
  40 BITSET( R2 , 10 ); /* r2 = 0x00000400 */
  41 BITSET( R3 , 11 ); /* r3 = 0x00000800 */
  42 BITSET( R4 , 12 ); /* r4 = 0x00001000 */
  43 BITSET( R5 , 13 ); /* r5 = 0x00002000 */
  44 BITSET( R6 , 14 ); /* r6 = 0x00004000 */
  45 BITSET( R7 , 15 ); /* r7 = 0x00008000 */
  46 CHECKREG r0, 0x00000101;
  47 CHECKREG r1, 0x00000202;
  48 CHECKREG r2, 0x00000404;
  49 CHECKREG r3, 0x00000808;
  50 CHECKREG r4, 0x00001010;
  51 CHECKREG r5, 0x00002020;
  52 CHECKREG r6, 0x00004040;
  53 CHECKREG r7, 0x00008080;
  54
  55 // bit set
  56 BITSET( R0 , 16 ); /* r0 = 0x00000100 */
  57 BITSET( R1 , 17 ); /* r1 = 0x00000200 */
  58 BITSET( R2 , 18 ); /* r2 = 0x00000400 */
  59 BITSET( R3 , 19 ); /* r3 = 0x00000800 */
  60 BITSET( R4 , 20 ); /* r4 = 0x00001000 */
  61 BITSET( R5 , 21 ); /* r5 = 0x00002000 */
  62 BITSET( R6 , 22 ); /* r6 = 0x00004000 */
  63 BITSET( R7 , 23 ); /* r7 = 0x00008000 */
  64 CHECKREG r0, 0x00010101;
  65 CHECKREG r1, 0x00020202;
  66 CHECKREG r2, 0x00040404;
  67 CHECKREG r3, 0x00080808;
  68 CHECKREG r4, 0x00101010;
  69 CHECKREG r5, 0x00202020;
  70 CHECKREG r6, 0x00404040;
  71 CHECKREG r7, 0x00808080;
  72
  73 // bit set
  74 BITSET( R0 , 24 ); /* r0 = 0x00000100 */
  75 BITSET( R1 , 25 ); /* r1 = 0x00000200 */
  76 BITSET( R2 , 26 ); /* r2 = 0x00000400 */
  77 BITSET( R3 , 27 ); /* r3 = 0x00000800 */
  78 BITSET( R4 , 28 ); /* r4 = 0x00001000 */
  79 BITSET( R5 , 29 ); /* r5 = 0x00002000 */
  80 BITSET( R6 , 30 ); /* r6 = 0x00004000 */
  81 BITSET( R7 , 31 ); /* r7 = 0x00008000 */
  82 CHECKREG r0, 0x01010101;
  83 CHECKREG r1, 0x02020202;
  84 CHECKREG r2, 0x04040404;
  85 CHECKREG r3, 0x08080808;
  86 CHECKREG r4, 0x10101010;
  87 CHECKREG r5, 0x20202020;
  88 CHECKREG r6, 0x40404040;
  89 CHECKREG r7, 0x80808080;
  90
  91
  92 pass