sim: bfin: import testsuite
[external/binutils.git] / sim / testsuite / sim / bfin / c_dsp32alu_rrpmmp_sft.s
1 //Original:/proj/frio/dv/testcases/core/c_dsp32alu_rrpmmp_sft/c_dsp32alu_rrpmmp_sft.dsp
2 // Spec Reference: dsp32alu (dreg, dreg) = +/-, -/+ (dreg, dreg) >>, <<
3 # mach: bfin
4
5 .include "testutils.inc"
6         start
7
8         R0 = 0;
9         ASTAT = R0;
10
11
12         imm32 r0, 0x35678911;
13         imm32 r1, 0x2489ab1d;
14         imm32 r2, 0x34545515;
15         imm32 r3, 0x46667717;
16         imm32 r0, 0x5567891b;
17         imm32 r1, 0x67889b1d;
18         imm32 r2, 0x74445915;
19         imm32 r3, 0x86667797;
20         R0 = R0 +|- R0 , R7 = R0 -|+ R0 (ASR);
21         R1 = R0 +|- R1 , R6 = R0 -|+ R1 (ASR);
22         R2 = R0 +|- R2 , R5 = R0 -|+ R2 (ASR);
23         R3 = R0 +|- R3 , R4 = R0 -|+ R3 (ASR);
24         R4 = R0 +|- R4 , R3 = R0 -|+ R4 (ASR);
25         R5 = R0 +|- R5 , R2 = R0 -|+ R5 (ASR);
26         R6 = R0 +|- R6 , R1 = R0 -|+ R6 (ASR);
27         R7 = R0 +|- R7 , R0 = R0 -|+ R7 (ASR);
28         CHECKREG r0, 0x2AB3c48D;
29         CHECKREG r1, 0x2F3CE6C7;
30         CHECKREG r2, 0x326B1645;
31         CHECKREG r3, 0xf6F31DE5;
32         CHECKREG r4, 0x5E73E21A;
33         CHECKREG r5, 0x22FCE9BB;
34         CHECKREG r6, 0x262B1939;
35         CHECKREG r7, 0x2AB33B72;
36
37         imm32 r0, 0xe5678911;
38         imm32 r1, 0x2e89ab1d;
39         imm32 r2, 0x34e45515;
40         imm32 r3, 0x466e7717;
41         imm32 r0, 0x5567ee1b;
42         imm32 r1, 0x6789abed;
43         imm32 r2, 0x7444551e;
44         imm32 r3, 0x86e67777;
45         R0 = R1 +|- R0 , R7 = R1 -|+ R0 (ASR);
46         R1 = R1 +|- R1 , R6 = R1 -|+ R1 (ASR);
47         R2 = R1 +|- R2 , R5 = R1 -|+ R2 (ASR);
48         R3 = R1 +|- R3 , R4 = R1 -|+ R3 (ASR);
49         R4 = R1 +|- R4 , R3 = R1 -|+ R4 (ASR);
50         R5 = R1 +|- R5 , R2 = R1 -|+ R5 (ASR);
51         R6 = R1 +|- R6 , R1 = R1 -|+ R6 (ASR);
52         R7 = R1 +|- R7 , R0 = R1 -|+ R7 (ASR);
53         CHECKREG r0, 0x1559d17D;
54         CHECKREG r1, 0x33C4d5F6;
55         CHECKREG r2, 0x36F31547;
56         CHECKREG r3, 0xfB9C1DDD;
57         CHECKREG r4, 0x6BEDE222;
58         CHECKREG r5, 0x3095eAB8;
59         CHECKREG r6, 0x33C42A09;
60         CHECKREG r7, 0x1E6A0479;
61
62         imm32 r0, 0x15678911;
63         imm32 r1, 0x2789ab1d;
64         imm32 r2, 0x34445515;
65         imm32 r3, 0x46667717;
66         imm32 r0, 0x5567891b;
67         imm32 r1, 0x6789ab1d;
68         imm32 r2, 0x74445515;
69         imm32 r3, 0x86667777;
70         R0 = R2 +|- R0 , R7 = R2 -|+ R0 (ASR);
71         R1 = R2 +|- R1 , R6 = R2 -|+ R1 (ASR);
72         R2 = R2 +|- R2 , R5 = R2 -|+ R2 (ASR);
73         R3 = R2 +|- R3 , R4 = R2 -|+ R3 (ASR);
74         R4 = R2 +|- R4 , R3 = R2 -|+ R4 (ASR);
75         R5 = R2 +|- R5 , R2 = R2 -|+ R5 (ASR);
76         R6 = R2 +|- R6 , R1 = R2 -|+ R6 (ASR);
77         R7 = R2 +|- R7 , R0 = R2 -|+ R7 (ASR);
78         CHECKREG r0, 0x155A0CD1;
79         CHECKREG r1, 0x19E21551;
80         CHECKREG r2, 0x3A222A8A;
81         CHECKREG r3, 0xfEAA1DDD;
82         CHECKREG r4, 0x7599e222;
83         CHECKREG r5, 0x3A22d575;
84         CHECKREG r6, 0x203F1538;
85         CHECKREG r7, 0x24C81DB9;
86
87         imm32 r0, 0x85678911;
88         imm32 r1, 0x2889ab1d;
89         imm32 r2, 0x34445515;
90         imm32 r3, 0x46667717;
91         imm32 r0, 0x5587891b;
92         imm32 r1, 0x6788ab1d;
93         imm32 r2, 0x74448515;
94         imm32 r3, 0x86667877;
95         R0 = R3 +|- R0 , R7 = R3 -|+ R0 (ASR);
96         R1 = R3 +|- R1 , R6 = R3 -|+ R1 (ASR);
97         R2 = R3 +|- R2 , R5 = R3 -|+ R2 (ASR);
98         R3 = R3 +|- R3 , R4 = R3 -|+ R3 (ASR);
99         R4 = R3 +|- R4 , R3 = R3 -|+ R4 (ASR);
100         R5 = R3 +|- R5 , R2 = R3 -|+ R5 (ASR);
101         R6 = R3 +|- R6 , R1 = R3 -|+ R6 (ASR);
102         R7 = R3 +|- R7 , R0 = R3 -|+ R7 (ASR);
103         CHECKREG r0, 0x15621E82;
104         CHECKREG r1, 0x19E22702;
105         CHECKREG r2, 0x1D111D80;
106         CHECKREG r3, 0xc3333C3B;
107         CHECKREG r4, 0xc333c3C4;
108         CHECKREG r5, 0xa6221EBA;
109         CHECKREG r6, 0xa9511538;
110         CHECKREG r7, 0xaDD11DB9;
111
112         imm32 r0, 0x15678911;
113         imm32 r1, 0x2789ab1d;
114         imm32 r2, 0x34445515;
115         imm32 r3, 0x46667717;
116         imm32 r0, 0x5567891b;
117         imm32 r1, 0x6789ab1d;
118         imm32 r2, 0x74445515;
119         imm32 r3, 0x86667777;
120         R0 = R4 +|- R0 , R7 = R4 -|+ R0 (ASR);
121         R1 = R4 +|- R1 , R6 = R4 -|+ R1 (ASR);
122         R2 = R4 +|- R2 , R5 = R4 -|+ R2 (ASR);
123         R3 = R4 +|- R3 , R4 = R4 -|+ R3 (ASR);
124         R4 = R4 +|- R4 , R3 = R4 -|+ R4 (ASR);
125         R5 = R4 +|- R5 , R2 = R4 -|+ R5 (ASR);
126         R6 = R4 +|- R6 , R1 = R4 -|+ R6 (ASR);
127         R7 = R4 +|- R7 , R0 = R4 -|+ R7 (ASR);
128         CHECKREG r0, 0x33C0d337;
129         CHECKREG r1, 0x3848dBB8;
130         CHECKREG r2, 0x3B770636;
131         CHECKREG r3, 0x00001D9D;
132         CHECKREG r4, 0x1E660000;
133         CHECKREG r5, 0xe2EEf9CA;
134         CHECKREG r6, 0xe61D2448;
135         CHECKREG r7, 0xeAA62CC8;
136
137         imm32 r0, 0x95678911;
138         imm32 r1, 0x2789ab1d;
139         imm32 r2, 0x39445515;
140         imm32 r3, 0x46967717;
141         imm32 r0, 0x5567891b;
142         imm32 r1, 0x6789ab1d;
143         imm32 r2, 0x74495515;
144         imm32 r3, 0x86669777;
145         R0 = R5 +|- R0 , R7 = R5 -|+ R0 (ASR);
146         R1 = R5 +|- R1 , R6 = R5 -|+ R1 (ASL);
147         R2 = R5 +|- R2 , R5 = R5 -|+ R2 (ASR);
148         R3 = R5 +|- R3 , R4 = R5 -|+ R3 (ASL);
149         R4 = R5 +|- R4 , R3 = R5 -|+ R4 (ASR);
150         R5 = R5 +|- R5 , R2 = R5 -|+ R5 (ASR);
151         R6 = R5 +|- R6 , R1 = R5 -|+ R6 (ASR);
152         R7 = R5 +|- R7 , R0 = R5 -|+ R7 (ASL);
153         CHECKREG r0, 0xE11E82E4;
154         CHECKREG r1, 0xe04424E7;
155         CHECKREG r2, 0x0000276F;
156         CHECKREG r3, 0xaaBD529D;
157         CHECKREG r4, 0x0c95D4D1;
158         CHECKREG r5, 0xb7520000;
159         CHECKREG r6, 0xd70EdB19;
160         CHECKREG r7, 0xfC2A7D1C;
161
162         imm32 r0, 0x15678911;
163         imm32 r1, 0x2789ab1d;
164         imm32 r2, 0x34445515;
165         imm32 r3, 0x46667717;
166         imm32 r0, 0x5567891b;
167         imm32 r1, 0x6789ab1d;
168         imm32 r2, 0x74445515;
169         imm32 r3, 0x86667777;
170         R0 = R6 +|- R0 , R7 = R6 -|+ R0 (ASR);
171         R1 = R6 +|- R1 , R6 = R6 -|+ R1 (ASL);
172         R2 = R6 +|- R2 , R5 = R6 -|+ R2 (ASL);
173         R3 = R6 +|- R3 , R4 = R6 -|+ R3 (ASR);
174         R4 = R6 +|- R4 , R3 = R6 -|+ R4 (ASR);
175         R5 = R6 +|- R5 , R2 = R6 -|+ R5 (ASR);
176         R6 = R6 +|- R6 , R1 = R6 -|+ R6 (ASL);
177         R7 = R6 +|- R7 , R0 = R6 -|+ R7 (ASR);
178         CHECKREG r0, 0x5dAAd90D;
179         CHECKREG r1, 0x000031B0;
180         CHECKREG r2, 0x04BFe7B7;
181         CHECKREG r3, 0xd95C272E;
182         CHECKREG r4, 0x05AEe53D;
183         CHECKREG r5, 0xDa4B24B5;
184         CHECKREG r6, 0x7C280000;
185         CHECKREG r7, 0x1e7D26F3;
186
187         imm32 r0, 0x67898911;
188         imm32 r1, 0xb789ab1d;
189         imm32 r2, 0x3b445515;
190         imm32 r3, 0x46b67717;
191         imm32 r0, 0x5567891b;
192         imm32 r1, 0x678bab1d;
193         imm32 r2, 0x7444b515;
194         imm32 r3, 0x86667b77;
195         R0 = R7 +|- R0 , R7 = R7 -|+ R0 (ASR);
196         R1 = R7 +|- R1 , R6 = R7 -|+ R1 (ASR);
197         R2 = R7 +|- R2 , R5 = R7 -|+ R2 (ASL);
198         R3 = R7 +|- R3 , R4 = R7 -|+ R3 (ASR);
199         R4 = R7 +|- R4 , R3 = R7 -|+ R4 (ASL);
200         R5 = R7 +|- R5 , R2 = R7 -|+ R5 (ASL);
201         R6 = R7 +|- R6 , R1 = R7 -|+ R6 (ASL);
202         R7 = R7 +|- R7 , R0 = R7 -|+ R7 (ASR);
203         CHECKREG r0, 0x0000d807;
204         CHECKREG r1, 0x4c163332;
205         CHECKREG r2, 0x07FAe47E;
206         CHECKREG r3, 0x6aF2038C;
207         CHECKREG r4, 0x273A5c90;
208         CHECKREG r5, 0x8a327b9E;
209         CHECKREG r6, 0x46162cEA;
210         CHECKREG r7, 0xe48B0000;
211
212         imm32 r0, 0xe5678911;
213         imm32 r1, 0x2e89ab1d;
214         imm32 r2, 0x34ee5515;
215         imm32 r3, 0x4666e717;
216         imm32 r0, 0x5567891b;
217         imm32 r1, 0x6789ae1d;
218         imm32 r2, 0x744455e5;
219         imm32 r3, 0x8666777e;
220         R4 = R2 +|- R5 , R3 = R2 -|+ R5 (ASR);
221         R0 = R5 +|- R3 , R5 = R5 -|+ R3 (ASL);
222         R2 = R6 +|- R2 , R0 = R6 -|+ R2 (ASR);
223         R3 = R4 +|- R0 , R2 = R4 -|+ R0 (ASR);
224         R7 = R7 +|- R6 , R6 = R7 -|+ R6 (ASR);
225         R6 = R1 +|- R7 , R1 = R1 -|+ R7 (ASL);
226         R5 = R0 +|- R4 , R7 = R0 -|+ R4 (ASR);
227         R1 = R3 +|- R1 , R4 = R3 -|+ R1 (ASL);
228         CHECKREG r0, 0xE8e94167;
229         CHECKREG r1, 0x31084d1C;
230         CHECKREG r2, 0x0b291745;
231         CHECKREG r3, 0xF412d5de;
232         CHECKREG r4, 0x9f400a5C;
233         CHECKREG r5, 0xF4122a22;
234         CHECKREG r6, 0xf9B28924;
235         CHECKREG r7, 0xF4D71745;
236
237         imm32 r0, 0xff678911;
238         imm32 r1, 0x2789ab1d;
239         imm32 r2, 0x3f445515;
240         imm32 r3, 0x46f67717;
241         imm32 r0, 0x556f891b;
242         imm32 r1, 0x6789fb1d;
243         imm32 r2, 0x74445f15;
244         imm32 r3, 0x866677f7;
245         R4 = R3 +|- R3 , R5 = R3 -|+ R3 (ASR);
246         R1 = R6 +|- R1 , R6 = R6 -|+ R1 (ASL);
247         R6 = R1 +|- R4 , R4 = R1 -|+ R4 (ASR);
248         R7 = R4 +|- R2 , R0 = R4 -|+ R2 (ASL);
249         R2 = R2 +|- R6 , R1 = R2 -|+ R6 (ASR);
250         R3 = R5 +|- R5 , R7 = R5 -|+ R5 (ASL);
251         R5 = R7 +|- R7 , R3 = R7 -|+ R7 (ASR);
252         R0 = R0 +|- R0 , R2 = R0 -|+ R0 (ASR);
253         CHECKREG r0, 0x53880000;
254         CHECKREG r1, 0x67eb368e;
255         CHECKREG r2, 0x0000da38;
256         CHECKREG r3, 0x0000dfdc;
257         CHECKREG r4, 0x1e080e07;
258         CHECKREG r5, 0x00000000;
259         CHECKREG r6, 0xa46e0e07;
260         CHECKREG r7, 0x0000dfdc;
261
262         pass