sim/testsuite/sim/bfin/c_dsp32alu_rmp.s

   1 //Original:/testcases/core/c_dsp32alu_rmp/c_dsp32alu_rmp.dsp
   2 // Spec Reference: dsp32alu dreg = -/+ ( dreg, dreg)
   3 # mach: bfin
   4
   5 .include "testutils.inc"
   6         start
   7
   8
   9
  10
  11 // ALU operations include parallel addition, subtraction
  12 // and 32-bit data. If an operation use a single ALU only, it uses ALU0.
  13
  14 imm32 r0, 0x15678911;
  15 imm32 r1, 0x2789ab1d;
  16 imm32 r2, 0x34445515;
  17 imm32 r3, 0x46667717;
  18 imm32 r4, 0x5567891b;
  19 imm32 r5, 0x6789ab1d;
  20 imm32 r6, 0x74445515;
  21 imm32 r7, 0x86667777;
  22 R0 = R0 -|+ R0;
  23 R1 = R0 -|+ R1;
  24 R2 = R0 -|+ R2;
  25 R3 = R0 -|+ R3;
  26 R4 = R0 -|+ R4;
  27 R5 = R0 -|+ R5;
  28 R6 = R0 -|+ R6;
  29 R7 = R0 -|+ R7;
  30 CHECKREG r0, 0x00001222;
  31 CHECKREG r1, 0xD877BD3F;
  32 CHECKREG r2, 0xCBBC6737;
  33 CHECKREG r3, 0xB99A8939;
  34 CHECKREG r4, 0xAA999B3D;
  35 CHECKREG r5, 0x9877BD3F;
  36 CHECKREG r6, 0x8BBC6737;
  37 CHECKREG r7, 0x799A8999;
  38
  39 imm32 r0, 0x9567892b;
  40 imm32 r1, 0xa789ab2d;
  41 imm32 r2, 0xb4445525;
  42 imm32 r3, 0xc6667727;
  43 imm32 r4, 0xd8889929;
  44 imm32 r5, 0xeaaabb2b;
  45 imm32 r6, 0xfcccdd2d;
  46 imm32 r7, 0x0eeeffff;
  47 R0 = R1 -|+ R0;
  48 R1 = R1 -|+ R1;
  49 R2 = R1 -|+ R2;
  50 R3 = R1 -|+ R3;
  51 R4 = R1 -|+ R4;
  52 R5 = R1 -|+ R5;
  53 R6 = R1 -|+ R6;
  54 R7 = R1 -|+ R7;
  55 CHECKREG r0, 0x12223458;
  56 CHECKREG r1, 0x0000565A;
  57 CHECKREG r2, 0x4BBCAB7F;
  58 CHECKREG r3, 0x399ACD81;
  59 CHECKREG r4, 0x2778EF83;
  60 CHECKREG r5, 0x15561185;
  61 CHECKREG r6, 0x03343387;
  62 CHECKREG r7, 0xF1125659;
  63
  64 imm32 r0, 0x416789ab;
  65 imm32 r1, 0x6289abcd;
  66 imm32 r2, 0x43445555;
  67 imm32 r3, 0x64667777;
  68 imm32 r4, 0x456789ab;
  69 imm32 r5, 0x6689abcd;
  70 imm32 r6, 0x47445555;
  71 imm32 r7, 0x68667777;
  72 R0 = R2 -|+ R0;
  73 R1 = R2 -|+ R1;
  74 R2 = R2 -|+ R2;
  75 R3 = R2 -|+ R3;
  76 R4 = R2 -|+ R4;
  77 R5 = R2 -|+ R5;
  78 R6 = R2 -|+ R6;
  79 R7 = R2 -|+ R7;
  80 CHECKREG r0, 0x01DDDF00;
  81 CHECKREG r1, 0xE0BB0122;
  82 CHECKREG r2, 0x0000AAAA;
  83 CHECKREG r3, 0x9B9A2221;
  84 CHECKREG r4, 0xBA993455;
  85 CHECKREG r5, 0x99775677;
  86 CHECKREG r6, 0xB8BCFFFF;
  87 CHECKREG r7, 0x979A2221;
  88
  89 imm32 r0, 0x9567892b;
  90 imm32 r1, 0xa789ab2d;
  91 imm32 r2, 0xb4445525;
  92 imm32 r3, 0xc6667727;
  93 imm32 r0, 0x9567892b;
  94 imm32 r1, 0xa789ab2d;
  95 imm32 r2, 0xb4445525;
  96 imm32 r3, 0xc6667727;
  97 R0 = R3 -|+ R0;
  98 R1 = R3 -|+ R1;
  99 R2 = R3 -|+ R2;
 100 R3 = R3 -|+ R3;
 101 R4 = R3 -|+ R4;
 102 R5 = R3 -|+ R5;
 103 R6 = R3 -|+ R6;
 104 R7 = R3 -|+ R7;
 105 CHECKREG r4, 0x456722A3;
 106 CHECKREG r5, 0x668944C5;
 107 CHECKREG r6, 0x4744EE4D;
 108 CHECKREG r7, 0x6866106F;
 109 CHECKREG r4, 0x456722A3;
 110 CHECKREG r5, 0x668944C5;
 111 CHECKREG r6, 0x4744EE4D;
 112 CHECKREG r7, 0x6866106F;
 113
 114 imm32 r0, 0x4537891b;
 115 imm32 r1, 0x6759ab2d;
 116 imm32 r2, 0x44555535;
 117 imm32 r3, 0x66665747;
 118 imm32 r4, 0x88789565;
 119 imm32 r5, 0xaa8abb5b;
 120 imm32 r6, 0xcc9cdd85;
 121 imm32 r7, 0xeeaeff9f;
 122 R0 = R4 -|+ R0;
 123 R1 = R4 -|+ R1;
 124 R2 = R4 -|+ R2;
 125 R3 = R4 -|+ R3;
 126 R4 = R4 -|+ R4;
 127 R5 = R4 -|+ R5;
 128 R6 = R4 -|+ R6;
 129 R7 = R4 -|+ R7;
 130 CHECKREG r0, 0x43411E80;
 131 CHECKREG r1, 0x211F4092;
 132 CHECKREG r2, 0x4423EA9A;
 133 CHECKREG r3, 0x2212ECAC;
 134 CHECKREG r4, 0x00002ACA;
 135 CHECKREG r5, 0x5576E625;
 136 CHECKREG r6, 0x3364084F;
 137 CHECKREG r7, 0x11522A69;
 138
 139 imm32 r0, 0x456b89ab;
 140 imm32 r1, 0x69764bcd;
 141 imm32 r2, 0x49736564;
 142 imm32 r3, 0x61278394;
 143 imm32 r4, 0x98876439;
 144 imm32 r5, 0xaaaa0bbb;
 145 imm32 r6, 0xcccc1ddd;
 146 imm32 r7, 0x12346fff;
 147 R0 = R5 -|+ R0;
 148 R1 = R5 -|+ R1;
 149 R2 = R5 -|+ R2;
 150 R3 = R5 -|+ R3;
 151 R4 = R5 -|+ R4;
 152 R5 = R5 -|+ R5;
 153 R6 = R5 -|+ R6;
 154 R7 = R5 -|+ R7;
 155 CHECKREG r0, 0x653F9566;
 156 CHECKREG r1, 0x41345788;
 157 CHECKREG r2, 0x6137711F;
 158 CHECKREG r3, 0x49838F4F;
 159 CHECKREG r4, 0x12236FF4;
 160 CHECKREG r5, 0x00001776;
 161 CHECKREG r6, 0x33343553;
 162 CHECKREG r7, 0xEDCC8775;
 163
 164 imm32 r0, 0x456739ab;
 165 imm32 r1, 0x67694bcd;
 166 imm32 r2, 0x03456755;
 167 imm32 r3, 0x66666777;
 168 imm32 r4, 0x12345699;
 169 imm32 r5, 0x45678b6b;
 170 imm32 r6, 0x043290d6;
 171 imm32 r7, 0x1234567f;
 172 R0 = R6 -|+ R0;
 173 R1 = R6 -|+ R1;
 174 R2 = R6 -|+ R2;
 175 R3 = R6 -|+ R3;
 176 R4 = R6 -|+ R4;
 177 R5 = R6 -|+ R5;
 178 R6 = R6 -|+ R6;
 179 R7 = R6 -|+ R7;
 180 CHECKREG r0, 0xBECBCA81;
 181 CHECKREG r1, 0x9CC9DCA3;
 182 CHECKREG r2, 0x00EDF82B;
 183 CHECKREG r3, 0x9DCCF84D;
 184 CHECKREG r4, 0xF1FEE76F;
 185 CHECKREG r5, 0xBECB1C41;
 186 CHECKREG r6, 0x000021AC;
 187 CHECKREG r7, 0xEDCC782B;
 188
 189 imm32 r0, 0x476789ab;
 190 imm32 r1, 0x6779abcd;
 191 imm32 r2, 0x23456755;
 192 imm32 r3, 0x56789007;
 193 imm32 r4, 0x789ab799;
 194 imm32 r5, 0xaaaa0bbb;
 195 imm32 r6, 0x89ab1d7d;
 196 imm32 r7, 0xabcd2ff7;
 197 R0 = R7 -|+ R0;
 198 R1 = R7 -|+ R1;
 199 R2 = R7 -|+ R2;
 200 R3 = R7 -|+ R3;
 201 R4 = R7 -|+ R4;
 202 R5 = R7 -|+ R5;
 203 R6 = R7 -|+ R6;
 204 R7 = R7 -|+ R7;
 205 CHECKREG r0, 0x6466B9A2;
 206 CHECKREG r1, 0x4454DBC4;
 207 CHECKREG r2, 0x8888974C;
 208 CHECKREG r3, 0x5555BFFE;
 209 CHECKREG r4, 0x3333E790;
 210 CHECKREG r5, 0x01233BB2;
 211 CHECKREG r6, 0x22224D74;
 212 CHECKREG r7, 0x00005FEE;
 213
 214 imm32 r0, 0x456739ab;
 215 imm32 r1, 0x67694bcd;
 216 imm32 r2, 0x03456755;
 217 imm32 r3, 0x66666777;
 218 imm32 r4, 0x12345699;
 219 imm32 r5, 0x45678b6b;
 220 imm32 r6, 0x043290d6;
 221 imm32 r7, 0x1234567f;
 222 R4 = R4 -|+ R7 (S);
 223 R5 = R5 -|+ R5 (CO);
 224 R2 = R6 -|+ R3 (SCO);
 225 R6 = R0 -|+ R4 (S);
 226 R0 = R1 -|+ R6 (S);
 227 R2 = R2 -|+ R1 (CO);
 228 R1 = R3 -|+ R0 (CO);
 229 R7 = R7 -|+ R4 (SCO);
 230 CHECKREG r0, 0x22027FFF;
 231 CHECKREG r1, 0xE7764464;
 232 CHECKREG r2, 0xE99990E4;
 233 CHECKREG r3, 0x66666777;
 234 CHECKREG r4, 0x00007FFF;
 235 CHECKREG r5, 0x16D60000;
 236 CHECKREG r6, 0x45677FFF;
 237 CHECKREG r7, 0x7FFF1234;
 238
 239 imm32 r0, 0x476789ab;
 240 imm32 r1, 0x6779abcd;
 241 imm32 r2, 0x23456755;
 242 imm32 r3, 0x56789007;
 243 imm32 r4, 0x789ab799;
 244 imm32 r5, 0xaaaa0bbb;
 245 imm32 r6, 0x89ab1d7d;
 246 imm32 r7, 0xabcd2ff7;
 247 R3 = R4 -|+ R0 (S);
 248 R5 = R5 -|+ R1 (SCO);
 249 R2 = R2 -|+ R2 (S);
 250 R7 = R7 -|+ R3 (CO);
 251 R4 = R3 -|+ R4 (CO);
 252 R0 = R1 -|+ R5 (S);
 253 R1 = R0 -|+ R6 (SCO);
 254 R6 = R6 -|+ R7 (SCO);
 255 CHECKREG r0, 0x7FFF8000;
 256 CHECKREG r1, 0x9D7D7FFF;
 257 CHECKREG r2, 0x00007FFF;
 258 CHECKREG r3, 0x31338000;
 259 CHECKREG r4, 0x3799B899;
 260 CHECKREG r5, 0xB7888000;
 261 CHECKREG r6, 0x7FFFD9B4;
 262 CHECKREG r7, 0xAFF77A9A;
 263
 264 pass