2 Thu Jun 11 15:24:53 1998 Doug Evans <devans@canuck.cygnus.com>
4 * sim/sky/vu01reg-main.c: New file.
5 * sim/sky/vu01reg.dvpasm: New file.
6 * sim/sky/vu01reg.brn: New file.
8 * sim/sky/vu.h (VU0_MEM1_WINDOW_START): New macro.
9 (VU0_MEM1_SIZE): New macro.
11 * sim/sky/sky-defs.tcl (run_brn_test): Fix `options' arg to
14 Wed Jun 10 15:56:10 1998 Frank Ch. Eigler <fche@cygnus.com>
16 * sim/sky/t-int.c: New file to test sky hardware
18 * sim/sky/t-int-handler.s: New file for null interrupt
20 * sim/sky/t-int.brn: New file to build new test.
23 Wed Jun 10 10:53:20 1998 Doug Evans <devans@seba.cygnus.com>
25 * sim/m32r/addx.cgs: Add another test.
26 * sim/m32r/jmp.cgs: Add another test.
28 * sim/m32r/bra8-2.cgs: New testcase.
29 * sim/m32r/hello.ms: Run on m32rx too.
33 Tue Jun 9 08:55:05 1998 Doug Evans <devans@canuck.cygnus.com>
35 * sim/sky/dma.h: New file.
36 * sim/sky/vif.h: New file.
37 * sim/sky/vu.h: New file.
38 * sim/sky/sce_main.c: Move magic numbers to .h files.
41 Mon Jun 8 16:08:27 1998 Doug Evans <devans@canuck.cygnus.com>
43 * sim/m32r/trap.cgs: Test trap 2.
45 Mon Jun 1 18:54:22 1998 Frank Ch. Eigler <fche@cygnus.com>
47 * lib/sim-defs.exp (sim_run): Add possible environment variable
48 list to simulator run.
50 * sim/sky/sky-defs.tcl: Use it.
52 * sim/sky/t-pke2.vif1out: Update to match recent word-precise
53 tracking table change in sim/mips/sky-pke.c.
54 * sim/sky/t-pke3.trc: Ditto.
55 * sim/sky/t-pke4.vif0expect: Ditto.
58 Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
60 * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
61 so that make check can be invoked recursively.
64 Mon May 18 10:37:47 1998 Doug Evans <devans@canuck.cygnus.com>
66 * sim/sky/sky.ld: Delete file.
69 Thu May 14 11:48:35 1998 Doug Evans <devans@canuck.cygnus.com>
71 * config/default.exp (CC,SIM): Delete.
73 * sim/sky/sky-defs.tcl (LDSCRIPT,SIM): Delete.
74 (run_trc_test): Use sim_compile, sim_run. Only delete temp files
76 (run_brn_test): Ditto.
77 * sim/sky/sky.exp: Add runtest_file_p support. Don't print
78 unsupported message if not sky.
79 * sim/sky/sky_sce.exp: Likewise.
82 * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
83 New arg prog_opts. All callers updated.
85 Fri May 8 18:10:28 1998 Jillian Ye <jillian@cygnus.com>
87 * Makefile.in: Made "check" the target of two
88 dependencies (test1, test2) so that test2 get a chance to
89 run even when test1 failed if "make -k check" is used.
91 Fri May 8 14:41:28 1998 Doug Evans <devans@canuck.cygnus.com>
93 * lib/sim-defs.exp (sim_version): Simplify.
95 (run_sim_test): Use sim_run.
96 (sim_compile): New proc.
98 Mon May 4 17:59:11 1998 Frank Ch. Eigler <fche@cygnus.com>
101 * configure.in (testdir): Don't use old sky test directory.
102 * configure: Regenerated
103 * sky/Makefile.in: swallow stderr on buggy tests
105 * config/default.exp: Added C compiler settings.
107 Wed Apr 22 12:26:28 1998 Doug Evans <devans@canuck.cygnus.com>
109 * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
111 Tue Apr 21 10:49:03 1998 Doug Evans <devans@canuck.cygnus.com>
113 * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
116 * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
118 Fri Apr 17 16:00:52 1998 Doug Evans <devans@canuck.cygnus.com>
120 * sim/m32r/mv[ft]achi.cgs: Fix expected result
121 (sign extension of top 8 bits).
123 * sim/m32r/mv[ft]achi-a.cgs: Ditto.
127 Tue Apr 14 14:06:34 1998 Doug Evans <devans@canuck.cygnus.com>
129 * sim/m32r/maclh1.cgs: Fix testcase.
130 * sim/m32r/maclh1-2.cgs: New testcase.
132 Tue Mar 3 19:09:09 1998 Doug Evans <devans@canuck.cygnus.com>
134 * sim/m32r/sat.cgs: Change sath to sat.
137 Wed Feb 25 11:01:17 1998 Doug Evans <devans@canuck.cygnus.com>
139 * Makefile.in (RUNTEST): Fix path to runtest.
142 Tue Feb 24 19:47:56 1998 Frank Ch. Eigler <fche@cygnus.com>
144 * configure.in (testdir): Added sky subdir for mips64r5900-sky-elf
146 * configure: Regenerate.
149 Fri Feb 20 11:00:02 1998 Nick Clifton <nickc@cygnus.com>
151 * sim/m32r/unlock.cgs: Fixed test.
152 * sim/m32r/mvfc.cgs: Fixed test.
153 * sim/m32r/remu.cgs: Fixed test.
155 * sim/m32r/bnc24.cgs: Test long BNC instruction.
156 * sim/m32r/bnc8.cgs: Test short BNC instruction.
157 * sim/m32r/ld-plus.cgs: Test LD instruction.
158 * sim/m32r/macwhi.cgs: Test MACWHI instruction.
159 * sim/m32r/macwlo.cgs: Test MACWLO instruction.
160 * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
161 * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
162 * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
163 * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
164 * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
165 * sim/m32r/addv.cgs: Test ADDV instruction.
166 * sim/m32r/addv3.cgs: Test ADDV3 instruction.
167 * sim/m32r/addx.cgs: Test ADDX instruction.
168 * sim/m32r/lock.cgs: Test LOCK instruction.
169 * sim/m32r/neg.cgs: Test NEG instruction.
170 * sim/m32r/not.cgs: Test NOT instruction.
171 * sim/m32r/unlock.cgs: Test UNLOCK instruction.
173 * sim/m32r/mvfachi-a.cgs: Test extended MVFACHI instruction.
174 * sim/m32r/mvfaclo-a.cgs: Test extended MVFACLO instruction.
175 * sim/m32r/mvtachi-a.cgs: Test extended MVTACHI instruction.
176 * sim/m32r/mvtaclo-a.cgs: Test extended MVTACLO instruction.
178 Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com>
180 * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
181 address into a general register.
183 * sim/m32r/or3.cgs: Test OR3 instruction.
184 * sim/m32r/rach.cgs: Test RACH instruction.
185 * sim/m32r/rem.cgs: Test REM instruction.
186 * sim/m32r/sub.cgs: Test SUB instruction.
187 * sim/m32r/mv.cgs: Test MV instruction.
188 * sim/m32r/mul.cgs: Test MUL instruction.
189 * sim/m32r/bl24.cgs: Test long BL instruction.
190 * sim/m32r/bl8.cgs: Test short BL instruction.
191 * sim/m32r/blez.cgs: Test BLEZ instruction.
192 * sim/m32r/bltz.cgs: Test BLTZ instruction.
193 * sim/m32r/bne.cgs: Test BNE instruction.
194 * sim/m32r/bnez.cgs: Test BNEZ instruction.
195 * sim/m32r/bra24.cgs: Test long BRA instruction.
196 * sim/m32r/bra8.cgs: Test short BRA instruction.
197 * sim/m32r/jl.cgs: Test JL instruction.
198 * sim/m32r/or.cgs: Test OR instruction.
199 * sim/m32r/jmp.cgs: Test JMP instruction.
200 * sim/m32r/and.cgs: Test AND instruction.
201 * sim/m32r/and3.cgs: Test AND3 instruction.
202 * sim/m32r/beq.cgs: Test BEQ instruction.
203 * sim/m32r/beqz.cgs: Test BEQZ instruction.
204 * sim/m32r/bgez.cgs: Test BGEZ instruction.
205 * sim/m32r/bgtz.cgs: Test BGTZ instruction.
206 * sim/m32r/cmp.cgs: Test CMP instruction.
207 * sim/m32r/cmpi.cgs: Test CMPI instruction.
208 * sim/m32r/cmpu.cgs: Test CMPU instruction.
209 * sim/m32r/cmpui.cgs: Test CMPUI instruction.
210 * sim/m32r/div.cgs: Test DIV instruction.
211 * sim/m32r/divu.cgs: Test DIVU instruction.
212 * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
213 * sim/m32r/sll.cgs: Test SLL instruction.
214 * sim/m32r/sll3.cgs: Test SLL3 instruction.
215 * sim/m32r/slli.cgs: Test SLLI instruction.
216 * sim/m32r/sra.cgs: Test SRA instruction.
217 * sim/m32r/sra3.cgs: Test SRA3 instruction.
218 * sim/m32r/srai.cgs: Test SRAI instruction.
219 * sim/m32r/srl.cgs: Test SRL instruction.
220 * sim/m32r/srl3.cgs: Test SRL3 instruction.
221 * sim/m32r/srli.cgs: Test SRLI instruction.
222 * sim/m32r/xor3.cgs: Test XOR3 instruction.
223 * sim/m32r/xor.cgs: Test XOR instruction.
225 * sim/m32r/jnc.cgs: Test JNC instruction.
226 * sim/m32r/jc.cgs: Test JC instruction.
227 * sim/m32r/cmpz.cgs: Test CMPZ instruction.
228 * sim/m32r/bcl24.cgs: Test long version of BCL instruction
229 * sim/m32r/bcl8.cgs: Test short BCL instruction.
230 * sim/m32r/bncl24.cgs: Test long BNCL instruction.
231 * sim/m32r/bncl8.cgs: Test short BNCL instruction.
232 * sim/m32r/divh.cgs: Test DIVH instruction.
233 * sim/m32r/rach-dsi.cgs: Test extended RACH instruction.
235 Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com>
237 * config/default.exp: New file.
238 * lib/sim-defs.exp: New file.
239 * sim/m32r/*: m32r dejagnu simulator testsuite.
241 * Makefile.in (build_alias): Define.
243 (RUNTEST_FOR_TARGET): Delete.
245 (SCHEME,SCHEMEFLAGS,CGENDIR,CGENFLAGS): Define.
246 (check): Depend on site.exp. Run dejagnu.
247 (site.exp): New target.
249 * configure.in: Call AC_CHECK_PROG(SCHEME) if using cgen.
250 (arch): Define from target_cpu.
251 * configure: Regenerate.
253 Wed Sep 17 10:21:26 1997 Andrew Cagney <cagney@b1.cygnus.com>
255 * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
258 * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
259 (calc): Add support for 8 bit version of macros.
260 (main): Add tests for 8 bit versions of macros.
261 (check_sext): Check SEXT of zero clears bits.
263 * common/bits-gen.c (main): Generate tests for 8 bit versions of
266 Thu Sep 11 13:04:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
268 * common/Make-common.in: New file, provide generic rules for
271 Mon Sep 1 16:43:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
273 * configure.in (configdirs): Test for the target directory instead
274 of matching on a target.
277 Tue Jul 15 13:43:20 1997 Andrew Cagney <cagney@sendai.cygnus.com>
279 * configure.in (configdirs): Configure mips64vr5900el
281 * configure: Regenerate.