sim/testsuite/ChangeLog

   1 2003-04-01  Nick Clifton  <nickc@redhat.com>
   2
   3         * sim/arm: New directory: Tests for ARM simulator.
   4         * sim/arm/allinsn.exp: New file: Test script.
   5         * sim/arm/testutils.inc: New file: Test macros.
   6         * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
   7         sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
   8         sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
   9         sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
  10         sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
  11         sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
  12         sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
  13         sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
  14         sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
  15         sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
  16         sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
  17         sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
  18         sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
  19         sim/arm/swpb.cgs, sim/arm/teq.cgs,  sim/arm/tst.cgs,
  20         sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
  21         * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
  22         * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
  23         * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
  24         * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
  25         sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
  26         sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
  27         sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
  28         sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
  29         sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
  30         sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
  31         sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
  32         sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
  33         sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
  34         sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
  35         sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
  36         sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
  37         sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
  38         sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
  39         sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
  40         sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
  41         sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
  42         sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
  43         * sim/arm/thumb: New Directory: Thumb tests.
  44         * sim/arm/thumb/allthumb.exp: New file: Test script.
  45         * sim/arm/thumb/testutils.inc: New file: Test macros.
  46         * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
  47         sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
  48         sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
  49         sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
  50         sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
  51         sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
  52         sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
  53         sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
  54         sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
  55         sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
  56         sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
  57         sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
  58         sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
  59         sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
  60         sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
  61         sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
  62         sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
  63         sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
  64         sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
  65         sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
  66         sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
  67         sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
  68         sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
  69         sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
  70         sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
  71         sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
  72         sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
  73         sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
  74         sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
  75         sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
  76         sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
  77         sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
  78         sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
  79         sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
  80         sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
  81         sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
  82         sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
  83         sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
  84         sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
  85         tests.
  86         * sim/arm/xscale: New directory.
  87         * sim/arm/xscale/xscale.exp: New file: Test script.
  88         * sim/arm/xscale/testutils.inc: New file: Test macros.
  89         * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
  90         sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
  91         sim/arm/xscale/mra.cgs: New files: XScale tests.
  92
  93 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
  94
  95         * configure: Regenerated to track ../common/aclocal.m4 changes.
  96
  97 2001-07-31  Ben Elliston  <bje@redhat.com>
  98
  99         * lib/sim-defs.exp (run_sim_test): Include a description such as
 100         "assembling" or "linking" that identifies the phase a test fails
 101         in, for easier analysis of failures.
 102
 103 2000-11-01  Dave Brolley  <brolley@cygnus.com>
 104
 105         * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
 106         "xerror" options do not use a list of machines. Clear options from
 107         previous test case. Use "$cpu_option"  to identify the machine to the
 108         assembler, if specified.
 109
 110 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 111
 112         * configure: Regenerated to track ../common/aclocal.m4 changes.
 113
 114 1999-09-15  Doug Evans  <devans@casey.cygnus.com>
 115
 116         * sim/arm/b.cgs: New testcase.
 117         * sim/arm/bic.cgs: New testcase.
 118         * sim/arm/bl.cgs: New testcase.
 119
 120 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 121
 122         * configure: Regenerated to track ../common/aclocal.m4 changes.
 123
 124 1999-08-30  Doug Evans  <devans@casey.cygnus.com>
 125
 126         * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
 127         requested_machs, now is list of machs to run tests for.
 128         Delete locals AS,ASFLAGS,LD,LDFLAGS.  Use target_assemble
 129         and target_link instead.
 130
 131 1999-04-21  Doug Evans  <devans@casey.cygnus.com>
 132
 133         * sim/m32r/nop.cgs: Add missing nop insn.
 134
 135 Mon Mar 22 13:28:56 1999  Dave Brolley  <brolley@cygnus.com>
 136
 137         * sim/fr30/stb.cgs: Correct for unaligned access.
 138         * sim/fr30/sth.cgs: Correct for unaligned access.
 139         * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
 140         for unaligned access.
 141         * sim/fr30/and.cgs: Test unaligned access.
 142
 143 Fri Feb  5 12:41:11 1999  Doug Evans  <devans@canuck.cygnus.com>
 144
 145         * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
 146
 147 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
 148
 149         * lib/sim-defs.exp (run_sim_test): New arg all_machs.
 150         * sim/fr30/allinsn.exp: Update.
 151         * sim/fr30/misc.exp: Update.
 152         * sim/m32r/allinsn.exp: Update.
 153         * sim/m32r/misc.exp: Update.
 154
 155 Fri Dec 18 17:19:34 1998  Dave Brolley  <brolley@cygnus.com>
 156
 157         * sim/fr30/ldres.cgs: New testcase.
 158         * sim/fr30/copld.cgs: New testcase.
 159         * sim/fr30/copst.cgs: New testcase.
 160         * sim/fr30/copsv.cgs: New testcase.
 161         * sim/fr30/nop.cgs: New testcase.
 162         * sim/fr30/andccr.cgs: New testcase.
 163         * sim/fr30/orccr.cgs: New testcase.
 164         * sim/fr30/addsp.cgs: New testcase.
 165         * sim/fr30/stilm.cgs: New testcase.
 166         * sim/fr30/extsb.cgs: New testcase.
 167         * sim/fr30/extub.cgs: New testcase.
 168         * sim/fr30/extsh.cgs: New testcase.
 169         * sim/fr30/extuh.cgs: New testcase.
 170         * sim/fr30/enter.cgs: New testcase.
 171         * sim/fr30/leave.cgs: New testcase.
 172         * sim/fr30/xchb.cgs: New testcase.
 173         * sim/fr30/dmovb.cgs: New testcase.
 174         * sim/fr30/dmov.cgs: New testcase.
 175         * sim/fr30/dmovh.cgs: New testcase.
 176
 177 Thu Dec 17 17:18:43 1998  Dave Brolley  <brolley@cygnus.com>
 178
 179         * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
 180         * sim/fr30/ret.cgs: Add tests fir ret:d.
 181         * sim/fr30/inte.cgs: New testcase.
 182         * sim/fr30/reti.cgs: New testcase.
 183         * sim/fr30/bra.cgs: New testcase.
 184         * sim/fr30/bno.cgs: New testcase.
 185         * sim/fr30/beq.cgs: New testcase.
 186         * sim/fr30/bne.cgs: New testcase.
 187         * sim/fr30/bc.cgs: New testcase.
 188         * sim/fr30/bnc.cgs: New testcase.
 189         * sim/fr30/bn.cgs: New testcase.
 190         * sim/fr30/bp.cgs: New testcase.
 191         * sim/fr30/bv.cgs: New testcase.
 192         * sim/fr30/bnv.cgs: New testcase.
 193         * sim/fr30/blt.cgs: New testcase.
 194         * sim/fr30/bge.cgs: New testcase.
 195         * sim/fr30/ble.cgs: New testcase.
 196         * sim/fr30/bgt.cgs: New testcase.
 197         * sim/fr30/bls.cgs: New testcase.
 198         * sim/fr30/bhi.cgs: New testcase.
 199
 200 Tue Dec 15 17:47:13 1998  Dave Brolley  <brolley@cygnus.com>
 201
 202         * sim/fr30/div.cgs (int): Add signed division scenario.
 203         * sim/fr30/int.cgs (int): Complete testcase.
 204         * sim/fr30/testutils.inc (_start): Initialize tbr.
 205         (test_s_user,test_s_system,set_i,test_i): New macros.
 206
 207 1998-12-14  Doug Evans  <devans@casey.cygnus.com>
 208
 209         * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
 210         errors.  Translate \n sequences in expected output to newline char.
 211         (slurp_options): Make parentheses optional.
 212         (sim_run): Look for board_info sim,options.
 213         * sim/fr30/hello.ms: Add trailing \n to expected output.
 214         * sim/m32r/hello.ms: Ditto.
 215         * sim/m32r/hw-trap.ms: Ditto.
 216
 217         * sim/m32r/trap.cgs: Properly align trap2_handler.
 218
 219         * sim/m32r/uread16.ms: New testcase.
 220         * sim/m32r/uread32.ms: New testcase.
 221         * sim/m32r/uwrite16.ms: New testcase.
 222         * sim/m32r/uwrite32.ms: New testcase.
 223
 224 1998-12-14  Dave Brolley  <brolley@cygnus.com>
 225
 226         * sim/fr30/call.cgs: Test ret here as well.
 227         * sim/fr30/ld.cgs: Remove bogus comment.
 228         * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
 229         * sim/fr30/div.ms: New testcase.
 230         * sim/fr30/st.cgs: New testcase.
 231         * sim/fr30/sth.cgs: New testcase.
 232         * sim/fr30/stb.cgs: New testcase.
 233         * sim/fr30/mov.cgs: New testcase.
 234         * sim/fr30/jmp.cgs: New testcase.
 235         * sim/fr30/ret.cgs: New testcase.
 236         * sim/fr30/int.cgs: New testcase.
 237
 238 Thu Dec 10 18:46:25 1998  Dave Brolley  <brolley@cygnus.com>
 239
 240         * sim/fr30/div0s.cgs: New testcase.
 241         * sim/fr30/div0u.cgs: New testcase.
 242         * sim/fr30/div1.cgs: New testcase.
 243         * sim/fr30/div2.cgs: New testcase.
 244         * sim/fr30/div3.cgs: New testcase.
 245         * sim/fr30/div4s.cgs: New testcase.
 246         * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
 247
 248 Tue Dec  8 13:16:53 1998  Dave Brolley  <brolley@cygnus.com>
 249
 250         * sim/fr30/testutils.inc (set_s_user): Correct Mask.
 251         (set_s_system): Correct Mask.
 252         * sim/fr30/ld.cgs (ld): Move previously failing test back
 253         into place.
 254         * sim/fr30/ldm0.cgs: New testcase.
 255         * sim/fr30/ldm1.cgs: New testcase.
 256         * sim/fr30/stm0.cgs: New testcase.
 257         * sim/fr30/stm1.cgs: New testcase.
 258
 259 Thu Dec  3 14:20:03 1998  Dave Brolley  <brolley@cygnus.com>
 260
 261         * sim/fr30/ld.cgs: Implement more loads.
 262         * sim/fr30/call.cgs: New testcase.
 263         * sim/fr30/testutils.inc (testr_h_dr): New macro.
 264         (set_s_user,set_s_system): New macros.
 265
 266         * sim/fr30: New Directory.
 267
 268 Wed Nov 18 10:50:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 269
 270         * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
 271         recent sim/common/sim-basics.h changes.
 272         * common/Makefile.in: Update.
 273
 274 Fri Oct 30 00:37:31 1998  Felix Lee  <flee@cygnus.com>
 275
 276         * lib/sim-defs.exp (sim_run): download target program to remote
 277         host, if necessary.  for unix-driven win32 testing.
 278
 279 Tue Sep 15 14:56:22 1998  Doug Evans  <devans@canuck.cygnus.com>
 280
 281         * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
 282         * sim/m32r/rte.cgs: Test bbpc,bbpsw.
 283         * sim/m32r/trap.cgs: Test bbpc,bbpsw.
 284
 285 Fri Jul 31 17:49:13 1998  Felix Lee  <flee@cygnus.com>
 286
 287         * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
 288         writeonly.
 289
 290 Fri Jul 24 09:40:34 1998  Doug Evans  <devans@canuck.cygnus.com>
 291
 292         * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
 293
 294 Wed Jul  1 15:57:54 1998  Doug Evans  <devans@seba.cygnus.com>
 295
 296         * sim/m32r/hw-trap.ms: New testcase.
 297
 298 Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
 299
 300         * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
 301
 302 Thu Jun 11 15:24:53 1998  Doug Evans  <devans@canuck.cygnus.com>
 303
 304         * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
 305         which is now a list of options controlling the behaviour of sim_run.
 306
 307 Wed Jun 10 10:53:20 1998  Doug Evans  <devans@seba.cygnus.com>
 308
 309         * sim/m32r/addx.cgs: Add another test.
 310         * sim/m32r/jmp.cgs: Add another test.
 311
 312 Mon Jun  8 16:08:27 1998  Doug Evans  <devans@canuck.cygnus.com>
 313
 314         * sim/m32r/trap.cgs: Test trap 2.
 315
 316 Mon Jun  1 18:54:22 1998  Frank Ch. Eigler  <fche@cygnus.com>
 317
 318         * lib/sim-defs.exp (sim_run): Add possible environment variable
 319         list to simulator run.
 320
 321 Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
 322
 323         * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
 324                        so that make check can be invoked recursively.
 325
 326 Thu May 14 11:48:35 1998  Doug Evans  <devans@canuck.cygnus.com>
 327
 328         * config/default.exp (CC,SIM): Delete.
 329
 330         * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
 331         New arg prog_opts.  All callers updated.
 332
 333 Fri May  8 18:10:28 1998  Jillian Ye <jillian@cygnus.com>
 334
 335         * Makefile.in: Made "check" the target of two
 336           dependencies (test1, test2) so that test2 get a chance to
 337           run even when test1 failed if "make -k check" is used.
 338
 339 Fri May  8 14:41:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 340
 341         * lib/sim-defs.exp (sim_version): Simplify.
 342         (sim_run): Implement.
 343         (run_sim_test): Use sim_run.
 344         (sim_compile): New proc.
 345
 346 Mon May  4 17:59:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
 347
 348         * config/default.exp: Added C compiler settings.
 349
 350 Wed Apr 22 12:26:28 1998  Doug Evans  <devans@canuck.cygnus.com>
 351
 352         * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
 353
 354 Tue Apr 21 10:49:03 1998  Doug Evans  <devans@canuck.cygnus.com>
 355
 356         * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
 357         try all machs.
 358
 359         * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
 360
 361 Fri Apr 17 16:00:52 1998  Doug Evans  <devans@canuck.cygnus.com>
 362
 363         * sim/m32r/mv[ft]achi.cgs: Fix expected result
 364         (sign extension of top 8 bits).
 365
 366 Wed Feb 25 11:01:17 1998  Doug Evans  <devans@canuck.cygnus.com>
 367
 368         * Makefile.in (RUNTEST): Fix path to runtest.
 369
 370 Fri Feb 20 11:00:02 1998  Nick Clifton  <nickc@cygnus.com>
 371
 372         * sim/m32r/unlock.cgs: Fixed test.
 373         * sim/m32r/mvfc.cgs: Fixed test.
 374         * sim/m32r/remu.cgs: Fixed test.
 375         * sim/m32r/bnc24.cgs: Test long BNC instruction.
 376         * sim/m32r/bnc8.cgs: Test short BNC instruction.
 377         * sim/m32r/ld-plus.cgs: Test LD instruction.
 378         * sim/m32r/macwhi.cgs: Test MACWHI instruction.
 379         * sim/m32r/macwlo.cgs: Test MACWLO instruction.
 380         * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
 381         * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
 382         * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
 383         * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
 384         * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
 385         * sim/m32r/addv.cgs: Test ADDV instruction.
 386         * sim/m32r/addv3.cgs: Test ADDV3 instruction.
 387         * sim/m32r/addx.cgs: Test ADDX instruction.
 388         * sim/m32r/lock.cgs: Test LOCK instruction.
 389         * sim/m32r/neg.cgs: Test NEG instruction.
 390         * sim/m32r/not.cgs: Test NOT instruction.
 391         * sim/m32r/unlock.cgs: Test UNLOCK instruction.
 392
 393 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
 394
 395         * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
 396         address into a general register.
 397
 398         * sim/m32r/or3.cgs: Test OR3 instruction.
 399         * sim/m32r/rach.cgs: Test RACH instruction.
 400         * sim/m32r/rem.cgs: Test REM instruction.
 401         * sim/m32r/sub.cgs: Test SUB instruction.
 402         * sim/m32r/mv.cgs: Test MV instruction.
 403         * sim/m32r/mul.cgs: Test MUL instruction.
 404         * sim/m32r/bl24.cgs: Test long BL instruction.
 405         * sim/m32r/bl8.cgs: Test short BL instruction.
 406         * sim/m32r/blez.cgs: Test BLEZ instruction.
 407         * sim/m32r/bltz.cgs: Test BLTZ instruction.
 408         * sim/m32r/bne.cgs: Test BNE instruction.
 409         * sim/m32r/bnez.cgs: Test BNEZ instruction.
 410         * sim/m32r/bra24.cgs: Test long BRA instruction.
 411         * sim/m32r/bra8.cgs: Test short BRA instruction.
 412         * sim/m32r/jl.cgs: Test JL instruction.
 413         * sim/m32r/or.cgs: Test OR instruction.
 414         * sim/m32r/jmp.cgs: Test JMP instruction.
 415         * sim/m32r/and.cgs: Test AND instruction.
 416         * sim/m32r/and3.cgs: Test AND3 instruction.
 417         * sim/m32r/beq.cgs: Test BEQ instruction.
 418         * sim/m32r/beqz.cgs: Test BEQZ instruction.
 419         * sim/m32r/bgez.cgs: Test BGEZ instruction.
 420         * sim/m32r/bgtz.cgs: Test BGTZ instruction.
 421         * sim/m32r/cmp.cgs: Test CMP instruction.
 422         * sim/m32r/cmpi.cgs: Test CMPI instruction.
 423         * sim/m32r/cmpu.cgs: Test CMPU instruction.
 424         * sim/m32r/cmpui.cgs: Test CMPUI instruction.
 425         * sim/m32r/div.cgs: Test DIV instruction.
 426         * sim/m32r/divu.cgs: Test DIVU instruction.
 427         * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
 428         * sim/m32r/sll.cgs: Test SLL instruction.
 429         * sim/m32r/sll3.cgs: Test SLL3 instruction.
 430         * sim/m32r/slli.cgs: Test SLLI instruction.
 431         * sim/m32r/sra.cgs: Test SRA instruction.
 432         * sim/m32r/sra3.cgs: Test SRA3 instruction.
 433         * sim/m32r/srai.cgs: Test SRAI instruction.
 434         * sim/m32r/srl.cgs: Test SRL instruction.
 435         * sim/m32r/srl3.cgs: Test SRL3 instruction.
 436         * sim/m32r/srli.cgs: Test SRLI instruction.
 437         * sim/m32r/xor3.cgs: Test XOR3 instruction.
 438         * sim/m32r/xor.cgs: Test XOR instruction.
 439
 440 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
 441
 442         * config/default.exp: New file.
 443         * lib/sim-defs.exp: New file.
 444         * sim/m32r/*: m32r dejagnu simulator testsuite.
 445
 446         * Makefile.in (build_alias): Define.
 447         (arch): Define.
 448         (RUNTEST_FOR_TARGET): Delete.
 449         (RUNTEST): Fix.
 450         (check): Depend on site.exp.  Run dejagnu.
 451         (site.exp): New target.
 452         * configure.in (arch): Define from target_cpu.
 453         * configure: Regenerate.
 454
 455 Wed Sep 17 10:21:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 456
 457         * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
 458         (gen_mask): Ditto.
 459
 460         * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
 461         (calc): Add support for 8 bit version of macros.
 462         (main): Add tests for 8 bit versions of macros.
 463         (check_sext): Check SEXT of zero clears bits.
 464
 465         * common/bits-gen.c (main): Generate tests for 8 bit versions of
 466         macros.
 467
 468 Thu Sep 11 13:04:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 469
 470         * common/Make-common.in: New file, provide generic rules for
 471         running checks.
 472
 473 Mon Sep  1 16:43:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 474
 475         * configure.in (configdirs): Test for the target directory instead
 476         of matching on a target.
 477