2003-10-06 Dave Brolley <brolley@redhat.com>
[external/binutils.git] / sim / testsuite / ChangeLog
1 2003-10-06  Dave Brolley  <brolley@redhat.com>
2
3         * sim/frv/fr550: New subdirectory.
4         * sim/frv/fr400/*.cgs: Add fr550 as appropriate.
5         * sim/frv/fr500/*.cgs: Add fr550 as appropriate.
6         * sim/frv/interrupts/*.cgs: Add fr550 as appropriate.
7         * sim/frv/interrupts/*-fr550.cgs: New test cases for fr550.
8
9 2003-09-19  Michael Snyder  <msnyder@redhat.com>
10
11         * sim/frv/nldqi.cgs: Remove.  This insn was never implemented
12         by Fujitsu.
13
14 2003-09-19  Dave Brolley  <brolley@redhat.com>
15
16         * sim/frv/rstqf.cgs: Use nldq instead of nldqi.
17         * sim/frv/rstq.cgs: Use nldq instead of nldqi.
18
19 2003-09-11  Michael Snyder  <msnyder@redhat.com>
20
21         * sim/testsuite/sim/frv/movgs.cgs: Change lcr to spr[273],
22         which according to the comments seems to be the intent.
23
24 2003-09-09  Dave Brolley  <brolley@redhat.com>
25
26         * sim/frv/maddaccs.cgs: move to fr400 subdirectory.
27         * sim/frv/msubaccs.cgs: move to fr400 subdirectory.
28         * sim/frv/masaccs.cgs: move to fr400 subdirectory.
29
30 2003-09-03  Michael Snyder  <msnyder@redhat.com>
31
32         * sim/frv/fr500/mclracc.cgs: Change mach to 'all', to be
33         consistent with other tests in the directory.
34
35 2003-09-03  Michael Snyder  <msnyder@redhat.com>
36
37         * sim/frv/interrupts/Ipipe-fr400.cgs: New file.
38         * sim/frv/interrupts/Ipipe-fr500.cgs: New file.
39         * sim/frv/interrupts/Ipipe.cgs: Remove (replaced by above).
40
41 2003-08-20  Michael Snyder  <msnyder@redhat.com>
42             On behalf of Dave Brolley
43   
44         * sim/frv: New testsuite.
45         * frv-elf: New testsuite.
46   
47 2003-07-09  Michael Snyder  <msnyder@redhat.com>
48
49         * sim/sh: New directory.  Tests for Renesas sh family.
50
51 2003-04-13  Michael Snyder  <msnyder@redhat.com>
52
53         * sim/h8300: New directory.  Tests for Renesas h8/300 family.
54
55 2003-04-01  Nick Clifton  <nickc@redhat.com>
56
57         * sim/arm: New directory: Tests for ARM simulator.
58         * sim/arm/allinsn.exp: New file: Test script.
59         * sim/arm/testutils.inc: New file: Test macros.
60         * sim/arm/adc.cgs, sim/arm/add.cgs, sim/arm/and.cgs,
61         sim/arm/b.cgs, sim/arm/bic.cgs, sim/arm/bl.cgs, sim/arm/bx.cgs,
62         sim/arm/cmn.cgs, sim/arm/cmp.cgs, sim/arm/eor.cgs,
63         sim/arm/hello.ms, sim/arm/ldm.cgs, sim/arm/ldr.cgs,
64         sim/arm/ldrb.cgs, sim/arm/ldrh.cgs, sim/arm/ldrsb.cgs,
65         sim/arm/ldrsh.cgs, sim/arm/misaligned1.ms, sim/arm/misaligned2.ms,
66         sim/arm/misaligned3.ms, sim/arm/misc.exp, sim/arm/mla.cgs,
67         sim/arm/mov.cgs, sim/arm/mrs.cgs, sim/arm/msr.cgs,
68         sim/arm/mul.cgs, sim/arm/mvn.cgs, sim/arm/orr.cgs,
69         sim/arm/rsb.cgs, sim/arm/rsc.cgs, sim/arm/sbc.cgs,
70         sim/arm/smlal.cgs, sim/arm/smull.cgs, sim/arm/stm.cgs,
71         sim/arm/str.cgs, sim/arm/strb.cgs, sim/arm/strh.cgs,
72         sim/arm/sub.cgs, sim/arm/swi.cgs, sim/arm/swp.cgs,
73         sim/arm/swpb.cgs, sim/arm/teq.cgs,  sim/arm/tst.cgs,
74         sim/arm/umlal.cgs, sim/arm/umull.cgs: New files: ARM tests.
75         * sim/arm/iwmmxt: New Directory: Tests for iWMMXt.
76         * sim/arm/iwmmxt/iwmmxt.exp: New file: Test script.
77         * sim/arm/iwmmxt/testutils.inc: New file: Test macros.
78         * sim/arm/iwmmxt/tbcst.cgs, sim/arm/iwmmxt/textrm.cgs,
79         sim/arm/iwmmxt/tinsr.cgs, sim/arm/iwmmxt/tmia.cgs,
80         sim/arm/iwmmxt/tmiaph.cgs, sim/arm/iwmmxt/tmiaxy.cgs,
81         sim/arm/iwmmxt/tmovmsk.cgss, sim/arm/iwmmxt/wacc.cgs,
82         sim/arm/iwmmxt/wadd.cgs, sim/arm/iwmmxt/waligni.cgs,
83         sim/arm/iwmmxt/walignr.cgs, sim/arm/iwmmxt/wand.cgs,
84         sim/arm/iwmmxt/wandn.cgs, sim/arm/iwmmxt/wavg2.cgs,
85         sim/arm/iwmmxt/wcmpeq.cgs, sim/arm/iwmmxt/wcmpgt.cgs,
86         sim/arm/iwmmxt/wmac.cgs, sim/arm/iwmmxt/wmadd.cgs,
87         sim/arm/iwmmxt/wmax.cgs, sim/arm/iwmmxt/wmin.cgs,
88         sim/arm/iwmmxt/wmov.cgs, sim/arm/iwmmxt/wmul.cgs,
89         sim/arm/iwmmxt/wor.cgs, sim/arm/iwmmxt/wpack.cgs,
90         sim/arm/iwmmxt/wror.cgs, sim/arm/iwmmxt/wsad.cgs,
91         sim/arm/iwmmxt/wshufh.cgs, sim/arm/iwmmxt/wsll.cgs,
92         sim/arm/iwmmxt/wsra.cgs, sim/arm/iwmmxt/wsrl.cgs,
93         sim/arm/iwmmxt/wsub.cgs, sim/arm/iwmmxt/wunpckeh.cgs,
94         sim/arm/iwmmxt/wunpckel.cgs, sim/arm/iwmmxt/wunpckih.cgs,
95         sim/arm/iwmmxt/wunpckil.cgs, sim/arm/iwmmxt/wxor.cgs,
96         sim/arm/iwmmxt/wzero.cgs: New files: iWMMXt tests.
97         * sim/arm/thumb: New Directory: Thumb tests.
98         * sim/arm/thumb/allthumb.exp: New file: Test script.
99         * sim/arm/thumb/testutils.inc: New file: Test macros.
100         * sim/arm/thumb/adc.cgs, sim/arm/thumb/add-hd-hs.cgs,
101         sim/arm/thumb/add-hd-rs.cgs, sim/arm/thumb/add-rd-hs.cgs,
102         sim/arm/thumb/add-sp.cgs, sim/arm/thumb/add.cgs,
103         sim/arm/thumb/addi.cgs, sim/arm/thumb/addi8.cgs,
104         sim/arm/thumb/and.cgs, sim/arm/thumb/asr.cgs, sim/arm/thumb/b.cgs,
105         sim/arm/thumb/bcc.cgs, sim/arm/thumb/bcs.cgs,
106         sim/arm/thumb/beq.cgs, sim/arm/thumb/bge.cgs,
107         sim/arm/thumb/bgt.cgs, sim/arm/thumb/bhi.cgs,
108         sim/arm/thumb/bic.cgs, sim/arm/thumb/bl-hi.cgs,
109         sim/arm/thumb/bl-lo.cgs, sim/arm/thumb/ble.cgs,
110         sim/arm/thumb/bls.cgs, sim/arm/thumb/blt.cgs,
111         sim/arm/thumb/bmi.cgs, sim/arm/thumb/bne.cgs,
112         sim/arm/thumb/bpl.cgs, sim/arm/thumb/bvc.cgs,
113         sim/arm/thumb/bvs.cgs, sim/arm/thumb/bx-hs.cgs,
114         sim/arm/thumb/bx-rs.cgs, sim/arm/thumb/cmn.cgs,
115         sim/arm/thumb/cmp-hd-hs.cgs, sim/arm/thumb/cmp-hd-rs.cgs,
116         sim/arm/thumb/cmp-rd-hs.cgs, sim/arm/thumb/cmp.cgs,
117         sim/arm/thumb/eor.cgs, sim/arm/thumb/lda-pc.cgs,
118         sim/arm/thumb/lda-sp.cgs, sim/arm/thumb/ldmia.cgs,
119         sim/arm/thumb/ldr-imm.cgs, sim/arm/thumb/ldr-pc.cgs,
120         sim/arm/thumb/ldr-sprel.cgs, sim/arm/thumb/ldr.cgs,
121         sim/arm/thumb/ldrb-imm.cgs, sim/arm/thumb/ldrb.cgs,
122         sim/arm/thumb/ldrh-imm.cgs, sim/arm/thumb/ldrh.cgs,
123         sim/arm/thumb/ldsb.cgs, sim/arm/thumb/ldsh.cgs,
124         sim/arm/thumb/lsl.cgs, sim/arm/thumb/lsr.cgs,
125         sim/arm/thumb/mov-hd-hs.cgs, sim/arm/thumb/mov-hd-rs.cgs,
126         sim/arm/thumb/mov-rd-hs.cgs, sim/arm/thumb/mov.cgs,
127         sim/arm/thumb/mul.cgs, sim/arm/thumb/mvn.cgs,
128         sim/arm/thumb/neg.cgs, sim/arm/thumb/orr.cgs,
129         sim/arm/thumb/pop-pc.cgs, sim/arm/thumb/pop.cgs,
130         sim/arm/thumb/push-lr.cgs, sim/arm/thumb/push.cgs,
131         sim/arm/thumb/ror.cgs, sim/arm/thumb/sbc.cgs,
132         sim/arm/thumb/stmia.cgs, sim/arm/thumb/str-imm.cgs,
133         sim/arm/thumb/str-sprel.cgs, sim/arm/thumb/str.cgs,
134         sim/arm/thumb/strb-imm.cgs, sim/arm/thumb/strb.cgs,
135         sim/arm/thumb/strh-imm.cgs, sim/arm/thumb/strh.cgs,
136         sim/arm/thumb/sub-sp.cgs, sim/arm/thumb/sub.cgs,
137         sim/arm/thumb/subi.cgs, sim/arm/thumb/subi8.cgs,
138         sim/arm/thumb/swi.cgs, sim/arm/thumb/tst.cgs: New files: Thumb
139         tests.
140         * sim/arm/xscale: New directory.
141         * sim/arm/xscale/xscale.exp: New file: Test script.
142         * sim/arm/xscale/testutils.inc: New file: Test macros.
143         * sim/arm/xscale/blx.cgs, sim/arm/xscale/mia.cgs,
144         sim/arm/xscale/miaph.cgs, sim/arm/xscale/miaxy.cgs,
145         sim/arm/xscale/mra.cgs: New files: XScale tests.
146
147 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
148
149         * configure: Regenerated to track ../common/aclocal.m4 changes.
150
151 2001-07-31  Ben Elliston  <bje@redhat.com>
152
153         * lib/sim-defs.exp (run_sim_test): Include a description such as
154         "assembling" or "linking" that identifies the phase a test fails
155         in, for easier analysis of failures.
156
157 2000-11-01  Dave Brolley  <brolley@cygnus.com>
158
159         * lib/sim-defs.exp (run_sm_test): Correct comment. "output" and
160         "xerror" options do not use a list of machines. Clear options from
161         previous test case. Use "$cpu_option"  to identify the machine to the
162         assembler, if specified.
163
164 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
165
166         * configure: Regenerated to track ../common/aclocal.m4 changes.
167
168 1999-09-15  Doug Evans  <devans@casey.cygnus.com>
169
170         * sim/arm/b.cgs: New testcase.
171         * sim/arm/bic.cgs: New testcase.
172         * sim/arm/bl.cgs: New testcase.
173
174 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
175
176         * configure: Regenerated to track ../common/aclocal.m4 changes.
177
178 1999-08-30  Doug Evans  <devans@casey.cygnus.com>
179
180         * lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
181         requested_machs, now is list of machs to run tests for.
182         Delete locals AS,ASFLAGS,LD,LDFLAGS.  Use target_assemble
183         and target_link instead.
184
185 1999-04-21  Doug Evans  <devans@casey.cygnus.com>
186
187         * sim/m32r/nop.cgs: Add missing nop insn.
188
189 Mon Mar 22 13:28:56 1999  Dave Brolley  <brolley@cygnus.com>
190
191         * sim/fr30/stb.cgs: Correct for unaligned access.
192         * sim/fr30/sth.cgs: Correct for unaligned access.
193         * sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
194         for unaligned access.
195         * sim/fr30/and.cgs: Test unaligned access.
196
197 Fri Feb  5 12:41:11 1999  Doug Evans  <devans@canuck.cygnus.com>
198
199         * lib/sim-defs.exp (sim_run): Print simulator arguments log message.
200
201 1999-01-05  Doug Evans  <devans@casey.cygnus.com>
202
203         * lib/sim-defs.exp (run_sim_test): New arg all_machs.
204         * sim/fr30/allinsn.exp: Update.
205         * sim/fr30/misc.exp: Update.
206         * sim/m32r/allinsn.exp: Update.
207         * sim/m32r/misc.exp: Update.
208
209 Fri Dec 18 17:19:34 1998  Dave Brolley  <brolley@cygnus.com>
210
211         * sim/fr30/ldres.cgs: New testcase.
212         * sim/fr30/copld.cgs: New testcase.
213         * sim/fr30/copst.cgs: New testcase.
214         * sim/fr30/copsv.cgs: New testcase.
215         * sim/fr30/nop.cgs: New testcase.
216         * sim/fr30/andccr.cgs: New testcase.
217         * sim/fr30/orccr.cgs: New testcase.
218         * sim/fr30/addsp.cgs: New testcase.
219         * sim/fr30/stilm.cgs: New testcase.
220         * sim/fr30/extsb.cgs: New testcase.
221         * sim/fr30/extub.cgs: New testcase.
222         * sim/fr30/extsh.cgs: New testcase.
223         * sim/fr30/extuh.cgs: New testcase.
224         * sim/fr30/enter.cgs: New testcase.
225         * sim/fr30/leave.cgs: New testcase.
226         * sim/fr30/xchb.cgs: New testcase.
227         * sim/fr30/dmovb.cgs: New testcase.
228         * sim/fr30/dmov.cgs: New testcase.
229         * sim/fr30/dmovh.cgs: New testcase.
230
231 Thu Dec 17 17:18:43 1998  Dave Brolley  <brolley@cygnus.com>
232
233         * sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
234         * sim/fr30/ret.cgs: Add tests fir ret:d.
235         * sim/fr30/inte.cgs: New testcase.
236         * sim/fr30/reti.cgs: New testcase.
237         * sim/fr30/bra.cgs: New testcase.
238         * sim/fr30/bno.cgs: New testcase.
239         * sim/fr30/beq.cgs: New testcase.
240         * sim/fr30/bne.cgs: New testcase.
241         * sim/fr30/bc.cgs: New testcase.
242         * sim/fr30/bnc.cgs: New testcase.
243         * sim/fr30/bn.cgs: New testcase.
244         * sim/fr30/bp.cgs: New testcase.
245         * sim/fr30/bv.cgs: New testcase.
246         * sim/fr30/bnv.cgs: New testcase.
247         * sim/fr30/blt.cgs: New testcase.
248         * sim/fr30/bge.cgs: New testcase.
249         * sim/fr30/ble.cgs: New testcase.
250         * sim/fr30/bgt.cgs: New testcase.
251         * sim/fr30/bls.cgs: New testcase.
252         * sim/fr30/bhi.cgs: New testcase.
253
254 Tue Dec 15 17:47:13 1998  Dave Brolley  <brolley@cygnus.com>
255
256         * sim/fr30/div.cgs (int): Add signed division scenario.
257         * sim/fr30/int.cgs (int): Complete testcase.
258         * sim/fr30/testutils.inc (_start): Initialize tbr.
259         (test_s_user,test_s_system,set_i,test_i): New macros.
260
261 1998-12-14  Doug Evans  <devans@casey.cygnus.com>
262
263         * lib/sim-defs.exp (run_sim_test): New option xerror, for expected
264         errors.  Translate \n sequences in expected output to newline char.
265         (slurp_options): Make parentheses optional.
266         (sim_run): Look for board_info sim,options.
267         * sim/fr30/hello.ms: Add trailing \n to expected output.
268         * sim/m32r/hello.ms: Ditto.
269         * sim/m32r/hw-trap.ms: Ditto.
270
271         * sim/m32r/trap.cgs: Properly align trap2_handler.
272
273         * sim/m32r/uread16.ms: New testcase.
274         * sim/m32r/uread32.ms: New testcase.
275         * sim/m32r/uwrite16.ms: New testcase.
276         * sim/m32r/uwrite32.ms: New testcase.
277
278 1998-12-14  Dave Brolley  <brolley@cygnus.com>
279
280         * sim/fr30/call.cgs: Test ret here as well.
281         * sim/fr30/ld.cgs: Remove bogus comment.
282         * sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
283         * sim/fr30/div.ms: New testcase.
284         * sim/fr30/st.cgs: New testcase.
285         * sim/fr30/sth.cgs: New testcase.
286         * sim/fr30/stb.cgs: New testcase.
287         * sim/fr30/mov.cgs: New testcase.
288         * sim/fr30/jmp.cgs: New testcase.
289         * sim/fr30/ret.cgs: New testcase.
290         * sim/fr30/int.cgs: New testcase.
291
292 Thu Dec 10 18:46:25 1998  Dave Brolley  <brolley@cygnus.com>
293
294         * sim/fr30/div0s.cgs: New testcase.
295         * sim/fr30/div0u.cgs: New testcase.
296         * sim/fr30/div1.cgs: New testcase.
297         * sim/fr30/div2.cgs: New testcase.
298         * sim/fr30/div3.cgs: New testcase.
299         * sim/fr30/div4s.cgs: New testcase.
300         * sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
301
302 Tue Dec  8 13:16:53 1998  Dave Brolley  <brolley@cygnus.com>
303
304         * sim/fr30/testutils.inc (set_s_user): Correct Mask.
305         (set_s_system): Correct Mask.
306         * sim/fr30/ld.cgs (ld): Move previously failing test back
307         into place.
308         * sim/fr30/ldm0.cgs: New testcase.
309         * sim/fr30/ldm1.cgs: New testcase.
310         * sim/fr30/stm0.cgs: New testcase.
311         * sim/fr30/stm1.cgs: New testcase.
312
313 Thu Dec  3 14:20:03 1998  Dave Brolley  <brolley@cygnus.com>
314
315         * sim/fr30/ld.cgs: Implement more loads.
316         * sim/fr30/call.cgs: New testcase.
317         * sim/fr30/testutils.inc (testr_h_dr): New macro.
318         (set_s_user,set_s_system): New macros.
319
320         * sim/fr30: New Directory.
321
322 Wed Nov 18 10:50:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
323
324         * common/bits-gen.c (main): Add BYTE_ORDER so that it matches
325         recent sim/common/sim-basics.h changes.
326         * common/Makefile.in: Update.
327         
328 Fri Oct 30 00:37:31 1998  Felix Lee  <flee@cygnus.com>
329
330         * lib/sim-defs.exp (sim_run): download target program to remote
331         host, if necessary.  for unix-driven win32 testing.
332
333 Tue Sep 15 14:56:22 1998  Doug Evans  <devans@canuck.cygnus.com>
334
335         * sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
336         * sim/m32r/rte.cgs: Test bbpc,bbpsw.
337         * sim/m32r/trap.cgs: Test bbpc,bbpsw.
338
339 Fri Jul 31 17:49:13 1998  Felix Lee  <flee@cygnus.com>
340
341         * lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
342         writeonly.
343
344 Fri Jul 24 09:40:34 1998  Doug Evans  <devans@canuck.cygnus.com>
345
346         * Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
347
348 Wed Jul  1 15:57:54 1998  Doug Evans  <devans@seba.cygnus.com>
349
350         * sim/m32r/hw-trap.ms: New testcase.
351
352 Tue Jun 16 15:44:01 1998 Jillian Ye <jillian@cygnus.com>
353
354         * lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
355
356 Thu Jun 11 15:24:53 1998  Doug Evans  <devans@canuck.cygnus.com>
357
358         * lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
359         which is now a list of options controlling the behaviour of sim_run.
360
361 Wed Jun 10 10:53:20 1998  Doug Evans  <devans@seba.cygnus.com>
362
363         * sim/m32r/addx.cgs: Add another test.
364         * sim/m32r/jmp.cgs: Add another test.
365
366 Mon Jun  8 16:08:27 1998  Doug Evans  <devans@canuck.cygnus.com>
367
368         * sim/m32r/trap.cgs: Test trap 2.
369
370 Mon Jun  1 18:54:22 1998  Frank Ch. Eigler  <fche@cygnus.com>
371
372         * lib/sim-defs.exp (sim_run): Add possible environment variable
373         list to simulator run.
374
375 Thu May 28 14:59:46 1998 Jillian Ye <jillian@cygnus.com>
376
377         * Makefile.in: Take RUNTEST out of FLAG_TO_PASS
378                        so that make check can be invoked recursively.
379
380 Thu May 14 11:48:35 1998  Doug Evans  <devans@canuck.cygnus.com>
381
382         * config/default.exp (CC,SIM): Delete.
383
384         * lib/sim-defs.exp (sim_run): Fix handling of output redirection.
385         New arg prog_opts.  All callers updated.
386
387 Fri May  8 18:10:28 1998  Jillian Ye <jillian@cygnus.com>
388
389         * Makefile.in: Made "check" the target of two
390           dependencies (test1, test2) so that test2 get a chance to 
391           run even when test1 failed if "make -k check" is used.
392
393 Fri May  8 14:41:28 1998  Doug Evans  <devans@canuck.cygnus.com>
394
395         * lib/sim-defs.exp (sim_version): Simplify.
396         (sim_run): Implement.
397         (run_sim_test): Use sim_run.
398         (sim_compile): New proc.
399
400 Mon May  4 17:59:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
401
402         * config/default.exp: Added C compiler settings.
403
404 Wed Apr 22 12:26:28 1998  Doug Evans  <devans@canuck.cygnus.com>
405
406         * Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
407
408 Tue Apr 21 10:49:03 1998  Doug Evans  <devans@canuck.cygnus.com>
409
410         * lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
411         try all machs.
412
413         * sim/m32r/addx.cgs: Test (-1)+(-1)+1.
414
415 Fri Apr 17 16:00:52 1998  Doug Evans  <devans@canuck.cygnus.com>
416
417         * sim/m32r/mv[ft]achi.cgs: Fix expected result
418         (sign extension of top 8 bits).
419
420 Wed Feb 25 11:01:17 1998  Doug Evans  <devans@canuck.cygnus.com>
421
422         * Makefile.in (RUNTEST): Fix path to runtest.
423
424 Fri Feb 20 11:00:02 1998  Nick Clifton  <nickc@cygnus.com>
425
426         * sim/m32r/unlock.cgs: Fixed test.
427         * sim/m32r/mvfc.cgs: Fixed test.
428         * sim/m32r/remu.cgs: Fixed test.
429         * sim/m32r/bnc24.cgs: Test long BNC instruction.
430         * sim/m32r/bnc8.cgs: Test short BNC instruction.
431         * sim/m32r/ld-plus.cgs: Test LD instruction.
432         * sim/m32r/macwhi.cgs: Test MACWHI instruction.
433         * sim/m32r/macwlo.cgs: Test MACWLO instruction.
434         * sim/m32r/mulwhi.cgs: Test MULWHI instruction.
435         * sim/m32r/mulwlo.cgs: Test MULWLO instruction.
436         * sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
437         * sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
438         * sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
439         * sim/m32r/addv.cgs: Test ADDV instruction.
440         * sim/m32r/addv3.cgs: Test ADDV3 instruction.
441         * sim/m32r/addx.cgs: Test ADDX instruction.
442         * sim/m32r/lock.cgs: Test LOCK instruction.
443         * sim/m32r/neg.cgs: Test NEG instruction.
444         * sim/m32r/not.cgs: Test NOT instruction.
445         * sim/m32r/unlock.cgs: Test UNLOCK instruction.
446
447 Thu Feb 19 11:15:45 1998  Nick Clifton  <nickc@cygnus.com>
448
449         * sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
450         address into a general register.
451
452         * sim/m32r/or3.cgs: Test OR3 instruction.
453         * sim/m32r/rach.cgs: Test RACH instruction.
454         * sim/m32r/rem.cgs: Test REM instruction.
455         * sim/m32r/sub.cgs: Test SUB instruction.
456         * sim/m32r/mv.cgs: Test MV instruction.
457         * sim/m32r/mul.cgs: Test MUL instruction.
458         * sim/m32r/bl24.cgs: Test long BL instruction.
459         * sim/m32r/bl8.cgs: Test short BL instruction.
460         * sim/m32r/blez.cgs: Test BLEZ instruction.
461         * sim/m32r/bltz.cgs: Test BLTZ instruction.
462         * sim/m32r/bne.cgs: Test BNE instruction.
463         * sim/m32r/bnez.cgs: Test BNEZ instruction.
464         * sim/m32r/bra24.cgs: Test long BRA instruction.
465         * sim/m32r/bra8.cgs: Test short BRA instruction.
466         * sim/m32r/jl.cgs: Test JL instruction.
467         * sim/m32r/or.cgs: Test OR instruction.
468         * sim/m32r/jmp.cgs: Test JMP instruction.
469         * sim/m32r/and.cgs: Test AND instruction.
470         * sim/m32r/and3.cgs: Test AND3 instruction.
471         * sim/m32r/beq.cgs: Test BEQ instruction.
472         * sim/m32r/beqz.cgs: Test BEQZ instruction.
473         * sim/m32r/bgez.cgs: Test BGEZ instruction.
474         * sim/m32r/bgtz.cgs: Test BGTZ instruction.
475         * sim/m32r/cmp.cgs: Test CMP instruction.
476         * sim/m32r/cmpi.cgs: Test CMPI instruction.
477         * sim/m32r/cmpu.cgs: Test CMPU instruction.
478         * sim/m32r/cmpui.cgs: Test CMPUI instruction.
479         * sim/m32r/div.cgs: Test DIV instruction.
480         * sim/m32r/divu.cgs: Test DIVU instruction.
481         * sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
482         * sim/m32r/sll.cgs: Test SLL instruction.
483         * sim/m32r/sll3.cgs: Test SLL3 instruction.
484         * sim/m32r/slli.cgs: Test SLLI instruction.
485         * sim/m32r/sra.cgs: Test SRA instruction.
486         * sim/m32r/sra3.cgs: Test SRA3 instruction.
487         * sim/m32r/srai.cgs: Test SRAI instruction.
488         * sim/m32r/srl.cgs: Test SRL instruction.
489         * sim/m32r/srl3.cgs: Test SRL3 instruction.
490         * sim/m32r/srli.cgs: Test SRLI instruction.
491         * sim/m32r/xor3.cgs: Test XOR3 instruction.
492         * sim/m32r/xor.cgs: Test XOR instruction.
493
494 Tue Feb 17 12:46:05 1998  Doug Evans  <devans@seba.cygnus.com>
495
496         * config/default.exp: New file.
497         * lib/sim-defs.exp: New file.
498         * sim/m32r/*: m32r dejagnu simulator testsuite.
499
500         * Makefile.in (build_alias): Define.
501         (arch): Define.
502         (RUNTEST_FOR_TARGET): Delete.
503         (RUNTEST): Fix.
504         (check): Depend on site.exp.  Run dejagnu.
505         (site.exp): New target.
506         * configure.in (arch): Define from target_cpu.
507         * configure: Regenerate.
508
509 Wed Sep 17 10:21:26 1997  Andrew Cagney  <cagney@b1.cygnus.com>
510
511         * common/bits-gen.c (gen_bit): Pass in the full name of the macro.
512         (gen_mask): Ditto.
513
514         * common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
515         (calc): Add support for 8 bit version of macros.
516         (main): Add tests for 8 bit versions of macros.
517         (check_sext): Check SEXT of zero clears bits.
518
519         * common/bits-gen.c (main): Generate tests for 8 bit versions of
520         macros.
521
522 Thu Sep 11 13:04:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
523
524         * common/Make-common.in: New file, provide generic rules for
525         running checks.
526
527 Mon Sep  1 16:43:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
528
529         * configure.in (configdirs): Test for the target directory instead
530         of matching on a target.
531