1 /* Simulator model support for sparc64.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright (C) 1999 Cygnus Solutions, Inc.
7 This file is part of the Cygnus Simulators.
12 #define WANT_CPU sparc64
13 #define WANT_CPU_SPARC64
17 /* The profiling data is recorded here, but is accessed via the profiling
18 mechanism. After all, this is information for profiling. */
20 #if WITH_PROFILE_MODEL_P
22 /* Model handlers for each insn. */
25 model_sparc64_def_beqz (SIM_CPU *current_cpu, void *sem_arg)
27 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
28 const IDESC * UNUSED idesc = abuf->idesc;
30 IADDR UNUSED pc = GET_H_PC ();
31 CGEN_INSN_INT insn = abuf->insn;
32 EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
34 EXTRACT_IFMT_BEQZ_CODE
38 int UNUSED insn_referenced = abuf->written;
39 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
45 model_sparc64_def_bgez (SIM_CPU *current_cpu, void *sem_arg)
47 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
48 const IDESC * UNUSED idesc = abuf->idesc;
50 IADDR UNUSED pc = GET_H_PC ();
51 CGEN_INSN_INT insn = abuf->insn;
52 EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
54 EXTRACT_IFMT_BEQZ_CODE
58 int UNUSED insn_referenced = abuf->written;
59 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
65 model_sparc64_def_bgtz (SIM_CPU *current_cpu, void *sem_arg)
67 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
68 const IDESC * UNUSED idesc = abuf->idesc;
70 IADDR UNUSED pc = GET_H_PC ();
71 CGEN_INSN_INT insn = abuf->insn;
72 EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
74 EXTRACT_IFMT_BEQZ_CODE
78 int UNUSED insn_referenced = abuf->written;
79 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
85 model_sparc64_def_blez (SIM_CPU *current_cpu, void *sem_arg)
87 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
88 const IDESC * UNUSED idesc = abuf->idesc;
90 IADDR UNUSED pc = GET_H_PC ();
91 CGEN_INSN_INT insn = abuf->insn;
92 EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
94 EXTRACT_IFMT_BEQZ_CODE
98 int UNUSED insn_referenced = abuf->written;
99 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
105 model_sparc64_def_bltz (SIM_CPU *current_cpu, void *sem_arg)
107 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
108 const IDESC * UNUSED idesc = abuf->idesc;
110 IADDR UNUSED pc = GET_H_PC ();
111 CGEN_INSN_INT insn = abuf->insn;
112 EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
114 EXTRACT_IFMT_BEQZ_CODE
118 int UNUSED insn_referenced = abuf->written;
119 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
125 model_sparc64_def_bnez (SIM_CPU *current_cpu, void *sem_arg)
127 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
128 const IDESC * UNUSED idesc = abuf->idesc;
130 IADDR UNUSED pc = GET_H_PC ();
131 CGEN_INSN_INT insn = abuf->insn;
132 EXTRACT_IFMT_BEQZ_VARS /* f-disp16 f-rs1 f-p f-op2 f-fmt2-rcond f-bpr-res28-1 f-a f-op */
134 EXTRACT_IFMT_BEQZ_CODE
138 int UNUSED insn_referenced = abuf->written;
139 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
145 model_sparc64_def_bpcc_ba (SIM_CPU *current_cpu, void *sem_arg)
147 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
148 const IDESC * UNUSED idesc = abuf->idesc;
150 IADDR UNUSED pc = GET_H_PC ();
151 CGEN_INSN_INT insn = abuf->insn;
152 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
154 EXTRACT_IFMT_BPCC_BA_CODE
158 int UNUSED insn_referenced = abuf->written;
159 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
165 model_sparc64_def_bpcc_bn (SIM_CPU *current_cpu, void *sem_arg)
167 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
168 const IDESC * UNUSED idesc = abuf->idesc;
170 IADDR UNUSED pc = GET_H_PC ();
171 CGEN_INSN_INT insn = abuf->insn;
172 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
173 EXTRACT_IFMT_BPCC_BA_CODE
176 int UNUSED insn_referenced = abuf->written;
177 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
183 model_sparc64_def_bpcc_bne (SIM_CPU *current_cpu, void *sem_arg)
185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
186 const IDESC * UNUSED idesc = abuf->idesc;
188 IADDR UNUSED pc = GET_H_PC ();
189 CGEN_INSN_INT insn = abuf->insn;
190 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
192 EXTRACT_IFMT_BPCC_BA_CODE
196 int UNUSED insn_referenced = abuf->written;
197 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
203 model_sparc64_def_bpcc_be (SIM_CPU *current_cpu, void *sem_arg)
205 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
206 const IDESC * UNUSED idesc = abuf->idesc;
208 IADDR UNUSED pc = GET_H_PC ();
209 CGEN_INSN_INT insn = abuf->insn;
210 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
212 EXTRACT_IFMT_BPCC_BA_CODE
216 int UNUSED insn_referenced = abuf->written;
217 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
223 model_sparc64_def_bpcc_bg (SIM_CPU *current_cpu, void *sem_arg)
225 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
226 const IDESC * UNUSED idesc = abuf->idesc;
228 IADDR UNUSED pc = GET_H_PC ();
229 CGEN_INSN_INT insn = abuf->insn;
230 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
232 EXTRACT_IFMT_BPCC_BA_CODE
236 int UNUSED insn_referenced = abuf->written;
237 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
243 model_sparc64_def_bpcc_ble (SIM_CPU *current_cpu, void *sem_arg)
245 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
246 const IDESC * UNUSED idesc = abuf->idesc;
248 IADDR UNUSED pc = GET_H_PC ();
249 CGEN_INSN_INT insn = abuf->insn;
250 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
252 EXTRACT_IFMT_BPCC_BA_CODE
256 int UNUSED insn_referenced = abuf->written;
257 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
263 model_sparc64_def_bpcc_bge (SIM_CPU *current_cpu, void *sem_arg)
265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
266 const IDESC * UNUSED idesc = abuf->idesc;
268 IADDR UNUSED pc = GET_H_PC ();
269 CGEN_INSN_INT insn = abuf->insn;
270 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
272 EXTRACT_IFMT_BPCC_BA_CODE
276 int UNUSED insn_referenced = abuf->written;
277 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
283 model_sparc64_def_bpcc_bl (SIM_CPU *current_cpu, void *sem_arg)
285 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
286 const IDESC * UNUSED idesc = abuf->idesc;
288 IADDR UNUSED pc = GET_H_PC ();
289 CGEN_INSN_INT insn = abuf->insn;
290 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
292 EXTRACT_IFMT_BPCC_BA_CODE
296 int UNUSED insn_referenced = abuf->written;
297 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
303 model_sparc64_def_bpcc_bgu (SIM_CPU *current_cpu, void *sem_arg)
305 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
306 const IDESC * UNUSED idesc = abuf->idesc;
308 IADDR UNUSED pc = GET_H_PC ();
309 CGEN_INSN_INT insn = abuf->insn;
310 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
312 EXTRACT_IFMT_BPCC_BA_CODE
316 int UNUSED insn_referenced = abuf->written;
317 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
323 model_sparc64_def_bpcc_bleu (SIM_CPU *current_cpu, void *sem_arg)
325 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
326 const IDESC * UNUSED idesc = abuf->idesc;
328 IADDR UNUSED pc = GET_H_PC ();
329 CGEN_INSN_INT insn = abuf->insn;
330 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
332 EXTRACT_IFMT_BPCC_BA_CODE
336 int UNUSED insn_referenced = abuf->written;
337 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
343 model_sparc64_def_bpcc_bcc (SIM_CPU *current_cpu, void *sem_arg)
345 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
346 const IDESC * UNUSED idesc = abuf->idesc;
348 IADDR UNUSED pc = GET_H_PC ();
349 CGEN_INSN_INT insn = abuf->insn;
350 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
352 EXTRACT_IFMT_BPCC_BA_CODE
356 int UNUSED insn_referenced = abuf->written;
357 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
363 model_sparc64_def_bpcc_bcs (SIM_CPU *current_cpu, void *sem_arg)
365 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
366 const IDESC * UNUSED idesc = abuf->idesc;
368 IADDR UNUSED pc = GET_H_PC ();
369 CGEN_INSN_INT insn = abuf->insn;
370 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
372 EXTRACT_IFMT_BPCC_BA_CODE
376 int UNUSED insn_referenced = abuf->written;
377 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
383 model_sparc64_def_bpcc_bpos (SIM_CPU *current_cpu, void *sem_arg)
385 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
386 const IDESC * UNUSED idesc = abuf->idesc;
388 IADDR UNUSED pc = GET_H_PC ();
389 CGEN_INSN_INT insn = abuf->insn;
390 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
392 EXTRACT_IFMT_BPCC_BA_CODE
396 int UNUSED insn_referenced = abuf->written;
397 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
403 model_sparc64_def_bpcc_bneg (SIM_CPU *current_cpu, void *sem_arg)
405 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
406 const IDESC * UNUSED idesc = abuf->idesc;
408 IADDR UNUSED pc = GET_H_PC ();
409 CGEN_INSN_INT insn = abuf->insn;
410 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
412 EXTRACT_IFMT_BPCC_BA_CODE
416 int UNUSED insn_referenced = abuf->written;
417 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
423 model_sparc64_def_bpcc_bvc (SIM_CPU *current_cpu, void *sem_arg)
425 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
426 const IDESC * UNUSED idesc = abuf->idesc;
428 IADDR UNUSED pc = GET_H_PC ();
429 CGEN_INSN_INT insn = abuf->insn;
430 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
432 EXTRACT_IFMT_BPCC_BA_CODE
436 int UNUSED insn_referenced = abuf->written;
437 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
443 model_sparc64_def_bpcc_bvs (SIM_CPU *current_cpu, void *sem_arg)
445 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
446 const IDESC * UNUSED idesc = abuf->idesc;
448 IADDR UNUSED pc = GET_H_PC ();
449 CGEN_INSN_INT insn = abuf->insn;
450 EXTRACT_IFMT_BPCC_BA_VARS /* f-disp19 f-p f-fmt2-cc0 f-fmt2-cc1 f-op2 f-fmt2-cond f-a f-op */
452 EXTRACT_IFMT_BPCC_BA_CODE
456 int UNUSED insn_referenced = abuf->written;
457 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
463 model_sparc64_def_done (SIM_CPU *current_cpu, void *sem_arg)
465 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
466 const IDESC * UNUSED idesc = abuf->idesc;
468 IADDR UNUSED pc = GET_H_PC ();
469 CGEN_INSN_INT insn = abuf->insn;
470 EXTRACT_IFMT_DONE_VARS /* f-res-18-19 f-op3 f-fcn f-op */
471 EXTRACT_IFMT_DONE_CODE
474 int UNUSED insn_referenced = abuf->written;
475 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
481 model_sparc64_def_retry (SIM_CPU *current_cpu, void *sem_arg)
483 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
484 const IDESC * UNUSED idesc = abuf->idesc;
486 IADDR UNUSED pc = GET_H_PC ();
487 CGEN_INSN_INT insn = abuf->insn;
488 EXTRACT_IFMT_DONE_VARS /* f-res-18-19 f-op3 f-fcn f-op */
489 EXTRACT_IFMT_DONE_CODE
492 int UNUSED insn_referenced = abuf->written;
493 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
499 model_sparc64_def_flush (SIM_CPU *current_cpu, void *sem_arg)
501 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
502 const IDESC * UNUSED idesc = abuf->idesc;
504 IADDR UNUSED pc = GET_H_PC ();
505 CGEN_INSN_INT insn = abuf->insn;
506 EXTRACT_IFMT_FLUSH_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
507 EXTRACT_IFMT_FLUSH_CODE
510 int UNUSED insn_referenced = abuf->written;
511 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
517 model_sparc64_def_flush_imm (SIM_CPU *current_cpu, void *sem_arg)
519 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
520 const IDESC * UNUSED idesc = abuf->idesc;
522 IADDR UNUSED pc = GET_H_PC ();
523 CGEN_INSN_INT insn = abuf->insn;
524 EXTRACT_IFMT_FLUSH_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
525 EXTRACT_IFMT_FLUSH_IMM_CODE
528 int UNUSED insn_referenced = abuf->written;
529 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
535 model_sparc64_def_flushw (SIM_CPU *current_cpu, void *sem_arg)
537 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
538 const IDESC * UNUSED idesc = abuf->idesc;
540 IADDR UNUSED pc = GET_H_PC ();
541 CGEN_INSN_INT insn = abuf->insn;
542 EXTRACT_IFMT_FLUSHW_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
543 EXTRACT_IFMT_FLUSHW_CODE
546 int UNUSED insn_referenced = abuf->written;
547 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
553 model_sparc64_def_impdep1 (SIM_CPU *current_cpu, void *sem_arg)
555 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
556 const IDESC * UNUSED idesc = abuf->idesc;
558 IADDR UNUSED pc = GET_H_PC ();
559 CGEN_INSN_INT insn = abuf->insn;
560 EXTRACT_IFMT_IMPDEP1_VARS /* f-impdep19 f-op3 f-impdep5 f-op */
561 EXTRACT_IFMT_IMPDEP1_CODE
564 int UNUSED insn_referenced = abuf->written;
565 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
571 model_sparc64_def_impdep2 (SIM_CPU *current_cpu, void *sem_arg)
573 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
574 const IDESC * UNUSED idesc = abuf->idesc;
576 IADDR UNUSED pc = GET_H_PC ();
577 CGEN_INSN_INT insn = abuf->insn;
578 EXTRACT_IFMT_IMPDEP1_VARS /* f-impdep19 f-op3 f-impdep5 f-op */
579 EXTRACT_IFMT_IMPDEP1_CODE
582 int UNUSED insn_referenced = abuf->written;
583 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
589 model_sparc64_def_membar (SIM_CPU *current_cpu, void *sem_arg)
591 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
592 const IDESC * UNUSED idesc = abuf->idesc;
594 IADDR UNUSED pc = GET_H_PC ();
595 CGEN_INSN_INT insn = abuf->insn;
596 EXTRACT_IFMT_MEMBAR_VARS /* f-membarmask f-membar-res12-6 f-i f-rs1 f-op3 f-rd f-op */
597 EXTRACT_IFMT_MEMBAR_CODE
600 int UNUSED insn_referenced = abuf->written;
601 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
607 model_sparc64_def_mova_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
609 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
610 const IDESC * UNUSED idesc = abuf->idesc;
612 IADDR UNUSED pc = GET_H_PC ();
613 CGEN_INSN_INT insn = abuf->insn;
614 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
615 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
618 int UNUSED insn_referenced = abuf->written;
619 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
625 model_sparc64_def_mova_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
627 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
628 const IDESC * UNUSED idesc = abuf->idesc;
630 IADDR UNUSED pc = GET_H_PC ();
631 CGEN_INSN_INT insn = abuf->insn;
632 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
633 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
636 int UNUSED insn_referenced = abuf->written;
637 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
643 model_sparc64_def_mova_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
645 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
646 const IDESC * UNUSED idesc = abuf->idesc;
648 IADDR UNUSED pc = GET_H_PC ();
649 CGEN_INSN_INT insn = abuf->insn;
650 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
651 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
654 int UNUSED insn_referenced = abuf->written;
655 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
661 model_sparc64_def_mova_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
663 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
664 const IDESC * UNUSED idesc = abuf->idesc;
666 IADDR UNUSED pc = GET_H_PC ();
667 CGEN_INSN_INT insn = abuf->insn;
668 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
669 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
672 int UNUSED insn_referenced = abuf->written;
673 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
679 model_sparc64_def_movn_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
681 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
682 const IDESC * UNUSED idesc = abuf->idesc;
684 IADDR UNUSED pc = GET_H_PC ();
685 CGEN_INSN_INT insn = abuf->insn;
686 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
687 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
690 int UNUSED insn_referenced = abuf->written;
691 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
697 model_sparc64_def_movn_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
699 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
700 const IDESC * UNUSED idesc = abuf->idesc;
702 IADDR UNUSED pc = GET_H_PC ();
703 CGEN_INSN_INT insn = abuf->insn;
704 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
705 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
708 int UNUSED insn_referenced = abuf->written;
709 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
715 model_sparc64_def_movn_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
717 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
718 const IDESC * UNUSED idesc = abuf->idesc;
720 IADDR UNUSED pc = GET_H_PC ();
721 CGEN_INSN_INT insn = abuf->insn;
722 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
723 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
726 int UNUSED insn_referenced = abuf->written;
727 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
733 model_sparc64_def_movn_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
735 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
736 const IDESC * UNUSED idesc = abuf->idesc;
738 IADDR UNUSED pc = GET_H_PC ();
739 CGEN_INSN_INT insn = abuf->insn;
740 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
741 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
744 int UNUSED insn_referenced = abuf->written;
745 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
751 model_sparc64_def_movne_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
753 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
754 const IDESC * UNUSED idesc = abuf->idesc;
756 IADDR UNUSED pc = GET_H_PC ();
757 CGEN_INSN_INT insn = abuf->insn;
758 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
759 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
762 int UNUSED insn_referenced = abuf->written;
763 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
769 model_sparc64_def_movne_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
771 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
772 const IDESC * UNUSED idesc = abuf->idesc;
774 IADDR UNUSED pc = GET_H_PC ();
775 CGEN_INSN_INT insn = abuf->insn;
776 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
777 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
780 int UNUSED insn_referenced = abuf->written;
781 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
787 model_sparc64_def_movne_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
789 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
790 const IDESC * UNUSED idesc = abuf->idesc;
792 IADDR UNUSED pc = GET_H_PC ();
793 CGEN_INSN_INT insn = abuf->insn;
794 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
795 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
798 int UNUSED insn_referenced = abuf->written;
799 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
805 model_sparc64_def_movne_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
807 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
808 const IDESC * UNUSED idesc = abuf->idesc;
810 IADDR UNUSED pc = GET_H_PC ();
811 CGEN_INSN_INT insn = abuf->insn;
812 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
813 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
816 int UNUSED insn_referenced = abuf->written;
817 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
823 model_sparc64_def_move_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
825 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
826 const IDESC * UNUSED idesc = abuf->idesc;
828 IADDR UNUSED pc = GET_H_PC ();
829 CGEN_INSN_INT insn = abuf->insn;
830 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
831 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
834 int UNUSED insn_referenced = abuf->written;
835 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
841 model_sparc64_def_move_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
843 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
844 const IDESC * UNUSED idesc = abuf->idesc;
846 IADDR UNUSED pc = GET_H_PC ();
847 CGEN_INSN_INT insn = abuf->insn;
848 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
849 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
852 int UNUSED insn_referenced = abuf->written;
853 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
859 model_sparc64_def_move_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
861 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
862 const IDESC * UNUSED idesc = abuf->idesc;
864 IADDR UNUSED pc = GET_H_PC ();
865 CGEN_INSN_INT insn = abuf->insn;
866 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
867 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
870 int UNUSED insn_referenced = abuf->written;
871 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
877 model_sparc64_def_move_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
879 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
880 const IDESC * UNUSED idesc = abuf->idesc;
882 IADDR UNUSED pc = GET_H_PC ();
883 CGEN_INSN_INT insn = abuf->insn;
884 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
885 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
888 int UNUSED insn_referenced = abuf->written;
889 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
895 model_sparc64_def_movg_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
897 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
898 const IDESC * UNUSED idesc = abuf->idesc;
900 IADDR UNUSED pc = GET_H_PC ();
901 CGEN_INSN_INT insn = abuf->insn;
902 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
903 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
906 int UNUSED insn_referenced = abuf->written;
907 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
913 model_sparc64_def_movg_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
915 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
916 const IDESC * UNUSED idesc = abuf->idesc;
918 IADDR UNUSED pc = GET_H_PC ();
919 CGEN_INSN_INT insn = abuf->insn;
920 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
921 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
924 int UNUSED insn_referenced = abuf->written;
925 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
931 model_sparc64_def_movg_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
933 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
934 const IDESC * UNUSED idesc = abuf->idesc;
936 IADDR UNUSED pc = GET_H_PC ();
937 CGEN_INSN_INT insn = abuf->insn;
938 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
939 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
942 int UNUSED insn_referenced = abuf->written;
943 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
949 model_sparc64_def_movg_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
951 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
952 const IDESC * UNUSED idesc = abuf->idesc;
954 IADDR UNUSED pc = GET_H_PC ();
955 CGEN_INSN_INT insn = abuf->insn;
956 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
957 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
960 int UNUSED insn_referenced = abuf->written;
961 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
967 model_sparc64_def_movle_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
969 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
970 const IDESC * UNUSED idesc = abuf->idesc;
972 IADDR UNUSED pc = GET_H_PC ();
973 CGEN_INSN_INT insn = abuf->insn;
974 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
975 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
978 int UNUSED insn_referenced = abuf->written;
979 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
985 model_sparc64_def_movle_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
987 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
988 const IDESC * UNUSED idesc = abuf->idesc;
990 IADDR UNUSED pc = GET_H_PC ();
991 CGEN_INSN_INT insn = abuf->insn;
992 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
993 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
996 int UNUSED insn_referenced = abuf->written;
997 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1003 model_sparc64_def_movle_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1005 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1006 const IDESC * UNUSED idesc = abuf->idesc;
1008 IADDR UNUSED pc = GET_H_PC ();
1009 CGEN_INSN_INT insn = abuf->insn;
1010 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1011 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1014 int UNUSED insn_referenced = abuf->written;
1015 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1021 model_sparc64_def_movle_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1023 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1024 const IDESC * UNUSED idesc = abuf->idesc;
1026 IADDR UNUSED pc = GET_H_PC ();
1027 CGEN_INSN_INT insn = abuf->insn;
1028 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1029 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1032 int UNUSED insn_referenced = abuf->written;
1033 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1039 model_sparc64_def_movge_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1041 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1042 const IDESC * UNUSED idesc = abuf->idesc;
1044 IADDR UNUSED pc = GET_H_PC ();
1045 CGEN_INSN_INT insn = abuf->insn;
1046 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1047 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1050 int UNUSED insn_referenced = abuf->written;
1051 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1057 model_sparc64_def_movge_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1059 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1060 const IDESC * UNUSED idesc = abuf->idesc;
1062 IADDR UNUSED pc = GET_H_PC ();
1063 CGEN_INSN_INT insn = abuf->insn;
1064 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1065 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1068 int UNUSED insn_referenced = abuf->written;
1069 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1075 model_sparc64_def_movge_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1077 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1078 const IDESC * UNUSED idesc = abuf->idesc;
1080 IADDR UNUSED pc = GET_H_PC ();
1081 CGEN_INSN_INT insn = abuf->insn;
1082 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1083 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1086 int UNUSED insn_referenced = abuf->written;
1087 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1093 model_sparc64_def_movge_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1095 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1096 const IDESC * UNUSED idesc = abuf->idesc;
1098 IADDR UNUSED pc = GET_H_PC ();
1099 CGEN_INSN_INT insn = abuf->insn;
1100 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1101 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1104 int UNUSED insn_referenced = abuf->written;
1105 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1111 model_sparc64_def_movl_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1113 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1114 const IDESC * UNUSED idesc = abuf->idesc;
1116 IADDR UNUSED pc = GET_H_PC ();
1117 CGEN_INSN_INT insn = abuf->insn;
1118 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1119 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1122 int UNUSED insn_referenced = abuf->written;
1123 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1129 model_sparc64_def_movl_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1131 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1132 const IDESC * UNUSED idesc = abuf->idesc;
1134 IADDR UNUSED pc = GET_H_PC ();
1135 CGEN_INSN_INT insn = abuf->insn;
1136 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1137 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1140 int UNUSED insn_referenced = abuf->written;
1141 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1147 model_sparc64_def_movl_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1149 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1150 const IDESC * UNUSED idesc = abuf->idesc;
1152 IADDR UNUSED pc = GET_H_PC ();
1153 CGEN_INSN_INT insn = abuf->insn;
1154 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1155 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1158 int UNUSED insn_referenced = abuf->written;
1159 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1165 model_sparc64_def_movl_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1167 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1168 const IDESC * UNUSED idesc = abuf->idesc;
1170 IADDR UNUSED pc = GET_H_PC ();
1171 CGEN_INSN_INT insn = abuf->insn;
1172 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1173 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1176 int UNUSED insn_referenced = abuf->written;
1177 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1183 model_sparc64_def_movgu_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1185 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1186 const IDESC * UNUSED idesc = abuf->idesc;
1188 IADDR UNUSED pc = GET_H_PC ();
1189 CGEN_INSN_INT insn = abuf->insn;
1190 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1191 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1194 int UNUSED insn_referenced = abuf->written;
1195 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1201 model_sparc64_def_movgu_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1203 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1204 const IDESC * UNUSED idesc = abuf->idesc;
1206 IADDR UNUSED pc = GET_H_PC ();
1207 CGEN_INSN_INT insn = abuf->insn;
1208 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1209 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1212 int UNUSED insn_referenced = abuf->written;
1213 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1219 model_sparc64_def_movgu_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1221 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1222 const IDESC * UNUSED idesc = abuf->idesc;
1224 IADDR UNUSED pc = GET_H_PC ();
1225 CGEN_INSN_INT insn = abuf->insn;
1226 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1227 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1230 int UNUSED insn_referenced = abuf->written;
1231 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1237 model_sparc64_def_movgu_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1239 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1240 const IDESC * UNUSED idesc = abuf->idesc;
1242 IADDR UNUSED pc = GET_H_PC ();
1243 CGEN_INSN_INT insn = abuf->insn;
1244 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1245 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1248 int UNUSED insn_referenced = abuf->written;
1249 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1255 model_sparc64_def_movleu_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1257 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1258 const IDESC * UNUSED idesc = abuf->idesc;
1260 IADDR UNUSED pc = GET_H_PC ();
1261 CGEN_INSN_INT insn = abuf->insn;
1262 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1263 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1266 int UNUSED insn_referenced = abuf->written;
1267 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1273 model_sparc64_def_movleu_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1275 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1276 const IDESC * UNUSED idesc = abuf->idesc;
1278 IADDR UNUSED pc = GET_H_PC ();
1279 CGEN_INSN_INT insn = abuf->insn;
1280 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1281 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1284 int UNUSED insn_referenced = abuf->written;
1285 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1291 model_sparc64_def_movleu_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1293 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1294 const IDESC * UNUSED idesc = abuf->idesc;
1296 IADDR UNUSED pc = GET_H_PC ();
1297 CGEN_INSN_INT insn = abuf->insn;
1298 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1299 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1302 int UNUSED insn_referenced = abuf->written;
1303 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1309 model_sparc64_def_movleu_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1311 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1312 const IDESC * UNUSED idesc = abuf->idesc;
1314 IADDR UNUSED pc = GET_H_PC ();
1315 CGEN_INSN_INT insn = abuf->insn;
1316 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1317 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1320 int UNUSED insn_referenced = abuf->written;
1321 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1327 model_sparc64_def_movcc_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1329 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1330 const IDESC * UNUSED idesc = abuf->idesc;
1332 IADDR UNUSED pc = GET_H_PC ();
1333 CGEN_INSN_INT insn = abuf->insn;
1334 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1335 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1338 int UNUSED insn_referenced = abuf->written;
1339 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1345 model_sparc64_def_movcc_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1347 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1348 const IDESC * UNUSED idesc = abuf->idesc;
1350 IADDR UNUSED pc = GET_H_PC ();
1351 CGEN_INSN_INT insn = abuf->insn;
1352 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1353 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1356 int UNUSED insn_referenced = abuf->written;
1357 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1363 model_sparc64_def_movcc_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1365 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1366 const IDESC * UNUSED idesc = abuf->idesc;
1368 IADDR UNUSED pc = GET_H_PC ();
1369 CGEN_INSN_INT insn = abuf->insn;
1370 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1371 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1374 int UNUSED insn_referenced = abuf->written;
1375 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1381 model_sparc64_def_movcc_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1383 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1384 const IDESC * UNUSED idesc = abuf->idesc;
1386 IADDR UNUSED pc = GET_H_PC ();
1387 CGEN_INSN_INT insn = abuf->insn;
1388 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1389 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1392 int UNUSED insn_referenced = abuf->written;
1393 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1399 model_sparc64_def_movcs_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1401 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1402 const IDESC * UNUSED idesc = abuf->idesc;
1404 IADDR UNUSED pc = GET_H_PC ();
1405 CGEN_INSN_INT insn = abuf->insn;
1406 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1407 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1410 int UNUSED insn_referenced = abuf->written;
1411 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1417 model_sparc64_def_movcs_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1419 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1420 const IDESC * UNUSED idesc = abuf->idesc;
1422 IADDR UNUSED pc = GET_H_PC ();
1423 CGEN_INSN_INT insn = abuf->insn;
1424 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1425 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1428 int UNUSED insn_referenced = abuf->written;
1429 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1435 model_sparc64_def_movcs_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1437 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1438 const IDESC * UNUSED idesc = abuf->idesc;
1440 IADDR UNUSED pc = GET_H_PC ();
1441 CGEN_INSN_INT insn = abuf->insn;
1442 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1443 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1446 int UNUSED insn_referenced = abuf->written;
1447 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1453 model_sparc64_def_movcs_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1455 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1456 const IDESC * UNUSED idesc = abuf->idesc;
1458 IADDR UNUSED pc = GET_H_PC ();
1459 CGEN_INSN_INT insn = abuf->insn;
1460 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1461 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1464 int UNUSED insn_referenced = abuf->written;
1465 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1471 model_sparc64_def_movpos_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1473 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1474 const IDESC * UNUSED idesc = abuf->idesc;
1476 IADDR UNUSED pc = GET_H_PC ();
1477 CGEN_INSN_INT insn = abuf->insn;
1478 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1479 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1482 int UNUSED insn_referenced = abuf->written;
1483 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1489 model_sparc64_def_movpos_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1491 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1492 const IDESC * UNUSED idesc = abuf->idesc;
1494 IADDR UNUSED pc = GET_H_PC ();
1495 CGEN_INSN_INT insn = abuf->insn;
1496 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1497 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1500 int UNUSED insn_referenced = abuf->written;
1501 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1507 model_sparc64_def_movpos_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1509 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1510 const IDESC * UNUSED idesc = abuf->idesc;
1512 IADDR UNUSED pc = GET_H_PC ();
1513 CGEN_INSN_INT insn = abuf->insn;
1514 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1515 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1518 int UNUSED insn_referenced = abuf->written;
1519 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1525 model_sparc64_def_movpos_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1527 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1528 const IDESC * UNUSED idesc = abuf->idesc;
1530 IADDR UNUSED pc = GET_H_PC ();
1531 CGEN_INSN_INT insn = abuf->insn;
1532 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1533 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1536 int UNUSED insn_referenced = abuf->written;
1537 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1543 model_sparc64_def_movneg_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1545 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1546 const IDESC * UNUSED idesc = abuf->idesc;
1548 IADDR UNUSED pc = GET_H_PC ();
1549 CGEN_INSN_INT insn = abuf->insn;
1550 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1551 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1554 int UNUSED insn_referenced = abuf->written;
1555 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1561 model_sparc64_def_movneg_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1563 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1564 const IDESC * UNUSED idesc = abuf->idesc;
1566 IADDR UNUSED pc = GET_H_PC ();
1567 CGEN_INSN_INT insn = abuf->insn;
1568 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1569 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1572 int UNUSED insn_referenced = abuf->written;
1573 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1579 model_sparc64_def_movneg_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1581 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1582 const IDESC * UNUSED idesc = abuf->idesc;
1584 IADDR UNUSED pc = GET_H_PC ();
1585 CGEN_INSN_INT insn = abuf->insn;
1586 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1587 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1590 int UNUSED insn_referenced = abuf->written;
1591 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1597 model_sparc64_def_movneg_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1599 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1600 const IDESC * UNUSED idesc = abuf->idesc;
1602 IADDR UNUSED pc = GET_H_PC ();
1603 CGEN_INSN_INT insn = abuf->insn;
1604 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1605 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1608 int UNUSED insn_referenced = abuf->written;
1609 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1615 model_sparc64_def_movvc_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1617 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1618 const IDESC * UNUSED idesc = abuf->idesc;
1620 IADDR UNUSED pc = GET_H_PC ();
1621 CGEN_INSN_INT insn = abuf->insn;
1622 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1623 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1626 int UNUSED insn_referenced = abuf->written;
1627 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1633 model_sparc64_def_movvc_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1635 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1636 const IDESC * UNUSED idesc = abuf->idesc;
1638 IADDR UNUSED pc = GET_H_PC ();
1639 CGEN_INSN_INT insn = abuf->insn;
1640 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1641 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1644 int UNUSED insn_referenced = abuf->written;
1645 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1651 model_sparc64_def_movvc_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1653 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1654 const IDESC * UNUSED idesc = abuf->idesc;
1656 IADDR UNUSED pc = GET_H_PC ();
1657 CGEN_INSN_INT insn = abuf->insn;
1658 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1659 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1662 int UNUSED insn_referenced = abuf->written;
1663 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1669 model_sparc64_def_movvc_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1671 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1672 const IDESC * UNUSED idesc = abuf->idesc;
1674 IADDR UNUSED pc = GET_H_PC ();
1675 CGEN_INSN_INT insn = abuf->insn;
1676 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1677 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1680 int UNUSED insn_referenced = abuf->written;
1681 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1687 model_sparc64_def_movvs_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1689 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1690 const IDESC * UNUSED idesc = abuf->idesc;
1692 IADDR UNUSED pc = GET_H_PC ();
1693 CGEN_INSN_INT insn = abuf->insn;
1694 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1695 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1698 int UNUSED insn_referenced = abuf->written;
1699 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1705 model_sparc64_def_movvs_imm_icc_icc (SIM_CPU *current_cpu, void *sem_arg)
1707 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1708 const IDESC * UNUSED idesc = abuf->idesc;
1710 IADDR UNUSED pc = GET_H_PC ();
1711 CGEN_INSN_INT insn = abuf->insn;
1712 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1713 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1716 int UNUSED insn_referenced = abuf->written;
1717 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1723 model_sparc64_def_movvs_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1725 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1726 const IDESC * UNUSED idesc = abuf->idesc;
1728 IADDR UNUSED pc = GET_H_PC ();
1729 CGEN_INSN_INT insn = abuf->insn;
1730 EXTRACT_IFMT_MOVA_ICC_ICC_VARS /* f-rs2 f-fmt4-res10-6 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1731 EXTRACT_IFMT_MOVA_ICC_ICC_CODE
1734 int UNUSED insn_referenced = abuf->written;
1735 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1741 model_sparc64_def_movvs_imm_xcc_xcc (SIM_CPU *current_cpu, void *sem_arg)
1743 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1744 const IDESC * UNUSED idesc = abuf->idesc;
1746 IADDR UNUSED pc = GET_H_PC ();
1747 CGEN_INSN_INT insn = abuf->insn;
1748 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_VARS /* f-simm11 f-fmt4-cc1-0 f-i f-fmt4-cc2 f-op3 f-fmt2-cond f-rd f-op */
1749 EXTRACT_IFMT_MOVA_IMM_ICC_ICC_CODE
1752 int UNUSED insn_referenced = abuf->written;
1753 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1759 model_sparc64_def_ldsb_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
1761 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1762 const IDESC * UNUSED idesc = abuf->idesc;
1764 IADDR UNUSED pc = GET_H_PC ();
1765 CGEN_INSN_INT insn = abuf->insn;
1766 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1767 EXTRACT_IFMT_LDSB_REG_REG_CODE
1770 int UNUSED insn_referenced = abuf->written;
1771 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1777 model_sparc64_def_ldsb_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
1779 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1780 const IDESC * UNUSED idesc = abuf->idesc;
1782 IADDR UNUSED pc = GET_H_PC ();
1783 CGEN_INSN_INT insn = abuf->insn;
1784 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1785 EXTRACT_IFMT_LDSB_REG_IMM_CODE
1788 int UNUSED insn_referenced = abuf->written;
1789 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1795 model_sparc64_def_ldsb_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
1797 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1798 const IDESC * UNUSED idesc = abuf->idesc;
1800 IADDR UNUSED pc = GET_H_PC ();
1801 CGEN_INSN_INT insn = abuf->insn;
1802 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1803 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
1806 int UNUSED insn_referenced = abuf->written;
1807 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1813 model_sparc64_def_ldub_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
1815 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1816 const IDESC * UNUSED idesc = abuf->idesc;
1818 IADDR UNUSED pc = GET_H_PC ();
1819 CGEN_INSN_INT insn = abuf->insn;
1820 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1821 EXTRACT_IFMT_LDSB_REG_REG_CODE
1824 int UNUSED insn_referenced = abuf->written;
1825 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1831 model_sparc64_def_ldub_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
1833 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1834 const IDESC * UNUSED idesc = abuf->idesc;
1836 IADDR UNUSED pc = GET_H_PC ();
1837 CGEN_INSN_INT insn = abuf->insn;
1838 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1839 EXTRACT_IFMT_LDSB_REG_IMM_CODE
1842 int UNUSED insn_referenced = abuf->written;
1843 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1849 model_sparc64_def_ldub_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
1851 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1852 const IDESC * UNUSED idesc = abuf->idesc;
1854 IADDR UNUSED pc = GET_H_PC ();
1855 CGEN_INSN_INT insn = abuf->insn;
1856 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1857 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
1860 int UNUSED insn_referenced = abuf->written;
1861 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1867 model_sparc64_def_ldsh_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
1869 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1870 const IDESC * UNUSED idesc = abuf->idesc;
1872 IADDR UNUSED pc = GET_H_PC ();
1873 CGEN_INSN_INT insn = abuf->insn;
1874 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1875 EXTRACT_IFMT_LDSB_REG_REG_CODE
1878 int UNUSED insn_referenced = abuf->written;
1879 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1885 model_sparc64_def_ldsh_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
1887 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1888 const IDESC * UNUSED idesc = abuf->idesc;
1890 IADDR UNUSED pc = GET_H_PC ();
1891 CGEN_INSN_INT insn = abuf->insn;
1892 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1893 EXTRACT_IFMT_LDSB_REG_IMM_CODE
1896 int UNUSED insn_referenced = abuf->written;
1897 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1903 model_sparc64_def_ldsh_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
1905 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1906 const IDESC * UNUSED idesc = abuf->idesc;
1908 IADDR UNUSED pc = GET_H_PC ();
1909 CGEN_INSN_INT insn = abuf->insn;
1910 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1911 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
1914 int UNUSED insn_referenced = abuf->written;
1915 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1921 model_sparc64_def_lduh_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
1923 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1924 const IDESC * UNUSED idesc = abuf->idesc;
1926 IADDR UNUSED pc = GET_H_PC ();
1927 CGEN_INSN_INT insn = abuf->insn;
1928 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1929 EXTRACT_IFMT_LDSB_REG_REG_CODE
1932 int UNUSED insn_referenced = abuf->written;
1933 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1939 model_sparc64_def_lduh_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
1941 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1942 const IDESC * UNUSED idesc = abuf->idesc;
1944 IADDR UNUSED pc = GET_H_PC ();
1945 CGEN_INSN_INT insn = abuf->insn;
1946 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
1947 EXTRACT_IFMT_LDSB_REG_IMM_CODE
1950 int UNUSED insn_referenced = abuf->written;
1951 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1957 model_sparc64_def_lduh_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
1959 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1960 const IDESC * UNUSED idesc = abuf->idesc;
1962 IADDR UNUSED pc = GET_H_PC ();
1963 CGEN_INSN_INT insn = abuf->insn;
1964 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
1965 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
1968 int UNUSED insn_referenced = abuf->written;
1969 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1975 model_sparc64_def_ldsw_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
1977 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1978 const IDESC * UNUSED idesc = abuf->idesc;
1980 IADDR UNUSED pc = GET_H_PC ();
1981 CGEN_INSN_INT insn = abuf->insn;
1982 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
1983 EXTRACT_IFMT_LDSB_REG_REG_CODE
1986 int UNUSED insn_referenced = abuf->written;
1987 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
1993 model_sparc64_def_ldsw_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
1995 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
1996 const IDESC * UNUSED idesc = abuf->idesc;
1998 IADDR UNUSED pc = GET_H_PC ();
1999 CGEN_INSN_INT insn = abuf->insn;
2000 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2001 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2004 int UNUSED insn_referenced = abuf->written;
2005 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2011 model_sparc64_def_ldsw_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2013 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2014 const IDESC * UNUSED idesc = abuf->idesc;
2016 IADDR UNUSED pc = GET_H_PC ();
2017 CGEN_INSN_INT insn = abuf->insn;
2018 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2019 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2022 int UNUSED insn_referenced = abuf->written;
2023 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2029 model_sparc64_def_lduw_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2031 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2032 const IDESC * UNUSED idesc = abuf->idesc;
2034 IADDR UNUSED pc = GET_H_PC ();
2035 CGEN_INSN_INT insn = abuf->insn;
2036 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2037 EXTRACT_IFMT_LDSB_REG_REG_CODE
2040 int UNUSED insn_referenced = abuf->written;
2041 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2047 model_sparc64_def_lduw_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2049 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2050 const IDESC * UNUSED idesc = abuf->idesc;
2052 IADDR UNUSED pc = GET_H_PC ();
2053 CGEN_INSN_INT insn = abuf->insn;
2054 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2055 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2058 int UNUSED insn_referenced = abuf->written;
2059 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2065 model_sparc64_def_lduw_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2067 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2068 const IDESC * UNUSED idesc = abuf->idesc;
2070 IADDR UNUSED pc = GET_H_PC ();
2071 CGEN_INSN_INT insn = abuf->insn;
2072 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2073 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2076 int UNUSED insn_referenced = abuf->written;
2077 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2083 model_sparc64_def_ldx_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2085 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2086 const IDESC * UNUSED idesc = abuf->idesc;
2088 IADDR UNUSED pc = GET_H_PC ();
2089 CGEN_INSN_INT insn = abuf->insn;
2090 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2091 EXTRACT_IFMT_LDSB_REG_REG_CODE
2094 int UNUSED insn_referenced = abuf->written;
2095 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2101 model_sparc64_def_ldx_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2103 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2104 const IDESC * UNUSED idesc = abuf->idesc;
2106 IADDR UNUSED pc = GET_H_PC ();
2107 CGEN_INSN_INT insn = abuf->insn;
2108 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2109 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2112 int UNUSED insn_referenced = abuf->written;
2113 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2119 model_sparc64_def_ldx_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2121 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2122 const IDESC * UNUSED idesc = abuf->idesc;
2124 IADDR UNUSED pc = GET_H_PC ();
2125 CGEN_INSN_INT insn = abuf->insn;
2126 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2127 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2130 int UNUSED insn_referenced = abuf->written;
2131 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2137 model_sparc64_def_ldd_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2139 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2140 const IDESC * UNUSED idesc = abuf->idesc;
2142 IADDR UNUSED pc = GET_H_PC ();
2143 CGEN_INSN_INT insn = abuf->insn;
2144 EXTRACT_IFMT_LDD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2145 EXTRACT_IFMT_LDD_REG_REG_CODE
2148 int UNUSED insn_referenced = abuf->written;
2149 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2155 model_sparc64_def_ldd_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2157 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2158 const IDESC * UNUSED idesc = abuf->idesc;
2160 IADDR UNUSED pc = GET_H_PC ();
2161 CGEN_INSN_INT insn = abuf->insn;
2162 EXTRACT_IFMT_LDD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2163 EXTRACT_IFMT_LDD_REG_IMM_CODE
2166 int UNUSED insn_referenced = abuf->written;
2167 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2173 model_sparc64_def_ldd_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2175 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2176 const IDESC * UNUSED idesc = abuf->idesc;
2178 IADDR UNUSED pc = GET_H_PC ();
2179 CGEN_INSN_INT insn = abuf->insn;
2180 EXTRACT_IFMT_LDD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2181 EXTRACT_IFMT_LDD_REG_REG_ASI_CODE
2184 int UNUSED insn_referenced = abuf->written;
2185 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2191 model_sparc64_def_stb_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2193 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2194 const IDESC * UNUSED idesc = abuf->idesc;
2196 IADDR UNUSED pc = GET_H_PC ();
2197 CGEN_INSN_INT insn = abuf->insn;
2198 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2199 EXTRACT_IFMT_LDSB_REG_REG_CODE
2202 int UNUSED insn_referenced = abuf->written;
2203 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2209 model_sparc64_def_stb_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2211 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2212 const IDESC * UNUSED idesc = abuf->idesc;
2214 IADDR UNUSED pc = GET_H_PC ();
2215 CGEN_INSN_INT insn = abuf->insn;
2216 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2217 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2220 int UNUSED insn_referenced = abuf->written;
2221 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2227 model_sparc64_def_stb_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2229 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2230 const IDESC * UNUSED idesc = abuf->idesc;
2232 IADDR UNUSED pc = GET_H_PC ();
2233 CGEN_INSN_INT insn = abuf->insn;
2234 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2235 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2238 int UNUSED insn_referenced = abuf->written;
2239 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2245 model_sparc64_def_sth_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2247 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2248 const IDESC * UNUSED idesc = abuf->idesc;
2250 IADDR UNUSED pc = GET_H_PC ();
2251 CGEN_INSN_INT insn = abuf->insn;
2252 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2253 EXTRACT_IFMT_LDSB_REG_REG_CODE
2256 int UNUSED insn_referenced = abuf->written;
2257 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2263 model_sparc64_def_sth_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2266 const IDESC * UNUSED idesc = abuf->idesc;
2268 IADDR UNUSED pc = GET_H_PC ();
2269 CGEN_INSN_INT insn = abuf->insn;
2270 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2271 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2274 int UNUSED insn_referenced = abuf->written;
2275 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2281 model_sparc64_def_sth_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2283 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2284 const IDESC * UNUSED idesc = abuf->idesc;
2286 IADDR UNUSED pc = GET_H_PC ();
2287 CGEN_INSN_INT insn = abuf->insn;
2288 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2289 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2292 int UNUSED insn_referenced = abuf->written;
2293 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2299 model_sparc64_def_st_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2301 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2302 const IDESC * UNUSED idesc = abuf->idesc;
2304 IADDR UNUSED pc = GET_H_PC ();
2305 CGEN_INSN_INT insn = abuf->insn;
2306 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2307 EXTRACT_IFMT_LDSB_REG_REG_CODE
2310 int UNUSED insn_referenced = abuf->written;
2311 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2317 model_sparc64_def_st_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2319 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2320 const IDESC * UNUSED idesc = abuf->idesc;
2322 IADDR UNUSED pc = GET_H_PC ();
2323 CGEN_INSN_INT insn = abuf->insn;
2324 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2325 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2328 int UNUSED insn_referenced = abuf->written;
2329 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2335 model_sparc64_def_st_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2337 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2338 const IDESC * UNUSED idesc = abuf->idesc;
2340 IADDR UNUSED pc = GET_H_PC ();
2341 CGEN_INSN_INT insn = abuf->insn;
2342 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2343 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2346 int UNUSED insn_referenced = abuf->written;
2347 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2353 model_sparc64_def_stx_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2355 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2356 const IDESC * UNUSED idesc = abuf->idesc;
2358 IADDR UNUSED pc = GET_H_PC ();
2359 CGEN_INSN_INT insn = abuf->insn;
2360 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2361 EXTRACT_IFMT_LDSB_REG_REG_CODE
2364 int UNUSED insn_referenced = abuf->written;
2365 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2371 model_sparc64_def_stx_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2373 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2374 const IDESC * UNUSED idesc = abuf->idesc;
2376 IADDR UNUSED pc = GET_H_PC ();
2377 CGEN_INSN_INT insn = abuf->insn;
2378 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2379 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2382 int UNUSED insn_referenced = abuf->written;
2383 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2389 model_sparc64_def_stx_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2391 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2392 const IDESC * UNUSED idesc = abuf->idesc;
2394 IADDR UNUSED pc = GET_H_PC ();
2395 CGEN_INSN_INT insn = abuf->insn;
2396 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2397 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
2400 int UNUSED insn_referenced = abuf->written;
2401 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2407 model_sparc64_def_std_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2409 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2410 const IDESC * UNUSED idesc = abuf->idesc;
2412 IADDR UNUSED pc = GET_H_PC ();
2413 CGEN_INSN_INT insn = abuf->insn;
2414 EXTRACT_IFMT_LDD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2415 EXTRACT_IFMT_LDD_REG_REG_CODE
2418 int UNUSED insn_referenced = abuf->written;
2419 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2425 model_sparc64_def_std_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2427 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2428 const IDESC * UNUSED idesc = abuf->idesc;
2430 IADDR UNUSED pc = GET_H_PC ();
2431 CGEN_INSN_INT insn = abuf->insn;
2432 EXTRACT_IFMT_LDD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2433 EXTRACT_IFMT_LDD_REG_IMM_CODE
2436 int UNUSED insn_referenced = abuf->written;
2437 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2443 model_sparc64_def_std_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2445 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2446 const IDESC * UNUSED idesc = abuf->idesc;
2448 IADDR UNUSED pc = GET_H_PC ();
2449 CGEN_INSN_INT insn = abuf->insn;
2450 EXTRACT_IFMT_LDD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2451 EXTRACT_IFMT_LDD_REG_REG_ASI_CODE
2454 int UNUSED insn_referenced = abuf->written;
2455 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2461 model_sparc64_def_fp_ld_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
2463 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2464 const IDESC * UNUSED idesc = abuf->idesc;
2466 IADDR UNUSED pc = GET_H_PC ();
2467 CGEN_INSN_INT insn = abuf->insn;
2468 EXTRACT_IFMT_FP_LD_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2469 EXTRACT_IFMT_FP_LD_REG_REG_CODE
2472 int UNUSED insn_referenced = abuf->written;
2473 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2479 model_sparc64_def_fp_ld_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
2481 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2482 const IDESC * UNUSED idesc = abuf->idesc;
2484 IADDR UNUSED pc = GET_H_PC ();
2485 CGEN_INSN_INT insn = abuf->insn;
2486 EXTRACT_IFMT_FP_LD_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2487 EXTRACT_IFMT_FP_LD_REG_IMM_CODE
2490 int UNUSED insn_referenced = abuf->written;
2491 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2497 model_sparc64_def_fp_ld_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
2499 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2500 const IDESC * UNUSED idesc = abuf->idesc;
2502 IADDR UNUSED pc = GET_H_PC ();
2503 CGEN_INSN_INT insn = abuf->insn;
2504 EXTRACT_IFMT_FP_LD_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
2505 EXTRACT_IFMT_FP_LD_REG_REG_ASI_CODE
2508 int UNUSED insn_referenced = abuf->written;
2509 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2515 model_sparc64_def_sethi (SIM_CPU *current_cpu, void *sem_arg)
2517 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2518 const IDESC * UNUSED idesc = abuf->idesc;
2520 IADDR UNUSED pc = GET_H_PC ();
2521 CGEN_INSN_INT insn = abuf->insn;
2522 EXTRACT_IFMT_SETHI_VARS /* f-hi22 f-op2 f-rd f-op */
2523 EXTRACT_IFMT_SETHI_CODE
2526 int UNUSED insn_referenced = abuf->written;
2527 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2533 model_sparc64_def_add (SIM_CPU *current_cpu, void *sem_arg)
2535 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2536 const IDESC * UNUSED idesc = abuf->idesc;
2538 IADDR UNUSED pc = GET_H_PC ();
2539 CGEN_INSN_INT insn = abuf->insn;
2540 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2541 EXTRACT_IFMT_LDSB_REG_REG_CODE
2544 int UNUSED insn_referenced = abuf->written;
2545 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2551 model_sparc64_def_add_imm (SIM_CPU *current_cpu, void *sem_arg)
2553 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2554 const IDESC * UNUSED idesc = abuf->idesc;
2556 IADDR UNUSED pc = GET_H_PC ();
2557 CGEN_INSN_INT insn = abuf->insn;
2558 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2559 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2562 int UNUSED insn_referenced = abuf->written;
2563 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2569 model_sparc64_def_sub (SIM_CPU *current_cpu, void *sem_arg)
2571 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2572 const IDESC * UNUSED idesc = abuf->idesc;
2574 IADDR UNUSED pc = GET_H_PC ();
2575 CGEN_INSN_INT insn = abuf->insn;
2576 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2577 EXTRACT_IFMT_LDSB_REG_REG_CODE
2580 int UNUSED insn_referenced = abuf->written;
2581 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2587 model_sparc64_def_sub_imm (SIM_CPU *current_cpu, void *sem_arg)
2589 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2590 const IDESC * UNUSED idesc = abuf->idesc;
2592 IADDR UNUSED pc = GET_H_PC ();
2593 CGEN_INSN_INT insn = abuf->insn;
2594 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2595 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2598 int UNUSED insn_referenced = abuf->written;
2599 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2605 model_sparc64_def_addcc (SIM_CPU *current_cpu, void *sem_arg)
2607 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2608 const IDESC * UNUSED idesc = abuf->idesc;
2610 IADDR UNUSED pc = GET_H_PC ();
2611 CGEN_INSN_INT insn = abuf->insn;
2612 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2613 EXTRACT_IFMT_LDSB_REG_REG_CODE
2616 int UNUSED insn_referenced = abuf->written;
2617 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2623 model_sparc64_def_addcc_imm (SIM_CPU *current_cpu, void *sem_arg)
2625 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2626 const IDESC * UNUSED idesc = abuf->idesc;
2628 IADDR UNUSED pc = GET_H_PC ();
2629 CGEN_INSN_INT insn = abuf->insn;
2630 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2631 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2634 int UNUSED insn_referenced = abuf->written;
2635 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2641 model_sparc64_def_subcc (SIM_CPU *current_cpu, void *sem_arg)
2643 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2644 const IDESC * UNUSED idesc = abuf->idesc;
2646 IADDR UNUSED pc = GET_H_PC ();
2647 CGEN_INSN_INT insn = abuf->insn;
2648 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2649 EXTRACT_IFMT_LDSB_REG_REG_CODE
2652 int UNUSED insn_referenced = abuf->written;
2653 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2659 model_sparc64_def_subcc_imm (SIM_CPU *current_cpu, void *sem_arg)
2661 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2662 const IDESC * UNUSED idesc = abuf->idesc;
2664 IADDR UNUSED pc = GET_H_PC ();
2665 CGEN_INSN_INT insn = abuf->insn;
2666 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2667 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2670 int UNUSED insn_referenced = abuf->written;
2671 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2677 model_sparc64_def_addc (SIM_CPU *current_cpu, void *sem_arg)
2679 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2680 const IDESC * UNUSED idesc = abuf->idesc;
2682 IADDR UNUSED pc = GET_H_PC ();
2683 CGEN_INSN_INT insn = abuf->insn;
2684 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2685 EXTRACT_IFMT_LDSB_REG_REG_CODE
2688 int UNUSED insn_referenced = abuf->written;
2689 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2695 model_sparc64_def_addc_imm (SIM_CPU *current_cpu, void *sem_arg)
2697 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2698 const IDESC * UNUSED idesc = abuf->idesc;
2700 IADDR UNUSED pc = GET_H_PC ();
2701 CGEN_INSN_INT insn = abuf->insn;
2702 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2703 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2706 int UNUSED insn_referenced = abuf->written;
2707 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2713 model_sparc64_def_subc (SIM_CPU *current_cpu, void *sem_arg)
2715 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2716 const IDESC * UNUSED idesc = abuf->idesc;
2718 IADDR UNUSED pc = GET_H_PC ();
2719 CGEN_INSN_INT insn = abuf->insn;
2720 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2721 EXTRACT_IFMT_LDSB_REG_REG_CODE
2724 int UNUSED insn_referenced = abuf->written;
2725 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2731 model_sparc64_def_subc_imm (SIM_CPU *current_cpu, void *sem_arg)
2733 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2734 const IDESC * UNUSED idesc = abuf->idesc;
2736 IADDR UNUSED pc = GET_H_PC ();
2737 CGEN_INSN_INT insn = abuf->insn;
2738 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2739 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2742 int UNUSED insn_referenced = abuf->written;
2743 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2749 model_sparc64_def_addccc (SIM_CPU *current_cpu, void *sem_arg)
2751 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2752 const IDESC * UNUSED idesc = abuf->idesc;
2754 IADDR UNUSED pc = GET_H_PC ();
2755 CGEN_INSN_INT insn = abuf->insn;
2756 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2757 EXTRACT_IFMT_LDSB_REG_REG_CODE
2760 int UNUSED insn_referenced = abuf->written;
2761 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2767 model_sparc64_def_addccc_imm (SIM_CPU *current_cpu, void *sem_arg)
2769 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2770 const IDESC * UNUSED idesc = abuf->idesc;
2772 IADDR UNUSED pc = GET_H_PC ();
2773 CGEN_INSN_INT insn = abuf->insn;
2774 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2775 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2778 int UNUSED insn_referenced = abuf->written;
2779 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2785 model_sparc64_def_subccc (SIM_CPU *current_cpu, void *sem_arg)
2787 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2788 const IDESC * UNUSED idesc = abuf->idesc;
2790 IADDR UNUSED pc = GET_H_PC ();
2791 CGEN_INSN_INT insn = abuf->insn;
2792 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2793 EXTRACT_IFMT_LDSB_REG_REG_CODE
2796 int UNUSED insn_referenced = abuf->written;
2797 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2803 model_sparc64_def_subccc_imm (SIM_CPU *current_cpu, void *sem_arg)
2805 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2806 const IDESC * UNUSED idesc = abuf->idesc;
2808 IADDR UNUSED pc = GET_H_PC ();
2809 CGEN_INSN_INT insn = abuf->insn;
2810 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2811 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2814 int UNUSED insn_referenced = abuf->written;
2815 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2821 model_sparc64_def_and (SIM_CPU *current_cpu, void *sem_arg)
2823 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2824 const IDESC * UNUSED idesc = abuf->idesc;
2826 IADDR UNUSED pc = GET_H_PC ();
2827 CGEN_INSN_INT insn = abuf->insn;
2828 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2829 EXTRACT_IFMT_LDSB_REG_REG_CODE
2832 int UNUSED insn_referenced = abuf->written;
2833 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2839 model_sparc64_def_and_imm (SIM_CPU *current_cpu, void *sem_arg)
2841 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2842 const IDESC * UNUSED idesc = abuf->idesc;
2844 IADDR UNUSED pc = GET_H_PC ();
2845 CGEN_INSN_INT insn = abuf->insn;
2846 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2847 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2850 int UNUSED insn_referenced = abuf->written;
2851 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2857 model_sparc64_def_andcc (SIM_CPU *current_cpu, void *sem_arg)
2859 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2860 const IDESC * UNUSED idesc = abuf->idesc;
2862 IADDR UNUSED pc = GET_H_PC ();
2863 CGEN_INSN_INT insn = abuf->insn;
2864 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2865 EXTRACT_IFMT_LDSB_REG_REG_CODE
2868 int UNUSED insn_referenced = abuf->written;
2869 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2875 model_sparc64_def_andcc_imm (SIM_CPU *current_cpu, void *sem_arg)
2877 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2878 const IDESC * UNUSED idesc = abuf->idesc;
2880 IADDR UNUSED pc = GET_H_PC ();
2881 CGEN_INSN_INT insn = abuf->insn;
2882 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2883 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2886 int UNUSED insn_referenced = abuf->written;
2887 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2893 model_sparc64_def_or (SIM_CPU *current_cpu, void *sem_arg)
2895 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2896 const IDESC * UNUSED idesc = abuf->idesc;
2898 IADDR UNUSED pc = GET_H_PC ();
2899 CGEN_INSN_INT insn = abuf->insn;
2900 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2901 EXTRACT_IFMT_LDSB_REG_REG_CODE
2904 int UNUSED insn_referenced = abuf->written;
2905 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2911 model_sparc64_def_or_imm (SIM_CPU *current_cpu, void *sem_arg)
2913 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2914 const IDESC * UNUSED idesc = abuf->idesc;
2916 IADDR UNUSED pc = GET_H_PC ();
2917 CGEN_INSN_INT insn = abuf->insn;
2918 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2919 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2922 int UNUSED insn_referenced = abuf->written;
2923 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2929 model_sparc64_def_orcc (SIM_CPU *current_cpu, void *sem_arg)
2931 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2932 const IDESC * UNUSED idesc = abuf->idesc;
2934 IADDR UNUSED pc = GET_H_PC ();
2935 CGEN_INSN_INT insn = abuf->insn;
2936 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2937 EXTRACT_IFMT_LDSB_REG_REG_CODE
2940 int UNUSED insn_referenced = abuf->written;
2941 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2947 model_sparc64_def_orcc_imm (SIM_CPU *current_cpu, void *sem_arg)
2949 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2950 const IDESC * UNUSED idesc = abuf->idesc;
2952 IADDR UNUSED pc = GET_H_PC ();
2953 CGEN_INSN_INT insn = abuf->insn;
2954 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2955 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2958 int UNUSED insn_referenced = abuf->written;
2959 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2965 model_sparc64_def_xor (SIM_CPU *current_cpu, void *sem_arg)
2967 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2968 const IDESC * UNUSED idesc = abuf->idesc;
2970 IADDR UNUSED pc = GET_H_PC ();
2971 CGEN_INSN_INT insn = abuf->insn;
2972 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
2973 EXTRACT_IFMT_LDSB_REG_REG_CODE
2976 int UNUSED insn_referenced = abuf->written;
2977 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
2983 model_sparc64_def_xor_imm (SIM_CPU *current_cpu, void *sem_arg)
2985 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
2986 const IDESC * UNUSED idesc = abuf->idesc;
2988 IADDR UNUSED pc = GET_H_PC ();
2989 CGEN_INSN_INT insn = abuf->insn;
2990 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
2991 EXTRACT_IFMT_LDSB_REG_IMM_CODE
2994 int UNUSED insn_referenced = abuf->written;
2995 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3001 model_sparc64_def_xorcc (SIM_CPU *current_cpu, void *sem_arg)
3003 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3004 const IDESC * UNUSED idesc = abuf->idesc;
3006 IADDR UNUSED pc = GET_H_PC ();
3007 CGEN_INSN_INT insn = abuf->insn;
3008 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3009 EXTRACT_IFMT_LDSB_REG_REG_CODE
3012 int UNUSED insn_referenced = abuf->written;
3013 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3019 model_sparc64_def_xorcc_imm (SIM_CPU *current_cpu, void *sem_arg)
3021 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3022 const IDESC * UNUSED idesc = abuf->idesc;
3024 IADDR UNUSED pc = GET_H_PC ();
3025 CGEN_INSN_INT insn = abuf->insn;
3026 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3027 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3030 int UNUSED insn_referenced = abuf->written;
3031 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3037 model_sparc64_def_andn (SIM_CPU *current_cpu, void *sem_arg)
3039 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3040 const IDESC * UNUSED idesc = abuf->idesc;
3042 IADDR UNUSED pc = GET_H_PC ();
3043 CGEN_INSN_INT insn = abuf->insn;
3044 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3045 EXTRACT_IFMT_LDSB_REG_REG_CODE
3048 int UNUSED insn_referenced = abuf->written;
3049 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3055 model_sparc64_def_andn_imm (SIM_CPU *current_cpu, void *sem_arg)
3057 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3058 const IDESC * UNUSED idesc = abuf->idesc;
3060 IADDR UNUSED pc = GET_H_PC ();
3061 CGEN_INSN_INT insn = abuf->insn;
3062 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3063 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3066 int UNUSED insn_referenced = abuf->written;
3067 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3073 model_sparc64_def_andncc (SIM_CPU *current_cpu, void *sem_arg)
3075 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3076 const IDESC * UNUSED idesc = abuf->idesc;
3078 IADDR UNUSED pc = GET_H_PC ();
3079 CGEN_INSN_INT insn = abuf->insn;
3080 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3081 EXTRACT_IFMT_LDSB_REG_REG_CODE
3084 int UNUSED insn_referenced = abuf->written;
3085 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3091 model_sparc64_def_andncc_imm (SIM_CPU *current_cpu, void *sem_arg)
3093 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3094 const IDESC * UNUSED idesc = abuf->idesc;
3096 IADDR UNUSED pc = GET_H_PC ();
3097 CGEN_INSN_INT insn = abuf->insn;
3098 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3099 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3102 int UNUSED insn_referenced = abuf->written;
3103 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3109 model_sparc64_def_orn (SIM_CPU *current_cpu, void *sem_arg)
3111 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3112 const IDESC * UNUSED idesc = abuf->idesc;
3114 IADDR UNUSED pc = GET_H_PC ();
3115 CGEN_INSN_INT insn = abuf->insn;
3116 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3117 EXTRACT_IFMT_LDSB_REG_REG_CODE
3120 int UNUSED insn_referenced = abuf->written;
3121 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3127 model_sparc64_def_orn_imm (SIM_CPU *current_cpu, void *sem_arg)
3129 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3130 const IDESC * UNUSED idesc = abuf->idesc;
3132 IADDR UNUSED pc = GET_H_PC ();
3133 CGEN_INSN_INT insn = abuf->insn;
3134 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3135 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3138 int UNUSED insn_referenced = abuf->written;
3139 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3145 model_sparc64_def_orncc (SIM_CPU *current_cpu, void *sem_arg)
3147 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3148 const IDESC * UNUSED idesc = abuf->idesc;
3150 IADDR UNUSED pc = GET_H_PC ();
3151 CGEN_INSN_INT insn = abuf->insn;
3152 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3153 EXTRACT_IFMT_LDSB_REG_REG_CODE
3156 int UNUSED insn_referenced = abuf->written;
3157 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3163 model_sparc64_def_orncc_imm (SIM_CPU *current_cpu, void *sem_arg)
3165 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3166 const IDESC * UNUSED idesc = abuf->idesc;
3168 IADDR UNUSED pc = GET_H_PC ();
3169 CGEN_INSN_INT insn = abuf->insn;
3170 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3171 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3174 int UNUSED insn_referenced = abuf->written;
3175 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3181 model_sparc64_def_xnor (SIM_CPU *current_cpu, void *sem_arg)
3183 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3184 const IDESC * UNUSED idesc = abuf->idesc;
3186 IADDR UNUSED pc = GET_H_PC ();
3187 CGEN_INSN_INT insn = abuf->insn;
3188 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3189 EXTRACT_IFMT_LDSB_REG_REG_CODE
3192 int UNUSED insn_referenced = abuf->written;
3193 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3199 model_sparc64_def_xnor_imm (SIM_CPU *current_cpu, void *sem_arg)
3201 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3202 const IDESC * UNUSED idesc = abuf->idesc;
3204 IADDR UNUSED pc = GET_H_PC ();
3205 CGEN_INSN_INT insn = abuf->insn;
3206 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3207 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3210 int UNUSED insn_referenced = abuf->written;
3211 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3217 model_sparc64_def_xnorcc (SIM_CPU *current_cpu, void *sem_arg)
3219 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3220 const IDESC * UNUSED idesc = abuf->idesc;
3222 IADDR UNUSED pc = GET_H_PC ();
3223 CGEN_INSN_INT insn = abuf->insn;
3224 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3225 EXTRACT_IFMT_LDSB_REG_REG_CODE
3228 int UNUSED insn_referenced = abuf->written;
3229 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3235 model_sparc64_def_xnorcc_imm (SIM_CPU *current_cpu, void *sem_arg)
3237 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3238 const IDESC * UNUSED idesc = abuf->idesc;
3240 IADDR UNUSED pc = GET_H_PC ();
3241 CGEN_INSN_INT insn = abuf->insn;
3242 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3243 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3246 int UNUSED insn_referenced = abuf->written;
3247 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3253 model_sparc64_def_sll (SIM_CPU *current_cpu, void *sem_arg)
3255 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3256 const IDESC * UNUSED idesc = abuf->idesc;
3258 IADDR UNUSED pc = GET_H_PC ();
3259 CGEN_INSN_INT insn = abuf->insn;
3260 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3261 EXTRACT_IFMT_LDSB_REG_REG_CODE
3264 int UNUSED insn_referenced = abuf->written;
3265 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3271 model_sparc64_def_sll_imm (SIM_CPU *current_cpu, void *sem_arg)
3273 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3274 const IDESC * UNUSED idesc = abuf->idesc;
3276 IADDR UNUSED pc = GET_H_PC ();
3277 CGEN_INSN_INT insn = abuf->insn;
3278 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3279 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3282 int UNUSED insn_referenced = abuf->written;
3283 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3289 model_sparc64_def_srl (SIM_CPU *current_cpu, void *sem_arg)
3291 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3292 const IDESC * UNUSED idesc = abuf->idesc;
3294 IADDR UNUSED pc = GET_H_PC ();
3295 CGEN_INSN_INT insn = abuf->insn;
3296 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3297 EXTRACT_IFMT_LDSB_REG_REG_CODE
3300 int UNUSED insn_referenced = abuf->written;
3301 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3307 model_sparc64_def_srl_imm (SIM_CPU *current_cpu, void *sem_arg)
3309 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3310 const IDESC * UNUSED idesc = abuf->idesc;
3312 IADDR UNUSED pc = GET_H_PC ();
3313 CGEN_INSN_INT insn = abuf->insn;
3314 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3315 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3318 int UNUSED insn_referenced = abuf->written;
3319 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3325 model_sparc64_def_sra (SIM_CPU *current_cpu, void *sem_arg)
3327 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3328 const IDESC * UNUSED idesc = abuf->idesc;
3330 IADDR UNUSED pc = GET_H_PC ();
3331 CGEN_INSN_INT insn = abuf->insn;
3332 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3333 EXTRACT_IFMT_LDSB_REG_REG_CODE
3336 int UNUSED insn_referenced = abuf->written;
3337 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3343 model_sparc64_def_sra_imm (SIM_CPU *current_cpu, void *sem_arg)
3345 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3346 const IDESC * UNUSED idesc = abuf->idesc;
3348 IADDR UNUSED pc = GET_H_PC ();
3349 CGEN_INSN_INT insn = abuf->insn;
3350 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3351 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3354 int UNUSED insn_referenced = abuf->written;
3355 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3361 model_sparc64_def_smul (SIM_CPU *current_cpu, void *sem_arg)
3363 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3364 const IDESC * UNUSED idesc = abuf->idesc;
3366 IADDR UNUSED pc = GET_H_PC ();
3367 CGEN_INSN_INT insn = abuf->insn;
3368 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3369 EXTRACT_IFMT_LDSB_REG_REG_CODE
3372 int UNUSED insn_referenced = abuf->written;
3373 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3379 model_sparc64_def_smul_imm (SIM_CPU *current_cpu, void *sem_arg)
3381 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3382 const IDESC * UNUSED idesc = abuf->idesc;
3384 IADDR UNUSED pc = GET_H_PC ();
3385 CGEN_INSN_INT insn = abuf->insn;
3386 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3387 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3390 int UNUSED insn_referenced = abuf->written;
3391 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3397 model_sparc64_def_smul_cc (SIM_CPU *current_cpu, void *sem_arg)
3399 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3400 const IDESC * UNUSED idesc = abuf->idesc;
3402 IADDR UNUSED pc = GET_H_PC ();
3403 CGEN_INSN_INT insn = abuf->insn;
3404 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3405 EXTRACT_IFMT_LDSB_REG_REG_CODE
3408 int UNUSED insn_referenced = abuf->written;
3409 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3415 model_sparc64_def_smul_cc_imm (SIM_CPU *current_cpu, void *sem_arg)
3417 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3418 const IDESC * UNUSED idesc = abuf->idesc;
3420 IADDR UNUSED pc = GET_H_PC ();
3421 CGEN_INSN_INT insn = abuf->insn;
3422 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3423 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3426 int UNUSED insn_referenced = abuf->written;
3427 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3433 model_sparc64_def_umul (SIM_CPU *current_cpu, void *sem_arg)
3435 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3436 const IDESC * UNUSED idesc = abuf->idesc;
3438 IADDR UNUSED pc = GET_H_PC ();
3439 CGEN_INSN_INT insn = abuf->insn;
3440 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3441 EXTRACT_IFMT_LDSB_REG_REG_CODE
3444 int UNUSED insn_referenced = abuf->written;
3445 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3451 model_sparc64_def_umul_imm (SIM_CPU *current_cpu, void *sem_arg)
3453 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3454 const IDESC * UNUSED idesc = abuf->idesc;
3456 IADDR UNUSED pc = GET_H_PC ();
3457 CGEN_INSN_INT insn = abuf->insn;
3458 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3459 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3462 int UNUSED insn_referenced = abuf->written;
3463 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3469 model_sparc64_def_umul_cc (SIM_CPU *current_cpu, void *sem_arg)
3471 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3472 const IDESC * UNUSED idesc = abuf->idesc;
3474 IADDR UNUSED pc = GET_H_PC ();
3475 CGEN_INSN_INT insn = abuf->insn;
3476 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3477 EXTRACT_IFMT_LDSB_REG_REG_CODE
3480 int UNUSED insn_referenced = abuf->written;
3481 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3487 model_sparc64_def_umul_cc_imm (SIM_CPU *current_cpu, void *sem_arg)
3489 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3490 const IDESC * UNUSED idesc = abuf->idesc;
3492 IADDR UNUSED pc = GET_H_PC ();
3493 CGEN_INSN_INT insn = abuf->insn;
3494 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3495 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3498 int UNUSED insn_referenced = abuf->written;
3499 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3505 model_sparc64_def_mulscc (SIM_CPU *current_cpu, void *sem_arg)
3507 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3508 const IDESC * UNUSED idesc = abuf->idesc;
3510 IADDR UNUSED pc = GET_H_PC ();
3511 CGEN_INSN_INT insn = abuf->insn;
3512 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3513 EXTRACT_IFMT_LDSB_REG_REG_CODE
3516 int UNUSED insn_referenced = abuf->written;
3517 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3523 model_sparc64_def_save (SIM_CPU *current_cpu, void *sem_arg)
3525 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3526 const IDESC * UNUSED idesc = abuf->idesc;
3528 IADDR UNUSED pc = GET_H_PC ();
3529 CGEN_INSN_INT insn = abuf->insn;
3530 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3531 EXTRACT_IFMT_LDSB_REG_REG_CODE
3534 int UNUSED insn_referenced = abuf->written;
3535 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3541 model_sparc64_def_save_imm (SIM_CPU *current_cpu, void *sem_arg)
3543 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3544 const IDESC * UNUSED idesc = abuf->idesc;
3546 IADDR UNUSED pc = GET_H_PC ();
3547 CGEN_INSN_INT insn = abuf->insn;
3548 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3549 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3552 int UNUSED insn_referenced = abuf->written;
3553 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3559 model_sparc64_def_restore (SIM_CPU *current_cpu, void *sem_arg)
3561 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3562 const IDESC * UNUSED idesc = abuf->idesc;
3564 IADDR UNUSED pc = GET_H_PC ();
3565 CGEN_INSN_INT insn = abuf->insn;
3566 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3567 EXTRACT_IFMT_LDSB_REG_REG_CODE
3570 int UNUSED insn_referenced = abuf->written;
3571 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3577 model_sparc64_def_restore_imm (SIM_CPU *current_cpu, void *sem_arg)
3579 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3580 const IDESC * UNUSED idesc = abuf->idesc;
3582 IADDR UNUSED pc = GET_H_PC ();
3583 CGEN_INSN_INT insn = abuf->insn;
3584 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3585 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3588 int UNUSED insn_referenced = abuf->written;
3589 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3595 model_sparc64_def_rett (SIM_CPU *current_cpu, void *sem_arg)
3597 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3598 const IDESC * UNUSED idesc = abuf->idesc;
3600 IADDR UNUSED pc = GET_H_PC ();
3601 CGEN_INSN_INT insn = abuf->insn;
3602 EXTRACT_IFMT_FLUSH_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3603 EXTRACT_IFMT_FLUSH_CODE
3606 int UNUSED insn_referenced = abuf->written;
3607 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3613 model_sparc64_def_rett_imm (SIM_CPU *current_cpu, void *sem_arg)
3615 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3616 const IDESC * UNUSED idesc = abuf->idesc;
3618 IADDR UNUSED pc = GET_H_PC ();
3619 CGEN_INSN_INT insn = abuf->insn;
3620 EXTRACT_IFMT_FLUSH_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3621 EXTRACT_IFMT_FLUSH_IMM_CODE
3624 int UNUSED insn_referenced = abuf->written;
3625 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3631 model_sparc64_def_unimp (SIM_CPU *current_cpu, void *sem_arg)
3633 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3634 const IDESC * UNUSED idesc = abuf->idesc;
3636 IADDR UNUSED pc = GET_H_PC ();
3637 CGEN_INSN_INT insn = abuf->insn;
3638 EXTRACT_IFMT_UNIMP_VARS /* f-imm22 f-op2 f-rd-res f-op */
3639 EXTRACT_IFMT_UNIMP_CODE
3642 int UNUSED insn_referenced = abuf->written;
3643 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3649 model_sparc64_def_call (SIM_CPU *current_cpu, void *sem_arg)
3651 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3652 const IDESC * UNUSED idesc = abuf->idesc;
3654 IADDR UNUSED pc = GET_H_PC ();
3655 CGEN_INSN_INT insn = abuf->insn;
3656 EXTRACT_IFMT_CALL_VARS /* f-disp30 f-op */
3658 EXTRACT_IFMT_CALL_CODE
3659 i_disp30 = f_disp30;
3662 int UNUSED insn_referenced = abuf->written;
3663 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3669 model_sparc64_def_jmpl (SIM_CPU *current_cpu, void *sem_arg)
3671 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3672 const IDESC * UNUSED idesc = abuf->idesc;
3674 IADDR UNUSED pc = GET_H_PC ();
3675 CGEN_INSN_INT insn = abuf->insn;
3676 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
3677 EXTRACT_IFMT_LDSB_REG_REG_CODE
3680 int UNUSED insn_referenced = abuf->written;
3681 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3687 model_sparc64_def_jmpl_imm (SIM_CPU *current_cpu, void *sem_arg)
3689 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3690 const IDESC * UNUSED idesc = abuf->idesc;
3692 IADDR UNUSED pc = GET_H_PC ();
3693 CGEN_INSN_INT insn = abuf->insn;
3694 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
3695 EXTRACT_IFMT_LDSB_REG_IMM_CODE
3698 int UNUSED insn_referenced = abuf->written;
3699 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3705 model_sparc64_def_ba (SIM_CPU *current_cpu, void *sem_arg)
3707 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3708 const IDESC * UNUSED idesc = abuf->idesc;
3710 IADDR UNUSED pc = GET_H_PC ();
3711 CGEN_INSN_INT insn = abuf->insn;
3712 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
3714 EXTRACT_IFMT_BA_CODE
3715 i_disp22 = f_disp22;
3718 int UNUSED insn_referenced = abuf->written;
3719 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3725 model_sparc64_def_ta (SIM_CPU *current_cpu, void *sem_arg)
3727 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3728 const IDESC * UNUSED idesc = abuf->idesc;
3730 IADDR UNUSED pc = GET_H_PC ();
3731 CGEN_INSN_INT insn = abuf->insn;
3732 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3733 EXTRACT_IFMT_TA_CODE
3736 int UNUSED insn_referenced = abuf->written;
3737 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3743 model_sparc64_def_ta_imm (SIM_CPU *current_cpu, void *sem_arg)
3745 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3746 const IDESC * UNUSED idesc = abuf->idesc;
3748 IADDR UNUSED pc = GET_H_PC ();
3749 CGEN_INSN_INT insn = abuf->insn;
3750 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3751 EXTRACT_IFMT_TA_IMM_CODE
3754 int UNUSED insn_referenced = abuf->written;
3755 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3761 model_sparc64_def_bn (SIM_CPU *current_cpu, void *sem_arg)
3763 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3764 const IDESC * UNUSED idesc = abuf->idesc;
3766 IADDR UNUSED pc = GET_H_PC ();
3767 CGEN_INSN_INT insn = abuf->insn;
3768 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
3769 EXTRACT_IFMT_BA_CODE
3772 int UNUSED insn_referenced = abuf->written;
3773 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3779 model_sparc64_def_tn (SIM_CPU *current_cpu, void *sem_arg)
3781 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3782 const IDESC * UNUSED idesc = abuf->idesc;
3784 IADDR UNUSED pc = GET_H_PC ();
3785 CGEN_INSN_INT insn = abuf->insn;
3786 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3787 EXTRACT_IFMT_TA_CODE
3790 int UNUSED insn_referenced = abuf->written;
3791 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3797 model_sparc64_def_tn_imm (SIM_CPU *current_cpu, void *sem_arg)
3799 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3800 const IDESC * UNUSED idesc = abuf->idesc;
3802 IADDR UNUSED pc = GET_H_PC ();
3803 CGEN_INSN_INT insn = abuf->insn;
3804 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3805 EXTRACT_IFMT_TA_IMM_CODE
3808 int UNUSED insn_referenced = abuf->written;
3809 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3815 model_sparc64_def_bne (SIM_CPU *current_cpu, void *sem_arg)
3817 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3818 const IDESC * UNUSED idesc = abuf->idesc;
3820 IADDR UNUSED pc = GET_H_PC ();
3821 CGEN_INSN_INT insn = abuf->insn;
3822 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
3824 EXTRACT_IFMT_BA_CODE
3825 i_disp22 = f_disp22;
3828 int UNUSED insn_referenced = abuf->written;
3829 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3835 model_sparc64_def_tne (SIM_CPU *current_cpu, void *sem_arg)
3837 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3838 const IDESC * UNUSED idesc = abuf->idesc;
3840 IADDR UNUSED pc = GET_H_PC ();
3841 CGEN_INSN_INT insn = abuf->insn;
3842 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3843 EXTRACT_IFMT_TA_CODE
3846 int UNUSED insn_referenced = abuf->written;
3847 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3853 model_sparc64_def_tne_imm (SIM_CPU *current_cpu, void *sem_arg)
3855 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3856 const IDESC * UNUSED idesc = abuf->idesc;
3858 IADDR UNUSED pc = GET_H_PC ();
3859 CGEN_INSN_INT insn = abuf->insn;
3860 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3861 EXTRACT_IFMT_TA_IMM_CODE
3864 int UNUSED insn_referenced = abuf->written;
3865 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3871 model_sparc64_def_be (SIM_CPU *current_cpu, void *sem_arg)
3873 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3874 const IDESC * UNUSED idesc = abuf->idesc;
3876 IADDR UNUSED pc = GET_H_PC ();
3877 CGEN_INSN_INT insn = abuf->insn;
3878 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
3880 EXTRACT_IFMT_BA_CODE
3881 i_disp22 = f_disp22;
3884 int UNUSED insn_referenced = abuf->written;
3885 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3891 model_sparc64_def_te (SIM_CPU *current_cpu, void *sem_arg)
3893 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3894 const IDESC * UNUSED idesc = abuf->idesc;
3896 IADDR UNUSED pc = GET_H_PC ();
3897 CGEN_INSN_INT insn = abuf->insn;
3898 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3899 EXTRACT_IFMT_TA_CODE
3902 int UNUSED insn_referenced = abuf->written;
3903 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3909 model_sparc64_def_te_imm (SIM_CPU *current_cpu, void *sem_arg)
3911 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3912 const IDESC * UNUSED idesc = abuf->idesc;
3914 IADDR UNUSED pc = GET_H_PC ();
3915 CGEN_INSN_INT insn = abuf->insn;
3916 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3917 EXTRACT_IFMT_TA_IMM_CODE
3920 int UNUSED insn_referenced = abuf->written;
3921 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3927 model_sparc64_def_bg (SIM_CPU *current_cpu, void *sem_arg)
3929 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3930 const IDESC * UNUSED idesc = abuf->idesc;
3932 IADDR UNUSED pc = GET_H_PC ();
3933 CGEN_INSN_INT insn = abuf->insn;
3934 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
3936 EXTRACT_IFMT_BA_CODE
3937 i_disp22 = f_disp22;
3940 int UNUSED insn_referenced = abuf->written;
3941 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3947 model_sparc64_def_tg (SIM_CPU *current_cpu, void *sem_arg)
3949 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3950 const IDESC * UNUSED idesc = abuf->idesc;
3952 IADDR UNUSED pc = GET_H_PC ();
3953 CGEN_INSN_INT insn = abuf->insn;
3954 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3955 EXTRACT_IFMT_TA_CODE
3958 int UNUSED insn_referenced = abuf->written;
3959 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3965 model_sparc64_def_tg_imm (SIM_CPU *current_cpu, void *sem_arg)
3967 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3968 const IDESC * UNUSED idesc = abuf->idesc;
3970 IADDR UNUSED pc = GET_H_PC ();
3971 CGEN_INSN_INT insn = abuf->insn;
3972 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
3973 EXTRACT_IFMT_TA_IMM_CODE
3976 int UNUSED insn_referenced = abuf->written;
3977 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
3983 model_sparc64_def_ble (SIM_CPU *current_cpu, void *sem_arg)
3985 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
3986 const IDESC * UNUSED idesc = abuf->idesc;
3988 IADDR UNUSED pc = GET_H_PC ();
3989 CGEN_INSN_INT insn = abuf->insn;
3990 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
3992 EXTRACT_IFMT_BA_CODE
3993 i_disp22 = f_disp22;
3996 int UNUSED insn_referenced = abuf->written;
3997 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4003 model_sparc64_def_tle (SIM_CPU *current_cpu, void *sem_arg)
4005 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4006 const IDESC * UNUSED idesc = abuf->idesc;
4008 IADDR UNUSED pc = GET_H_PC ();
4009 CGEN_INSN_INT insn = abuf->insn;
4010 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4011 EXTRACT_IFMT_TA_CODE
4014 int UNUSED insn_referenced = abuf->written;
4015 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4021 model_sparc64_def_tle_imm (SIM_CPU *current_cpu, void *sem_arg)
4023 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4024 const IDESC * UNUSED idesc = abuf->idesc;
4026 IADDR UNUSED pc = GET_H_PC ();
4027 CGEN_INSN_INT insn = abuf->insn;
4028 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4029 EXTRACT_IFMT_TA_IMM_CODE
4032 int UNUSED insn_referenced = abuf->written;
4033 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4039 model_sparc64_def_bge (SIM_CPU *current_cpu, void *sem_arg)
4041 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4042 const IDESC * UNUSED idesc = abuf->idesc;
4044 IADDR UNUSED pc = GET_H_PC ();
4045 CGEN_INSN_INT insn = abuf->insn;
4046 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4048 EXTRACT_IFMT_BA_CODE
4049 i_disp22 = f_disp22;
4052 int UNUSED insn_referenced = abuf->written;
4053 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4059 model_sparc64_def_tge (SIM_CPU *current_cpu, void *sem_arg)
4061 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4062 const IDESC * UNUSED idesc = abuf->idesc;
4064 IADDR UNUSED pc = GET_H_PC ();
4065 CGEN_INSN_INT insn = abuf->insn;
4066 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4067 EXTRACT_IFMT_TA_CODE
4070 int UNUSED insn_referenced = abuf->written;
4071 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4077 model_sparc64_def_tge_imm (SIM_CPU *current_cpu, void *sem_arg)
4079 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4080 const IDESC * UNUSED idesc = abuf->idesc;
4082 IADDR UNUSED pc = GET_H_PC ();
4083 CGEN_INSN_INT insn = abuf->insn;
4084 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4085 EXTRACT_IFMT_TA_IMM_CODE
4088 int UNUSED insn_referenced = abuf->written;
4089 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4095 model_sparc64_def_bl (SIM_CPU *current_cpu, void *sem_arg)
4097 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4098 const IDESC * UNUSED idesc = abuf->idesc;
4100 IADDR UNUSED pc = GET_H_PC ();
4101 CGEN_INSN_INT insn = abuf->insn;
4102 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4104 EXTRACT_IFMT_BA_CODE
4105 i_disp22 = f_disp22;
4108 int UNUSED insn_referenced = abuf->written;
4109 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4115 model_sparc64_def_tl (SIM_CPU *current_cpu, void *sem_arg)
4117 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4118 const IDESC * UNUSED idesc = abuf->idesc;
4120 IADDR UNUSED pc = GET_H_PC ();
4121 CGEN_INSN_INT insn = abuf->insn;
4122 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4123 EXTRACT_IFMT_TA_CODE
4126 int UNUSED insn_referenced = abuf->written;
4127 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4133 model_sparc64_def_tl_imm (SIM_CPU *current_cpu, void *sem_arg)
4135 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4136 const IDESC * UNUSED idesc = abuf->idesc;
4138 IADDR UNUSED pc = GET_H_PC ();
4139 CGEN_INSN_INT insn = abuf->insn;
4140 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4141 EXTRACT_IFMT_TA_IMM_CODE
4144 int UNUSED insn_referenced = abuf->written;
4145 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4151 model_sparc64_def_bgu (SIM_CPU *current_cpu, void *sem_arg)
4153 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4154 const IDESC * UNUSED idesc = abuf->idesc;
4156 IADDR UNUSED pc = GET_H_PC ();
4157 CGEN_INSN_INT insn = abuf->insn;
4158 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4160 EXTRACT_IFMT_BA_CODE
4161 i_disp22 = f_disp22;
4164 int UNUSED insn_referenced = abuf->written;
4165 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4171 model_sparc64_def_tgu (SIM_CPU *current_cpu, void *sem_arg)
4173 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4174 const IDESC * UNUSED idesc = abuf->idesc;
4176 IADDR UNUSED pc = GET_H_PC ();
4177 CGEN_INSN_INT insn = abuf->insn;
4178 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4179 EXTRACT_IFMT_TA_CODE
4182 int UNUSED insn_referenced = abuf->written;
4183 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4189 model_sparc64_def_tgu_imm (SIM_CPU *current_cpu, void *sem_arg)
4191 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4192 const IDESC * UNUSED idesc = abuf->idesc;
4194 IADDR UNUSED pc = GET_H_PC ();
4195 CGEN_INSN_INT insn = abuf->insn;
4196 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4197 EXTRACT_IFMT_TA_IMM_CODE
4200 int UNUSED insn_referenced = abuf->written;
4201 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4207 model_sparc64_def_bleu (SIM_CPU *current_cpu, void *sem_arg)
4209 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4210 const IDESC * UNUSED idesc = abuf->idesc;
4212 IADDR UNUSED pc = GET_H_PC ();
4213 CGEN_INSN_INT insn = abuf->insn;
4214 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4216 EXTRACT_IFMT_BA_CODE
4217 i_disp22 = f_disp22;
4220 int UNUSED insn_referenced = abuf->written;
4221 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4227 model_sparc64_def_tleu (SIM_CPU *current_cpu, void *sem_arg)
4229 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4230 const IDESC * UNUSED idesc = abuf->idesc;
4232 IADDR UNUSED pc = GET_H_PC ();
4233 CGEN_INSN_INT insn = abuf->insn;
4234 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4235 EXTRACT_IFMT_TA_CODE
4238 int UNUSED insn_referenced = abuf->written;
4239 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4245 model_sparc64_def_tleu_imm (SIM_CPU *current_cpu, void *sem_arg)
4247 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4248 const IDESC * UNUSED idesc = abuf->idesc;
4250 IADDR UNUSED pc = GET_H_PC ();
4251 CGEN_INSN_INT insn = abuf->insn;
4252 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4253 EXTRACT_IFMT_TA_IMM_CODE
4256 int UNUSED insn_referenced = abuf->written;
4257 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4263 model_sparc64_def_bcc (SIM_CPU *current_cpu, void *sem_arg)
4265 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4266 const IDESC * UNUSED idesc = abuf->idesc;
4268 IADDR UNUSED pc = GET_H_PC ();
4269 CGEN_INSN_INT insn = abuf->insn;
4270 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4272 EXTRACT_IFMT_BA_CODE
4273 i_disp22 = f_disp22;
4276 int UNUSED insn_referenced = abuf->written;
4277 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4283 model_sparc64_def_tcc (SIM_CPU *current_cpu, void *sem_arg)
4285 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4286 const IDESC * UNUSED idesc = abuf->idesc;
4288 IADDR UNUSED pc = GET_H_PC ();
4289 CGEN_INSN_INT insn = abuf->insn;
4290 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4291 EXTRACT_IFMT_TA_CODE
4294 int UNUSED insn_referenced = abuf->written;
4295 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4301 model_sparc64_def_tcc_imm (SIM_CPU *current_cpu, void *sem_arg)
4303 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4304 const IDESC * UNUSED idesc = abuf->idesc;
4306 IADDR UNUSED pc = GET_H_PC ();
4307 CGEN_INSN_INT insn = abuf->insn;
4308 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4309 EXTRACT_IFMT_TA_IMM_CODE
4312 int UNUSED insn_referenced = abuf->written;
4313 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4319 model_sparc64_def_bcs (SIM_CPU *current_cpu, void *sem_arg)
4321 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4322 const IDESC * UNUSED idesc = abuf->idesc;
4324 IADDR UNUSED pc = GET_H_PC ();
4325 CGEN_INSN_INT insn = abuf->insn;
4326 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4328 EXTRACT_IFMT_BA_CODE
4329 i_disp22 = f_disp22;
4332 int UNUSED insn_referenced = abuf->written;
4333 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4339 model_sparc64_def_tcs (SIM_CPU *current_cpu, void *sem_arg)
4341 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4342 const IDESC * UNUSED idesc = abuf->idesc;
4344 IADDR UNUSED pc = GET_H_PC ();
4345 CGEN_INSN_INT insn = abuf->insn;
4346 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4347 EXTRACT_IFMT_TA_CODE
4350 int UNUSED insn_referenced = abuf->written;
4351 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4357 model_sparc64_def_tcs_imm (SIM_CPU *current_cpu, void *sem_arg)
4359 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4360 const IDESC * UNUSED idesc = abuf->idesc;
4362 IADDR UNUSED pc = GET_H_PC ();
4363 CGEN_INSN_INT insn = abuf->insn;
4364 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4365 EXTRACT_IFMT_TA_IMM_CODE
4368 int UNUSED insn_referenced = abuf->written;
4369 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4375 model_sparc64_def_bpos (SIM_CPU *current_cpu, void *sem_arg)
4377 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4378 const IDESC * UNUSED idesc = abuf->idesc;
4380 IADDR UNUSED pc = GET_H_PC ();
4381 CGEN_INSN_INT insn = abuf->insn;
4382 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4384 EXTRACT_IFMT_BA_CODE
4385 i_disp22 = f_disp22;
4388 int UNUSED insn_referenced = abuf->written;
4389 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4395 model_sparc64_def_tpos (SIM_CPU *current_cpu, void *sem_arg)
4397 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4398 const IDESC * UNUSED idesc = abuf->idesc;
4400 IADDR UNUSED pc = GET_H_PC ();
4401 CGEN_INSN_INT insn = abuf->insn;
4402 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4403 EXTRACT_IFMT_TA_CODE
4406 int UNUSED insn_referenced = abuf->written;
4407 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4413 model_sparc64_def_tpos_imm (SIM_CPU *current_cpu, void *sem_arg)
4415 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4416 const IDESC * UNUSED idesc = abuf->idesc;
4418 IADDR UNUSED pc = GET_H_PC ();
4419 CGEN_INSN_INT insn = abuf->insn;
4420 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4421 EXTRACT_IFMT_TA_IMM_CODE
4424 int UNUSED insn_referenced = abuf->written;
4425 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4431 model_sparc64_def_bneg (SIM_CPU *current_cpu, void *sem_arg)
4433 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4434 const IDESC * UNUSED idesc = abuf->idesc;
4436 IADDR UNUSED pc = GET_H_PC ();
4437 CGEN_INSN_INT insn = abuf->insn;
4438 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4440 EXTRACT_IFMT_BA_CODE
4441 i_disp22 = f_disp22;
4444 int UNUSED insn_referenced = abuf->written;
4445 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4451 model_sparc64_def_tneg (SIM_CPU *current_cpu, void *sem_arg)
4453 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4454 const IDESC * UNUSED idesc = abuf->idesc;
4456 IADDR UNUSED pc = GET_H_PC ();
4457 CGEN_INSN_INT insn = abuf->insn;
4458 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4459 EXTRACT_IFMT_TA_CODE
4462 int UNUSED insn_referenced = abuf->written;
4463 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4469 model_sparc64_def_tneg_imm (SIM_CPU *current_cpu, void *sem_arg)
4471 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4472 const IDESC * UNUSED idesc = abuf->idesc;
4474 IADDR UNUSED pc = GET_H_PC ();
4475 CGEN_INSN_INT insn = abuf->insn;
4476 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4477 EXTRACT_IFMT_TA_IMM_CODE
4480 int UNUSED insn_referenced = abuf->written;
4481 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4487 model_sparc64_def_bvc (SIM_CPU *current_cpu, void *sem_arg)
4489 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4490 const IDESC * UNUSED idesc = abuf->idesc;
4492 IADDR UNUSED pc = GET_H_PC ();
4493 CGEN_INSN_INT insn = abuf->insn;
4494 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4496 EXTRACT_IFMT_BA_CODE
4497 i_disp22 = f_disp22;
4500 int UNUSED insn_referenced = abuf->written;
4501 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4507 model_sparc64_def_tvc (SIM_CPU *current_cpu, void *sem_arg)
4509 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4510 const IDESC * UNUSED idesc = abuf->idesc;
4512 IADDR UNUSED pc = GET_H_PC ();
4513 CGEN_INSN_INT insn = abuf->insn;
4514 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4515 EXTRACT_IFMT_TA_CODE
4518 int UNUSED insn_referenced = abuf->written;
4519 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4525 model_sparc64_def_tvc_imm (SIM_CPU *current_cpu, void *sem_arg)
4527 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4528 const IDESC * UNUSED idesc = abuf->idesc;
4530 IADDR UNUSED pc = GET_H_PC ();
4531 CGEN_INSN_INT insn = abuf->insn;
4532 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4533 EXTRACT_IFMT_TA_IMM_CODE
4536 int UNUSED insn_referenced = abuf->written;
4537 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4543 model_sparc64_def_bvs (SIM_CPU *current_cpu, void *sem_arg)
4545 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4546 const IDESC * UNUSED idesc = abuf->idesc;
4548 IADDR UNUSED pc = GET_H_PC ();
4549 CGEN_INSN_INT insn = abuf->insn;
4550 EXTRACT_IFMT_BA_VARS /* f-disp22 f-op2 f-fmt2-cond f-a f-op */
4552 EXTRACT_IFMT_BA_CODE
4553 i_disp22 = f_disp22;
4556 int UNUSED insn_referenced = abuf->written;
4557 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4563 model_sparc64_def_tvs (SIM_CPU *current_cpu, void *sem_arg)
4565 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4566 const IDESC * UNUSED idesc = abuf->idesc;
4568 IADDR UNUSED pc = GET_H_PC ();
4569 CGEN_INSN_INT insn = abuf->insn;
4570 EXTRACT_IFMT_TA_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4571 EXTRACT_IFMT_TA_CODE
4574 int UNUSED insn_referenced = abuf->written;
4575 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4581 model_sparc64_def_tvs_imm (SIM_CPU *current_cpu, void *sem_arg)
4583 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4584 const IDESC * UNUSED idesc = abuf->idesc;
4586 IADDR UNUSED pc = GET_H_PC ();
4587 CGEN_INSN_INT insn = abuf->insn;
4588 EXTRACT_IFMT_TA_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-fmt2-cond f-a f-op */
4589 EXTRACT_IFMT_TA_IMM_CODE
4592 int UNUSED insn_referenced = abuf->written;
4593 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4599 model_sparc64_def_ldstub_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
4601 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4602 const IDESC * UNUSED idesc = abuf->idesc;
4604 IADDR UNUSED pc = GET_H_PC ();
4605 CGEN_INSN_INT insn = abuf->insn;
4606 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4607 EXTRACT_IFMT_LDSB_REG_REG_CODE
4610 int UNUSED insn_referenced = abuf->written;
4611 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4617 model_sparc64_def_ldstub_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
4619 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4620 const IDESC * UNUSED idesc = abuf->idesc;
4622 IADDR UNUSED pc = GET_H_PC ();
4623 CGEN_INSN_INT insn = abuf->insn;
4624 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4625 EXTRACT_IFMT_LDSB_REG_IMM_CODE
4628 int UNUSED insn_referenced = abuf->written;
4629 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4635 model_sparc64_def_ldstub_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
4637 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4638 const IDESC * UNUSED idesc = abuf->idesc;
4640 IADDR UNUSED pc = GET_H_PC ();
4641 CGEN_INSN_INT insn = abuf->insn;
4642 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
4643 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
4646 int UNUSED insn_referenced = abuf->written;
4647 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4653 model_sparc64_def_swap_reg_reg (SIM_CPU *current_cpu, void *sem_arg)
4655 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4656 const IDESC * UNUSED idesc = abuf->idesc;
4658 IADDR UNUSED pc = GET_H_PC ();
4659 CGEN_INSN_INT insn = abuf->insn;
4660 EXTRACT_IFMT_LDSB_REG_REG_VARS /* f-rs2 f-res-asi f-i f-rs1 f-op3 f-rd f-op */
4661 EXTRACT_IFMT_LDSB_REG_REG_CODE
4664 int UNUSED insn_referenced = abuf->written;
4665 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4671 model_sparc64_def_swap_reg_imm (SIM_CPU *current_cpu, void *sem_arg)
4673 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4674 const IDESC * UNUSED idesc = abuf->idesc;
4676 IADDR UNUSED pc = GET_H_PC ();
4677 CGEN_INSN_INT insn = abuf->insn;
4678 EXTRACT_IFMT_LDSB_REG_IMM_VARS /* f-simm13 f-i f-rs1 f-op3 f-rd f-op */
4679 EXTRACT_IFMT_LDSB_REG_IMM_CODE
4682 int UNUSED insn_referenced = abuf->written;
4683 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4689 model_sparc64_def_swap_reg_reg_asi (SIM_CPU *current_cpu, void *sem_arg)
4691 const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
4692 const IDESC * UNUSED idesc = abuf->idesc;
4694 IADDR UNUSED pc = GET_H_PC ();
4695 CGEN_INSN_INT insn = abuf->insn;
4696 EXTRACT_IFMT_LDSB_REG_REG_ASI_VARS /* f-rs2 f-asi f-i f-rs1 f-op3 f-rd f-op */
4697 EXTRACT_IFMT_LDSB_REG_REG_ASI_CODE
4700 int UNUSED insn_referenced = abuf->written;
4701 cycles += sparc64_model_sparc64_def_u_exec (current_cpu, idesc, 0, referenced);
4706 /* We assume UNIT_NONE == 0 because the tables don't always terminate
4709 /* Model timing data for `sparc64-def'. */
4711 static const INSN_TIMING sparc64_def_timing[] = {
4712 { SPARC64_INSN_X_INVALID, 0, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4713 { SPARC64_INSN_X_AFTER, 0, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4714 { SPARC64_INSN_X_BEFORE, 0, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4715 { SPARC64_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4716 { SPARC64_INSN_X_CHAIN, 0, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4717 { SPARC64_INSN_X_BEGIN, 0, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4718 { SPARC64_INSN_BEQZ, model_sparc64_def_beqz, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4719 { SPARC64_INSN_BGEZ, model_sparc64_def_bgez, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4720 { SPARC64_INSN_BGTZ, model_sparc64_def_bgtz, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4721 { SPARC64_INSN_BLEZ, model_sparc64_def_blez, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4722 { SPARC64_INSN_BLTZ, model_sparc64_def_bltz, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4723 { SPARC64_INSN_BNEZ, model_sparc64_def_bnez, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4724 { SPARC64_INSN_BPCC_BA, model_sparc64_def_bpcc_ba, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4725 { SPARC64_INSN_BPCC_BN, model_sparc64_def_bpcc_bn, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4726 { SPARC64_INSN_BPCC_BNE, model_sparc64_def_bpcc_bne, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4727 { SPARC64_INSN_BPCC_BE, model_sparc64_def_bpcc_be, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4728 { SPARC64_INSN_BPCC_BG, model_sparc64_def_bpcc_bg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4729 { SPARC64_INSN_BPCC_BLE, model_sparc64_def_bpcc_ble, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4730 { SPARC64_INSN_BPCC_BGE, model_sparc64_def_bpcc_bge, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4731 { SPARC64_INSN_BPCC_BL, model_sparc64_def_bpcc_bl, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4732 { SPARC64_INSN_BPCC_BGU, model_sparc64_def_bpcc_bgu, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4733 { SPARC64_INSN_BPCC_BLEU, model_sparc64_def_bpcc_bleu, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4734 { SPARC64_INSN_BPCC_BCC, model_sparc64_def_bpcc_bcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4735 { SPARC64_INSN_BPCC_BCS, model_sparc64_def_bpcc_bcs, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4736 { SPARC64_INSN_BPCC_BPOS, model_sparc64_def_bpcc_bpos, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4737 { SPARC64_INSN_BPCC_BNEG, model_sparc64_def_bpcc_bneg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4738 { SPARC64_INSN_BPCC_BVC, model_sparc64_def_bpcc_bvc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4739 { SPARC64_INSN_BPCC_BVS, model_sparc64_def_bpcc_bvs, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4740 { SPARC64_INSN_DONE, model_sparc64_def_done, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4741 { SPARC64_INSN_RETRY, model_sparc64_def_retry, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4742 { SPARC64_INSN_FLUSH, model_sparc64_def_flush, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4743 { SPARC64_INSN_FLUSH_IMM, model_sparc64_def_flush_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4744 { SPARC64_INSN_FLUSHW, model_sparc64_def_flushw, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4745 { SPARC64_INSN_IMPDEP1, model_sparc64_def_impdep1, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4746 { SPARC64_INSN_IMPDEP2, model_sparc64_def_impdep2, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4747 { SPARC64_INSN_MEMBAR, model_sparc64_def_membar, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4748 { SPARC64_INSN_MOVA_ICC_ICC, model_sparc64_def_mova_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4749 { SPARC64_INSN_MOVA_IMM_ICC_ICC, model_sparc64_def_mova_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4750 { SPARC64_INSN_MOVA_XCC_XCC, model_sparc64_def_mova_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4751 { SPARC64_INSN_MOVA_IMM_XCC_XCC, model_sparc64_def_mova_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4752 { SPARC64_INSN_MOVN_ICC_ICC, model_sparc64_def_movn_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4753 { SPARC64_INSN_MOVN_IMM_ICC_ICC, model_sparc64_def_movn_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4754 { SPARC64_INSN_MOVN_XCC_XCC, model_sparc64_def_movn_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4755 { SPARC64_INSN_MOVN_IMM_XCC_XCC, model_sparc64_def_movn_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4756 { SPARC64_INSN_MOVNE_ICC_ICC, model_sparc64_def_movne_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4757 { SPARC64_INSN_MOVNE_IMM_ICC_ICC, model_sparc64_def_movne_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4758 { SPARC64_INSN_MOVNE_XCC_XCC, model_sparc64_def_movne_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4759 { SPARC64_INSN_MOVNE_IMM_XCC_XCC, model_sparc64_def_movne_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4760 { SPARC64_INSN_MOVE_ICC_ICC, model_sparc64_def_move_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4761 { SPARC64_INSN_MOVE_IMM_ICC_ICC, model_sparc64_def_move_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4762 { SPARC64_INSN_MOVE_XCC_XCC, model_sparc64_def_move_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4763 { SPARC64_INSN_MOVE_IMM_XCC_XCC, model_sparc64_def_move_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4764 { SPARC64_INSN_MOVG_ICC_ICC, model_sparc64_def_movg_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4765 { SPARC64_INSN_MOVG_IMM_ICC_ICC, model_sparc64_def_movg_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4766 { SPARC64_INSN_MOVG_XCC_XCC, model_sparc64_def_movg_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4767 { SPARC64_INSN_MOVG_IMM_XCC_XCC, model_sparc64_def_movg_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4768 { SPARC64_INSN_MOVLE_ICC_ICC, model_sparc64_def_movle_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4769 { SPARC64_INSN_MOVLE_IMM_ICC_ICC, model_sparc64_def_movle_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4770 { SPARC64_INSN_MOVLE_XCC_XCC, model_sparc64_def_movle_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4771 { SPARC64_INSN_MOVLE_IMM_XCC_XCC, model_sparc64_def_movle_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4772 { SPARC64_INSN_MOVGE_ICC_ICC, model_sparc64_def_movge_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4773 { SPARC64_INSN_MOVGE_IMM_ICC_ICC, model_sparc64_def_movge_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4774 { SPARC64_INSN_MOVGE_XCC_XCC, model_sparc64_def_movge_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4775 { SPARC64_INSN_MOVGE_IMM_XCC_XCC, model_sparc64_def_movge_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4776 { SPARC64_INSN_MOVL_ICC_ICC, model_sparc64_def_movl_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4777 { SPARC64_INSN_MOVL_IMM_ICC_ICC, model_sparc64_def_movl_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4778 { SPARC64_INSN_MOVL_XCC_XCC, model_sparc64_def_movl_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4779 { SPARC64_INSN_MOVL_IMM_XCC_XCC, model_sparc64_def_movl_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4780 { SPARC64_INSN_MOVGU_ICC_ICC, model_sparc64_def_movgu_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4781 { SPARC64_INSN_MOVGU_IMM_ICC_ICC, model_sparc64_def_movgu_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4782 { SPARC64_INSN_MOVGU_XCC_XCC, model_sparc64_def_movgu_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4783 { SPARC64_INSN_MOVGU_IMM_XCC_XCC, model_sparc64_def_movgu_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4784 { SPARC64_INSN_MOVLEU_ICC_ICC, model_sparc64_def_movleu_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4785 { SPARC64_INSN_MOVLEU_IMM_ICC_ICC, model_sparc64_def_movleu_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4786 { SPARC64_INSN_MOVLEU_XCC_XCC, model_sparc64_def_movleu_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4787 { SPARC64_INSN_MOVLEU_IMM_XCC_XCC, model_sparc64_def_movleu_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4788 { SPARC64_INSN_MOVCC_ICC_ICC, model_sparc64_def_movcc_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4789 { SPARC64_INSN_MOVCC_IMM_ICC_ICC, model_sparc64_def_movcc_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4790 { SPARC64_INSN_MOVCC_XCC_XCC, model_sparc64_def_movcc_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4791 { SPARC64_INSN_MOVCC_IMM_XCC_XCC, model_sparc64_def_movcc_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4792 { SPARC64_INSN_MOVCS_ICC_ICC, model_sparc64_def_movcs_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4793 { SPARC64_INSN_MOVCS_IMM_ICC_ICC, model_sparc64_def_movcs_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4794 { SPARC64_INSN_MOVCS_XCC_XCC, model_sparc64_def_movcs_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4795 { SPARC64_INSN_MOVCS_IMM_XCC_XCC, model_sparc64_def_movcs_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4796 { SPARC64_INSN_MOVPOS_ICC_ICC, model_sparc64_def_movpos_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4797 { SPARC64_INSN_MOVPOS_IMM_ICC_ICC, model_sparc64_def_movpos_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4798 { SPARC64_INSN_MOVPOS_XCC_XCC, model_sparc64_def_movpos_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4799 { SPARC64_INSN_MOVPOS_IMM_XCC_XCC, model_sparc64_def_movpos_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4800 { SPARC64_INSN_MOVNEG_ICC_ICC, model_sparc64_def_movneg_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4801 { SPARC64_INSN_MOVNEG_IMM_ICC_ICC, model_sparc64_def_movneg_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4802 { SPARC64_INSN_MOVNEG_XCC_XCC, model_sparc64_def_movneg_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4803 { SPARC64_INSN_MOVNEG_IMM_XCC_XCC, model_sparc64_def_movneg_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4804 { SPARC64_INSN_MOVVC_ICC_ICC, model_sparc64_def_movvc_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4805 { SPARC64_INSN_MOVVC_IMM_ICC_ICC, model_sparc64_def_movvc_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4806 { SPARC64_INSN_MOVVC_XCC_XCC, model_sparc64_def_movvc_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4807 { SPARC64_INSN_MOVVC_IMM_XCC_XCC, model_sparc64_def_movvc_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4808 { SPARC64_INSN_MOVVS_ICC_ICC, model_sparc64_def_movvs_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4809 { SPARC64_INSN_MOVVS_IMM_ICC_ICC, model_sparc64_def_movvs_imm_icc_icc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4810 { SPARC64_INSN_MOVVS_XCC_XCC, model_sparc64_def_movvs_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4811 { SPARC64_INSN_MOVVS_IMM_XCC_XCC, model_sparc64_def_movvs_imm_xcc_xcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4812 { SPARC64_INSN_LDSB_REG_REG, model_sparc64_def_ldsb_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4813 { SPARC64_INSN_LDSB_REG_IMM, model_sparc64_def_ldsb_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4814 { SPARC64_INSN_LDSB_REG_REG_ASI, model_sparc64_def_ldsb_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4815 { SPARC64_INSN_LDUB_REG_REG, model_sparc64_def_ldub_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4816 { SPARC64_INSN_LDUB_REG_IMM, model_sparc64_def_ldub_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4817 { SPARC64_INSN_LDUB_REG_REG_ASI, model_sparc64_def_ldub_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4818 { SPARC64_INSN_LDSH_REG_REG, model_sparc64_def_ldsh_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4819 { SPARC64_INSN_LDSH_REG_IMM, model_sparc64_def_ldsh_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4820 { SPARC64_INSN_LDSH_REG_REG_ASI, model_sparc64_def_ldsh_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4821 { SPARC64_INSN_LDUH_REG_REG, model_sparc64_def_lduh_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4822 { SPARC64_INSN_LDUH_REG_IMM, model_sparc64_def_lduh_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4823 { SPARC64_INSN_LDUH_REG_REG_ASI, model_sparc64_def_lduh_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4824 { SPARC64_INSN_LDSW_REG_REG, model_sparc64_def_ldsw_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4825 { SPARC64_INSN_LDSW_REG_IMM, model_sparc64_def_ldsw_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4826 { SPARC64_INSN_LDSW_REG_REG_ASI, model_sparc64_def_ldsw_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4827 { SPARC64_INSN_LDUW_REG_REG, model_sparc64_def_lduw_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4828 { SPARC64_INSN_LDUW_REG_IMM, model_sparc64_def_lduw_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4829 { SPARC64_INSN_LDUW_REG_REG_ASI, model_sparc64_def_lduw_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4830 { SPARC64_INSN_LDX_REG_REG, model_sparc64_def_ldx_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4831 { SPARC64_INSN_LDX_REG_IMM, model_sparc64_def_ldx_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4832 { SPARC64_INSN_LDX_REG_REG_ASI, model_sparc64_def_ldx_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4833 { SPARC64_INSN_LDD_REG_REG, model_sparc64_def_ldd_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4834 { SPARC64_INSN_LDD_REG_IMM, model_sparc64_def_ldd_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4835 { SPARC64_INSN_LDD_REG_REG_ASI, model_sparc64_def_ldd_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4836 { SPARC64_INSN_STB_REG_REG, model_sparc64_def_stb_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4837 { SPARC64_INSN_STB_REG_IMM, model_sparc64_def_stb_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4838 { SPARC64_INSN_STB_REG_REG_ASI, model_sparc64_def_stb_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4839 { SPARC64_INSN_STH_REG_REG, model_sparc64_def_sth_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4840 { SPARC64_INSN_STH_REG_IMM, model_sparc64_def_sth_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4841 { SPARC64_INSN_STH_REG_REG_ASI, model_sparc64_def_sth_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4842 { SPARC64_INSN_ST_REG_REG, model_sparc64_def_st_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4843 { SPARC64_INSN_ST_REG_IMM, model_sparc64_def_st_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4844 { SPARC64_INSN_ST_REG_REG_ASI, model_sparc64_def_st_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4845 { SPARC64_INSN_STX_REG_REG, model_sparc64_def_stx_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4846 { SPARC64_INSN_STX_REG_IMM, model_sparc64_def_stx_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4847 { SPARC64_INSN_STX_REG_REG_ASI, model_sparc64_def_stx_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4848 { SPARC64_INSN_STD_REG_REG, model_sparc64_def_std_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4849 { SPARC64_INSN_STD_REG_IMM, model_sparc64_def_std_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4850 { SPARC64_INSN_STD_REG_REG_ASI, model_sparc64_def_std_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4851 { SPARC64_INSN_FP_LD_REG_REG, model_sparc64_def_fp_ld_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4852 { SPARC64_INSN_FP_LD_REG_IMM, model_sparc64_def_fp_ld_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4853 { SPARC64_INSN_FP_LD_REG_REG_ASI, model_sparc64_def_fp_ld_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4854 { SPARC64_INSN_SETHI, model_sparc64_def_sethi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4855 { SPARC64_INSN_ADD, model_sparc64_def_add, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4856 { SPARC64_INSN_ADD_IMM, model_sparc64_def_add_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4857 { SPARC64_INSN_SUB, model_sparc64_def_sub, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4858 { SPARC64_INSN_SUB_IMM, model_sparc64_def_sub_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4859 { SPARC64_INSN_ADDCC, model_sparc64_def_addcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4860 { SPARC64_INSN_ADDCC_IMM, model_sparc64_def_addcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4861 { SPARC64_INSN_SUBCC, model_sparc64_def_subcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4862 { SPARC64_INSN_SUBCC_IMM, model_sparc64_def_subcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4863 { SPARC64_INSN_ADDC, model_sparc64_def_addc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4864 { SPARC64_INSN_ADDC_IMM, model_sparc64_def_addc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4865 { SPARC64_INSN_SUBC, model_sparc64_def_subc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4866 { SPARC64_INSN_SUBC_IMM, model_sparc64_def_subc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4867 { SPARC64_INSN_ADDCCC, model_sparc64_def_addccc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4868 { SPARC64_INSN_ADDCCC_IMM, model_sparc64_def_addccc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4869 { SPARC64_INSN_SUBCCC, model_sparc64_def_subccc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4870 { SPARC64_INSN_SUBCCC_IMM, model_sparc64_def_subccc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4871 { SPARC64_INSN_AND, model_sparc64_def_and, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4872 { SPARC64_INSN_AND_IMM, model_sparc64_def_and_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4873 { SPARC64_INSN_ANDCC, model_sparc64_def_andcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4874 { SPARC64_INSN_ANDCC_IMM, model_sparc64_def_andcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4875 { SPARC64_INSN_OR, model_sparc64_def_or, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4876 { SPARC64_INSN_OR_IMM, model_sparc64_def_or_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4877 { SPARC64_INSN_ORCC, model_sparc64_def_orcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4878 { SPARC64_INSN_ORCC_IMM, model_sparc64_def_orcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4879 { SPARC64_INSN_XOR, model_sparc64_def_xor, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4880 { SPARC64_INSN_XOR_IMM, model_sparc64_def_xor_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4881 { SPARC64_INSN_XORCC, model_sparc64_def_xorcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4882 { SPARC64_INSN_XORCC_IMM, model_sparc64_def_xorcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4883 { SPARC64_INSN_ANDN, model_sparc64_def_andn, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4884 { SPARC64_INSN_ANDN_IMM, model_sparc64_def_andn_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4885 { SPARC64_INSN_ANDNCC, model_sparc64_def_andncc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4886 { SPARC64_INSN_ANDNCC_IMM, model_sparc64_def_andncc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4887 { SPARC64_INSN_ORN, model_sparc64_def_orn, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4888 { SPARC64_INSN_ORN_IMM, model_sparc64_def_orn_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4889 { SPARC64_INSN_ORNCC, model_sparc64_def_orncc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4890 { SPARC64_INSN_ORNCC_IMM, model_sparc64_def_orncc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4891 { SPARC64_INSN_XNOR, model_sparc64_def_xnor, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4892 { SPARC64_INSN_XNOR_IMM, model_sparc64_def_xnor_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4893 { SPARC64_INSN_XNORCC, model_sparc64_def_xnorcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4894 { SPARC64_INSN_XNORCC_IMM, model_sparc64_def_xnorcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4895 { SPARC64_INSN_SLL, model_sparc64_def_sll, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4896 { SPARC64_INSN_SLL_IMM, model_sparc64_def_sll_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4897 { SPARC64_INSN_SRL, model_sparc64_def_srl, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4898 { SPARC64_INSN_SRL_IMM, model_sparc64_def_srl_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4899 { SPARC64_INSN_SRA, model_sparc64_def_sra, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4900 { SPARC64_INSN_SRA_IMM, model_sparc64_def_sra_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4901 { SPARC64_INSN_SMUL, model_sparc64_def_smul, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4902 { SPARC64_INSN_SMUL_IMM, model_sparc64_def_smul_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4903 { SPARC64_INSN_SMUL_CC, model_sparc64_def_smul_cc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4904 { SPARC64_INSN_SMUL_CC_IMM, model_sparc64_def_smul_cc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4905 { SPARC64_INSN_UMUL, model_sparc64_def_umul, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4906 { SPARC64_INSN_UMUL_IMM, model_sparc64_def_umul_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4907 { SPARC64_INSN_UMUL_CC, model_sparc64_def_umul_cc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4908 { SPARC64_INSN_UMUL_CC_IMM, model_sparc64_def_umul_cc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4909 { SPARC64_INSN_MULSCC, model_sparc64_def_mulscc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4910 { SPARC64_INSN_SAVE, model_sparc64_def_save, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4911 { SPARC64_INSN_SAVE_IMM, model_sparc64_def_save_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4912 { SPARC64_INSN_RESTORE, model_sparc64_def_restore, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4913 { SPARC64_INSN_RESTORE_IMM, model_sparc64_def_restore_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4914 { SPARC64_INSN_RETT, model_sparc64_def_rett, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4915 { SPARC64_INSN_RETT_IMM, model_sparc64_def_rett_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4916 { SPARC64_INSN_UNIMP, model_sparc64_def_unimp, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4917 { SPARC64_INSN_CALL, model_sparc64_def_call, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4918 { SPARC64_INSN_JMPL, model_sparc64_def_jmpl, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4919 { SPARC64_INSN_JMPL_IMM, model_sparc64_def_jmpl_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4920 { SPARC64_INSN_BA, model_sparc64_def_ba, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4921 { SPARC64_INSN_TA, model_sparc64_def_ta, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4922 { SPARC64_INSN_TA_IMM, model_sparc64_def_ta_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4923 { SPARC64_INSN_BN, model_sparc64_def_bn, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4924 { SPARC64_INSN_TN, model_sparc64_def_tn, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4925 { SPARC64_INSN_TN_IMM, model_sparc64_def_tn_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4926 { SPARC64_INSN_BNE, model_sparc64_def_bne, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4927 { SPARC64_INSN_TNE, model_sparc64_def_tne, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4928 { SPARC64_INSN_TNE_IMM, model_sparc64_def_tne_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4929 { SPARC64_INSN_BE, model_sparc64_def_be, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4930 { SPARC64_INSN_TE, model_sparc64_def_te, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4931 { SPARC64_INSN_TE_IMM, model_sparc64_def_te_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4932 { SPARC64_INSN_BG, model_sparc64_def_bg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4933 { SPARC64_INSN_TG, model_sparc64_def_tg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4934 { SPARC64_INSN_TG_IMM, model_sparc64_def_tg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4935 { SPARC64_INSN_BLE, model_sparc64_def_ble, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4936 { SPARC64_INSN_TLE, model_sparc64_def_tle, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4937 { SPARC64_INSN_TLE_IMM, model_sparc64_def_tle_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4938 { SPARC64_INSN_BGE, model_sparc64_def_bge, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4939 { SPARC64_INSN_TGE, model_sparc64_def_tge, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4940 { SPARC64_INSN_TGE_IMM, model_sparc64_def_tge_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4941 { SPARC64_INSN_BL, model_sparc64_def_bl, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4942 { SPARC64_INSN_TL, model_sparc64_def_tl, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4943 { SPARC64_INSN_TL_IMM, model_sparc64_def_tl_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4944 { SPARC64_INSN_BGU, model_sparc64_def_bgu, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4945 { SPARC64_INSN_TGU, model_sparc64_def_tgu, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4946 { SPARC64_INSN_TGU_IMM, model_sparc64_def_tgu_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4947 { SPARC64_INSN_BLEU, model_sparc64_def_bleu, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4948 { SPARC64_INSN_TLEU, model_sparc64_def_tleu, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4949 { SPARC64_INSN_TLEU_IMM, model_sparc64_def_tleu_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4950 { SPARC64_INSN_BCC, model_sparc64_def_bcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4951 { SPARC64_INSN_TCC, model_sparc64_def_tcc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4952 { SPARC64_INSN_TCC_IMM, model_sparc64_def_tcc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4953 { SPARC64_INSN_BCS, model_sparc64_def_bcs, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4954 { SPARC64_INSN_TCS, model_sparc64_def_tcs, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4955 { SPARC64_INSN_TCS_IMM, model_sparc64_def_tcs_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4956 { SPARC64_INSN_BPOS, model_sparc64_def_bpos, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4957 { SPARC64_INSN_TPOS, model_sparc64_def_tpos, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4958 { SPARC64_INSN_TPOS_IMM, model_sparc64_def_tpos_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4959 { SPARC64_INSN_BNEG, model_sparc64_def_bneg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4960 { SPARC64_INSN_TNEG, model_sparc64_def_tneg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4961 { SPARC64_INSN_TNEG_IMM, model_sparc64_def_tneg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4962 { SPARC64_INSN_BVC, model_sparc64_def_bvc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4963 { SPARC64_INSN_TVC, model_sparc64_def_tvc, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4964 { SPARC64_INSN_TVC_IMM, model_sparc64_def_tvc_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4965 { SPARC64_INSN_BVS, model_sparc64_def_bvs, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4966 { SPARC64_INSN_TVS, model_sparc64_def_tvs, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4967 { SPARC64_INSN_TVS_IMM, model_sparc64_def_tvs_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4968 { SPARC64_INSN_LDSTUB_REG_REG, model_sparc64_def_ldstub_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4969 { SPARC64_INSN_LDSTUB_REG_IMM, model_sparc64_def_ldstub_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4970 { SPARC64_INSN_LDSTUB_REG_REG_ASI, model_sparc64_def_ldstub_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4971 { SPARC64_INSN_SWAP_REG_REG, model_sparc64_def_swap_reg_reg, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4972 { SPARC64_INSN_SWAP_REG_IMM, model_sparc64_def_swap_reg_imm, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4973 { SPARC64_INSN_SWAP_REG_REG_ASI, model_sparc64_def_swap_reg_reg_asi, { { (int) UNIT_SPARC64_DEF_U_EXEC, 1, 1 } } },
4976 #endif /* WITH_PROFILE_MODEL_P */
4979 sparc64_def_model_init (SIM_CPU *cpu)
4981 CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_SPARC64_DEF_DATA));
4984 #if WITH_PROFILE_MODEL_P
4985 #define TIMING_DATA(td) td
4987 #define TIMING_DATA(td) 0
4990 static const MODEL sparc_v9_models[] =
4992 { "sparc64-def", & sparc_v9_mach, MODEL_SPARC64_DEF, TIMING_DATA (& sparc64_def_timing[0]), sparc64_def_model_init },
4996 /* The properties of this cpu's implementation. */
4998 static const MACH_IMP_PROPERTIES sparc64_imp_properties =
5010 sparc64_prepare_run (SIM_CPU *cpu)
5012 if (CPU_IDESC (cpu) == NULL)
5013 sparc64_init_idesc_table (cpu);
5016 static const CGEN_INSN *
5017 sparc64_get_idata (SIM_CPU *cpu, int inum)
5019 return CPU_IDESC (cpu) [inum].idata;
5023 sparc_v9_init_cpu (SIM_CPU *cpu)
5025 CPU_REG_FETCH (cpu) = sparc64_fetch_register;
5026 CPU_REG_STORE (cpu) = sparc64_store_register;
5027 CPU_PC_FETCH (cpu) = sparc64_h_pc_get;
5028 CPU_PC_STORE (cpu) = sparc64_h_pc_set;
5029 CPU_GET_IDATA (cpu) = sparc64_get_idata;
5030 CPU_MAX_INSNS (cpu) = SPARC64_INSN_MAX;
5031 CPU_INSN_NAME (cpu) = cgen_insn_name;
5032 CPU_FULL_ENGINE_FN (cpu) = sparc64_engine_run_full;
5034 CPU_FAST_ENGINE_FN (cpu) = sparc64_engine_run_fast;
5036 CPU_FAST_ENGINE_FN (cpu) = sparc64_engine_run_full;
5040 const MACH sparc_v9_mach =
5042 "sparc-v9", "sparc_v9",
5043 64, 64, & sparc_v9_models[0], & sparc64_imp_properties,