1 /* cpu.c --- CPU for RL78 simulator.
3 Copyright (C) 2011-2017 Free Software Foundation, Inc.
4 Contributed by Red Hat, Inc.
6 This file is part of the GNU simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>.
27 #include "opcode/rl78.h"
34 int timer_enabled = 2;
35 int rl78_g10_mode = 0;
39 #define REGISTER_ADDRESS 0xffee0
52 static void trace_register_init ();
54 /* This maps PSW to a pointer into memory[] */
55 static RegBank *regbase_table[256];
57 #define regbase regbase_table[memory[RL78_SFR_PSW]]
59 #define REG(r) ((regbase)->r)
68 memset (memory+REGISTER_ADDRESS, 0x11, 8 * 4);
69 memory[RL78_SFR_PSW] = 0x06;
70 memory[RL78_SFR_ES] = 0x0f;
71 memory[RL78_SFR_CS] = 0x00;
72 memory[RL78_SFR_PMC] = 0x00;
74 for (i = 0; i < 256; i ++)
76 int rb0 = (i & RL78_PSW_RBS0) ? 1 : 0;
77 int rb1 = (i & RL78_PSW_RBS1) ? 2 : 0;
79 regbase_table[i] = (RegBank *)(memory + (3 - rb) * 8 + REGISTER_ADDRESS);
82 trace_register_init ();
84 /* This means "by default" */
89 get_reg (RL78_Register regno)
94 /* Conditionals do this. */
99 case RL78_Reg_X: return REG (x);
100 case RL78_Reg_A: return REG (a);
101 case RL78_Reg_C: return REG (c);
102 case RL78_Reg_B: return REG (b);
103 case RL78_Reg_E: return REG (e);
104 case RL78_Reg_D: return REG (d);
105 case RL78_Reg_L: return REG (l);
106 case RL78_Reg_H: return REG (h);
107 case RL78_Reg_AX: return REG (a) * 256 + REG (x);
108 case RL78_Reg_BC: return REG (b) * 256 + REG (c);
109 case RL78_Reg_DE: return REG (d) * 256 + REG (e);
110 case RL78_Reg_HL: return REG (h) * 256 + REG (l);
111 case RL78_Reg_SP: return memory[RL78_SFR_SP] + 256 * memory[RL78_SFR_SP+1];
112 case RL78_Reg_PSW: return memory[RL78_SFR_PSW];
113 case RL78_Reg_CS: return memory[RL78_SFR_CS];
114 case RL78_Reg_ES: return memory[RL78_SFR_ES];
115 case RL78_Reg_PMC: return memory[RL78_SFR_PMC];
116 case RL78_Reg_MEM: return memory[RL78_SFR_MEM];
120 extern unsigned char initted[];
123 set_reg (RL78_Register regno, SI val)
129 case RL78_Reg_X: REG (x) = val; break;
130 case RL78_Reg_A: REG (a) = val; break;
131 case RL78_Reg_C: REG (c) = val; break;
132 case RL78_Reg_B: REG (b) = val; break;
133 case RL78_Reg_E: REG (e) = val; break;
134 case RL78_Reg_D: REG (d) = val; break;
135 case RL78_Reg_L: REG (l) = val; break;
136 case RL78_Reg_H: REG (h) = val; break;
139 REG (x) = val & 0xff;
143 REG (c) = val & 0xff;
147 REG (e) = val & 0xff;
151 REG (l) = val & 0xff;
156 printf ("Warning: SP value 0x%04x truncated at pc=0x%05x\n", val, pc);
160 int old_sp = get_reg (RL78_Reg_SP);
164 for (i = val; i < old_sp; i ++)
165 initted[i + 0xf0000] = 0;
168 memory[RL78_SFR_SP] = val & 0xff;
169 memory[RL78_SFR_SP + 1] = val >> 8;
171 case RL78_Reg_PSW: memory[RL78_SFR_PSW] = val; break;
172 case RL78_Reg_CS: memory[RL78_SFR_CS] = val; break;
173 case RL78_Reg_ES: memory[RL78_SFR_ES] = val; break;
174 case RL78_Reg_PMC: memory[RL78_SFR_PMC] = val; break;
175 case RL78_Reg_MEM: memory[RL78_SFR_MEM] = val; break;
181 condition_true (RL78_Condition cond_id, int val)
183 int psw = get_reg (RL78_Reg_PSW);
184 int z = (psw & RL78_PSW_Z) ? 1 : 0;
185 int cy = (psw & RL78_PSW_CY) ? 1 : 0;
189 case RL78_Condition_T:
191 case RL78_Condition_F:
193 case RL78_Condition_C:
195 case RL78_Condition_NC:
197 case RL78_Condition_H:
199 case RL78_Condition_NH:
201 case RL78_Condition_Z:
203 case RL78_Condition_NZ:
237 const char *comma = "";
244 #define PSW1(bit, name) if (psw & bit) { strcat (buf, comma); strcat (buf, name); comma = ","; }
245 PSW1 (RL78_PSW_IE, "ie");
246 PSW1 (RL78_PSW_Z, "z");
247 PSW1 (RL78_PSW_RBS1, "r1");
248 PSW1 (RL78_PSW_AC, "ac");
249 PSW1 (RL78_PSW_RBS0, "r0");
250 PSW1 (RL78_PSW_ISP1, "i1");
251 PSW1 (RL78_PSW_ISP0, "i0");
252 PSW1 (RL78_PSW_CY, "cy");
258 static unsigned char old_regs[32];
262 int trace_register_words;
265 trace_register_changes (void)
273 #define TB(name,nv,ov) if (nv != ov) { printf ("%s: \033[31m%02x \033[32m%02x\033[0m ", name, ov, nv); ov = nv; any = 1; }
274 #define TW(name,nv,ov) if (nv != ov) { printf ("%s: \033[31m%04x \033[32m%04x\033[0m ", name, ov, nv); ov = nv; any = 1; }
276 if (trace_register_words)
278 #define TRW(name, idx) TW (name, memory[REGISTER_ADDRESS + (idx)], old_regs[idx])
279 for (i = 0; i < 32; i += 2)
285 case 0: strcpy (buf, "AX"); break;
286 case 2: strcpy (buf, "BC"); break;
287 case 4: strcpy (buf, "DE"); break;
288 case 6: strcpy (buf, "HL"); break;
289 default: sprintf (buf, "r%d", i); break;
291 a = REGISTER_ADDRESS + (i ^ 0x18);
292 o = old_regs[i ^ 0x18] + old_regs[(i ^ 0x18) + 1] * 256;
293 n = memory[a] + memory[a + 1] * 256;
295 old_regs[i ^ 0x18] = n;
296 old_regs[(i ^ 0x18) + 1] = n >> 8;
301 for (i = 0; i < 32; i ++)
306 buf[0] = "XACBEDLH"[i];
310 sprintf (buf, "r%d", i);
311 #define TRB(name, idx) TB (name, memory[REGISTER_ADDRESS + (idx)], old_regs[idx])
315 if (memory[RL78_SFR_PSW] != old_psw)
317 printf ("PSW: \033[31m");
318 psw_string (old_psw);
319 printf (" \033[32m");
320 psw_string (memory[RL78_SFR_PSW]);
322 old_psw = memory[RL78_SFR_PSW];
325 TW ("SP", mem_get_hi (RL78_SFR_SP), old_sp);
331 trace_register_init (void)
333 memcpy (old_regs, memory + REGISTER_ADDRESS, 8 * 4);
334 old_psw = memory[RL78_SFR_PSW];
335 old_sp = mem_get_hi (RL78_SFR_SP);