sim/ppc/vm_n.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 2 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, write to the Free Software
  17     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18
  19     */
  20
  21
  22 #ifndef N
  23 #error "N must be #defined"
  24 #endif
  25
  26 /* NOTE: See end of file for #undef */
  27 #define unsigned_N XCONCAT2(unsigned_,N)
  28 #define T2H_N XCONCAT2(T2H_,N)
  29 #define H2T_N XCONCAT2(H2T_,N)
  30 #define vm_data_map_read_N XCONCAT2(vm_data_map_read_,N)
  31 #define vm_data_map_write_N XCONCAT2(vm_data_map_write_,N)
  32
  33
  34 INLINE_VM\
  35 (unsigned_N)
  36 vm_data_map_read_N(vm_data_map *map,
  37                    unsigned_word ea,
  38                    cpu *processor,
  39                    unsigned_word cia)
  40 {
  41   if ((ea & (sizeof(unsigned_N)-1)) == 0) {
  42     unsigned ra = vm_real_data_addr(map, ea, 1/*is-read*/, processor, cia);
  43     unsigned_N val;
  44     if (WITH_XOR_ENDIAN)
  45       ra ^= map->translation.xor[sizeof(unsigned_N) - 1];
  46     val = XCONCAT2(core_map_read_,N)(map->read, ra, processor, cia);
  47     if (WITH_MON & MONITOR_LOAD_STORE_UNIT)
  48       mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
  49     TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
  50                              (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
  51     return val;
  52   }
  53   else {
  54     switch (CURRENT_ALIGNMENT) {
  55     case STRICT_ALIGNMENT:
  56       alignment_interrupt(processor, cia, ea);
  57       return 0;
  58     case NONSTRICT_ALIGNMENT:
  59       {
  60         unsigned_N val;
  61         if (vm_data_map_read_buffer(map, &val, ea, sizeof(unsigned_N), processor, cia)
  62             != sizeof(unsigned_N)) {
  63           cpu_error(processor, cia, "misaligned %d byte read to 0x%lx failed",
  64                     sizeof(unsigned_N), (unsigned long)ea);
  65         }
  66         val = T2H_N(val);
  67         if (WITH_MON & MONITOR_LOAD_STORE_UNIT) {
  68           /* YUCK */
  69           unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
  70           mon_read(ea, ra, sizeof(unsigned_N), processor, cia);
  71         }
  72         TRACE(trace_load_store, ("load cia=0x%lx ea=0x%lx N=%ld data=0x%lx\n",
  73                                  (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
  74         return val;
  75       }
  76     default:
  77       error("internal error - vm_data_map_read_N - bad switch");
  78       return 0;
  79     }
  80   }
  81 }
  82
  83 INLINE_VM\
  84 (void)
  85 vm_data_map_write_N(vm_data_map *map,
  86                     unsigned_word ea,
  87                     unsigned_N val,
  88                     cpu *processor,
  89                     unsigned_word cia)
  90 {
  91   if ((ea & (sizeof(unsigned_N)-1)) == 0) {
  92     unsigned ra = vm_real_data_addr(map, ea, 0/*is-read?*/, processor, cia);
  93     if (WITH_XOR_ENDIAN)
  94       ra ^= map->translation.xor[sizeof(unsigned_N) - 1];
  95     XCONCAT2(core_map_write_,N)(map->write, ra, val, processor, cia);
  96     if (WITH_MON & MONITOR_LOAD_STORE_UNIT)
  97       mon_write(ea, ra, sizeof(unsigned_N), processor, cia);
  98     TRACE(trace_load_store, ("store cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
  99                              (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
 100   }
 101   else {
 102     switch (CURRENT_ALIGNMENT) {
 103     case STRICT_ALIGNMENT:
 104       alignment_interrupt(processor, cia, ea);
 105       break;
 106     case NONSTRICT_ALIGNMENT:
 107       {
 108         unsigned_N data = H2T_N(val);
 109         if (vm_data_map_write_buffer(map, &data, ea, sizeof(unsigned_N), 0, processor, cia)
 110             != sizeof(unsigned_N)) {
 111           cpu_error(processor, cia, "misaligned %d byte write to 0x%lx failed",
 112                     sizeof(unsigned_N), (unsigned long)ea);
 113         }
 114         if (WITH_MON & MONITOR_LOAD_STORE_UNIT) {
 115           /* YUCK */
 116           unsigned ra = vm_real_data_addr(map, ea, 1, processor, cia);
 117           mon_write(ea, ra, sizeof(unsigned_N), processor, cia);
 118         }
 119         TRACE(trace_load_store, ("store cia=0x%lx ea=0x%lx N=%ld val=0x%lx\n",
 120                                  (long)cia, (long)ea, (long)sizeof(unsigned_N), (long)val));
 121       }
 122       break;
 123     default:
 124       error("internal error - vm_data_map_write_N - bad switch");
 125     }
 126   }
 127 }
 128
 129 /* NOTE: see start of file for #define */
 130 #undef unsigned_N
 131 #undef T2H_N
 132 #undef H2T_N
 133 #undef vm_data_map_read_N
 134 #undef vm_data_map_write_N