1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 3 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, see <http://www.gnu.org/licenses/>.
42 /* current instruction address */
43 unsigned_word program_counter;
46 core *physical; /* all of memory */
48 vm_instruction_map *instruction_map; /* instructions */
49 vm_data_map *data_map; /* data */
51 /* the system this processor is contained within */
53 os_emul *os_emulation;
58 /* Current CPU model information */
59 model_data *model_ptr;
61 #if WITH_IDECODE_CACHE_SIZE
62 /* a cache to store cracked instructions */
63 idecode_cache icache[WITH_IDECODE_CACHE_SIZE];
66 /* any interrupt state */
69 /* address reservation: keep the physical address and the contents
70 of memory at that address */
71 memory_reservation reservation;
73 /* offset from event time to this cpu's idea of the local time */
74 signed64 time_base_local_time;
75 signed64 decrementer_local_time;
76 event_entry_tag decrementer_event;
82 cpu_create(psim *system,
85 os_emul *os_emulation,
88 cpu *processor = ZALLOC(cpu);
90 /* create the virtual memory map from the core */
91 processor->physical = memory;
92 processor->virtual = vm_create(memory);
93 processor->instruction_map = vm_create_instruction_map(processor->virtual);
94 processor->data_map = vm_create_data_map(processor->virtual);
96 if (CURRENT_MODEL_ISSUE > 0)
97 processor->model_ptr = model_create (processor);
99 /* link back to core system */
100 processor->system = system;
101 processor->events = psim_event_queue(system);
102 processor->cpu_nr = cpu_nr;
103 processor->monitor = monitor;
104 processor->os_emulation = os_emulation;
112 cpu_init(cpu *processor)
114 memset(&processor->regs, 0, sizeof(processor->regs));
115 /* vm init is delayed until after the device tree has been init as
116 the devices may further init the cpu */
117 if (CURRENT_MODEL_ISSUE > 0)
118 model_init (processor->model_ptr);
122 /* find ones way home */
126 cpu_system(cpu *processor)
128 return processor->system;
133 cpu_nr(cpu *processor)
135 return processor->cpu_nr;
140 cpu_monitor(cpu *processor)
142 return processor->monitor;
147 cpu_os_emulation(cpu *processor)
149 return processor->os_emulation;
154 cpu_model(cpu *processor)
156 return processor->model_ptr;
160 /* program counter manipulation */
164 cpu_set_program_counter(cpu *processor,
165 unsigned_word new_program_counter)
167 processor->program_counter = new_program_counter;
172 cpu_get_program_counter(cpu *processor)
174 return processor->program_counter;
180 cpu_restart(cpu *processor,
183 ASSERT(processor != NULL);
184 cpu_set_program_counter(processor, nia);
185 psim_restart(processor->system, processor->cpu_nr);
190 cpu_halt(cpu *processor,
195 ASSERT(processor != NULL);
196 if (CURRENT_MODEL_ISSUE > 0)
197 model_halt(processor->model_ptr);
198 cpu_set_program_counter(processor, nia);
199 psim_halt(processor->system, processor->cpu_nr, reason, signal);
204 cpu_error(cpu *processor,
212 /* format the message */
214 vsprintf(message, fmt, ap);
218 if (strlen(message) >= sizeof(message))
219 error("cpu_error: buffer overflow");
221 if (processor != NULL) {
222 printf_filtered("cpu %d, cia 0x%lx: %s\n",
223 processor->cpu_nr + 1, (unsigned long)cia, message);
224 cpu_halt(processor, cia, was_signalled, -1);
227 error("cpu: %s", message);
232 /* The processors local concept of time */
236 cpu_get_time_base(cpu *processor)
238 return (event_queue_time(processor->events)
239 - processor->time_base_local_time);
244 cpu_set_time_base(cpu *processor,
247 processor->time_base_local_time = (event_queue_time(processor->events)
253 cpu_get_decrementer(cpu *processor)
255 return (processor->decrementer_local_time
256 - event_queue_time(processor->events));
261 cpu_decrement_event(void *data)
263 cpu *processor = (cpu*)data;
264 processor->decrementer_event = NULL;
265 decrementer_interrupt(processor);
270 cpu_set_decrementer(cpu *processor,
271 signed32 decrementer)
273 signed64 old_decrementer = cpu_get_decrementer(processor);
274 event_queue_deschedule(processor->events, processor->decrementer_event);
275 processor->decrementer_event = NULL;
276 processor->decrementer_local_time = (event_queue_time(processor->events)
278 if (decrementer < 0 && old_decrementer >= 0)
279 /* A decrementer interrupt occures if the sign of the decrement
280 register is changed from positive to negative by the load
282 decrementer_interrupt(processor);
283 else if (decrementer >= 0)
284 processor->decrementer_event = event_queue_schedule(processor->events,
291 #if WITH_IDECODE_CACHE_SIZE
292 /* allow access to the cpu's instruction cache */
295 cpu_icache_entry(cpu *processor,
298 return &processor->icache[cia / 4 % WITH_IDECODE_CACHE_SIZE];
304 cpu_flush_icache(cpu *processor)
307 /* force all addresses to 0xff... so that they never hit */
308 for (i = 0; i < WITH_IDECODE_CACHE_SIZE; i++)
309 processor->icache[i].address = MASK(0, 63);
314 /* address map revelation */
317 (vm_instruction_map *)
318 cpu_instruction_map(cpu *processor)
320 return processor->instruction_map;
325 cpu_data_map(cpu *processor)
327 return processor->data_map;
332 cpu_page_tlb_invalidate_entry(cpu *processor,
335 vm_page_tlb_invalidate_entry(processor->virtual, ea);
340 cpu_page_tlb_invalidate_all(cpu *processor)
342 vm_page_tlb_invalidate_all(processor->virtual);
346 /* interrupt access */
350 cpu_interrupts(cpu *processor)
352 return &processor->ints;
357 /* reservation access */
360 (memory_reservation *)
361 cpu_reservation(cpu *processor)
363 return &processor->reservation;
367 /* register access */
371 cpu_registers(cpu *processor)
373 return &processor->regs;
378 cpu_synchronize_context(cpu *processor,
381 #if (WITH_IDECODE_CACHE_SIZE)
382 /* kill of the cache */
383 cpu_flush_icache(processor);
386 /* update virtual memory */
387 vm_synchronize_context(processor->virtual,
395 /* might again be useful one day */
399 cpu_print_info(cpu *processor, int verbose)