5 #include "sim-options.h"
6 /* start-sanitize-am30 */
8 /* end-sanitize-am30 */
10 #include "mn10300_sim.h"
15 #include "sim-assert.h"
41 host_callback *mn10300_callback;
46 static void dispatch PARAMS ((uint32, uint32, int));
47 static long hash PARAMS ((long));
48 static void init_system PARAMS ((void));
50 static SIM_OPEN_KIND sim_kind;
56 struct hash_entry *next;
65 static int max_mem = 0;
66 struct hash_entry hash_table[MAX_HASH+1];
69 /* This probably doesn't do a very good job at bucket filling, but
75 /* These are one byte insns, we special case these since, in theory,
76 they should be the most heavily used. */
77 if ((insn & 0xffffff00) == 0)
122 /* These are two byte insns */
123 if ((insn & 0xffff0000) == 0)
125 if ((insn & 0xf000) == 0x2000
126 || (insn & 0xf000) == 0x5000)
127 return ((insn & 0xfc00) >> 8) & 0x7f;
129 if ((insn & 0xf000) == 0x4000)
130 return ((insn & 0xf300) >> 8) & 0x7f;
132 if ((insn & 0xf000) == 0x8000
133 || (insn & 0xf000) == 0x9000
134 || (insn & 0xf000) == 0xa000
135 || (insn & 0xf000) == 0xb000)
136 return ((insn & 0xf000) >> 8) & 0x7f;
138 if ((insn & 0xff00) == 0xf000
139 || (insn & 0xff00) == 0xf100
140 || (insn & 0xff00) == 0xf200
141 || (insn & 0xff00) == 0xf500
142 || (insn & 0xff00) == 0xf600)
143 return ((insn & 0xfff0) >> 4) & 0x7f;
145 if ((insn & 0xf000) == 0xc000)
146 return ((insn & 0xff00) >> 8) & 0x7f;
148 return ((insn & 0xffc0) >> 6) & 0x7f;
151 /* These are three byte insns. */
152 if ((insn & 0xff000000) == 0)
154 if ((insn & 0xf00000) == 0x000000)
155 return ((insn & 0xf30000) >> 16) & 0x7f;
157 if ((insn & 0xf00000) == 0x200000
158 || (insn & 0xf00000) == 0x300000)
159 return ((insn & 0xfc0000) >> 16) & 0x7f;
161 if ((insn & 0xff0000) == 0xf80000)
162 return ((insn & 0xfff000) >> 12) & 0x7f;
164 if ((insn & 0xff0000) == 0xf90000)
165 return ((insn & 0xfffc00) >> 10) & 0x7f;
167 return ((insn & 0xff0000) >> 16) & 0x7f;
170 /* These are four byte or larger insns. */
171 if ((insn & 0xf0000000) == 0xf0000000)
172 return ((insn & 0xfff00000) >> 20) & 0x7f;
174 return ((insn & 0xff000000) >> 24) & 0x7f;
178 dispatch (insn, extension, length)
183 struct hash_entry *h;
185 h = &hash_table[hash(insn)];
187 while ((insn & h->mask) != h->opcode
188 || (length != h->ops->length))
192 (*mn10300_callback->printf_filtered) (mn10300_callback,
193 "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
204 /* Now call the right function. */
205 (h->ops->func)(insn, extension);
217 max_mem = 1 << power;
218 State.mem = (uint8 *) calloc (1, 1 << power);
221 (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
234 sim_write (sd, addr, buffer, size)
237 unsigned char *buffer;
244 for (i = 0; i < size; i++)
245 store_byte (addr + i, buffer[i]);
250 /* Compare two opcode table entries for qsort. */
252 compare_simops (arg1, arg2)
256 unsigned long code1 = ((struct simops *)arg1)->opcode;
257 unsigned long code2 = ((struct simops *)arg2)->opcode;
268 sim_open (kind, cb, abfd, argv)
275 struct hash_entry *h;
279 mn10300_callback = cb;
281 /* Sort the opcode array from smallest opcode to largest.
282 This will generally improve simulator performance as the smaller
283 opcodes are generally preferred to the larger opcodes. */
284 for (i = 0, s = Simops; s->func; s++, i++)
286 qsort (Simops, i, sizeof (Simops[0]), compare_simops);
291 for (p = argv + 1; *p; ++p)
293 if (strcmp (*p, "-E") == 0)
294 ++p; /* ignore endian spec */
297 if (strcmp (*p, "-t") == 0)
298 mn10300_debug = DEBUG;
301 (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
304 /* put all the opcodes in the hash table */
305 for (s = Simops; s->func; s++)
307 h = &hash_table[hash(s->opcode)];
309 /* go to the last entry in the chain */
312 /* Don't insert the same opcode more than once. */
313 if (h->opcode == s->opcode
314 && h->mask == s->mask
321 /* Don't insert the same opcode more than once. */
322 if (h->opcode == s->opcode
323 && h->mask == s->mask
329 h->next = calloc(1,sizeof(struct hash_entry));
334 h->opcode = s->opcode;
341 /* fudge our descriptor for now */
347 sim_close (sd, quitting)
358 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
362 sim_set_profile_size (n)
365 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
376 sim_resume (sd, step, siggnal)
382 struct hash_entry *h;
385 State.exception = SIGTRAP;
393 unsigned long insn, extension;
395 /* Fetch the current instruction. */
396 inst = load_mem_big (PC, 2);
399 /* Using a giant case statement may seem like a waste because of the
400 code/rodata size the table itself will consume. However, using
401 a giant case statement speeds up the simulator by 10-15% by avoiding
402 cascading if/else statements or cascading case statements. */
404 switch ((inst >> 8) & 0xff)
406 /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
407 which must be handled specially. */
510 insn = (inst >> 8) & 0xff;
512 dispatch (insn, extension, 1);
515 /* Special cases where dm == dn is used to encode a different
535 dispatch (insn, extension, 2);
586 insn = (inst >> 8) & 0xff;
588 dispatch (insn, extension, 1);
591 /* The two byte instructions. */
638 dispatch (insn, extension, 2);
641 /* The three byte insns with a 16bit operand in little endian
676 insn = load_byte (PC);
678 insn |= load_half (PC + 1);
680 dispatch (insn, extension, 3);
683 /* The three byte insns without 16bit operand. */
688 insn = load_mem_big (PC, 3);
690 dispatch (insn, extension, 3);
693 /* Four byte insns. */
696 if ((inst & 0xfffc) == 0xfaf0
697 || (inst & 0xfffc) == 0xfaf4
698 || (inst & 0xfffc) == 0xfaf8)
699 insn = load_mem_big (PC, 4);
704 insn |= load_half (PC + 2);
707 dispatch (insn, extension, 4);
710 /* Five byte insns. */
712 insn = load_byte (PC);
714 insn |= (load_half (PC + 1) << 8);
715 insn |= load_byte (PC + 3);
716 extension = load_byte (PC + 4);
717 dispatch (insn, extension, 5);
721 insn = load_byte (PC);
723 extension = load_word (PC + 1);
724 insn |= (extension & 0xffffff00) >> 8;
726 dispatch (insn, extension, 5);
729 /* Six byte insns. */
733 extension = load_word (PC + 2);
734 insn |= ((extension & 0xffff0000) >> 16);
736 dispatch (insn, extension, 6);
740 insn = load_byte (PC) << 24;
741 extension = load_word (PC + 1);
742 insn |= ((extension >> 8) & 0xffffff);
743 extension = (extension & 0xff) << 16;
744 extension |= load_byte (PC + 5) << 8;
745 extension |= load_byte (PC + 6);
746 dispatch (insn, extension, 7);
751 extension = load_word (PC + 2);
752 insn |= ((extension >> 16) & 0xffff);
754 extension &= 0xffff00;
755 extension |= load_byte (PC + 6);
756 dispatch (insn, extension, 7);
763 while (!State.exception);
768 for (i = 0; i < MAX_HASH; i++)
770 struct hash_entry *h;
773 printf("hash 0x%x:\n", i);
777 printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
794 mn10300_debug = DEBUG;
796 sim_resume (sd, 0, 0);
801 sim_info (sd, verbose)
805 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
809 sim_create_inferior (sd, abfd, argv, env)
816 PC = bfd_get_start_address (abfd);
823 sim_set_callbacks (p)
826 mn10300_callback = p;
829 /* All the code for exiting, signals, etc needs to be revamped.
831 This is enough to get c-torture limping though. */
834 sim_stop_reason (sd, reason, sigrc)
836 enum sim_stop *reason;
840 *reason = sim_exited;
842 *reason = sim_stopped;
843 if (State.exception == SIGQUIT)
846 *sigrc = State.exception;
850 sim_read (sd, addr, buffer, size)
853 unsigned char *buffer;
857 for (i = 0; i < size; i++)
858 buffer[i] = load_byte (addr + i);
864 sim_do_command (sd, cmd)
868 (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
872 sim_load (sd, prog, abfd, from_tty)
878 extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
881 prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
882 sim_kind == SIM_OPEN_DEBUG,
884 if (prog_bfd == NULL)
887 bfd_close (prog_bfd);
890 #endif /* not WITH_COMMON */
895 /* For compatibility */
897 /* start-sanitize-am30 */
898 /* Until the tree root gets moved somewhere else */
900 /* end-sanitize-am30 */
902 /* These default values correspond to expected usage for the chip. */
905 sim_open (kind, cb, abfd, argv)
911 SIM_DESC sd = sim_state_alloc (kind, cb);
912 mn10300_callback = cb;
914 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
916 /* for compatibility */
919 /* FIXME: should be better way of setting up interrupts. For
920 moment, only support watchpoints causing a breakpoint (gdb
922 STATE_WATCHPOINTS (sd)->pc = &(PC);
923 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
924 STATE_WATCHPOINTS (sd)->interrupt_handler = NULL;
925 STATE_WATCHPOINTS (sd)->interrupt_names = NULL;
927 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
930 /* Allocate core managed memory */
931 sim_do_command (sd, "memory region 0,0x100000");
932 sim_do_command (sd, "memory region 0x40000000,0x100000");
934 /* getopt will print the error message so we just have to exit if this fails.
935 FIXME: Hmmm... in the case of gdb we need getopt to call
937 if (sim_parse_args (sd, argv) != SIM_RC_OK)
939 /* Uninstall the modules to avoid memory leaks,
940 file descriptor leaks, etc. */
941 sim_module_uninstall (sd);
945 /* start-sanitize-am30 */
946 hw = hw_tree_create (sd, "core");
947 hw_tree_parse (hw, "/");
948 if (STATE_VERBOSE_P (sd))
949 hw_tree_parse (hw, "/trace? true");
952 /* interrupt controller */
954 hw_tree_parse (hw, "/mn103int@0x34000100/reg 0x34000100 0x68 0x34000200 0x8 0x3400280 0x8");
955 if (STATE_VERBOSE_P (sd))
956 hw_tree_parse (hw, "/mn103int/trace? true");
958 /* DEBUG: NMI input's */
959 hw_tree_parse (hw, "/glue@0x30000000/reg 0x30000000 12");
960 if (STATE_VERBOSE_P (sd))
961 hw_tree_parse (hw, "/glue@0x30000000/trace? true");
962 hw_tree_parse (hw, "/glue@0x30000000 > int0 nmirq /mn103int");
963 hw_tree_parse (hw, "/glue@0x30000000 > int1 watchdog /mn103int");
964 hw_tree_parse (hw, "/glue@0x30000000 > int2 syserr /mn103int");
966 /* DEBUG: ACK input */
967 hw_tree_parse (hw, "/glue@0x30002000/reg 0x30002000 4");
968 if (STATE_VERBOSE_P (sd))
969 hw_tree_parse (hw, "/glue@0x30002000/trace? true");
970 hw_tree_parse (hw, "/glue@0x30002000 > int ack /mn103int");
972 /* DEBUG: LEVEL output */
973 hw_tree_parse (hw, "/glue@0x30004000/reg 0x30004000 8");
974 if (STATE_VERBOSE_P (sd))
975 hw_tree_parse (hw, "/glue@0x30004000/trace? true");
976 hw_tree_parse (hw, "/mn103int > nmi int0 /glue@0x30004000");
977 hw_tree_parse (hw, "/mn103int > level int1 /glue@0x30004000");
979 /* DEBUG: A bunch of interrupt inputs */
980 hw_tree_parse (hw, "/glue@0x30006000/reg 0x30006000 32");
981 if (STATE_VERBOSE_P (sd))
982 hw_tree_parse (hw, "/glue@0x30006000/trace? true");
983 hw_tree_parse (hw, "/glue@0x30006000 > int0 irq-0 /mn103int");
984 hw_tree_parse (hw, "/glue@0x30006000 > int1 irq-1 /mn103int");
985 hw_tree_parse (hw, "/glue@0x30006000 > int2 irq-2 /mn103int");
986 hw_tree_parse (hw, "/glue@0x30006000 > int3 irq-3 /mn103int");
987 hw_tree_parse (hw, "/glue@0x30006000 > int4 irq-4 /mn103int");
988 hw_tree_parse (hw, "/glue@0x30006000 > int5 irq-5 /mn103int");
989 hw_tree_parse (hw, "/glue@0x30006000 > int6 irq-6 /mn103int");
990 hw_tree_parse (hw, "/glue@0x30006000 > int7 irq-7 /mn103int");
993 /* processor interrupt device */
996 hw_tree_parse (hw, "/mn103cpu@0x20000000");
997 if (STATE_VERBOSE_P (sd))
998 hw_tree_parse (hw, "/mn103cpu@0x20000000/trace? true");
999 hw_tree_parse (hw, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
1001 /* DEBUG: ACK output wired upto a glue device */
1002 hw_tree_parse (hw, "/glue@0x20002000");
1003 if (STATE_VERBOSE_P (sd))
1004 hw_tree_parse (hw, "/glue@0x20002000/trace? true");
1005 hw_tree_parse (hw, "/glue@0x20002000/reg 0x20002000 4");
1006 hw_tree_parse (hw, "/mn103cpu > ack int0 /glue@0x20002000");
1008 /* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
1009 hw_tree_parse (hw, "/glue@0x20004000");
1010 if (STATE_VERBOSE_P (sd))
1011 hw_tree_parse (hw, "/glue@0x20004000/trace? true");
1012 hw_tree_parse (hw, "/glue@0x20004000/reg 0x20004000 12");
1013 hw_tree_parse (hw, "/glue@0x20004000 > int0 reset /mn103cpu");
1014 hw_tree_parse (hw, "/glue@0x20004000 > int1 nmi /mn103cpu");
1015 hw_tree_parse (hw, "/glue@0x20004000 > int2 level /mn103cpu");
1017 /* REAL: The processor wired up to the real interrupt controller */
1019 hw_tree_parse (hw, "/mn103cpu > ack ack /mn103int");
1020 hw_tree_parse (hw, "/mn103int > level level /mn103cpu");
1021 hw_tree_parse (hw, "/mn103int > nmi nmi /mn103cpu");
1028 hw_tree_parse (hw, "/pal@0x31000000");
1029 if (STATE_VERBOSE_P (sd))
1030 hw_tree_parse (hw, "/pal@0x31000000/trace? true");
1031 hw_tree_parse (hw, "/pal@0x31000000/reg 0x31000000 64");
1033 /* DEBUG: PAL wired up to a glue device */
1034 hw_tree_parse (hw, "/glue@0x31002000");
1035 if (STATE_VERBOSE_P (sd))
1036 hw_tree_parse (hw, "/glue@0x31002000/trace? true");
1037 hw_tree_parse (hw, "/glue@0x31002000/reg 0x31002000 16");
1038 hw_tree_parse (hw, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
1039 hw_tree_parse (hw, "/pal@0x31000000 > timer int1 /glue@0x31002000");
1040 hw_tree_parse (hw, "/pal@0x31000000 > int int2 /glue@0x31002000");
1041 hw_tree_parse (hw, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
1042 hw_tree_parse (hw, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
1043 hw_tree_parse (hw, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
1045 /* REAL: The PAL wired up to the real interrupt controller */
1046 hw_tree_parse (hw, "/pal@0x31000000 > countdown irq-0 /mn103int");
1047 hw_tree_parse (hw, "/pal@0x31000000 > timer irq-1 /mn103int");
1048 hw_tree_parse (hw, "/pal@0x31000000 > int irq-2 /mn103int");
1052 hw_tree_finish (hw);
1053 if (STATE_VERBOSE_P (sd))
1055 /* end-sanitize-am30 */
1057 /* check for/establish the a reference program image */
1058 if (sim_analyze_program (sd,
1059 (STATE_PROG_ARGV (sd) != NULL
1060 ? *STATE_PROG_ARGV (sd)
1064 sim_module_uninstall (sd);
1068 /* establish any remaining configuration options */
1069 if (sim_config (sd) != SIM_RC_OK)
1071 sim_module_uninstall (sd);
1075 if (sim_post_argv_init (sd) != SIM_RC_OK)
1077 /* Uninstall the modules to avoid memory leaks,
1078 file descriptor leaks, etc. */
1079 sim_module_uninstall (sd);
1084 /* set machine specific configuration */
1085 /* STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
1086 /* | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
1093 sim_close (sd, quitting)
1097 sim_module_uninstall (sd);
1102 sim_create_inferior (sd, prog_bfd, argv, env)
1104 struct _bfd *prog_bfd;
1108 memset (&State, 0, sizeof (State));
1109 if (prog_bfd != NULL) {
1110 PC = bfd_get_start_address (prog_bfd);
1114 CIA_SET (STATE_CPU (sd, 0), (unsigned64) PC);
1120 sim_do_command (sd, cmd)
1124 char *mm_cmd = "memory-map";
1125 char *int_cmd = "interrupt";
1127 if (sim_args_command (sd, cmd) != SIM_RC_OK)
1129 if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
1130 sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
1131 else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
1132 sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
1134 sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
1137 #endif /* WITH_COMMON */
1139 /* FIXME These would more efficient to use than load_mem/store_mem,
1140 but need to be changed to use the memory map. */
1154 return (a[1] << 8) + (a[0]);
1162 return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
1166 put_byte (addr, data)
1175 put_half (addr, data)
1181 a[1] = (data >> 8) & 0xff;
1185 put_word (addr, data)
1191 a[1] = (data >> 8) & 0xff;
1192 a[2] = (data >> 16) & 0xff;
1193 a[3] = (data >> 24) & 0xff;
1197 sim_fetch_register (sd, rn, memory, length)
1200 unsigned char *memory;
1203 put_word (memory, State.regs[rn]);
1208 sim_store_register (sd, rn, memory, length)
1211 unsigned char *memory;
1214 State.regs[rn] = get_word (memory);