5 #include "sim-options.h"
8 #include "mn10300_sim.h"
13 #include "sim-assert.h"
39 host_callback *mn10300_callback;
44 static void dispatch PARAMS ((uint32, uint32, int));
45 static long hash PARAMS ((long));
46 static void init_system PARAMS ((void));
48 static SIM_OPEN_KIND sim_kind;
54 struct hash_entry *next;
63 static int max_mem = 0;
64 struct hash_entry hash_table[MAX_HASH+1];
67 /* This probably doesn't do a very good job at bucket filling, but
73 /* These are one byte insns, we special case these since, in theory,
74 they should be the most heavily used. */
75 if ((insn & 0xffffff00) == 0)
120 /* These are two byte insns */
121 if ((insn & 0xffff0000) == 0)
123 if ((insn & 0xf000) == 0x2000
124 || (insn & 0xf000) == 0x5000)
125 return ((insn & 0xfc00) >> 8) & 0x7f;
127 if ((insn & 0xf000) == 0x4000)
128 return ((insn & 0xf300) >> 8) & 0x7f;
130 if ((insn & 0xf000) == 0x8000
131 || (insn & 0xf000) == 0x9000
132 || (insn & 0xf000) == 0xa000
133 || (insn & 0xf000) == 0xb000)
134 return ((insn & 0xf000) >> 8) & 0x7f;
136 if ((insn & 0xff00) == 0xf000
137 || (insn & 0xff00) == 0xf100
138 || (insn & 0xff00) == 0xf200
139 || (insn & 0xff00) == 0xf500
140 || (insn & 0xff00) == 0xf600)
141 return ((insn & 0xfff0) >> 4) & 0x7f;
143 if ((insn & 0xf000) == 0xc000)
144 return ((insn & 0xff00) >> 8) & 0x7f;
146 return ((insn & 0xffc0) >> 6) & 0x7f;
149 /* These are three byte insns. */
150 if ((insn & 0xff000000) == 0)
152 if ((insn & 0xf00000) == 0x000000)
153 return ((insn & 0xf30000) >> 16) & 0x7f;
155 if ((insn & 0xf00000) == 0x200000
156 || (insn & 0xf00000) == 0x300000)
157 return ((insn & 0xfc0000) >> 16) & 0x7f;
159 if ((insn & 0xff0000) == 0xf80000)
160 return ((insn & 0xfff000) >> 12) & 0x7f;
162 if ((insn & 0xff0000) == 0xf90000)
163 return ((insn & 0xfffc00) >> 10) & 0x7f;
165 return ((insn & 0xff0000) >> 16) & 0x7f;
168 /* These are four byte or larger insns. */
169 if ((insn & 0xf0000000) == 0xf0000000)
170 return ((insn & 0xfff00000) >> 20) & 0x7f;
172 return ((insn & 0xff000000) >> 24) & 0x7f;
176 dispatch (insn, extension, length)
181 struct hash_entry *h;
183 h = &hash_table[hash(insn)];
185 while ((insn & h->mask) != h->opcode
186 || (length != h->ops->length))
190 (*mn10300_callback->printf_filtered) (mn10300_callback,
191 "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
202 /* Now call the right function. */
203 (h->ops->func)(insn, extension);
215 max_mem = 1 << power;
216 State.mem = (uint8 *) calloc (1, 1 << power);
219 (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
232 sim_write (sd, addr, buffer, size)
235 unsigned char *buffer;
242 for (i = 0; i < size; i++)
243 store_byte (addr + i, buffer[i]);
248 /* Compare two opcode table entries for qsort. */
250 compare_simops (arg1, arg2)
254 unsigned long code1 = ((struct simops *)arg1)->opcode;
255 unsigned long code2 = ((struct simops *)arg2)->opcode;
266 sim_open (kind, cb, abfd, argv)
273 struct hash_entry *h;
277 mn10300_callback = cb;
279 /* Sort the opcode array from smallest opcode to largest.
280 This will generally improve simulator performance as the smaller
281 opcodes are generally preferred to the larger opcodes. */
282 for (i = 0, s = Simops; s->func; s++, i++)
284 qsort (Simops, i, sizeof (Simops[0]), compare_simops);
289 for (p = argv + 1; *p; ++p)
291 if (strcmp (*p, "-E") == 0)
292 ++p; /* ignore endian spec */
295 if (strcmp (*p, "-t") == 0)
296 mn10300_debug = DEBUG;
299 (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
302 /* put all the opcodes in the hash table */
303 for (s = Simops; s->func; s++)
305 h = &hash_table[hash(s->opcode)];
307 /* go to the last entry in the chain */
310 /* Don't insert the same opcode more than once. */
311 if (h->opcode == s->opcode
312 && h->mask == s->mask
319 /* Don't insert the same opcode more than once. */
320 if (h->opcode == s->opcode
321 && h->mask == s->mask
327 h->next = calloc(1,sizeof(struct hash_entry));
332 h->opcode = s->opcode;
339 /* fudge our descriptor for now */
345 sim_close (sd, quitting)
356 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
360 sim_set_profile_size (n)
363 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
374 sim_resume (sd, step, siggnal)
380 struct hash_entry *h;
383 State.exception = SIGTRAP;
391 unsigned long insn, extension;
393 /* Fetch the current instruction. */
394 inst = load_mem_big (PC, 2);
397 /* Using a giant case statement may seem like a waste because of the
398 code/rodata size the table itself will consume. However, using
399 a giant case statement speeds up the simulator by 10-15% by avoiding
400 cascading if/else statements or cascading case statements. */
402 switch ((inst >> 8) & 0xff)
404 /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
405 which must be handled specially. */
508 insn = (inst >> 8) & 0xff;
510 dispatch (insn, extension, 1);
513 /* Special cases where dm == dn is used to encode a different
533 dispatch (insn, extension, 2);
584 insn = (inst >> 8) & 0xff;
586 dispatch (insn, extension, 1);
589 /* The two byte instructions. */
636 dispatch (insn, extension, 2);
639 /* The three byte insns with a 16bit operand in little endian
674 insn = load_byte (PC);
676 insn |= load_half (PC + 1);
678 dispatch (insn, extension, 3);
681 /* The three byte insns without 16bit operand. */
686 insn = load_mem_big (PC, 3);
688 dispatch (insn, extension, 3);
691 /* Four byte insns. */
694 if ((inst & 0xfffc) == 0xfaf0
695 || (inst & 0xfffc) == 0xfaf4
696 || (inst & 0xfffc) == 0xfaf8)
697 insn = load_mem_big (PC, 4);
702 insn |= load_half (PC + 2);
705 dispatch (insn, extension, 4);
708 /* Five byte insns. */
710 insn = load_byte (PC);
712 insn |= (load_half (PC + 1) << 8);
713 insn |= load_byte (PC + 3);
714 extension = load_byte (PC + 4);
715 dispatch (insn, extension, 5);
719 insn = load_byte (PC);
721 extension = load_word (PC + 1);
722 insn |= (extension & 0xffffff00) >> 8;
724 dispatch (insn, extension, 5);
727 /* Six byte insns. */
731 extension = load_word (PC + 2);
732 insn |= ((extension & 0xffff0000) >> 16);
734 dispatch (insn, extension, 6);
738 insn = load_byte (PC) << 24;
739 extension = load_word (PC + 1);
740 insn |= ((extension >> 8) & 0xffffff);
741 extension = (extension & 0xff) << 16;
742 extension |= load_byte (PC + 5) << 8;
743 extension |= load_byte (PC + 6);
744 dispatch (insn, extension, 7);
749 extension = load_word (PC + 2);
750 insn |= ((extension >> 16) & 0xffff);
752 extension &= 0xffff00;
753 extension |= load_byte (PC + 6);
754 dispatch (insn, extension, 7);
761 while (!State.exception);
766 for (i = 0; i < MAX_HASH; i++)
768 struct hash_entry *h;
771 printf("hash 0x%x:\n", i);
775 printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
792 mn10300_debug = DEBUG;
794 sim_resume (sd, 0, 0);
799 sim_info (sd, verbose)
803 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
807 sim_create_inferior (sd, abfd, argv, env)
814 PC = bfd_get_start_address (abfd);
821 sim_set_callbacks (p)
824 mn10300_callback = p;
827 /* All the code for exiting, signals, etc needs to be revamped.
829 This is enough to get c-torture limping though. */
832 sim_stop_reason (sd, reason, sigrc)
834 enum sim_stop *reason;
838 *reason = sim_exited;
840 *reason = sim_stopped;
841 if (State.exception == SIGQUIT)
844 *sigrc = State.exception;
848 sim_read (sd, addr, buffer, size)
851 unsigned char *buffer;
855 for (i = 0; i < size; i++)
856 buffer[i] = load_byte (addr + i);
862 sim_do_command (sd, cmd)
866 (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
870 sim_load (sd, prog, abfd, from_tty)
876 extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
879 prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
880 sim_kind == SIM_OPEN_DEBUG,
882 if (prog_bfd == NULL)
885 bfd_close (prog_bfd);
888 #endif /* not WITH_COMMON */
893 /* For compatibility */
896 /* These default values correspond to expected usage for the chip. */
899 sim_open (kind, cb, abfd, argv)
905 SIM_DESC sd = sim_state_alloc (kind, cb);
907 mn10300_callback = cb;
909 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
911 /* for compatibility */
914 /* FIXME: should be better way of setting up interrupts. For
915 moment, only support watchpoints causing a breakpoint (gdb
917 STATE_WATCHPOINTS (sd)->pc = &(PC);
918 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
919 STATE_WATCHPOINTS (sd)->interrupt_handler = NULL;
920 STATE_WATCHPOINTS (sd)->interrupt_names = NULL;
922 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
925 /* Allocate core managed memory */
926 sim_do_command (sd, "memory region 0,0x100000");
927 sim_do_command (sd, "memory region 0x40000000,0x100000");
929 /* getopt will print the error message so we just have to exit if this fails.
930 FIXME: Hmmm... in the case of gdb we need getopt to call
932 if (sim_parse_args (sd, argv) != SIM_RC_OK)
934 /* Uninstall the modules to avoid memory leaks,
935 file descriptor leaks, etc. */
936 sim_module_uninstall (sd);
940 hw = hw_tree_create (sd, "core");
941 hw_tree_parse (hw, "/");
942 if (STATE_VERBOSE_P (sd))
943 hw_tree_parse (hw, "/trace? true");
946 /* interrupt controller */
948 hw_tree_parse (hw, "/mn103int@0x34000100");
949 if (STATE_VERBOSE_P (sd))
950 hw_tree_parse (hw, "/mn103int/trace? true");
951 hw_tree_parse (hw, "/mn103int/reg 0x34000100 0x68 0x34000200 0x8 0x3400280 0x8");
954 hw_tree_parse (hw, "/glue@0x30000000");
955 if (STATE_VERBOSE_P (sd))
956 hw_tree_parse (hw, "/glue@0x30000000/trace? true");
957 hw_tree_parse (hw, "/glue@0x30000000/reg 0x30000000 16");
958 hw_tree_parse (hw, "/glue@0x30000000 > int1 nmirq /mn103int");
959 hw_tree_parse (hw, "/glue@0x30000000 > int2 watchdog /mn103int");
960 hw_tree_parse (hw, "/glue@0x30000000 > int3 syserr /mn103int");
963 hw_tree_parse (hw, "/mn103int > nmi int0 /glue@0x30000000");
966 hw_tree_parse (hw, "/glue@0x30002000");
967 if (STATE_VERBOSE_P (sd))
968 hw_tree_parse (hw, "/glue@0x30002000/trace? true");
969 hw_tree_parse (hw, "/glue@0x30002000/reg 0x30002000 4");
970 hw_tree_parse (hw, "/glue@0x30002000 > int ack /mn103int");
973 hw_tree_parse (hw, "/glue@0x30004000");
974 if (STATE_VERBOSE_P (sd))
975 hw_tree_parse (hw, "/glue@0x30004000/trace? true");
976 hw_tree_parse (hw, "/glue@0x30004000/reg 0x30004000 4");
977 hw_tree_parse (hw, "/mn103int > level int /glue@0x30004000");
979 /* A bunch of interrupt inputs */
980 hw_tree_parse (hw, "/glue@0x30006000");
981 if (STATE_VERBOSE_P (sd))
982 hw_tree_parse (hw, "/glue@0x30006000/trace? true");
983 hw_tree_parse (hw, "/glue@0x30006000/reg 0x30006000 16");
984 hw_tree_parse (hw, "/glue@0x30006000 > int0 irq-0 /mn103int");
985 hw_tree_parse (hw, "/glue@0x30006000 > int1 irq-1 /mn103int");
986 hw_tree_parse (hw, "/glue@0x30006000 > int2 irq-2 /mn103int");
987 hw_tree_parse (hw, "/glue@0x30006000 > int3 irq-3 /mn103int");
990 /* processor interrupt device */
993 hw_tree_parse (hw, "/mn103cpu@0x20000000");
994 if (STATE_VERBOSE_P (sd))
995 hw_tree_parse (hw, "/mn103cpu@0x20000000/trace? true");
996 hw_tree_parse (hw, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
998 /* DEBUG: ACK output wired upto a glue device */
999 hw_tree_parse (hw, "/glue@0x20002000");
1000 if (STATE_VERBOSE_P (sd))
1001 hw_tree_parse (hw, "/glue@0x20002000/trace? true");
1002 hw_tree_parse (hw, "/glue@0x20002000/reg 0x20002000 4");
1003 hw_tree_parse (hw, "/mn103cpu > ack int0 /glue@0x20002000");
1005 /* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
1006 hw_tree_parse (hw, "/glue@0x20004000");
1007 if (STATE_VERBOSE_P (sd))
1008 hw_tree_parse (hw, "/glue@0x20004000/trace? true");
1009 hw_tree_parse (hw, "/glue@0x20004000/reg 0x20004000 12");
1010 hw_tree_parse (hw, "/glue@0x20004000 > int0 reset /mn103cpu");
1011 hw_tree_parse (hw, "/glue@0x20004000 > int1 nmi /mn103cpu");
1012 hw_tree_parse (hw, "/glue@0x20004000 > int2 level /mn103cpu");
1014 /* The processor wired up to the real interrupt controller */
1015 hw_tree_parse (hw, "/mn103cpu > ack ack /mn103int");
1016 hw_tree_parse (hw, "/mn103int > level level /mn103cpu");
1017 hw_tree_parse (hw, "/mn103int > nmi nmi /mn103cpu");
1023 hw_tree_parse (hw, "/pal@0x31000000");
1024 if (STATE_VERBOSE_P (sd))
1025 hw_tree_parse (hw, "/pal@0x31000000/trace? true");
1026 hw_tree_parse (hw, "/pal@0x31000000/reg 0x31000000 64");
1028 /* DEBUG: PAL wired up to a glue device */
1029 hw_tree_parse (hw, "/glue@0x31002000");
1030 if (STATE_VERBOSE_P (sd))
1031 hw_tree_parse (hw, "/glue@0x31002000/trace? true");
1032 hw_tree_parse (hw, "/glue@0x31002000/reg 0x31002000 16");
1033 hw_tree_parse (hw, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
1034 hw_tree_parse (hw, "/pal@0x31000000 > timer int1 /glue@0x31002000");
1035 hw_tree_parse (hw, "/pal@0x31000000 > int int2 /glue@0x31002000");
1036 hw_tree_parse (hw, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
1037 hw_tree_parse (hw, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
1038 hw_tree_parse (hw, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
1040 /* The PAL wired up to the real interrupt controller */
1041 hw_tree_parse (hw, "/pal@0x31000000 > countdown irq-0 /mn103int");
1042 hw_tree_parse (hw, "/pal@0x31000000 > timer irq-1 /mn103int");
1043 hw_tree_parse (hw, "/pal@0x31000000 > int irq-2 /mn103int");
1047 hw_tree_finish (hw);
1048 if (STATE_VERBOSE_P (sd))
1051 /* check for/establish the a reference program image */
1052 if (sim_analyze_program (sd,
1053 (STATE_PROG_ARGV (sd) != NULL
1054 ? *STATE_PROG_ARGV (sd)
1058 sim_module_uninstall (sd);
1062 /* establish any remaining configuration options */
1063 if (sim_config (sd) != SIM_RC_OK)
1065 sim_module_uninstall (sd);
1069 if (sim_post_argv_init (sd) != SIM_RC_OK)
1071 /* Uninstall the modules to avoid memory leaks,
1072 file descriptor leaks, etc. */
1073 sim_module_uninstall (sd);
1078 /* set machine specific configuration */
1079 /* STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
1080 /* | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
1087 sim_close (sd, quitting)
1091 sim_module_uninstall (sd);
1096 sim_create_inferior (sd, prog_bfd, argv, env)
1098 struct _bfd *prog_bfd;
1102 memset (&State, 0, sizeof (State));
1103 if (prog_bfd != NULL) {
1104 PC = bfd_get_start_address (prog_bfd);
1108 CIA_SET (STATE_CPU (sd, 0), (unsigned64) PC);
1114 sim_do_command (sd, cmd)
1118 char *mm_cmd = "memory-map";
1119 char *int_cmd = "interrupt";
1121 if (sim_args_command (sd, cmd) != SIM_RC_OK)
1123 if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
1124 sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
1125 else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
1126 sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
1128 sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
1131 #endif /* WITH_COMMON */
1133 /* FIXME These would more efficient to use than load_mem/store_mem,
1134 but need to be changed to use the memory map. */
1148 return (a[1] << 8) + (a[0]);
1156 return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
1160 put_byte (addr, data)
1169 put_half (addr, data)
1175 a[1] = (data >> 8) & 0xff;
1179 put_word (addr, data)
1185 a[1] = (data >> 8) & 0xff;
1186 a[2] = (data >> 16) & 0xff;
1187 a[3] = (data >> 24) & 0xff;
1191 sim_fetch_register (sd, rn, memory, length)
1194 unsigned char *memory;
1197 put_word (memory, State.regs[rn]);
1202 sim_store_register (sd, rn, memory, length)
1205 unsigned char *memory;
1208 State.regs[rn] = get_word (memory);