5 #include "sim-options.h"
6 /* start-sanitize-am30 */
8 /* end-sanitize-am30 */
10 #include "mn10300_sim.h"
15 #include "sim-assert.h"
41 host_callback *mn10300_callback;
45 /* simulation target board. NULL=default configuration */
46 static char* board = NULL;
48 static DECLARE_OPTION_HANDLER (mn10300_option_handler);
51 OPTION_BOARD = OPTION_START,
55 mn10300_option_handler (sd, cpu, opt, arg, is_command)
69 board = zalloc(strlen(arg) + 1);
79 static const OPTION mn10300_options[] =
81 /* start-sanitize-am30 */
82 #define BOARD_AM32 "stdeval1"
83 { {"board", required_argument, NULL, OPTION_BOARD},
84 '\0', "none" /* rely on compile-time string concatenation for other options */
86 , "Customize simulation for a particular board.", mn10300_option_handler },
87 /* end-sanitize-am30 */
89 { {NULL, no_argument, NULL, 0}, '\0', NULL, NULL, NULL }
94 static void dispatch PARAMS ((uint32, uint32, int));
95 static long hash PARAMS ((long));
96 static void init_system PARAMS ((void));
98 static SIM_OPEN_KIND sim_kind;
104 struct hash_entry *next;
113 static int max_mem = 0;
114 struct hash_entry hash_table[MAX_HASH+1];
117 /* This probably doesn't do a very good job at bucket filling, but
123 /* These are one byte insns, we special case these since, in theory,
124 they should be the most heavily used. */
125 if ((insn & 0xffffff00) == 0)
170 /* These are two byte insns */
171 if ((insn & 0xffff0000) == 0)
173 if ((insn & 0xf000) == 0x2000
174 || (insn & 0xf000) == 0x5000)
175 return ((insn & 0xfc00) >> 8) & 0x7f;
177 if ((insn & 0xf000) == 0x4000)
178 return ((insn & 0xf300) >> 8) & 0x7f;
180 if ((insn & 0xf000) == 0x8000
181 || (insn & 0xf000) == 0x9000
182 || (insn & 0xf000) == 0xa000
183 || (insn & 0xf000) == 0xb000)
184 return ((insn & 0xf000) >> 8) & 0x7f;
186 if ((insn & 0xff00) == 0xf000
187 || (insn & 0xff00) == 0xf100
188 || (insn & 0xff00) == 0xf200
189 || (insn & 0xff00) == 0xf500
190 || (insn & 0xff00) == 0xf600)
191 return ((insn & 0xfff0) >> 4) & 0x7f;
193 if ((insn & 0xf000) == 0xc000)
194 return ((insn & 0xff00) >> 8) & 0x7f;
196 return ((insn & 0xffc0) >> 6) & 0x7f;
199 /* These are three byte insns. */
200 if ((insn & 0xff000000) == 0)
202 if ((insn & 0xf00000) == 0x000000)
203 return ((insn & 0xf30000) >> 16) & 0x7f;
205 if ((insn & 0xf00000) == 0x200000
206 || (insn & 0xf00000) == 0x300000)
207 return ((insn & 0xfc0000) >> 16) & 0x7f;
209 if ((insn & 0xff0000) == 0xf80000)
210 return ((insn & 0xfff000) >> 12) & 0x7f;
212 if ((insn & 0xff0000) == 0xf90000)
213 return ((insn & 0xfffc00) >> 10) & 0x7f;
215 return ((insn & 0xff0000) >> 16) & 0x7f;
218 /* These are four byte or larger insns. */
219 if ((insn & 0xf0000000) == 0xf0000000)
220 return ((insn & 0xfff00000) >> 20) & 0x7f;
222 return ((insn & 0xff000000) >> 24) & 0x7f;
226 dispatch (insn, extension, length)
231 struct hash_entry *h;
233 h = &hash_table[hash(insn)];
235 while ((insn & h->mask) != h->opcode
236 || (length != h->ops->length))
240 (*mn10300_callback->printf_filtered) (mn10300_callback,
241 "ERROR looking up hash for 0x%x, PC=0x%x\n", insn, PC);
252 /* Now call the right function. */
253 (h->ops->func)(insn, extension);
265 max_mem = 1 << power;
266 State.mem = (uint8 *) calloc (1, 1 << power);
269 (*mn10300_callback->printf_filtered) (mn10300_callback, "Allocation of main memory failed.\n");
282 sim_write (sd, addr, buffer, size)
285 unsigned char *buffer;
292 for (i = 0; i < size; i++)
293 store_byte (addr + i, buffer[i]);
298 /* Compare two opcode table entries for qsort. */
300 compare_simops (arg1, arg2)
304 unsigned long code1 = ((struct simops *)arg1)->opcode;
305 unsigned long code2 = ((struct simops *)arg2)->opcode;
315 sim_open (kind, cb, abfd, argv)
322 struct hash_entry *h;
326 mn10300_callback = cb;
328 /* Sort the opcode array from smallest opcode to largest.
329 This will generally improve simulator performance as the smaller
330 opcodes are generally preferred to the larger opcodes. */
331 for (i = 0, s = Simops; s->func; s++, i++)
333 qsort (Simops, i, sizeof (Simops[0]), compare_simops);
338 for (p = argv + 1; *p; ++p)
340 if (strcmp (*p, "-E") == 0)
341 ++p; /* ignore endian spec */
344 if (strcmp (*p, "-t") == 0)
345 mn10300_debug = DEBUG;
348 (*mn10300_callback->printf_filtered) (mn10300_callback, "ERROR: unsupported option(s): %s\n",*p);
351 /* put all the opcodes in the hash table */
352 for (s = Simops; s->func; s++)
354 h = &hash_table[hash(s->opcode)];
356 /* go to the last entry in the chain */
359 /* Don't insert the same opcode more than once. */
360 if (h->opcode == s->opcode
361 && h->mask == s->mask
368 /* Don't insert the same opcode more than once. */
369 if (h->opcode == s->opcode
370 && h->mask == s->mask
376 h->next = calloc(1,sizeof(struct hash_entry));
381 h->opcode = s->opcode;
388 /* fudge our descriptor for now */
394 sim_close (sd, quitting)
405 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile %d\n", n);
409 sim_set_profile_size (n)
412 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_set_profile_size %d\n", n);
423 sim_resume (sd, step, siggnal)
429 struct hash_entry *h;
432 State.exception = SIGTRAP;
440 unsigned long insn, extension;
442 /* Fetch the current instruction. */
443 inst = load_mem_big (PC, 2);
446 /* Using a giant case statement may seem like a waste because of the
447 code/rodata size the table itself will consume. However, using
448 a giant case statement speeds up the simulator by 10-15% by avoiding
449 cascading if/else statements or cascading case statements. */
451 switch ((inst >> 8) & 0xff)
453 /* All the single byte insns except 0x80, 0x90, 0xa0, 0xb0
454 which must be handled specially. */
557 insn = (inst >> 8) & 0xff;
559 dispatch (insn, extension, 1);
562 /* Special cases where dm == dn is used to encode a different
582 dispatch (insn, extension, 2);
633 insn = (inst >> 8) & 0xff;
635 dispatch (insn, extension, 1);
638 /* The two byte instructions. */
685 dispatch (insn, extension, 2);
688 /* The three byte insns with a 16bit operand in little endian
723 insn = load_byte (PC);
725 insn |= load_half (PC + 1);
727 dispatch (insn, extension, 3);
730 /* The three byte insns without 16bit operand. */
735 insn = load_mem_big (PC, 3);
737 dispatch (insn, extension, 3);
740 /* Four byte insns. */
743 if ((inst & 0xfffc) == 0xfaf0
744 || (inst & 0xfffc) == 0xfaf4
745 || (inst & 0xfffc) == 0xfaf8)
746 insn = load_mem_big (PC, 4);
751 insn |= load_half (PC + 2);
754 dispatch (insn, extension, 4);
757 /* Five byte insns. */
759 insn = load_byte (PC);
761 insn |= (load_half (PC + 1) << 8);
762 insn |= load_byte (PC + 3);
763 extension = load_byte (PC + 4);
764 dispatch (insn, extension, 5);
768 insn = load_byte (PC);
770 extension = load_word (PC + 1);
771 insn |= (extension & 0xffffff00) >> 8;
773 dispatch (insn, extension, 5);
776 /* Six byte insns. */
780 extension = load_word (PC + 2);
781 insn |= ((extension & 0xffff0000) >> 16);
783 dispatch (insn, extension, 6);
787 insn = load_byte (PC) << 24;
788 extension = load_word (PC + 1);
789 insn |= ((extension >> 8) & 0xffffff);
790 extension = (extension & 0xff) << 16;
791 extension |= load_byte (PC + 5) << 8;
792 extension |= load_byte (PC + 6);
793 dispatch (insn, extension, 7);
798 extension = load_word (PC + 2);
799 insn |= ((extension >> 16) & 0xffff);
801 extension &= 0xffff00;
802 extension |= load_byte (PC + 6);
803 dispatch (insn, extension, 7);
810 while (!State.exception);
815 for (i = 0; i < MAX_HASH; i++)
817 struct hash_entry *h;
820 printf("hash 0x%x:\n", i);
824 printf("h->opcode = 0x%x, count = 0x%x\n", h->opcode, h->count);
841 mn10300_debug = DEBUG;
843 sim_resume (sd, 0, 0);
848 sim_info (sd, verbose)
852 (*mn10300_callback->printf_filtered) (mn10300_callback, "sim_info\n");
856 sim_create_inferior (sd, abfd, argv, env)
863 PC = bfd_get_start_address (abfd);
870 sim_set_callbacks (p)
873 mn10300_callback = p;
876 /* All the code for exiting, signals, etc needs to be revamped.
878 This is enough to get c-torture limping though. */
881 sim_stop_reason (sd, reason, sigrc)
883 enum sim_stop *reason;
887 *reason = sim_exited;
889 *reason = sim_stopped;
890 if (State.exception == SIGQUIT)
893 *sigrc = State.exception;
897 sim_read (sd, addr, buffer, size)
900 unsigned char *buffer;
904 for (i = 0; i < size; i++)
905 buffer[i] = load_byte (addr + i);
911 sim_do_command (sd, cmd)
915 (*mn10300_callback->printf_filtered) (mn10300_callback, "\"%s\" is not a valid mn10300 simulator command.\n", cmd);
919 sim_load (sd, prog, abfd, from_tty)
925 extern bfd *sim_load_file (); /* ??? Don't know where this should live. */
928 prog_bfd = sim_load_file (sd, myname, mn10300_callback, prog, abfd,
929 sim_kind == SIM_OPEN_DEBUG,
931 if (prog_bfd == NULL)
934 bfd_close (prog_bfd);
937 #endif /* not WITH_COMMON */
942 /* For compatibility */
945 /* These default values correspond to expected usage for the chip. */
948 sim_open (kind, cb, abfd, argv)
954 SIM_DESC sd = sim_state_alloc (kind, cb);
955 mn10300_callback = cb;
957 SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
959 /* for compatibility */
962 /* FIXME: should be better way of setting up interrupts. For
963 moment, only support watchpoints causing a breakpoint (gdb
965 STATE_WATCHPOINTS (sd)->pc = &(PC);
966 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
967 STATE_WATCHPOINTS (sd)->interrupt_handler = NULL;
968 STATE_WATCHPOINTS (sd)->interrupt_names = NULL;
970 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
972 sim_add_option_table (sd, NULL, mn10300_options);
974 /* Allocate core managed memory */
975 sim_do_command (sd, "memory region 0,0x100000");
976 sim_do_command (sd, "memory region 0x40000000,0x100000");
978 /* getopt will print the error message so we just have to exit if this fails.
979 FIXME: Hmmm... in the case of gdb we need getopt to call
981 if (sim_parse_args (sd, argv) != SIM_RC_OK)
983 /* Uninstall the modules to avoid memory leaks,
984 file descriptor leaks, etc. */
985 sim_module_uninstall (sd);
989 /* start-sanitize-am30 */
991 && (strcmp(board, BOARD_AM32) == 0 ) )
993 /* device support for mn1030002 */
994 /* interrupt controller */
996 sim_hw_parse (sd, "/mn103int@0x34000100/reg 0x34000100 0x7C 0x34000200 0x8 0x34000280 0x8");
998 /* DEBUG: NMI input's */
999 sim_hw_parse (sd, "/glue@0x30000000/reg 0x30000000 12");
1000 sim_hw_parse (sd, "/glue@0x30000000 > int0 nmirq /mn103int");
1001 sim_hw_parse (sd, "/glue@0x30000000 > int1 watchdog /mn103int");
1002 sim_hw_parse (sd, "/glue@0x30000000 > int2 syserr /mn103int");
1004 /* DEBUG: ACK input */
1005 sim_hw_parse (sd, "/glue@0x30002000/reg 0x30002000 4");
1006 sim_hw_parse (sd, "/glue@0x30002000 > int ack /mn103int");
1008 /* DEBUG: LEVEL output */
1009 sim_hw_parse (sd, "/glue@0x30004000/reg 0x30004000 8");
1010 sim_hw_parse (sd, "/mn103int > nmi int0 /glue@0x30004000");
1011 sim_hw_parse (sd, "/mn103int > level int1 /glue@0x30004000");
1013 /* DEBUG: A bunch of interrupt inputs */
1014 sim_hw_parse (sd, "/glue@0x30006000/reg 0x30006000 32");
1015 sim_hw_parse (sd, "/glue@0x30006000 > int0 irq-0 /mn103int");
1016 sim_hw_parse (sd, "/glue@0x30006000 > int1 irq-1 /mn103int");
1017 sim_hw_parse (sd, "/glue@0x30006000 > int2 irq-2 /mn103int");
1018 sim_hw_parse (sd, "/glue@0x30006000 > int3 irq-3 /mn103int");
1019 sim_hw_parse (sd, "/glue@0x30006000 > int4 irq-4 /mn103int");
1020 sim_hw_parse (sd, "/glue@0x30006000 > int5 irq-5 /mn103int");
1021 sim_hw_parse (sd, "/glue@0x30006000 > int6 irq-6 /mn103int");
1022 sim_hw_parse (sd, "/glue@0x30006000 > int7 irq-7 /mn103int");
1024 /* processor interrupt device */
1027 sim_hw_parse (sd, "/mn103cpu@0x20000000");
1028 sim_hw_parse (sd, "/mn103cpu@0x20000000/reg 0x20000000 0x42");
1030 /* DEBUG: ACK output wired upto a glue device */
1031 sim_hw_parse (sd, "/glue@0x20002000");
1032 sim_hw_parse (sd, "/glue@0x20002000/reg 0x20002000 4");
1033 sim_hw_parse (sd, "/mn103cpu > ack int0 /glue@0x20002000");
1035 /* DEBUG: RESET/NMI/LEVEL wired up to a glue device */
1036 sim_hw_parse (sd, "/glue@0x20004000");
1037 sim_hw_parse (sd, "/glue@0x20004000/reg 0x20004000 12");
1038 sim_hw_parse (sd, "/glue@0x20004000 > int0 reset /mn103cpu");
1039 sim_hw_parse (sd, "/glue@0x20004000 > int1 nmi /mn103cpu");
1040 sim_hw_parse (sd, "/glue@0x20004000 > int2 level /mn103cpu");
1042 /* REAL: The processor wired up to the real interrupt controller */
1043 sim_hw_parse (sd, "/mn103cpu > ack ack /mn103int");
1044 sim_hw_parse (sd, "/mn103int > level level /mn103cpu");
1045 sim_hw_parse (sd, "/mn103int > nmi nmi /mn103cpu");
1051 sim_hw_parse (sd, "/pal@0x31000000");
1052 sim_hw_parse (sd, "/pal@0x31000000/reg 0x31000000 64");
1053 sim_hw_parse (sd, "/pal@0x31000000/poll? true");
1055 /* DEBUG: PAL wired up to a glue device */
1056 sim_hw_parse (sd, "/glue@0x31002000");
1057 sim_hw_parse (sd, "/glue@0x31002000/reg 0x31002000 16");
1058 sim_hw_parse (sd, "/pal@0x31000000 > countdown int0 /glue@0x31002000");
1059 sim_hw_parse (sd, "/pal@0x31000000 > timer int1 /glue@0x31002000");
1060 sim_hw_parse (sd, "/pal@0x31000000 > int int2 /glue@0x31002000");
1061 sim_hw_parse (sd, "/glue@0x31002000 > int0 int3 /glue@0x31002000");
1062 sim_hw_parse (sd, "/glue@0x31002000 > int1 int3 /glue@0x31002000");
1063 sim_hw_parse (sd, "/glue@0x31002000 > int2 int3 /glue@0x31002000");
1065 /* REAL: The PAL wired up to the real interrupt controller */
1066 sim_hw_parse (sd, "/pal@0x31000000 > countdown irq-0 /mn103int");
1067 sim_hw_parse (sd, "/pal@0x31000000 > timer irq-1 /mn103int");
1068 sim_hw_parse (sd, "/pal@0x31000000 > int irq-2 /mn103int");
1070 /* 8 and 16 bit timers */
1071 sim_hw_parse (sd, "/mn103tim@0x34001000/reg 0x34001000 36 0x34001080 100");
1073 /* Hook timer interrupts up to interrupt controller */
1074 sim_hw_parse (sd, "/mn103tim > timer-0-underflow timer-0-underflow /mn103int");
1075 sim_hw_parse (sd, "/mn103tim > timer-1-underflow timer-1-underflow /mn103int");
1076 sim_hw_parse (sd, "/mn103tim > timer-2-underflow timer-2-underflow /mn103int");
1077 sim_hw_parse (sd, "/mn103tim > timer-3-underflow timer-3-underflow /mn103int");
1078 sim_hw_parse (sd, "/mn103tim > timer-4-underflow timer-4-underflow /mn103int");
1079 sim_hw_parse (sd, "/mn103tim > timer-5-underflow timer-5-underflow /mn103int");
1080 sim_hw_parse (sd, "/mn103tim > timer-6-underflow timer-6-underflow /mn103int");
1081 sim_hw_parse (sd, "/mn103tim > timer-6-compare-a timer-6-compare-a /mn103int");
1082 sim_hw_parse (sd, "/mn103tim > timer-6-compare-b timer-6-compare-b /mn103int");
1085 /* Serial devices 0,1,2 */
1086 sim_hw_parse (sd, "/mn103ser@0x34000800/reg 0x34000800 48");
1087 sim_hw_parse (sd, "/mn103ser@0x34000800/poll? true");
1089 /* Hook serial interrupts up to interrupt controller */
1090 sim_hw_parse (sd, "/mn103ser > serial-0-receive serial-0-receive /mn103int");
1091 sim_hw_parse (sd, "/mn103ser > serial-0-transmit serial-0-transmit /mn103int");
1092 sim_hw_parse (sd, "/mn103ser > serial-1-receive serial-0-receive /mn103int");
1093 sim_hw_parse (sd, "/mn103ser > serial-1-transmit serial-0-transmit /mn103int");
1094 sim_hw_parse (sd, "/mn103ser > serial-2-receive serial-0-receive /mn103int");
1095 sim_hw_parse (sd, "/mn103ser > serial-2-transmit serial-0-transmit /mn103int");
1097 sim_hw_parse (sd, "/mn103iop@0x36008000/reg 0x36008000 8 0x36008020 8 0x36008040 0xc 0x36008060 8 0x36008080 8");
1100 /* end-sanitize-am30 */
1102 /* check for/establish the a reference program image */
1103 if (sim_analyze_program (sd,
1104 (STATE_PROG_ARGV (sd) != NULL
1105 ? *STATE_PROG_ARGV (sd)
1109 sim_module_uninstall (sd);
1113 /* establish any remaining configuration options */
1114 if (sim_config (sd) != SIM_RC_OK)
1116 sim_module_uninstall (sd);
1120 if (sim_post_argv_init (sd) != SIM_RC_OK)
1122 /* Uninstall the modules to avoid memory leaks,
1123 file descriptor leaks, etc. */
1124 sim_module_uninstall (sd);
1129 /* set machine specific configuration */
1130 /* STATE_CPU (sd, 0)->psw_mask = (PSW_NP | PSW_EP | PSW_ID | PSW_SAT */
1131 /* | PSW_CY | PSW_OV | PSW_S | PSW_Z); */
1138 sim_close (sd, quitting)
1142 sim_module_uninstall (sd);
1147 sim_create_inferior (sd, prog_bfd, argv, env)
1149 struct _bfd *prog_bfd;
1153 memset (&State, 0, sizeof (State));
1154 if (prog_bfd != NULL) {
1155 PC = bfd_get_start_address (prog_bfd);
1159 CIA_SET (STATE_CPU (sd, 0), (unsigned64) PC);
1165 sim_do_command (sd, cmd)
1169 char *mm_cmd = "memory-map";
1170 char *int_cmd = "interrupt";
1172 if (sim_args_command (sd, cmd) != SIM_RC_OK)
1174 if (strncmp (cmd, mm_cmd, strlen (mm_cmd) == 0))
1175 sim_io_eprintf (sd, "`memory-map' command replaced by `sim memory'\n");
1176 else if (strncmp (cmd, int_cmd, strlen (int_cmd)) == 0)
1177 sim_io_eprintf (sd, "`interrupt' command replaced by `sim watch'\n");
1179 sim_io_eprintf (sd, "Unknown command `%s'\n", cmd);
1182 #endif /* WITH_COMMON */
1184 /* FIXME These would more efficient to use than load_mem/store_mem,
1185 but need to be changed to use the memory map. */
1199 return (a[1] << 8) + (a[0]);
1207 return (a[3]<<24) + (a[2]<<16) + (a[1]<<8) + (a[0]);
1211 put_byte (addr, data)
1220 put_half (addr, data)
1226 a[1] = (data >> 8) & 0xff;
1230 put_word (addr, data)
1236 a[1] = (data >> 8) & 0xff;
1237 a[2] = (data >> 16) & 0xff;
1238 a[3] = (data >> 24) & 0xff;
1242 sim_fetch_register (sd, rn, memory, length)
1245 unsigned char *memory;
1248 put_word (memory, State.regs[rn]);
1253 sim_store_register (sd, rn, memory, length)
1256 unsigned char *memory;
1259 State.regs[rn] = get_word (memory);