3 // NEC specific instructions
6 // Integer Instructions
7 // --------------------
9 // MulAcc is the Multiply Accumulator.
10 // This register is mapped on the the HI and LO registers.
11 // Upper 32 bits of MulAcc is mapped on to lower 32 bits of HI register.
12 // Lower 32 bits of MulAcc is mapped on to lower 32 bits of LO register.
15 :function:::unsigned64:MulAcc:
17 // start-sanitize-vr4320
19 // end-sanitize-vr4320
20 // start-sanitize-cygnus
22 // end-sanitize-cygnus
24 unsigned64 result = U8_4 (HI, LO);
28 :function:::void:SET_MulAcc:unsigned64 value
30 // start-sanitize-vr4320
32 // end-sanitize-vr4320
33 // start-sanitize-cygnus
35 // end-sanitize-cygnus
38 *AL4_8 (&HI) = VH4_8 (value);
39 *AL4_8 (&LO) = VL4_8 (value);
42 :function:::signed64:SignedMultiply:signed32 l, signed32 r
44 // start-sanitize-vr4320
46 // end-sanitize-vr4320
47 // start-sanitize-cygnus
49 // end-sanitize-cygnus
51 signed64 result = (signed64) l * (signed64) r;
55 :function:::unsigned64:UnsignedMultiply:unsigned32 l, unsigned32 r
57 // start-sanitize-vr4320
59 // end-sanitize-vr4320
60 // start-sanitize-cygnus
62 // end-sanitize-cygnus
64 unsigned64 result = (unsigned64) l * (unsigned64) r;
68 :function:::unsigned64:Low32Bits:unsigned64 value
70 // start-sanitize-vr4320
72 // end-sanitize-vr4320
73 // start-sanitize-cygnus
75 // end-sanitize-cygnus
77 unsigned64 result = (signed64) (signed32) VL4_8 (value);
81 :function:::unsigned64:High32Bits:unsigned64 value
83 // start-sanitize-vr4320
85 // end-sanitize-vr4320
86 // start-sanitize-cygnus
88 // end-sanitize-cygnus
90 unsigned64 result = (signed64) (signed32) VH4_8 (value);
96 // Multiply, Accumulate
97 000000,5.RS,5.RT,00000,00000,101000::::MAC
100 // start-sanitize-vr4320
102 // end-sanitize-vr4320
104 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
108 // D-Multiply, Accumulate
109 000000,5.RS,5.RT,00000,00000,101001::::DMAC
112 // start-sanitize-vr4320
114 // end-sanitize-vr4320
116 LO = LO + SignedMultiply (SD_, GPR[RS], GPR[RT]);
120 // start-sanitize-vr4320
121 // Count Leading Zeros
122 000000,5.RS,00000,5.RD,00000,110101::::CLZ
124 // end-sanitize-vr4320
125 // start-sanitize-vr4320
127 // end-sanitize-vr4320
128 // start-sanitize-vr4320
130 unsigned32 t = Low32Bits (SD_, GPR[RS]);
133 while (! (t & ( 1 << 31))
144 // end-sanitize-vr4320
145 // start-sanitize-vr4320
146 // D-Count Leading Zeros
147 000000,5.RS,00000,5.RD,00000,111101::::DCLZ
149 // end-sanitize-vr4320
150 // start-sanitize-vr4320
152 // end-sanitize-vr4320
153 // start-sanitize-vr4320
155 unsigned64 t = GPR[RS];
158 while (! (t & ( (unsigned64)1 << 63))
165 printf("lo %d\n", (int) c);
175 // end-sanitize-vr4320
176 // start-sanitize-vrXXXX
177 // Multiply and Move LO.
178 000000,5.RS,5.RT,5.RD,00100,101000::::MUL
179 "mul r<RD>, r<RS>, r<RT>"
180 // end-sanitize-vrXXXX
181 // start-sanitize-vr4320
183 // end-sanitize-vr4320
184 // start-sanitize-cygnus
186 // end-sanitize-cygnus
187 // start-sanitize-vrXXXX
189 SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
190 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
194 // end-sanitize-vrXXXX
195 // start-sanitize-vrXXXX
196 // Unsigned Multiply and Move LO.
197 000000,5.RS,5.RT,5.RD,00101,101000::::MULU
198 "mulu r<RD>, r<RS>, r<RT>"
199 // end-sanitize-vrXXXX
200 // start-sanitize-vr4320
202 // end-sanitize-vr4320
203 // start-sanitize-cygnus
205 // end-sanitize-cygnus
206 // start-sanitize-vrXXXX
208 SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
209 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
213 // end-sanitize-vrXXXX
214 // start-sanitize-vrXXXX
215 // Multiply and Move HI.
216 000000,5.RS,5.RT,5.RD,01100,101000::::MULHI
217 "mulhi r<RD>, r<RS>, r<RT>"
218 // end-sanitize-vrXXXX
219 // start-sanitize-vr4320
221 // end-sanitize-vr4320
222 // start-sanitize-cygnus
224 // end-sanitize-cygnus
225 // start-sanitize-vrXXXX
227 SET_MulAcc (SD_, 0 + SignedMultiply (SD_, GPR[RS], GPR[RT]));
228 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
232 // end-sanitize-vrXXXX
233 // start-sanitize-vrXXXX
234 // Unsigned Multiply and Move HI.
235 000000,5.RS,5.RT,5.RD,01101,101000::::MULHIU
236 "mulhiu r<RD>, r<RS>, r<RT>"
237 // end-sanitize-vrXXXX
238 // start-sanitize-vr4320
240 // end-sanitize-vr4320
241 // start-sanitize-cygnus
243 // end-sanitize-cygnus
244 // start-sanitize-vrXXXX
246 SET_MulAcc (SD_, 0 + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
247 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
251 // end-sanitize-vrXXXX
252 // start-sanitize-cygnus
253 // Multiply, Negate and Move LO.
254 000000,5.RS,5.RT,5.RD,00011,011000::::MULS
255 "muls r<RD>, r<RS>, r<RT>"
256 // end-sanitize-cygnus
257 // start-sanitize-cygnus
259 // end-sanitize-cygnus
260 // start-sanitize-cygnus
262 SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
263 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
267 // end-sanitize-cygnus
268 // start-sanitize-cygnus
269 // Unsigned Multiply, Negate and Move LO.
270 000000,5.RS,5.RT,5.RD,00011,011001::::MULSU
271 "mulsu r<RD>, r<RS>, r<RT>"
272 // end-sanitize-cygnus
273 // start-sanitize-cygnus
275 // end-sanitize-cygnus
276 // start-sanitize-cygnus
278 SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
279 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
283 // end-sanitize-cygnus
284 // start-sanitize-cygnus
285 // Multiply, Negate and Move HI.
286 000000,5.RS,5.RT,5.RD,01011,011000::::MULSHI
287 "mulshi r<RD>, r<RS>, r<RT>"
288 // end-sanitize-cygnus
289 // start-sanitize-cygnus
291 // end-sanitize-cygnus
292 // start-sanitize-cygnus
294 SET_MulAcc (SD_, 0 - SignedMultiply (SD_, GPR[RS], GPR[RT]));
295 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
299 // end-sanitize-cygnus
300 // start-sanitize-cygnus
301 // Unsigned Multiply, Negate and Move HI.
302 000000,5.RS,5.RT,5.RD,01011,011001::::MULSHIU
303 "mulshiu r<RD>, r<RS>, r<RT>"
304 // end-sanitize-cygnus
305 // start-sanitize-cygnus
307 // end-sanitize-cygnus
308 // start-sanitize-cygnus
310 SET_MulAcc (SD_, 0 - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
311 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
318 // end-sanitize-cygnus
319 // Multiply, Accumulate and Move LO.
320 000000,5.RS,5.RT,5.RD,00010,101000::::MACC
321 "macc r<RD>, r<RS>, r<RT>"
322 // start-sanitize-vr4320
324 // end-sanitize-vr4320
325 // start-sanitize-cygnus
327 // end-sanitize-cygnus
329 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
330 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
334 // start-sanitize-vrXXXX
335 // Unsigned Multiply, Accumulate and Move LO.
336 000000,5.RS,5.RT,5.RD,00011,101000::::MACCU
337 "maccu r<RD>, r<RS>, r<RT>"
338 // end-sanitize-vrXXXX
339 // start-sanitize-vr4320
341 // end-sanitize-vr4320
342 // start-sanitize-cygnus
344 // end-sanitize-cygnus
345 // start-sanitize-vrXXXX
347 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
348 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
352 // end-sanitize-vrXXXX
353 // start-sanitize-vrXXXX
354 // Multiply, Accumulate and Move HI.
355 000000,5.RS,5.RT,5.RD,01010,101000::::MACCHI
356 "macchi r<RD>, r<RS>, r<RT>"
357 // end-sanitize-vrXXXX
358 // start-sanitize-vr4320
360 // end-sanitize-vr4320
361 // start-sanitize-cygnus
363 // end-sanitize-cygnus
364 // start-sanitize-vrXXXX
366 SET_MulAcc (SD_, MulAcc (SD_) + SignedMultiply (SD_, GPR[RS], GPR[RT]));
367 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
371 // end-sanitize-vrXXXX
372 // start-sanitize-vrXXXX
373 // Unsigned Multiply, Accumulate and Move HI.
374 000000,5.RS,5.RT,5.RD,01011,101000::::MACCHIU
375 "macchiu r<RD>, r<RS>, r<RT>"
376 // end-sanitize-vrXXXX
377 // start-sanitize-vr4320
379 // end-sanitize-vr4320
380 // start-sanitize-cygnus
382 // end-sanitize-cygnus
383 // start-sanitize-vrXXXX
385 SET_MulAcc (SD_, MulAcc (SD_) + UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
386 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
392 // end-sanitize-vrXXXX
393 // start-sanitize-cygnus
394 // Multiply, Negate, Accumulate and Move LO.
395 000000,5.RS,5.RT,5.RD,00111,011000::::MSAC
396 "msac r<RD>, r<RS>, r<RT>"
397 // end-sanitize-cygnus
398 // start-sanitize-cygnus
400 // end-sanitize-cygnus
401 // start-sanitize-cygnus
403 SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
404 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
408 // end-sanitize-cygnus
409 // start-sanitize-cygnus
410 // Unsigned Multiply, Negate, Accumulate and Move LO.
411 000000,5.RS,5.RT,5.RD,00111,011001::::MSACU
412 "msacu r<RD>, r<RS>, r<RT>"
413 // end-sanitize-cygnus
414 // start-sanitize-cygnus
416 // end-sanitize-cygnus
417 // start-sanitize-cygnus
419 SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
420 GPR[RD] = Low32Bits (SD_, MulAcc (SD_));
424 // end-sanitize-cygnus
425 // start-sanitize-cygnus
426 // Multiply, Negate, Accumulate and Move HI.
427 000000,5.RS,5.RT,5.RD,01111,011000::::MSACHI
428 "msachi r<RD>, r<RS>, r<RT>"
429 // end-sanitize-cygnus
430 // start-sanitize-cygnus
432 // end-sanitize-cygnus
433 // start-sanitize-cygnus
435 SET_MulAcc (SD_, MulAcc (SD_) - SignedMultiply (SD_, GPR[RS], GPR[RT]));
436 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
439 // end-sanitize-cygnus
440 // start-sanitize-cygnus
441 // Unsigned Multiply, Negate, Accumulate and Move HI.
442 000000,5.RS,5.RT,5.RD,01111,011001::::MSACHIU
443 "msachiu r<RD>, r<RS>, r<RT>"
444 // end-sanitize-cygnus
445 // start-sanitize-cygnus
447 // end-sanitize-cygnus
448 // start-sanitize-cygnus
450 SET_MulAcc (SD_, MulAcc (SD_) - UnsignedMultiply (SD_, GPR[RS], GPR[RT]));
451 GPR[RD] = High32Bits (SD_, MulAcc (SD_));
455 // end-sanitize-cygnus
456 // start-sanitize-cygnus
458 000000,00001,5.RT,5.RD,5.SHIFT,000010::::ROR
459 "ror r<RD>, r<RT>, <SHIFT>"
460 // end-sanitize-cygnus
461 // start-sanitize-cygnus
463 // end-sanitize-cygnus
464 // start-sanitize-cygnus
467 GPR[RD] = ROTR32 (GPR[RT], s);
471 // end-sanitize-cygnus
472 // start-sanitize-cygnus
473 // Rotate Right Variable.
474 000000,5.RS,5.RT,5.RD,00001,000110::::RORV
475 "rorv r<RD>, r<RT>, <RS>"
476 // end-sanitize-cygnus
477 // start-sanitize-cygnus
479 // end-sanitize-cygnus
480 // start-sanitize-cygnus
482 int s = MASKED (GPR[RS], 4, 0);
483 GPR[RD] = ROTR32 (GPR[RT], s);
487 // end-sanitize-cygnus
488 // start-sanitize-cygnus
489 // Double Rotate Right.
490 000000,00001,5.RT,5.RD,5.SHIFT,111010::::DROR
491 "dror r<RD>, r<RT>, <SHIFT>"
492 // end-sanitize-cygnus
493 // start-sanitize-cygnus
495 // end-sanitize-cygnus
496 // start-sanitize-cygnus
499 GPR[RD] = ROTR64 (GPR[RT], s);
503 // end-sanitize-cygnus
504 // start-sanitize-cygnus
505 // Double Rotate Right Plus 32.
506 000000,00001,5.RT,5.RD,5.SHIFT,111110::::DROR32
507 "dror32 r<RD>, r<RT>, <SHIFT>"
508 // end-sanitize-cygnus
509 // start-sanitize-cygnus
511 // end-sanitize-cygnus
512 // start-sanitize-cygnus
515 GPR[RD] = ROTR64 (GPR[RT], s);
519 // end-sanitize-cygnus
520 // start-sanitize-cygnus
521 // Double Rotate Right Variable.
522 000000,5.RS,5.RT,5.RD,00001,010110::::DRORV
523 "drorv r<RD>, r<RT>, <RS>"
524 // end-sanitize-cygnus
525 // start-sanitize-cygnus
527 // end-sanitize-cygnus
528 // start-sanitize-cygnus
530 int s = MASKED (GPR[RS], 5, 0);
531 GPR[RD] = ROTR64 (GPR[RT], s);
535 // end-sanitize-cygnus