Re-do load/store operations so that they work for both 32 and 64 bit
[external/binutils.git] / sim / mips / tx.igen
1 // -*- C -*-
2 //
3 // toshiba specific instructions.
4 //
5
6 011100,5.RS,5.RT,5.RD,00000000000:MMINORM:::MADD
7 "madd r<RS>, r<RT>":RD == 0
8 "madd r<RD>, r<RS>, r<RT>"
9 *r3900
10 // start-sanitize-r5900
11 *r5900:
12 // end-sanitize-r5900
13 {
14   signed64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
15                    + ((signed64) EXTEND32 (GPR[RT])
16                       * (signed64) EXTEND32 (GPR[RS])));
17   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
18   LO = EXTEND32 (prod);
19   HI = EXTEND32 (VH4_8 (prod));
20   TRACE_ALU_RESULT2 (HI, LO);
21   if(RD != 0 )
22     GPR[RD] = LO;
23 }
24
25
26 011100,5.RS,5.RT,5.RD,00000000001:MMINORM:::MADDU
27 "maddu r<RS>, r<RT>":RD == 0
28 "maddu r<RD>, r<RS>, r<RT>"
29 *r3900
30 // start-sanitize-r5900
31 *r5900:
32 // end-sanitize-r5900
33 {
34   unsigned64 prod = (U8_4 (VL4_8 (HI), VL4_8 (LO))
35                      + ((unsigned64) VL4_8 (GPR[RS])
36                         * (unsigned64) VL4_8 (GPR[RT])));
37   TRACE_ALU_INPUT2 (GPR[RS], GPR[RT]);
38   LO = EXTEND32 (prod);
39   HI = EXTEND32 (VH4_8 (prod));
40   TRACE_ALU_RESULT2 (HI, LO);
41   if(RD != 0)
42     GPR[RD] = LO;
43 }
44
45