1 2015-04-12 Mike Frysinger <vapier@gentoo.org>
3 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
5 2015-04-06 Mike Frysinger <vapier@gentoo.org>
7 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
9 2015-04-01 Mike Frysinger <vapier@gentoo.org>
11 * tconfig.h (SIM_HAVE_PROFILE): Delete.
13 2015-03-31 Mike Frysinger <vapier@gentoo.org>
15 * config.in, configure: Regenerate.
17 2015-03-24 Mike Frysinger <vapier@gentoo.org>
19 * interp.c (sim_pc_get): New function.
21 2015-03-24 Mike Frysinger <vapier@gentoo.org>
23 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
24 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
26 2015-03-24 Mike Frysinger <vapier@gentoo.org>
28 * configure: Regenerate.
30 2015-03-23 Mike Frysinger <vapier@gentoo.org>
32 * configure: Regenerate.
34 2015-03-23 Mike Frysinger <vapier@gentoo.org>
36 * configure: Regenerate.
37 * configure.ac (mips_extra_objs): Delete.
38 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
39 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
41 2015-03-23 Mike Frysinger <vapier@gentoo.org>
43 * configure: Regenerate.
44 * configure.ac: Delete sim_hw checks for dv-sockser.
46 2015-03-16 Mike Frysinger <vapier@gentoo.org>
48 * config.in, configure: Regenerate.
49 * tconfig.in: Rename file ...
50 * tconfig.h: ... here.
52 2015-03-15 Mike Frysinger <vapier@gentoo.org>
54 * tconfig.in: Delete includes.
55 [HAVE_DV_SOCKSER]: Delete.
57 2015-03-14 Mike Frysinger <vapier@gentoo.org>
59 * Makefile.in (SIM_RUN_OBJS): Delete.
61 2015-03-14 Mike Frysinger <vapier@gentoo.org>
63 * configure.ac (AC_CHECK_HEADERS): Delete.
64 * aclocal.m4, configure: Regenerate.
66 2014-08-19 Alan Modra <amodra@gmail.com>
68 * configure: Regenerate.
70 2014-08-15 Roland McGrath <mcgrathr@google.com>
72 * configure: Regenerate.
73 * config.in: Regenerate.
75 2014-03-04 Mike Frysinger <vapier@gentoo.org>
77 * configure: Regenerate.
79 2013-09-23 Alan Modra <amodra@gmail.com>
81 * configure: Regenerate.
83 2013-06-03 Mike Frysinger <vapier@gentoo.org>
85 * aclocal.m4, configure: Regenerate.
87 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
91 2013-03-26 Mike Frysinger <vapier@gentoo.org>
93 * configure: Regenerate.
95 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
97 * configure.ac: Address use of dv-sockser.o.
98 * tconfig.in: Conditionalize use of dv_sockser_install.
99 * configure: Regenerated.
100 * config.in: Regenerated.
102 2012-10-04 Chao-ying Fu <fu@mips.com>
103 Steve Ellcey <sellcey@mips.com>
105 * mips/mips3264r2.igen (rdhwr): New.
107 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
109 * configure.ac: Always link against dv-sockser.o.
110 * configure: Regenerate.
112 2012-06-15 Joel Brobecker <brobecker@adacore.com>
114 * config.in, configure: Regenerate.
116 2012-05-18 Nick Clifton <nickc@redhat.com>
119 * interp.c: Include config.h before system header files.
121 2012-03-24 Mike Frysinger <vapier@gentoo.org>
123 * aclocal.m4, config.in, configure: Regenerate.
125 2011-12-03 Mike Frysinger <vapier@gentoo.org>
127 * aclocal.m4: New file.
128 * configure: Regenerate.
130 2011-10-19 Mike Frysinger <vapier@gentoo.org>
132 * configure: Regenerate after common/acinclude.m4 update.
134 2011-10-17 Mike Frysinger <vapier@gentoo.org>
136 * configure.ac: Change include to common/acinclude.m4.
138 2011-10-17 Mike Frysinger <vapier@gentoo.org>
140 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
141 call. Replace common.m4 include with SIM_AC_COMMON.
142 * configure: Regenerate.
144 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
146 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
148 (tmp-mach-multi): Exit early when igen fails.
150 2011-07-05 Mike Frysinger <vapier@gentoo.org>
152 * interp.c (sim_do_command): Delete.
154 2011-02-14 Mike Frysinger <vapier@gentoo.org>
156 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
157 (tx3904sio_fifo_reset): Likewise.
158 * interp.c (sim_monitor): Likewise.
160 2010-04-14 Mike Frysinger <vapier@gentoo.org>
162 * interp.c (sim_write): Add const to buffer arg.
164 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
166 * interp.c: Don't include sysdep.h
168 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
170 * configure: Regenerate.
172 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
174 * config.in: Regenerate.
175 * configure: Likewise.
177 * configure: Regenerate.
179 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
181 * configure: Regenerate to track ../common/common.m4 changes.
184 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
185 Daniel Jacobowitz <dan@codesourcery.com>
186 Joseph Myers <joseph@codesourcery.com>
188 * configure: Regenerate.
190 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
192 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
193 that unconditionally allows fmt_ps.
194 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
195 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
196 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
197 filter from 64,f to 32,f.
198 (PREFX): Change filter from 64 to 32.
199 (LDXC1, LUXC1): Provide separate mips32r2 implementations
200 that use do_load_double instead of do_load. Make both LUXC1
201 versions unpredictable if SizeFGR () != 64.
202 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
203 instead of do_store. Remove unused variable. Make both SUXC1
204 versions unpredictable if SizeFGR () != 64.
206 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
208 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
209 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
210 shifts for that case.
212 2007-09-04 Nick Clifton <nickc@redhat.com>
214 * interp.c (options enum): Add OPTION_INFO_MEMORY.
215 (display_mem_info): New static variable.
216 (mips_option_handler): Handle OPTION_INFO_MEMORY.
217 (mips_options): Add info-memory and memory-info.
218 (sim_open): After processing the command line and board
219 specification, check display_mem_info. If it is set then
220 call the real handler for the --memory-info command line
223 2007-08-24 Joel Brobecker <brobecker@adacore.com>
225 * configure.ac: Change license of multi-run.c to GPL version 3.
226 * configure: Regenerate.
228 2007-06-28 Richard Sandiford <richard@codesourcery.com>
230 * configure.ac, configure: Revert last patch.
232 2007-06-26 Richard Sandiford <richard@codesourcery.com>
234 * configure.ac (sim_mipsisa3264_configs): New variable.
235 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
236 every configuration support all four targets, using the triplet to
237 determine the default.
238 * configure: Regenerate.
240 2007-06-25 Richard Sandiford <richard@codesourcery.com>
242 * Makefile.in (m16run.o): New rule.
244 2007-05-15 Thiemo Seufer <ths@mips.com>
246 * mips3264r2.igen (DSHD): Fix compile warning.
248 2007-05-14 Thiemo Seufer <ths@mips.com>
250 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
251 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
252 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
253 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
256 2007-03-01 Thiemo Seufer <ths@mips.com>
258 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
261 2007-02-20 Thiemo Seufer <ths@mips.com>
263 * dsp.igen: Update copyright notice.
264 * dsp2.igen: Fix copyright notice.
266 2007-02-20 Thiemo Seufer <ths@mips.com>
267 Chao-Ying Fu <fu@mips.com>
269 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
270 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
271 Add dsp2 to sim_igen_machine.
272 * configure: Regenerate.
273 * dsp.igen (do_ph_op): Add MUL support when op = 2.
274 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
275 (mulq_rs.ph): Use do_ph_mulq.
276 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
277 * mips.igen: Add dsp2 model and include dsp2.igen.
278 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
279 for *mips32r2, *mips64r2, *dsp.
280 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
281 for *mips32r2, *mips64r2, *dsp2.
282 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
284 2007-02-19 Thiemo Seufer <ths@mips.com>
285 Nigel Stephens <nigel@mips.com>
287 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
288 jumps with hazard barrier.
290 2007-02-19 Thiemo Seufer <ths@mips.com>
291 Nigel Stephens <nigel@mips.com>
293 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
294 after each call to sim_io_write.
296 2007-02-19 Thiemo Seufer <ths@mips.com>
297 Nigel Stephens <nigel@mips.com>
299 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
300 supported by this simulator.
301 (decode_coproc): Recognise additional CP0 Config registers
304 2007-02-19 Thiemo Seufer <ths@mips.com>
305 Nigel Stephens <nigel@mips.com>
306 David Ung <davidu@mips.com>
308 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
309 uninterpreted formats. If fmt is one of the uninterpreted types
310 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
311 fmt_word, and fmt_uninterpreted_64 like fmt_long.
312 (store_fpr): When writing an invalid odd register, set the
313 matching even register to fmt_unknown, not the following register.
314 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
315 the the memory window at offset 0 set by --memory-size command
317 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
319 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
321 (sim_monitor): When returning the memory size to the MIPS
322 application, use the value in STATE_MEM_SIZE, not an arbitrary
324 (cop_lw): Don' mess around with FPR_STATE, just pass
325 fmt_uninterpreted_32 to StoreFPR.
327 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
329 * mips.igen (not_word_value): Single version for mips32, mips64
332 2007-02-19 Thiemo Seufer <ths@mips.com>
333 Nigel Stephens <nigel@mips.com>
335 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
338 2007-02-17 Thiemo Seufer <ths@mips.com>
340 * configure.ac (mips*-sde-elf*): Move in front of generic machine
342 * configure: Regenerate.
344 2007-02-17 Thiemo Seufer <ths@mips.com>
346 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
347 Add mdmx to sim_igen_machine.
348 (mipsisa64*-*-*): Likewise. Remove dsp.
349 (mipsisa32*-*-*): Remove dsp.
350 * configure: Regenerate.
352 2007-02-13 Thiemo Seufer <ths@mips.com>
354 * configure.ac: Add mips*-sde-elf* target.
355 * configure: Regenerate.
357 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
359 * acconfig.h: Remove.
360 * config.in, configure: Regenerate.
362 2006-11-07 Thiemo Seufer <ths@mips.com>
364 * dsp.igen (do_w_op): Fix compiler warning.
366 2006-08-29 Thiemo Seufer <ths@mips.com>
367 David Ung <davidu@mips.com>
369 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
371 * configure: Regenerate.
372 * mips.igen (model): Add smartmips.
373 (MADDU): Increment ACX if carry.
374 (do_mult): Clear ACX.
375 (ROR,RORV): Add smartmips.
376 (include): Include smartmips.igen.
377 * sim-main.h (ACX): Set to REGISTERS[89].
378 * smartmips.igen: New file.
380 2006-08-29 Thiemo Seufer <ths@mips.com>
381 David Ung <davidu@mips.com>
383 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
384 mips3264r2.igen. Add missing dependency rules.
385 * m16e.igen: Support for mips16e save/restore instructions.
387 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
389 * configure: Regenerated.
391 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
393 * configure: Regenerated.
395 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
397 * configure: Regenerated.
399 2006-05-15 Chao-ying Fu <fu@mips.com>
401 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
403 2006-04-18 Nick Clifton <nickc@redhat.com>
405 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
408 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
410 * configure: Regenerate.
412 2005-12-14 Chao-ying Fu <fu@mips.com>
414 * Makefile.in (SIM_OBJS): Add dsp.o.
415 (dsp.o): New dependency.
416 (IGEN_INCLUDE): Add dsp.igen.
417 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
418 mipsisa64*-*-*): Add dsp to sim_igen_machine.
419 * configure: Regenerate.
420 * mips.igen: Add dsp model and include dsp.igen.
421 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
422 because these instructions are extended in DSP ASE.
423 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
424 adding 6 DSP accumulator registers and 1 DSP control register.
425 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
426 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
427 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
428 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
429 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
430 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
431 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
432 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
433 DSPCR_CCOND_SMASK): New define.
434 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
435 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
437 2005-07-08 Ian Lance Taylor <ian@airs.com>
439 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
441 2005-06-16 David Ung <davidu@mips.com>
442 Nigel Stephens <nigel@mips.com>
444 * mips.igen: New mips16e model and include m16e.igen.
445 (check_u64): Add mips16e tag.
446 * m16e.igen: New file for MIPS16e instructions.
447 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
448 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
450 * configure: Regenerate.
452 2005-05-26 David Ung <davidu@mips.com>
454 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
455 tags to all instructions which are applicable to the new ISAs.
456 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
458 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
460 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
462 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
463 * configure: Regenerate.
465 2005-03-23 Mark Kettenis <kettenis@gnu.org>
467 * configure: Regenerate.
469 2005-01-14 Andrew Cagney <cagney@gnu.org>
471 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
472 explicit call to AC_CONFIG_HEADER.
473 * configure: Regenerate.
475 2005-01-12 Andrew Cagney <cagney@gnu.org>
477 * configure.ac: Update to use ../common/common.m4.
478 * configure: Re-generate.
480 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
482 * configure: Regenerated to track ../common/aclocal.m4 changes.
484 2005-01-07 Andrew Cagney <cagney@gnu.org>
486 * configure.ac: Rename configure.in, require autoconf 2.59.
487 * configure: Re-generate.
489 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
491 * configure: Regenerate for ../common/aclocal.m4 update.
493 2004-09-24 Monika Chaddha <monika@acmet.com>
495 Committed by Andrew Cagney.
496 * m16.igen (CMP, CMPI): Fix assembler.
498 2004-08-18 Chris Demetriou <cgd@broadcom.com>
500 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
501 * configure: Regenerate.
503 2004-06-25 Chris Demetriou <cgd@broadcom.com>
505 * configure.in (sim_m16_machine): Include mipsIII.
506 * configure: Regenerate.
508 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
510 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
512 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
514 2004-04-10 Chris Demetriou <cgd@broadcom.com>
516 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
518 2004-04-09 Chris Demetriou <cgd@broadcom.com>
520 * mips.igen (check_fmt): Remove.
521 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
522 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
523 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
524 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
525 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
526 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
527 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
528 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
529 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
530 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
532 2004-04-09 Chris Demetriou <cgd@broadcom.com>
534 * sb1.igen (check_sbx): New function.
535 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
537 2004-03-29 Chris Demetriou <cgd@broadcom.com>
538 Richard Sandiford <rsandifo@redhat.com>
540 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
541 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
542 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
543 separate implementations for mipsIV and mipsV. Use new macros to
544 determine whether the restrictions apply.
546 2004-01-19 Chris Demetriou <cgd@broadcom.com>
548 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
549 (check_mult_hilo): Improve comments.
550 (check_div_hilo): Likewise. Also, fork off a new version
551 to handle mips32/mips64 (since there are no hazards to check
554 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
556 * mips.igen (do_dmultx): Fix check for negative operands.
558 2003-05-16 Ian Lance Taylor <ian@airs.com>
560 * Makefile.in (SHELL): Make sure this is defined.
561 (various): Use $(SHELL) whenever we invoke move-if-change.
563 2003-05-03 Chris Demetriou <cgd@broadcom.com>
565 * cp1.c: Tweak attribution slightly.
568 * mdmx.igen: Likewise.
569 * mips3d.igen: Likewise.
570 * sb1.igen: Likewise.
572 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
574 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
577 2003-02-27 Andrew Cagney <cagney@redhat.com>
579 * interp.c (sim_open): Rename _bfd to bfd.
580 (sim_create_inferior): Ditto.
582 2003-01-14 Chris Demetriou <cgd@broadcom.com>
584 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
586 2003-01-14 Chris Demetriou <cgd@broadcom.com>
588 * mips.igen (EI, DI): Remove.
590 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
592 * Makefile.in (tmp-run-multi): Fix mips16 filter.
594 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
595 Andrew Cagney <ac131313@redhat.com>
596 Gavin Romig-Koch <gavin@redhat.com>
597 Graydon Hoare <graydon@redhat.com>
598 Aldy Hernandez <aldyh@redhat.com>
599 Dave Brolley <brolley@redhat.com>
600 Chris Demetriou <cgd@broadcom.com>
602 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
603 (sim_mach_default): New variable.
604 (mips64vr-*-*, mips64vrel-*-*): New configurations.
605 Add a new simulator generator, MULTI.
606 * configure: Regenerate.
607 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
608 (multi-run.o): New dependency.
609 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
610 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
611 (tmp-multi): Combine them.
612 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
613 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
614 (distclean-extra): New rule.
615 * sim-main.h: Include bfd.h.
616 (MIPS_MACH): New macro.
617 * mips.igen (vr4120, vr5400, vr5500): New models.
618 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
619 * vr.igen: Replace with new version.
621 2003-01-04 Chris Demetriou <cgd@broadcom.com>
623 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
624 * configure: Regenerate.
626 2002-12-31 Chris Demetriou <cgd@broadcom.com>
628 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
629 * mips.igen: Remove all invocations of check_branch_bug and
632 2002-12-16 Chris Demetriou <cgd@broadcom.com>
634 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
636 2002-07-30 Chris Demetriou <cgd@broadcom.com>
638 * mips.igen (do_load_double, do_store_double): New functions.
639 (LDC1, SDC1): Rename to...
640 (LDC1b, SDC1b): respectively.
641 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
643 2002-07-29 Michael Snyder <msnyder@redhat.com>
645 * cp1.c (fp_recip2): Modify initialization expression so that
646 GCC will recognize it as constant.
648 2002-06-18 Chris Demetriou <cgd@broadcom.com>
650 * mdmx.c (SD_): Delete.
651 (Unpredictable): Re-define, for now, to directly invoke
652 unpredictable_action().
653 (mdmx_acc_op): Fix error in .ob immediate handling.
655 2002-06-18 Andrew Cagney <cagney@redhat.com>
657 * interp.c (sim_firmware_command): Initialize `address'.
659 2002-06-16 Andrew Cagney <ac131313@redhat.com>
661 * configure: Regenerated to track ../common/aclocal.m4 changes.
663 2002-06-14 Chris Demetriou <cgd@broadcom.com>
664 Ed Satterthwaite <ehs@broadcom.com>
666 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
667 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
668 * mips.igen: Include mips3d.igen.
669 (mips3d): New model name for MIPS-3D ASE instructions.
670 (CVT.W.fmt): Don't use this instruction for word (source) format
672 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
673 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
674 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
675 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
676 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
677 (RSquareRoot1, RSquareRoot2): New macros.
678 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
679 (fp_rsqrt2): New functions.
680 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
681 * configure: Regenerate.
683 2002-06-13 Chris Demetriou <cgd@broadcom.com>
684 Ed Satterthwaite <ehs@broadcom.com>
686 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
687 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
688 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
689 (convert): Note that this function is not used for paired-single
691 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
692 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
693 (check_fmt_p): Enable paired-single support.
694 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
695 (PUU.PS): New instructions.
696 (CVT.S.fmt): Don't use this instruction for paired-single format
698 * sim-main.h (FP_formats): New value 'fmt_ps.'
699 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
700 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
702 2002-06-12 Chris Demetriou <cgd@broadcom.com>
704 * mips.igen: Fix formatting of function calls in
707 2002-06-12 Chris Demetriou <cgd@broadcom.com>
709 * mips.igen (MOVN, MOVZ): Trace result.
710 (TNEI): Print "tnei" as the opcode name in traces.
711 (CEIL.W): Add disassembly string for traces.
712 (RSQRT.fmt): Make location of disassembly string consistent
713 with other instructions.
715 2002-06-12 Chris Demetriou <cgd@broadcom.com>
717 * mips.igen (X): Delete unused function.
719 2002-06-08 Andrew Cagney <cagney@redhat.com>
721 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
723 2002-06-07 Chris Demetriou <cgd@broadcom.com>
724 Ed Satterthwaite <ehs@broadcom.com>
726 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
727 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
728 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
729 (fp_nmsub): New prototypes.
730 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
731 (NegMultiplySub): New defines.
732 * mips.igen (RSQRT.fmt): Use RSquareRoot().
733 (MADD.D, MADD.S): Replace with...
734 (MADD.fmt): New instruction.
735 (MSUB.D, MSUB.S): Replace with...
736 (MSUB.fmt): New instruction.
737 (NMADD.D, NMADD.S): Replace with...
738 (NMADD.fmt): New instruction.
739 (NMSUB.D, MSUB.S): Replace with...
740 (NMSUB.fmt): New instruction.
742 2002-06-07 Chris Demetriou <cgd@broadcom.com>
743 Ed Satterthwaite <ehs@broadcom.com>
745 * cp1.c: Fix more comment spelling and formatting.
746 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
747 (denorm_mode): New function.
748 (fpu_unary, fpu_binary): Round results after operation, collect
749 status from rounding operations, and update the FCSR.
750 (convert): Collect status from integer conversions and rounding
751 operations, and update the FCSR. Adjust NaN values that result
752 from conversions. Convert to use sim_io_eprintf rather than
753 fprintf, and remove some debugging code.
754 * cp1.h (fenr_FS): New define.
756 2002-06-07 Chris Demetriou <cgd@broadcom.com>
758 * cp1.c (convert): Remove unusable debugging code, and move MIPS
759 rounding mode to sim FP rounding mode flag conversion code into...
760 (rounding_mode): New function.
762 2002-06-07 Chris Demetriou <cgd@broadcom.com>
764 * cp1.c: Clean up formatting of a few comments.
765 (value_fpr): Reformat switch statement.
767 2002-06-06 Chris Demetriou <cgd@broadcom.com>
768 Ed Satterthwaite <ehs@broadcom.com>
771 * sim-main.h: Include cp1.h.
772 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
773 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
774 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
775 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
776 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
777 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
778 * cp1.c: Don't include sim-fpu.h; already included by
779 sim-main.h. Clean up formatting of some comments.
780 (NaN, Equal, Less): Remove.
781 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
782 (fp_cmp): New functions.
783 * mips.igen (do_c_cond_fmt): Remove.
784 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
785 Compare. Add result tracing.
786 (CxC1): Remove, replace with...
787 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
788 (DMxC1): Remove, replace with...
789 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
790 (MxC1): Remove, replace with...
791 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
793 2002-06-04 Chris Demetriou <cgd@broadcom.com>
795 * sim-main.h (FGRIDX): Remove, replace all uses with...
796 (FGR_BASE): New macro.
797 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
798 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
799 (NR_FGR, FGR): Likewise.
800 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
801 * mips.igen: Likewise.
803 2002-06-04 Chris Demetriou <cgd@broadcom.com>
805 * cp1.c: Add an FSF Copyright notice to this file.
807 2002-06-04 Chris Demetriou <cgd@broadcom.com>
808 Ed Satterthwaite <ehs@broadcom.com>
810 * cp1.c (Infinity): Remove.
811 * sim-main.h (Infinity): Likewise.
813 * cp1.c (fp_unary, fp_binary): New functions.
814 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
815 (fp_sqrt): New functions, implemented in terms of the above.
816 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
817 (Recip, SquareRoot): Remove (replaced by functions above).
818 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
819 (fp_recip, fp_sqrt): New prototypes.
820 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
821 (Recip, SquareRoot): Replace prototypes with #defines which
822 invoke the functions above.
824 2002-06-03 Chris Demetriou <cgd@broadcom.com>
826 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
827 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
828 file, remove PARAMS from prototypes.
829 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
830 simulator state arguments.
831 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
832 pass simulator state arguments.
833 * cp1.c (SD): Redefine as CPU_STATE(cpu).
834 (store_fpr, convert): Remove 'sd' argument.
835 (value_fpr): Likewise. Convert to use 'SD' instead.
837 2002-06-03 Chris Demetriou <cgd@broadcom.com>
839 * cp1.c (Min, Max): Remove #if 0'd functions.
840 * sim-main.h (Min, Max): Remove.
842 2002-06-03 Chris Demetriou <cgd@broadcom.com>
844 * cp1.c: fix formatting of switch case and default labels.
845 * interp.c: Likewise.
846 * sim-main.c: Likewise.
848 2002-06-03 Chris Demetriou <cgd@broadcom.com>
850 * cp1.c: Clean up comments which describe FP formats.
851 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
853 2002-06-03 Chris Demetriou <cgd@broadcom.com>
854 Ed Satterthwaite <ehs@broadcom.com>
856 * configure.in (mipsisa64sb1*-*-*): New target for supporting
857 Broadcom SiByte SB-1 processor configurations.
858 * configure: Regenerate.
859 * sb1.igen: New file.
860 * mips.igen: Include sb1.igen.
862 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
863 * mdmx.igen: Add "sb1" model to all appropriate functions and
865 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
866 (ob_func, ob_acc): Reference the above.
867 (qh_acc): Adjust to keep the same size as ob_acc.
868 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
869 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
871 2002-06-03 Chris Demetriou <cgd@broadcom.com>
873 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
875 2002-06-02 Chris Demetriou <cgd@broadcom.com>
876 Ed Satterthwaite <ehs@broadcom.com>
878 * mips.igen (mdmx): New (pseudo-)model.
879 * mdmx.c, mdmx.igen: New files.
880 * Makefile.in (SIM_OBJS): Add mdmx.o.
881 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
883 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
884 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
885 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
886 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
887 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
888 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
889 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
890 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
891 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
892 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
893 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
894 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
895 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
896 (qh_fmtsel): New macros.
897 (_sim_cpu): New member "acc".
898 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
899 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
901 2002-05-01 Chris Demetriou <cgd@broadcom.com>
903 * interp.c: Use 'deprecated' rather than 'depreciated.'
904 * sim-main.h: Likewise.
906 2002-05-01 Chris Demetriou <cgd@broadcom.com>
908 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
909 which wouldn't compile anyway.
910 * sim-main.h (unpredictable_action): New function prototype.
911 (Unpredictable): Define to call igen function unpredictable().
912 (NotWordValue): New macro to call igen function not_word_value().
913 (UndefinedResult): Remove.
914 * interp.c (undefined_result): Remove.
915 (unpredictable_action): New function.
916 * mips.igen (not_word_value, unpredictable): New functions.
917 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
918 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
919 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
920 NotWordValue() to check for unpredictable inputs, then
921 Unpredictable() to handle them.
923 2002-02-24 Chris Demetriou <cgd@broadcom.com>
925 * mips.igen: Fix formatting of calls to Unpredictable().
927 2002-04-20 Andrew Cagney <ac131313@redhat.com>
929 * interp.c (sim_open): Revert previous change.
931 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
933 * interp.c (sim_open): Disable chunk of code that wrote code in
934 vector table entries.
936 2002-03-19 Chris Demetriou <cgd@broadcom.com>
938 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
939 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
942 2002-03-19 Chris Demetriou <cgd@broadcom.com>
944 * cp1.c: Fix many formatting issues.
946 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
948 * cp1.c (fpu_format_name): New function to replace...
949 (DOFMT): This. Delete, and update all callers.
950 (fpu_rounding_mode_name): New function to replace...
951 (RMMODE): This. Delete, and update all callers.
953 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
955 * interp.c: Move FPU support routines from here to...
956 * cp1.c: Here. New file.
957 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
960 2002-03-12 Chris Demetriou <cgd@broadcom.com>
962 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
963 * mips.igen (mips32, mips64): New models, add to all instructions
964 and functions as appropriate.
965 (loadstore_ea, check_u64): New variant for model mips64.
966 (check_fmt_p): New variant for models mipsV and mips64, remove
967 mipsV model marking fro other variant.
970 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
971 for mips32 and mips64.
972 (DCLO, DCLZ): New instructions for mips64.
974 2002-03-07 Chris Demetriou <cgd@broadcom.com>
976 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
977 immediate or code as a hex value with the "%#lx" format.
978 (ANDI): Likewise, and fix printed instruction name.
980 2002-03-05 Chris Demetriou <cgd@broadcom.com>
982 * sim-main.h (UndefinedResult, Unpredictable): New macros
983 which currently do nothing.
985 2002-03-05 Chris Demetriou <cgd@broadcom.com>
987 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
988 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
989 (status_CU3): New definitions.
991 * sim-main.h (ExceptionCause): Add new values for MIPS32
992 and MIPS64: MDMX, MCheck, CacheErr. Update comments
993 for DebugBreakPoint and NMIReset to note their status in
995 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
996 (SignalExceptionCacheErr): New exception macros.
998 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1000 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1001 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1003 (SignalExceptionCoProcessorUnusable): Take as argument the
1004 unusable coprocessor number.
1006 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1008 * mips.igen: Fix formatting of all SignalException calls.
1010 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1012 * sim-main.h (SIGNEXTEND): Remove.
1014 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1016 * mips.igen: Remove gencode comment from top of file, fix
1017 spelling in another comment.
1019 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1021 * mips.igen (check_fmt, check_fmt_p): New functions to check
1022 whether specific floating point formats are usable.
1023 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1024 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1025 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1026 Use the new functions.
1027 (do_c_cond_fmt): Remove format checks...
1028 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1030 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1032 * mips.igen: Fix formatting of check_fpu calls.
1034 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1036 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1038 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1040 * mips.igen: Remove whitespace at end of lines.
1042 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1044 * mips.igen (loadstore_ea): New function to do effective
1045 address calculations.
1046 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1047 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1048 CACHE): Use loadstore_ea to do effective address computations.
1050 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1052 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1053 * mips.igen (LL, CxC1, MxC1): Likewise.
1055 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1057 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1058 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1059 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1060 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1061 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1062 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1063 Don't split opcode fields by hand, use the opcode field values
1066 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1068 * mips.igen (do_divu): Fix spacing.
1070 * mips.igen (do_dsllv): Move to be right before DSLLV,
1071 to match the rest of the do_<shift> functions.
1073 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1075 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1076 DSRL32, do_dsrlv): Trace inputs and results.
1078 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1080 * mips.igen (CACHE): Provide instruction-printing string.
1082 * interp.c (signal_exception): Comment tokens after #endif.
1084 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1086 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1087 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1088 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1089 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1090 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1091 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1092 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1093 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1095 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1097 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1098 instruction-printing string.
1099 (LWU): Use '64' as the filter flag.
1101 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1103 * mips.igen (SDXC1): Fix instruction-printing string.
1105 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1107 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1108 filter flags "32,f".
1110 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1112 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1115 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1117 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1118 add a comma) so that it more closely match the MIPS ISA
1119 documentation opcode partitioning.
1120 (PREF): Put useful names on opcode fields, and include
1121 instruction-printing string.
1123 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1125 * mips.igen (check_u64): New function which in the future will
1126 check whether 64-bit instructions are usable and signal an
1127 exception if not. Currently a no-op.
1128 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1129 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1130 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1131 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1133 * mips.igen (check_fpu): New function which in the future will
1134 check whether FPU instructions are usable and signal an exception
1135 if not. Currently a no-op.
1136 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1137 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1138 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1139 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1140 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1141 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1142 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1143 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1145 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1147 * mips.igen (do_load_left, do_load_right): Move to be immediately
1149 (do_store_left, do_store_right): Move to be immediately following
1152 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1154 * mips.igen (mipsV): New model name. Also, add it to
1155 all instructions and functions where it is appropriate.
1157 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1159 * mips.igen: For all functions and instructions, list model
1160 names that support that instruction one per line.
1162 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1164 * mips.igen: Add some additional comments about supported
1165 models, and about which instructions go where.
1166 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1167 order as is used in the rest of the file.
1169 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1171 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1172 indicating that ALU32_END or ALU64_END are there to check
1174 (DADD): Likewise, but also remove previous comment about
1177 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1179 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1180 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1181 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1182 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1183 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1184 fields (i.e., add and move commas) so that they more closely
1185 match the MIPS ISA documentation opcode partitioning.
1187 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1189 * mips.igen (ADDI): Print immediate value.
1190 (BREAK): Print code.
1191 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1192 (SLL): Print "nop" specially, and don't run the code
1193 that does the shift for the "nop" case.
1195 2001-11-17 Fred Fish <fnf@redhat.com>
1197 * sim-main.h (float_operation): Move enum declaration outside
1198 of _sim_cpu struct declaration.
1200 2001-04-12 Jim Blandy <jimb@redhat.com>
1202 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1203 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1205 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1206 PENDING_FILL, and you can get the intended effect gracefully by
1207 calling PENDING_SCHED directly.
1209 2001-02-23 Ben Elliston <bje@redhat.com>
1211 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1212 already defined elsewhere.
1214 2001-02-19 Ben Elliston <bje@redhat.com>
1216 * sim-main.h (sim_monitor): Return an int.
1217 * interp.c (sim_monitor): Add return values.
1218 (signal_exception): Handle error conditions from sim_monitor.
1220 2001-02-08 Ben Elliston <bje@redhat.com>
1222 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1223 (store_memory): Likewise, pass cia to sim_core_write*.
1225 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1227 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1228 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1230 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1232 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1233 * Makefile.in: Don't delete *.igen when cleaning directory.
1235 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1237 * m16.igen (break): Call SignalException not sim_engine_halt.
1239 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1241 From Jason Eckhardt:
1242 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1244 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1246 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1248 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1250 * mips.igen (do_dmultx): Fix typo.
1252 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1254 * configure: Regenerated to track ../common/aclocal.m4 changes.
1256 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1258 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1260 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1262 * sim-main.h (GPR_CLEAR): Define macro.
1264 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1266 * interp.c (decode_coproc): Output long using %lx and not %s.
1268 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1270 * interp.c (sim_open): Sort & extend dummy memory regions for
1271 --board=jmr3904 for eCos.
1273 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1275 * configure: Regenerated.
1277 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1279 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1280 calls, conditional on the simulator being in verbose mode.
1282 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1284 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1285 cache don't get ReservedInstruction traps.
1287 1999-11-29 Mark Salter <msalter@cygnus.com>
1289 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1290 to clear status bits in sdisr register. This is how the hardware works.
1292 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1293 being used by cygmon.
1295 1999-11-11 Andrew Haley <aph@cygnus.com>
1297 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1300 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1302 * mips.igen (MULT): Correct previous mis-applied patch.
1304 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1306 * mips.igen (delayslot32): Handle sequence like
1307 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1308 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1309 (MULT): Actually pass the third register...
1311 1999-09-03 Mark Salter <msalter@cygnus.com>
1313 * interp.c (sim_open): Added more memory aliases for additional
1314 hardware being touched by cygmon on jmr3904 board.
1316 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1318 * configure: Regenerated to track ../common/aclocal.m4 changes.
1320 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1322 * interp.c (sim_store_register): Handle case where client - GDB -
1323 specifies that a 4 byte register is 8 bytes in size.
1324 (sim_fetch_register): Ditto.
1326 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1328 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1329 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1330 (idt_monitor_base): Base address for IDT monitor traps.
1331 (pmon_monitor_base): Ditto for PMON.
1332 (lsipmon_monitor_base): Ditto for LSI PMON.
1333 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1334 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1335 (sim_firmware_command): New function.
1336 (mips_option_handler): Call it for OPTION_FIRMWARE.
1337 (sim_open): Allocate memory for idt_monitor region. If "--board"
1338 option was given, add no monitor by default. Add BREAK hooks only if
1339 monitors are also there.
1341 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1343 * interp.c (sim_monitor): Flush output before reading input.
1345 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1347 * tconfig.in (SIM_HANDLES_LMA): Always define.
1349 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1351 From Mark Salter <msalter@cygnus.com>:
1352 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1353 (sim_open): Add setup for BSP board.
1355 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1357 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1358 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1359 them as unimplemented.
1361 1999-05-08 Felix Lee <flee@cygnus.com>
1363 * configure: Regenerated to track ../common/aclocal.m4 changes.
1365 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1367 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1369 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1371 * configure.in: Any mips64vr5*-*-* target should have
1372 -DTARGET_ENABLE_FR=1.
1373 (default_endian): Any mips64vr*el-*-* target should default to
1375 * configure: Re-generate.
1377 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1379 * mips.igen (ldl): Extend from _16_, not 32.
1381 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1383 * interp.c (sim_store_register): Force registers written to by GDB
1384 into an un-interpreted state.
1386 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1388 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1389 CPU, start periodic background I/O polls.
1390 (tx3904sio_poll): New function: periodic I/O poller.
1392 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1394 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1396 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1398 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1401 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1403 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1404 (load_word): Call SIM_CORE_SIGNAL hook on error.
1405 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1406 starting. For exception dispatching, pass PC instead of NULL_CIA.
1407 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1408 * sim-main.h (COP0_BADVADDR): Define.
1409 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1410 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1411 (_sim_cpu): Add exc_* fields to store register value snapshots.
1412 * mips.igen (*): Replace memory-related SignalException* calls
1413 with references to SIM_CORE_SIGNAL hook.
1415 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1417 * sim-main.c (*): Minor warning cleanups.
1419 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1421 * m16.igen (DADDIU5): Correct type-o.
1423 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1425 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1428 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1430 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1432 (interp.o): Add dependency on itable.h
1433 (oengine.c, gencode): Delete remaining references.
1434 (BUILT_SRC_FROM_GEN): Clean up.
1436 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1439 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1440 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1441 tmp-run-hack) : New.
1442 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1443 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1444 Drop the "64" qualifier to get the HACK generator working.
1445 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1446 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1447 qualifier to get the hack generator working.
1448 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1449 (DSLL): Use do_dsll.
1450 (DSLLV): Use do_dsllv.
1451 (DSRA): Use do_dsra.
1452 (DSRL): Use do_dsrl.
1453 (DSRLV): Use do_dsrlv.
1454 (BC1): Move *vr4100 to get the HACK generator working.
1455 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1456 get the HACK generator working.
1457 (MACC) Rename to get the HACK generator working.
1458 (DMACC,MACCS,DMACCS): Add the 64.
1460 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1462 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1463 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1465 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1467 * mips/interp.c (DEBUG): Cleanups.
1469 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1471 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1472 (tx3904sio_tickle): fflush after a stdout character output.
1474 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1476 * interp.c (sim_close): Uninstall modules.
1478 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1480 * sim-main.h, interp.c (sim_monitor): Change to global
1483 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1485 * configure.in (vr4100): Only include vr4100 instructions in
1487 * configure: Re-generate.
1488 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1490 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1492 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1493 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1496 * configure.in (sim_default_gen, sim_use_gen): Replace with
1498 (--enable-sim-igen): Delete config option. Always using IGEN.
1499 * configure: Re-generate.
1501 * Makefile.in (gencode): Kill, kill, kill.
1504 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1506 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1507 bit mips16 igen simulator.
1508 * configure: Re-generate.
1510 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1511 as part of vr4100 ISA.
1512 * vr.igen: Mark all instructions as 64 bit only.
1514 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1516 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1519 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1521 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1522 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1523 * configure: Re-generate.
1525 * m16.igen (BREAK): Define breakpoint instruction.
1526 (JALX32): Mark instruction as mips16 and not r3900.
1527 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1529 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1531 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1533 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1534 insn as a debug breakpoint.
1536 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1538 (PENDING_SCHED): Clean up trace statement.
1539 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1540 (PENDING_FILL): Delay write by only one cycle.
1541 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1543 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1545 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1547 (pending_tick): Move incrementing of index to FOR statement.
1548 (pending_tick): Only update PENDING_OUT after a write has occured.
1550 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1552 * configure: Re-generate.
1554 * interp.c (sim_engine_run OLD): Delete explicit call to
1555 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1557 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1559 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1560 interrupt level number to match changed SignalExceptionInterrupt
1563 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1565 * interp.c: #include "itable.h" if WITH_IGEN.
1566 (get_insn_name): New function.
1567 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1568 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1570 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1572 * configure: Rebuilt to inhale new common/aclocal.m4.
1574 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1576 * dv-tx3904sio.c: Include sim-assert.h.
1578 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1580 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1581 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1582 Reorganize target-specific sim-hardware checks.
1583 * configure: rebuilt.
1584 * interp.c (sim_open): For tx39 target boards, set
1585 OPERATING_ENVIRONMENT, add tx3904sio devices.
1586 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1587 ROM executables. Install dv-sockser into sim-modules list.
1589 * dv-tx3904irc.c: Compiler warning clean-up.
1590 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1591 frequent hw-trace messages.
1593 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1595 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1597 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1599 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1601 * vr.igen: New file.
1602 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1603 * mips.igen: Define vr4100 model. Include vr.igen.
1604 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1606 * mips.igen (check_mf_hilo): Correct check.
1608 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1610 * sim-main.h (interrupt_event): Add prototype.
1612 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1613 register_ptr, register_value.
1614 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1616 * sim-main.h (tracefh): Make extern.
1618 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1620 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1621 Reduce unnecessarily high timer event frequency.
1622 * dv-tx3904cpu.c: Ditto for interrupt event.
1624 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1626 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1628 (interrupt_event): Made non-static.
1630 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1631 interchange of configuration values for external vs. internal
1634 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1636 * mips.igen (BREAK): Moved code to here for
1637 simulator-reserved break instructions.
1638 * gencode.c (build_instruction): Ditto.
1639 * interp.c (signal_exception): Code moved from here. Non-
1640 reserved instructions now use exception vector, rather
1642 * sim-main.h: Moved magic constants to here.
1644 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1646 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1647 register upon non-zero interrupt event level, clear upon zero
1649 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1650 by passing zero event value.
1651 (*_io_{read,write}_buffer): Endianness fixes.
1652 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1653 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1655 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1656 serial I/O and timer module at base address 0xFFFF0000.
1658 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1660 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1663 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1665 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1667 * configure: Update.
1669 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1671 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1672 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1673 * configure.in: Include tx3904tmr in hw_device list.
1674 * configure: Rebuilt.
1675 * interp.c (sim_open): Instantiate three timer instances.
1676 Fix address typo of tx3904irc instance.
1678 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1680 * interp.c (signal_exception): SystemCall exception now uses
1681 the exception vector.
1683 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1685 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1688 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1690 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1692 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1694 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1696 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1697 sim-main.h. Declare a struct hw_descriptor instead of struct
1698 hw_device_descriptor.
1700 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1702 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1703 right bits and then re-align left hand bytes to correct byte
1704 lanes. Fix incorrect computation in do_store_left when loading
1705 bytes from second word.
1707 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1709 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1710 * interp.c (sim_open): Only create a device tree when HW is
1713 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1714 * interp.c (signal_exception): Ditto.
1716 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1718 * gencode.c: Mark BEGEZALL as LIKELY.
1720 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1722 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1723 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1725 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1727 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1728 modules. Recognize TX39 target with "mips*tx39" pattern.
1729 * configure: Rebuilt.
1730 * sim-main.h (*): Added many macros defining bits in
1731 TX39 control registers.
1732 (SignalInterrupt): Send actual PC instead of NULL.
1733 (SignalNMIReset): New exception type.
1734 * interp.c (board): New variable for future use to identify
1735 a particular board being simulated.
1736 (mips_option_handler,mips_options): Added "--board" option.
1737 (interrupt_event): Send actual PC.
1738 (sim_open): Make memory layout conditional on board setting.
1739 (signal_exception): Initial implementation of hardware interrupt
1740 handling. Accept another break instruction variant for simulator
1742 (decode_coproc): Implement RFE instruction for TX39.
1743 (mips.igen): Decode RFE instruction as such.
1744 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1745 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1746 bbegin to implement memory map.
1747 * dv-tx3904cpu.c: New file.
1748 * dv-tx3904irc.c: New file.
1750 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1752 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1754 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1756 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1757 with calls to check_div_hilo.
1759 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1761 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1762 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1763 Add special r3900 version of do_mult_hilo.
1764 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1765 with calls to check_mult_hilo.
1766 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1767 with calls to check_div_hilo.
1769 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1771 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1772 Document a replacement.
1774 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1776 * interp.c (sim_monitor): Make mon_printf work.
1778 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1780 * sim-main.h (INSN_NAME): New arg `cpu'.
1782 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1784 * configure: Regenerated to track ../common/aclocal.m4 changes.
1786 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1788 * configure: Regenerated to track ../common/aclocal.m4 changes.
1791 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1793 * acconfig.h: New file.
1794 * configure.in: Reverted change of Apr 24; use sinclude again.
1796 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1798 * configure: Regenerated to track ../common/aclocal.m4 changes.
1801 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1803 * configure.in: Don't call sinclude.
1805 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1807 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1809 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1811 * mips.igen (ERET): Implement.
1813 * interp.c (decode_coproc): Return sign-extended EPC.
1815 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1817 * interp.c (signal_exception): Do not ignore Trap.
1818 (signal_exception): On TRAP, restart at exception address.
1819 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1820 (signal_exception): Update.
1821 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1822 so that TRAP instructions are caught.
1824 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1826 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1827 contains HI/LO access history.
1828 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1829 (HIACCESS, LOACCESS): Delete, replace with
1830 (HIHISTORY, LOHISTORY): New macros.
1831 (CHECKHILO): Delete all, moved to mips.igen
1833 * gencode.c (build_instruction): Do not generate checks for
1834 correct HI/LO register usage.
1836 * interp.c (old_engine_run): Delete checks for correct HI/LO
1839 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1840 check_mf_cycles): New functions.
1841 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1842 do_divu, domultx, do_mult, do_multu): Use.
1844 * tx.igen ("madd", "maddu"): Use.
1846 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1848 * mips.igen (DSRAV): Use function do_dsrav.
1849 (SRAV): Use new function do_srav.
1851 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1852 (B): Sign extend 11 bit immediate.
1853 (EXT-B*): Shift 16 bit immediate left by 1.
1854 (ADDIU*): Don't sign extend immediate value.
1856 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1858 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1860 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1863 * mips.igen (delayslot32, nullify_next_insn): New functions.
1864 (m16.igen): Always include.
1865 (do_*): Add more tracing.
1867 * m16.igen (delayslot16): Add NIA argument, could be called by a
1868 32 bit MIPS16 instruction.
1870 * interp.c (ifetch16): Move function from here.
1871 * sim-main.c (ifetch16): To here.
1873 * sim-main.c (ifetch16, ifetch32): Update to match current
1874 implementations of LH, LW.
1875 (signal_exception): Don't print out incorrect hex value of illegal
1878 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1880 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1883 * m16.igen: Implement MIPS16 instructions.
1885 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1886 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1887 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1888 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1889 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1890 bodies of corresponding code from 32 bit insn to these. Also used
1891 by MIPS16 versions of functions.
1893 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1894 (IMEM16): Drop NR argument from macro.
1896 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1898 * Makefile.in (SIM_OBJS): Add sim-main.o.
1900 * sim-main.h (address_translation, load_memory, store_memory,
1901 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1903 (pr_addr, pr_uword64): Declare.
1904 (sim-main.c): Include when H_REVEALS_MODULE_P.
1906 * interp.c (address_translation, load_memory, store_memory,
1907 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1909 * sim-main.c: To here. Fix compilation problems.
1911 * configure.in: Enable inlining.
1912 * configure: Re-config.
1914 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1916 * configure: Regenerated to track ../common/aclocal.m4 changes.
1918 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1920 * mips.igen: Include tx.igen.
1921 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1922 * tx.igen: New file, contains MADD and MADDU.
1924 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1925 the hardwired constant `7'.
1926 (store_memory): Ditto.
1927 (LOADDRMASK): Move definition to sim-main.h.
1929 mips.igen (MTC0): Enable for r3900.
1932 mips.igen (do_load_byte): Delete.
1933 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1934 do_store_right): New functions.
1935 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1937 configure.in: Let the tx39 use igen again.
1940 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1942 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1943 not an address sized quantity. Return zero for cache sizes.
1945 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1947 * mips.igen (r3900): r3900 does not support 64 bit integer
1950 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1952 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1954 * configure : Rebuild.
1956 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1958 * configure: Regenerated to track ../common/aclocal.m4 changes.
1960 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1962 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1964 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1966 * configure: Regenerated to track ../common/aclocal.m4 changes.
1967 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1969 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1971 * configure: Regenerated to track ../common/aclocal.m4 changes.
1973 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * interp.c (Max, Min): Comment out functions. Not yet used.
1977 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1979 * configure: Regenerated to track ../common/aclocal.m4 changes.
1981 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1983 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1984 configurable settings for stand-alone simulator.
1986 * configure.in: Added X11 search, just in case.
1988 * configure: Regenerated.
1990 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1992 * interp.c (sim_write, sim_read, load_memory, store_memory):
1993 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1995 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1997 * sim-main.h (GETFCC): Return an unsigned value.
1999 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2001 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2002 (DADD): Result destination is RD not RT.
2004 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2006 * sim-main.h (HIACCESS, LOACCESS): Always define.
2008 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2010 * interp.c (sim_info): Delete.
2012 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2014 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2015 (mips_option_handler): New argument `cpu'.
2016 (sim_open): Update call to sim_add_option_table.
2018 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2020 * mips.igen (CxC1): Add tracing.
2022 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2024 * sim-main.h (Max, Min): Declare.
2026 * interp.c (Max, Min): New functions.
2028 * mips.igen (BC1): Add tracing.
2030 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2032 * interp.c Added memory map for stack in vr4100
2034 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2036 * interp.c (load_memory): Add missing "break"'s.
2038 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2040 * interp.c (sim_store_register, sim_fetch_register): Pass in
2041 length parameter. Return -1.
2043 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2045 * interp.c: Added hardware init hook, fixed warnings.
2047 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2049 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2051 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2053 * interp.c (ifetch16): New function.
2055 * sim-main.h (IMEM32): Rename IMEM.
2056 (IMEM16_IMMED): Define.
2058 (DELAY_SLOT): Update.
2060 * m16run.c (sim_engine_run): New file.
2062 * m16.igen: All instructions except LB.
2063 (LB): Call do_load_byte.
2064 * mips.igen (do_load_byte): New function.
2065 (LB): Call do_load_byte.
2067 * mips.igen: Move spec for insn bit size and high bit from here.
2068 * Makefile.in (tmp-igen, tmp-m16): To here.
2070 * m16.dc: New file, decode mips16 instructions.
2072 * Makefile.in (SIM_NO_ALL): Define.
2073 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2075 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2077 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2078 point unit to 32 bit registers.
2079 * configure: Re-generate.
2081 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2083 * configure.in (sim_use_gen): Make IGEN the default simulator
2084 generator for generic 32 and 64 bit mips targets.
2085 * configure: Re-generate.
2087 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2089 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2092 * interp.c (sim_fetch_register, sim_store_register): Read/write
2093 FGR from correct location.
2094 (sim_open): Set size of FGR's according to
2095 WITH_TARGET_FLOATING_POINT_BITSIZE.
2097 * sim-main.h (FGR): Store floating point registers in a separate
2100 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2102 * configure: Regenerated to track ../common/aclocal.m4 changes.
2104 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2106 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2108 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2110 * interp.c (pending_tick): New function. Deliver pending writes.
2112 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2113 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2114 it can handle mixed sized quantites and single bits.
2116 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2118 * interp.c (oengine.h): Do not include when building with IGEN.
2119 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2120 (sim_info): Ditto for PROCESSOR_64BIT.
2121 (sim_monitor): Replace ut_reg with unsigned_word.
2122 (*): Ditto for t_reg.
2123 (LOADDRMASK): Define.
2124 (sim_open): Remove defunct check that host FP is IEEE compliant,
2125 using software to emulate floating point.
2126 (value_fpr, ...): Always compile, was conditional on HASFPU.
2128 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2130 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2133 * interp.c (SD, CPU): Define.
2134 (mips_option_handler): Set flags in each CPU.
2135 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2136 (sim_close): Do not clear STATE, deleted anyway.
2137 (sim_write, sim_read): Assume CPU zero's vm should be used for
2139 (sim_create_inferior): Set the PC for all processors.
2140 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2142 (mips16_entry): Pass correct nr of args to store_word, load_word.
2143 (ColdReset): Cold reset all cpu's.
2144 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2145 (sim_monitor, load_memory, store_memory, signal_exception): Use
2146 `CPU' instead of STATE_CPU.
2149 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2152 * sim-main.h (signal_exception): Add sim_cpu arg.
2153 (SignalException*): Pass both SD and CPU to signal_exception.
2154 * interp.c (signal_exception): Update.
2156 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2158 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2159 address_translation): Ditto
2160 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2162 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2164 * configure: Regenerated to track ../common/aclocal.m4 changes.
2166 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2168 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2170 * mips.igen (model): Map processor names onto BFD name.
2172 * sim-main.h (CPU_CIA): Delete.
2173 (SET_CIA, GET_CIA): Define
2175 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2177 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2180 * configure.in (default_endian): Configure a big-endian simulator
2182 * configure: Re-generate.
2184 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2186 * configure: Regenerated to track ../common/aclocal.m4 changes.
2188 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2190 * interp.c (sim_monitor): Handle Densan monitor outbyte
2191 and inbyte functions.
2193 1997-12-29 Felix Lee <flee@cygnus.com>
2195 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2197 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2199 * Makefile.in (tmp-igen): Arrange for $zero to always be
2200 reset to zero after every instruction.
2202 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2204 * configure: Regenerated to track ../common/aclocal.m4 changes.
2207 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2209 * mips.igen (MSUB): Fix to work like MADD.
2210 * gencode.c (MSUB): Similarly.
2212 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2214 * configure: Regenerated to track ../common/aclocal.m4 changes.
2216 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2218 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2220 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2222 * sim-main.h (sim-fpu.h): Include.
2224 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2225 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2226 using host independant sim_fpu module.
2228 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2230 * interp.c (signal_exception): Report internal errors with SIGABRT
2233 * sim-main.h (C0_CONFIG): New register.
2234 (signal.h): No longer include.
2236 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2238 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2240 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2242 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2244 * mips.igen: Tag vr5000 instructions.
2245 (ANDI): Was missing mipsIV model, fix assembler syntax.
2246 (do_c_cond_fmt): New function.
2247 (C.cond.fmt): Handle mips I-III which do not support CC field
2249 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2250 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2252 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2253 vr5000 which saves LO in a GPR separatly.
2255 * configure.in (enable-sim-igen): For vr5000, select vr5000
2256 specific instructions.
2257 * configure: Re-generate.
2259 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2261 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2263 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2264 fmt_uninterpreted_64 bit cases to switch. Convert to
2267 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2269 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2270 as specified in IV3.2 spec.
2271 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2273 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2275 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2276 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2277 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2278 PENDING_FILL versions of instructions. Simplify.
2280 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2282 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2284 (MTHI, MFHI): Disable code checking HI-LO.
2286 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2288 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2290 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2292 * gencode.c (build_mips16_operands): Replace IPC with cia.
2294 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2295 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2297 (UndefinedResult): Replace function with macro/function
2299 (sim_engine_run): Don't save PC in IPC.
2301 * sim-main.h (IPC): Delete.
2304 * interp.c (signal_exception, store_word, load_word,
2305 address_translation, load_memory, store_memory, cache_op,
2306 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2307 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2308 current instruction address - cia - argument.
2309 (sim_read, sim_write): Call address_translation directly.
2310 (sim_engine_run): Rename variable vaddr to cia.
2311 (signal_exception): Pass cia to sim_monitor
2313 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2314 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2315 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2317 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2318 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2321 * interp.c (signal_exception): Pass restart address to
2324 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2325 idecode.o): Add dependency.
2327 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2329 (DELAY_SLOT): Update NIA not PC with branch address.
2330 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2332 * mips.igen: Use CIA not PC in branch calculations.
2333 (illegal): Call SignalException.
2334 (BEQ, ADDIU): Fix assembler.
2336 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2338 * m16.igen (JALX): Was missing.
2340 * configure.in (enable-sim-igen): New configuration option.
2341 * configure: Re-generate.
2343 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2345 * interp.c (load_memory, store_memory): Delete parameter RAW.
2346 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2347 bypassing {load,store}_memory.
2349 * sim-main.h (ByteSwapMem): Delete definition.
2351 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2353 * interp.c (sim_do_command, sim_commands): Delete mips specific
2354 commands. Handled by module sim-options.
2356 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2357 (WITH_MODULO_MEMORY): Define.
2359 * interp.c (sim_info): Delete code printing memory size.
2361 * interp.c (mips_size): Nee sim_size, delete function.
2363 (monitor, monitor_base, monitor_size): Delete global variables.
2364 (sim_open, sim_close): Delete code creating monitor and other
2365 memory regions. Use sim-memopts module, via sim_do_commandf, to
2366 manage memory regions.
2367 (load_memory, store_memory): Use sim-core for memory model.
2369 * interp.c (address_translation): Delete all memory map code
2370 except line forcing 32 bit addresses.
2372 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2374 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2377 * interp.c (logfh, logfile): Delete globals.
2378 (sim_open, sim_close): Delete code opening & closing log file.
2379 (mips_option_handler): Delete -l and -n options.
2380 (OPTION mips_options): Ditto.
2382 * interp.c (OPTION mips_options): Rename option trace to dinero.
2383 (mips_option_handler): Update.
2385 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2387 * interp.c (fetch_str): New function.
2388 (sim_monitor): Rewrite using sim_read & sim_write.
2389 (sim_open): Check magic number.
2390 (sim_open): Write monitor vectors into memory using sim_write.
2391 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2392 (sim_read, sim_write): Simplify - transfer data one byte at a
2394 (load_memory, store_memory): Clarify meaning of parameter RAW.
2396 * sim-main.h (isHOST): Defete definition.
2397 (isTARGET): Mark as depreciated.
2398 (address_translation): Delete parameter HOST.
2400 * interp.c (address_translation): Delete parameter HOST.
2402 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2406 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2407 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2409 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2411 * mips.igen: Add model filter field to records.
2413 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2415 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2417 interp.c (sim_engine_run): Do not compile function sim_engine_run
2418 when WITH_IGEN == 1.
2420 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2421 target architecture.
2423 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2424 igen. Replace with configuration variables sim_igen_flags /
2427 * m16.igen: New file. Copy mips16 insns here.
2428 * mips.igen: From here.
2430 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2432 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2434 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2436 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2438 * gencode.c (build_instruction): Follow sim_write's lead in using
2439 BigEndianMem instead of !ByteSwapMem.
2441 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2443 * configure.in (sim_gen): Dependent on target, select type of
2444 generator. Always select old style generator.
2446 configure: Re-generate.
2448 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2450 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2451 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2452 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2453 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2454 SIM_@sim_gen@_*, set by autoconf.
2456 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2460 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2461 CURRENT_FLOATING_POINT instead.
2463 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2464 (address_translation): Raise exception InstructionFetch when
2465 translation fails and isINSTRUCTION.
2467 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2468 sim_engine_run): Change type of of vaddr and paddr to
2470 (address_translation, prefetch, load_memory, store_memory,
2471 cache_op): Change type of vAddr and pAddr to address_word.
2473 * gencode.c (build_instruction): Change type of vaddr and paddr to
2476 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2478 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2479 macro to obtain result of ALU op.
2481 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2483 * interp.c (sim_info): Call profile_print.
2485 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2487 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2489 * sim-main.h (WITH_PROFILE): Do not define, defined in
2490 common/sim-config.h. Use sim-profile module.
2491 (simPROFILE): Delete defintion.
2493 * interp.c (PROFILE): Delete definition.
2494 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2495 (sim_close): Delete code writing profile histogram.
2496 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2498 (sim_engine_run): Delete code profiling the PC.
2500 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2502 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2504 * interp.c (sim_monitor): Make register pointers of type
2507 * sim-main.h: Make registers of type unsigned_word not
2510 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2512 * interp.c (sync_operation): Rename from SyncOperation, make
2513 global, add SD argument.
2514 (prefetch): Rename from Prefetch, make global, add SD argument.
2515 (decode_coproc): Make global.
2517 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2519 * gencode.c (build_instruction): Generate DecodeCoproc not
2520 decode_coproc calls.
2522 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2523 (SizeFGR): Move to sim-main.h
2524 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2525 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2526 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2528 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2529 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2530 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2531 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2532 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2533 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2535 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2537 (sim-alu.h): Include.
2538 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2539 (sim_cia): Typedef to instruction_address.
2541 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2543 * Makefile.in (interp.o): Rename generated file engine.c to
2548 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2550 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2552 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2554 * gencode.c (build_instruction): For "FPSQRT", output correct
2555 number of arguments to Recip.
2557 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2559 * Makefile.in (interp.o): Depends on sim-main.h
2561 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2563 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2564 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2565 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2566 STATE, DSSTATE): Define
2567 (GPR, FGRIDX, ..): Define.
2569 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2570 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2571 (GPR, FGRIDX, ...): Delete macros.
2573 * interp.c: Update names to match defines from sim-main.h
2575 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2577 * interp.c (sim_monitor): Add SD argument.
2578 (sim_warning): Delete. Replace calls with calls to
2580 (sim_error): Delete. Replace calls with sim_io_error.
2581 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2582 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2583 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2585 (mips_size): Rename from sim_size. Add SD argument.
2587 * interp.c (simulator): Delete global variable.
2588 (callback): Delete global variable.
2589 (mips_option_handler, sim_open, sim_write, sim_read,
2590 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2591 sim_size,sim_monitor): Use sim_io_* not callback->*.
2592 (sim_open): ZALLOC simulator struct.
2593 (PROFILE): Do not define.
2595 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2597 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2598 support.h with corresponding code.
2600 * sim-main.h (word64, uword64), support.h: Move definition to
2602 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2605 * Makefile.in: Update dependencies
2606 * interp.c: Do not include.
2608 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2610 * interp.c (address_translation, load_memory, store_memory,
2611 cache_op): Rename to from AddressTranslation et.al., make global,
2614 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2617 * interp.c (SignalException): Rename to signal_exception, make
2620 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2622 * sim-main.h (SignalException, SignalExceptionInterrupt,
2623 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2624 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2625 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2628 * interp.c, support.h: Use.
2630 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2632 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2633 to value_fpr / store_fpr. Add SD argument.
2634 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2635 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2637 * sim-main.h (ValueFPR, StoreFPR): Define.
2639 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2641 * interp.c (sim_engine_run): Check consistency between configure
2642 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2645 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2646 (mips_fpu): Configure WITH_FLOATING_POINT.
2647 (mips_endian): Configure WITH_TARGET_ENDIAN.
2648 * configure: Update.
2650 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2652 * configure: Regenerated to track ../common/aclocal.m4 changes.
2654 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2656 * configure: Regenerated.
2658 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2660 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2662 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2664 * gencode.c (print_igen_insn_models): Assume certain architectures
2665 include all mips* instructions.
2666 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2669 * Makefile.in (tmp.igen): Add target. Generate igen input from
2672 * gencode.c (FEATURE_IGEN): Define.
2673 (main): Add --igen option. Generate output in igen format.
2674 (process_instructions): Format output according to igen option.
2675 (print_igen_insn_format): New function.
2676 (print_igen_insn_models): New function.
2677 (process_instructions): Only issue warnings and ignore
2678 instructions when no FEATURE_IGEN.
2680 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2682 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2685 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * configure: Regenerated to track ../common/aclocal.m4 changes.
2689 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2691 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2692 SIM_RESERVED_BITS): Delete, moved to common.
2693 (SIM_EXTRA_CFLAGS): Update.
2695 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2697 * configure.in: Configure non-strict memory alignment.
2698 * configure: Regenerated to track ../common/aclocal.m4 changes.
2700 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2702 * configure: Regenerated to track ../common/aclocal.m4 changes.
2704 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2706 * gencode.c (SDBBP,DERET): Added (3900) insns.
2707 (RFE): Turn on for 3900.
2708 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2709 (dsstate): Made global.
2710 (SUBTARGET_R3900): Added.
2711 (CANCELDELAYSLOT): New.
2712 (SignalException): Ignore SystemCall rather than ignore and
2713 terminate. Add DebugBreakPoint handling.
2714 (decode_coproc): New insns RFE, DERET; and new registers Debug
2715 and DEPC protected by SUBTARGET_R3900.
2716 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2718 * Makefile.in,configure.in: Add mips subtarget option.
2719 * configure: Update.
2721 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2723 * gencode.c: Add r3900 (tx39).
2726 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2728 * gencode.c (build_instruction): Don't need to subtract 4 for
2731 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2733 * interp.c: Correct some HASFPU problems.
2735 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2737 * configure: Regenerated to track ../common/aclocal.m4 changes.
2739 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * interp.c (mips_options): Fix samples option short form, should
2744 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * interp.c (sim_info): Enable info code. Was just returning.
2748 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2753 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2755 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2757 (build_instruction): Ditto for LL.
2759 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2761 * configure: Regenerated to track ../common/aclocal.m4 changes.
2763 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * configure: Regenerated to track ../common/aclocal.m4 changes.
2768 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2770 * interp.c (sim_open): Add call to sim_analyze_program, update
2773 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2775 * interp.c (sim_kill): Delete.
2776 (sim_create_inferior): Add ABFD argument. Set PC from same.
2777 (sim_load): Move code initializing trap handlers from here.
2778 (sim_open): To here.
2779 (sim_load): Delete, use sim-hload.c.
2781 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2783 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2785 * configure: Regenerated to track ../common/aclocal.m4 changes.
2788 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2790 * interp.c (sim_open): Add ABFD argument.
2791 (sim_load): Move call to sim_config from here.
2792 (sim_open): To here. Check return status.
2794 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2796 * gencode.c (build_instruction): Two arg MADD should
2797 not assign result to $0.
2799 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2801 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2802 * sim/mips/configure.in: Regenerate.
2804 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2806 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2807 signed8, unsigned8 et.al. types.
2809 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2810 hosts when selecting subreg.
2812 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2814 * interp.c (sim_engine_run): Reset the ZERO register to zero
2815 regardless of FEATURE_WARN_ZERO.
2816 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2818 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2820 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2821 (SignalException): For BreakPoints ignore any mode bits and just
2823 (SignalException): Always set the CAUSE register.
2825 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2827 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2828 exception has been taken.
2830 * interp.c: Implement the ERET and mt/f sr instructions.
2832 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2834 * interp.c (SignalException): Don't bother restarting an
2837 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2839 * interp.c (SignalException): Really take an interrupt.
2840 (interrupt_event): Only deliver interrupts when enabled.
2842 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2844 * interp.c (sim_info): Only print info when verbose.
2845 (sim_info) Use sim_io_printf for output.
2847 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2849 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2852 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2854 * interp.c (sim_do_command): Check for common commands if a
2855 simulator specific command fails.
2857 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2859 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2860 and simBE when DEBUG is defined.
2862 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2864 * interp.c (interrupt_event): New function. Pass exception event
2865 onto exception handler.
2867 * configure.in: Check for stdlib.h.
2868 * configure: Regenerate.
2870 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2871 variable declaration.
2872 (build_instruction): Initialize memval1.
2873 (build_instruction): Add UNUSED attribute to byte, bigend,
2875 (build_operands): Ditto.
2877 * interp.c: Fix GCC warnings.
2878 (sim_get_quit_code): Delete.
2880 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2881 * Makefile.in: Ditto.
2882 * configure: Re-generate.
2884 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2886 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2888 * interp.c (mips_option_handler): New function parse argumes using
2890 (myname): Replace with STATE_MY_NAME.
2891 (sim_open): Delete check for host endianness - performed by
2893 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2894 (sim_open): Move much of the initialization from here.
2895 (sim_load): To here. After the image has been loaded and
2897 (sim_open): Move ColdReset from here.
2898 (sim_create_inferior): To here.
2899 (sim_open): Make FP check less dependant on host endianness.
2901 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2903 * interp.c (sim_set_callbacks): Delete.
2905 * interp.c (membank, membank_base, membank_size): Replace with
2906 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2907 (sim_open): Remove call to callback->init. gdb/run do this.
2911 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2913 * interp.c (big_endian_p): Delete, replaced by
2914 current_target_byte_order.
2916 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2918 * interp.c (host_read_long, host_read_word, host_swap_word,
2919 host_swap_long): Delete. Using common sim-endian.
2920 (sim_fetch_register, sim_store_register): Use H2T.
2921 (pipeline_ticks): Delete. Handled by sim-events.
2923 (sim_engine_run): Update.
2925 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2927 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2929 (SignalException): To here. Signal using sim_engine_halt.
2930 (sim_stop_reason): Delete, moved to common.
2932 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2934 * interp.c (sim_open): Add callback argument.
2935 (sim_set_callbacks): Delete SIM_DESC argument.
2938 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2940 * Makefile.in (SIM_OBJS): Add common modules.
2942 * interp.c (sim_set_callbacks): Also set SD callback.
2943 (set_endianness, xfer_*, swap_*): Delete.
2944 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2945 Change to functions using sim-endian macros.
2946 (control_c, sim_stop): Delete, use common version.
2947 (simulate): Convert into.
2948 (sim_engine_run): This function.
2949 (sim_resume): Delete.
2951 * interp.c (simulation): New variable - the simulator object.
2952 (sim_kind): Delete global - merged into simulation.
2953 (sim_load): Cleanup. Move PC assignment from here.
2954 (sim_create_inferior): To here.
2956 * sim-main.h: New file.
2957 * interp.c (sim-main.h): Include.
2959 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2961 * configure: Regenerated to track ../common/aclocal.m4 changes.
2963 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2965 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2967 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2969 * gencode.c (build_instruction): DIV instructions: check
2970 for division by zero and integer overflow before using
2971 host's division operation.
2973 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2975 * Makefile.in (SIM_OBJS): Add sim-load.o.
2976 * interp.c: #include bfd.h.
2977 (target_byte_order): Delete.
2978 (sim_kind, myname, big_endian_p): New static locals.
2979 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2980 after argument parsing. Recognize -E arg, set endianness accordingly.
2981 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2982 load file into simulator. Set PC from bfd.
2983 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2984 (set_endianness): Use big_endian_p instead of target_byte_order.
2986 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2988 * interp.c (sim_size): Delete prototype - conflicts with
2989 definition in remote-sim.h. Correct definition.
2991 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2993 * configure: Regenerated to track ../common/aclocal.m4 changes.
2996 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2998 * interp.c (sim_open): New arg `kind'.
3000 * configure: Regenerated to track ../common/aclocal.m4 changes.
3002 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3004 * configure: Regenerated to track ../common/aclocal.m4 changes.
3006 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3008 * interp.c (sim_open): Set optind to 0 before calling getopt.
3010 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3012 * configure: Regenerated to track ../common/aclocal.m4 changes.
3014 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3016 * interp.c : Replace uses of pr_addr with pr_uword64
3017 where the bit length is always 64 independent of SIM_ADDR.
3018 (pr_uword64) : added.
3020 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3022 * configure: Re-generate.
3024 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3026 * configure: Regenerate to track ../common/aclocal.m4 changes.
3028 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3030 * interp.c (sim_open): New SIM_DESC result. Argument is now
3032 (other sim_*): New SIM_DESC argument.
3034 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3036 * interp.c: Fix printing of addresses for non-64-bit targets.
3037 (pr_addr): Add function to print address based on size.
3039 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3041 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3043 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3045 * gencode.c (build_mips16_operands): Correct computation of base
3046 address for extended PC relative instruction.
3048 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3050 * interp.c (mips16_entry): Add support for floating point cases.
3051 (SignalException): Pass floating point cases to mips16_entry.
3052 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3054 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3056 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3057 and then set the state to fmt_uninterpreted.
3058 (COP_SW): Temporarily set the state to fmt_word while calling
3061 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3063 * gencode.c (build_instruction): The high order may be set in the
3064 comparison flags at any ISA level, not just ISA 4.
3066 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3068 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3069 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3070 * configure.in: sinclude ../common/aclocal.m4.
3071 * configure: Regenerated.
3073 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3075 * configure: Rebuild after change to aclocal.m4.
3077 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3079 * configure configure.in Makefile.in: Update to new configure
3080 scheme which is more compatible with WinGDB builds.
3081 * configure.in: Improve comment on how to run autoconf.
3082 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3083 * Makefile.in: Use autoconf substitution to install common
3086 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3088 * gencode.c (build_instruction): Use BigEndianCPU instead of
3091 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3093 * interp.c (sim_monitor): Make output to stdout visible in
3094 wingdb's I/O log window.
3096 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3098 * support.h: Undo previous change to SIGTRAP
3101 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3103 * interp.c (store_word, load_word): New static functions.
3104 (mips16_entry): New static function.
3105 (SignalException): Look for mips16 entry and exit instructions.
3106 (simulate): Use the correct index when setting fpr_state after
3107 doing a pending move.
3109 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3111 * interp.c: Fix byte-swapping code throughout to work on
3112 both little- and big-endian hosts.
3114 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3116 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3117 with gdb/config/i386/xm-windows.h.
3119 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3121 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3122 that messes up arithmetic shifts.
3124 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3126 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3127 SIGTRAP and SIGQUIT for _WIN32.
3129 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3131 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3132 force a 64 bit multiplication.
3133 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3134 destination register is 0, since that is the default mips16 nop
3137 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3139 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3140 (build_endian_shift): Don't check proc64.
3141 (build_instruction): Always set memval to uword64. Cast op2 to
3142 uword64 when shifting it left in memory instructions. Always use
3143 the same code for stores--don't special case proc64.
3145 * gencode.c (build_mips16_operands): Fix base PC value for PC
3147 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3149 * interp.c (simJALDELAYSLOT): Define.
3150 (JALDELAYSLOT): Define.
3151 (INDELAYSLOT, INJALDELAYSLOT): Define.
3152 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3154 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3156 * interp.c (sim_open): add flush_cache as a PMON routine
3157 (sim_monitor): handle flush_cache by ignoring it
3159 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3161 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3163 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3164 (BigEndianMem): Rename to ByteSwapMem and change sense.
3165 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3166 BigEndianMem references to !ByteSwapMem.
3167 (set_endianness): New function, with prototype.
3168 (sim_open): Call set_endianness.
3169 (sim_info): Use simBE instead of BigEndianMem.
3170 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3171 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3172 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3173 ifdefs, keeping the prototype declaration.
3174 (swap_word): Rewrite correctly.
3175 (ColdReset): Delete references to CONFIG. Delete endianness related
3176 code; moved to set_endianness.
3178 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3180 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3181 * interp.c (CHECKHILO): Define away.
3182 (simSIGINT): New macro.
3183 (membank_size): Increase from 1MB to 2MB.
3184 (control_c): New function.
3185 (sim_resume): Rename parameter signal to signal_number. Add local
3186 variable prev. Call signal before and after simulate.
3187 (sim_stop_reason): Add simSIGINT support.
3188 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3190 (sim_warning): Delete call to SignalException. Do call printf_filtered
3192 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3193 a call to sim_warning.
3195 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3197 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3198 16 bit instructions.
3200 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3202 Add support for mips16 (16 bit MIPS implementation):
3203 * gencode.c (inst_type): Add mips16 instruction encoding types.
3204 (GETDATASIZEINSN): Define.
3205 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3206 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3208 (MIPS16_DECODE): New table, for mips16 instructions.
3209 (bitmap_val): New static function.
3210 (struct mips16_op): Define.
3211 (mips16_op_table): New table, for mips16 operands.
3212 (build_mips16_operands): New static function.
3213 (process_instructions): If PC is odd, decode a mips16
3214 instruction. Break out instruction handling into new
3215 build_instruction function.
3216 (build_instruction): New static function, broken out of
3217 process_instructions. Check modifiers rather than flags for SHIFT
3218 bit count and m[ft]{hi,lo} direction.
3219 (usage): Pass program name to fprintf.
3220 (main): Remove unused variable this_option_optind. Change
3221 ``*loptarg++'' to ``loptarg++''.
3222 (my_strtoul): Parenthesize && within ||.
3223 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3224 (simulate): If PC is odd, fetch a 16 bit instruction, and
3225 increment PC by 2 rather than 4.
3226 * configure.in: Add case for mips16*-*-*.
3227 * configure: Rebuild.
3229 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3231 * interp.c: Allow -t to enable tracing in standalone simulator.
3232 Fix garbage output in trace file and error messages.
3234 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3236 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3237 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3238 * configure.in: Simplify using macros in ../common/aclocal.m4.
3239 * configure: Regenerated.
3240 * tconfig.in: New file.
3242 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3244 * interp.c: Fix bugs in 64-bit port.
3245 Use ansi function declarations for msvc compiler.
3246 Initialize and test file pointer in trace code.
3247 Prevent duplicate definition of LAST_EMED_REGNUM.
3249 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3251 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3253 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3255 * interp.c (SignalException): Check for explicit terminating
3257 * gencode.c: Pass instruction value through SignalException()
3258 calls for Trap, Breakpoint and Syscall.
3260 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3262 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3263 only used on those hosts that provide it.
3264 * configure.in: Add sqrt() to list of functions to be checked for.
3265 * config.in: Re-generated.
3266 * configure: Re-generated.
3268 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3270 * gencode.c (process_instructions): Call build_endian_shift when
3271 expanding STORE RIGHT, to fix swr.
3272 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3273 clear the high bits.
3274 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3275 Fix float to int conversions to produce signed values.
3277 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3279 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3280 (process_instructions): Correct handling of nor instruction.
3281 Correct shift count for 32 bit shift instructions. Correct sign
3282 extension for arithmetic shifts to not shift the number of bits in
3283 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3284 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3286 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3287 It's OK to have a mult follow a mult. What's not OK is to have a
3288 mult follow an mfhi.
3289 (Convert): Comment out incorrect rounding code.
3291 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3293 * interp.c (sim_monitor): Improved monitor printf
3294 simulation. Tidied up simulator warnings, and added "--log" option
3295 for directing warning message output.
3296 * gencode.c: Use sim_warning() rather than WARNING macro.
3298 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3300 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3301 getopt1.o, rather than on gencode.c. Link objects together.
3302 Don't link against -liberty.
3303 (gencode.o, getopt.o, getopt1.o): New targets.
3304 * gencode.c: Include <ctype.h> and "ansidecl.h".
3305 (AND): Undefine after including "ansidecl.h".
3306 (ULONG_MAX): Define if not defined.
3307 (OP_*): Don't define macros; now defined in opcode/mips.h.
3308 (main): Call my_strtoul rather than strtoul.
3309 (my_strtoul): New static function.
3311 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3313 * gencode.c (process_instructions): Generate word64 and uword64
3314 instead of `long long' and `unsigned long long' data types.
3315 * interp.c: #include sysdep.h to get signals, and define default
3317 * (Convert): Work around for Visual-C++ compiler bug with type
3319 * support.h: Make things compile under Visual-C++ by using
3320 __int64 instead of `long long'. Change many refs to long long
3321 into word64/uword64 typedefs.
3323 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3325 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3326 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3328 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3329 (AC_PROG_INSTALL): Added.
3330 (AC_PROG_CC): Moved to before configure.host call.
3331 * configure: Rebuilt.
3333 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3335 * configure.in: Define @SIMCONF@ depending on mips target.
3336 * configure: Rebuild.
3337 * Makefile.in (run): Add @SIMCONF@ to control simulator
3339 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3340 * interp.c: Remove some debugging, provide more detailed error
3341 messages, update memory accesses to use LOADDRMASK.
3343 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3345 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3346 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3348 * configure: Rebuild.
3349 * config.in: New file, generated by autoheader.
3350 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3351 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3352 HAVE_ANINT and HAVE_AINT, as appropriate.
3353 * Makefile.in (run): Use @LIBS@ rather than -lm.
3354 (interp.o): Depend upon config.h.
3355 (Makefile): Just rebuild Makefile.
3356 (clean): Remove stamp-h.
3357 (mostlyclean): Make the same as clean, not as distclean.
3358 (config.h, stamp-h): New targets.
3360 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3362 * interp.c (ColdReset): Fix boolean test. Make all simulator
3365 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3367 * interp.c (xfer_direct_word, xfer_direct_long,
3368 swap_direct_word, swap_direct_long, xfer_big_word,
3369 xfer_big_long, xfer_little_word, xfer_little_long,
3370 swap_word,swap_long): Added.
3371 * interp.c (ColdReset): Provide function indirection to
3372 host<->simulated_target transfer routines.
3373 * interp.c (sim_store_register, sim_fetch_register): Updated to
3374 make use of indirected transfer routines.
3376 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3378 * gencode.c (process_instructions): Ensure FP ABS instruction
3380 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3381 system call support.
3383 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3385 * interp.c (sim_do_command): Complain if callback structure not
3388 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3390 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3391 support for Sun hosts.
3392 * Makefile.in (gencode): Ensure the host compiler and libraries
3393 used for cross-hosted build.
3395 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3397 * interp.c, gencode.c: Some more (TODO) tidying.
3399 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3401 * gencode.c, interp.c: Replaced explicit long long references with
3402 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3403 * support.h (SET64LO, SET64HI): Macros added.
3405 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3407 * configure: Regenerate with autoconf 2.7.
3409 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3411 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3412 * support.h: Remove superfluous "1" from #if.
3413 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3415 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3417 * interp.c (StoreFPR): Control UndefinedResult() call on
3418 WARN_RESULT manifest.
3420 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3422 * gencode.c: Tidied instruction decoding, and added FP instruction
3425 * interp.c: Added dineroIII, and BSD profiling support. Also
3426 run-time FP handling.
3428 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3430 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3431 gencode.c, interp.c, support.h: created.
projects / external / binutils.git / blob