1 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
3 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
4 cache don't get ReservedInstruction traps.
6 1999-11-29 Mark Salter <msalter@cygnus.com>
8 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
9 to clear status bits in sdisr register. This is how the hardware works.
11 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
14 1999-11-11 Andrew Haley <aph@cygnus.com>
16 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
19 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
21 * mips.igen (MULT): Correct previous mis-applied patch.
23 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
25 * mips.igen (delayslot32): Handle sequence like
26 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
27 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
28 (MULT): Actually pass the third register...
30 1999-09-03 Mark Salter <msalter@cygnus.com>
32 * interp.c (sim_open): Added more memory aliases for additional
33 hardware being touched by cygmon on jmr3904 board.
35 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
37 * configure: Regenerated to track ../common/aclocal.m4 changes.
39 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
41 * interp.c (sim_store_register): Handle case where client - GDB -
42 specifies that a 4 byte register is 8 bytes in size.
43 (sim_fetch_register): Ditto.
45 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
47 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
48 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
49 (idt_monitor_base): Base address for IDT monitor traps.
50 (pmon_monitor_base): Ditto for PMON.
51 (lsipmon_monitor_base): Ditto for LSI PMON.
52 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
53 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
54 (sim_firmware_command): New function.
55 (mips_option_handler): Call it for OPTION_FIRMWARE.
56 (sim_open): Allocate memory for idt_monitor region. If "--board"
57 option was given, add no monitor by default. Add BREAK hooks only if
58 monitors are also there.
60 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
62 * interp.c (sim_monitor): Flush output before reading input.
64 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
66 * tconfig.in (SIM_HANDLES_LMA): Always define.
68 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
70 From Mark Salter <msalter@cygnus.com>:
71 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
72 (sim_open): Add setup for BSP board.
74 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
76 * mips.igen (MULT, MULTU): Add syntax for two operand version.
77 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
78 them as unimplemented.
80 1999-05-08 Felix Lee <flee@cygnus.com>
82 * configure: Regenerated to track ../common/aclocal.m4 changes.
84 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
86 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
88 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
90 * configure.in: Any mips64vr5*-*-* target should have
92 (default_endian): Any mips64vr*el-*-* target should default to
94 * configure: Re-generate.
96 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
98 * mips.igen (ldl): Extend from _16_, not 32.
100 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
102 * interp.c (sim_store_register): Force registers written to by GDB
103 into an un-interpreted state.
105 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
107 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
108 CPU, start periodic background I/O polls.
109 (tx3904sio_poll): New function: periodic I/O poller.
111 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
113 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
115 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
117 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
120 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
122 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
123 (load_word): Call SIM_CORE_SIGNAL hook on error.
124 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
125 starting. For exception dispatching, pass PC instead of NULL_CIA.
126 (decode_coproc): Use COP0_BADVADDR to store faulting address.
127 * sim-main.h (COP0_BADVADDR): Define.
128 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
129 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
130 (_sim_cpu): Add exc_* fields to store register value snapshots.
131 * mips.igen (*): Replace memory-related SignalException* calls
132 with references to SIM_CORE_SIGNAL hook.
134 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
136 * sim-main.c (*): Minor warning cleanups.
138 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
140 * m16.igen (DADDIU5): Correct type-o.
142 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
144 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
147 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
149 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
151 (interp.o): Add dependency on itable.h
152 (oengine.c, gencode): Delete remaining references.
153 (BUILT_SRC_FROM_GEN): Clean up.
155 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
158 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
159 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
161 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
162 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
163 Drop the "64" qualifier to get the HACK generator working.
164 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
165 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
166 qualifier to get the hack generator working.
167 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
169 (DSLLV): Use do_dsllv.
172 (DSRLV): Use do_dsrlv.
173 (BC1): Move *vr4100 to get the HACK generator working.
174 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
175 get the HACK generator working.
176 (MACC) Rename to get the HACK generator working.
177 (DMACC,MACCS,DMACCS): Add the 64.
179 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
181 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
182 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
184 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
186 * mips/interp.c (DEBUG): Cleanups.
188 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
190 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
191 (tx3904sio_tickle): fflush after a stdout character output.
193 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
195 * interp.c (sim_close): Uninstall modules.
197 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
199 * sim-main.h, interp.c (sim_monitor): Change to global
202 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
204 * configure.in (vr4100): Only include vr4100 instructions in
206 * configure: Re-generate.
207 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
209 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
211 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
212 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
215 * configure.in (sim_default_gen, sim_use_gen): Replace with
217 (--enable-sim-igen): Delete config option. Always using IGEN.
218 * configure: Re-generate.
220 * Makefile.in (gencode): Kill, kill, kill.
223 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
225 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
226 bit mips16 igen simulator.
227 * configure: Re-generate.
229 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
230 as part of vr4100 ISA.
231 * vr.igen: Mark all instructions as 64 bit only.
233 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
235 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
238 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
240 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
241 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
242 * configure: Re-generate.
244 * m16.igen (BREAK): Define breakpoint instruction.
245 (JALX32): Mark instruction as mips16 and not r3900.
246 * mips.igen (C.cond.fmt): Fix typo in instruction format.
248 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
250 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
252 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
253 insn as a debug breakpoint.
255 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
257 (PENDING_SCHED): Clean up trace statement.
258 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
259 (PENDING_FILL): Delay write by only one cycle.
260 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
262 * sim-main.c (pending_tick): Clean up trace statements. Add trace
264 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
266 (pending_tick): Move incrementing of index to FOR statement.
267 (pending_tick): Only update PENDING_OUT after a write has occured.
269 * configure.in: Add explicit mips-lsi-* target. Use gencode to
271 * configure: Re-generate.
273 * interp.c (sim_engine_run OLD): Delete explicit call to
274 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
276 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
278 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
279 interrupt level number to match changed SignalExceptionInterrupt
282 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
284 * interp.c: #include "itable.h" if WITH_IGEN.
285 (get_insn_name): New function.
286 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
287 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
289 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
291 * configure: Rebuilt to inhale new common/aclocal.m4.
293 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
295 * dv-tx3904sio.c: Include sim-assert.h.
297 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
299 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
300 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
301 Reorganize target-specific sim-hardware checks.
302 * configure: rebuilt.
303 * interp.c (sim_open): For tx39 target boards, set
304 OPERATING_ENVIRONMENT, add tx3904sio devices.
305 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
306 ROM executables. Install dv-sockser into sim-modules list.
308 * dv-tx3904irc.c: Compiler warning clean-up.
309 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
310 frequent hw-trace messages.
312 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
314 * vr.igen (MulAcc): Identify as a vr4100 specific function.
316 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
318 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
321 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
322 * mips.igen: Define vr4100 model. Include vr.igen.
323 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
325 * mips.igen (check_mf_hilo): Correct check.
327 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
329 * sim-main.h (interrupt_event): Add prototype.
331 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
332 register_ptr, register_value.
333 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
335 * sim-main.h (tracefh): Make extern.
337 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
339 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
340 Reduce unnecessarily high timer event frequency.
341 * dv-tx3904cpu.c: Ditto for interrupt event.
343 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
345 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
347 (interrupt_event): Made non-static.
349 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
350 interchange of configuration values for external vs. internal
353 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
355 * mips.igen (BREAK): Moved code to here for
356 simulator-reserved break instructions.
357 * gencode.c (build_instruction): Ditto.
358 * interp.c (signal_exception): Code moved from here. Non-
359 reserved instructions now use exception vector, rather
361 * sim-main.h: Moved magic constants to here.
363 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
365 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
366 register upon non-zero interrupt event level, clear upon zero
368 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
369 by passing zero event value.
370 (*_io_{read,write}_buffer): Endianness fixes.
371 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
372 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
374 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
375 serial I/O and timer module at base address 0xFFFF0000.
377 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
379 * mips.igen (SWC1) : Correct the handling of ReverseEndian
382 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
384 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
388 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
390 * dv-tx3904tmr.c: New file - implements tx3904 timer.
391 * dv-tx3904{irc,cpu}.c: Mild reformatting.
392 * configure.in: Include tx3904tmr in hw_device list.
393 * configure: Rebuilt.
394 * interp.c (sim_open): Instantiate three timer instances.
395 Fix address typo of tx3904irc instance.
397 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
399 * interp.c (signal_exception): SystemCall exception now uses
400 the exception vector.
402 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
404 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
407 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
409 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
411 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
413 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
415 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
416 sim-main.h. Declare a struct hw_descriptor instead of struct
417 hw_device_descriptor.
419 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
421 * mips.igen (do_store_left, do_load_left): Compute nr of left and
422 right bits and then re-align left hand bytes to correct byte
423 lanes. Fix incorrect computation in do_store_left when loading
424 bytes from second word.
426 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
428 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
429 * interp.c (sim_open): Only create a device tree when HW is
432 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
433 * interp.c (signal_exception): Ditto.
435 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
437 * gencode.c: Mark BEGEZALL as LIKELY.
439 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
441 * sim-main.h (ALU32_END): Sign extend 32 bit results.
442 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
444 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
446 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
447 modules. Recognize TX39 target with "mips*tx39" pattern.
448 * configure: Rebuilt.
449 * sim-main.h (*): Added many macros defining bits in
450 TX39 control registers.
451 (SignalInterrupt): Send actual PC instead of NULL.
452 (SignalNMIReset): New exception type.
453 * interp.c (board): New variable for future use to identify
454 a particular board being simulated.
455 (mips_option_handler,mips_options): Added "--board" option.
456 (interrupt_event): Send actual PC.
457 (sim_open): Make memory layout conditional on board setting.
458 (signal_exception): Initial implementation of hardware interrupt
459 handling. Accept another break instruction variant for simulator
461 (decode_coproc): Implement RFE instruction for TX39.
462 (mips.igen): Decode RFE instruction as such.
463 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
464 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
465 bbegin to implement memory map.
466 * dv-tx3904cpu.c: New file.
467 * dv-tx3904irc.c: New file.
469 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
471 * mips.igen (check_mt_hilo): Create a separate r3900 version.
473 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
475 * tx.igen (madd,maddu): Replace calls to check_op_hilo
476 with calls to check_div_hilo.
478 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
480 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
481 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
482 Add special r3900 version of do_mult_hilo.
483 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
484 with calls to check_mult_hilo.
485 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
486 with calls to check_div_hilo.
488 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
490 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
491 Document a replacement.
493 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
495 * interp.c (sim_monitor): Make mon_printf work.
497 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
499 * sim-main.h (INSN_NAME): New arg `cpu'.
501 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
503 * configure: Regenerated to track ../common/aclocal.m4 changes.
505 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
507 * configure: Regenerated to track ../common/aclocal.m4 changes.
510 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
512 * acconfig.h: New file.
513 * configure.in: Reverted change of Apr 24; use sinclude again.
515 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
517 * configure: Regenerated to track ../common/aclocal.m4 changes.
520 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
522 * configure.in: Don't call sinclude.
524 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
526 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
528 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
530 * mips.igen (ERET): Implement.
532 * interp.c (decode_coproc): Return sign-extended EPC.
534 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
536 * interp.c (signal_exception): Do not ignore Trap.
537 (signal_exception): On TRAP, restart at exception address.
538 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
539 (signal_exception): Update.
540 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
541 so that TRAP instructions are caught.
543 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
545 * sim-main.h (struct hilo_access, struct hilo_history): Define,
546 contains HI/LO access history.
547 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
548 (HIACCESS, LOACCESS): Delete, replace with
549 (HIHISTORY, LOHISTORY): New macros.
550 (CHECKHILO): Delete all, moved to mips.igen
552 * gencode.c (build_instruction): Do not generate checks for
553 correct HI/LO register usage.
555 * interp.c (old_engine_run): Delete checks for correct HI/LO
558 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
559 check_mf_cycles): New functions.
560 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
561 do_divu, domultx, do_mult, do_multu): Use.
563 * tx.igen ("madd", "maddu"): Use.
565 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
567 * mips.igen (DSRAV): Use function do_dsrav.
568 (SRAV): Use new function do_srav.
570 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
571 (B): Sign extend 11 bit immediate.
572 (EXT-B*): Shift 16 bit immediate left by 1.
573 (ADDIU*): Don't sign extend immediate value.
575 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
577 * m16run.c (sim_engine_run): Restore CIA after handling an event.
579 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
582 * mips.igen (delayslot32, nullify_next_insn): New functions.
583 (m16.igen): Always include.
584 (do_*): Add more tracing.
586 * m16.igen (delayslot16): Add NIA argument, could be called by a
587 32 bit MIPS16 instruction.
589 * interp.c (ifetch16): Move function from here.
590 * sim-main.c (ifetch16): To here.
592 * sim-main.c (ifetch16, ifetch32): Update to match current
593 implementations of LH, LW.
594 (signal_exception): Don't print out incorrect hex value of illegal
597 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
599 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
602 * m16.igen: Implement MIPS16 instructions.
604 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
605 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
606 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
607 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
608 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
609 bodies of corresponding code from 32 bit insn to these. Also used
610 by MIPS16 versions of functions.
612 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
613 (IMEM16): Drop NR argument from macro.
615 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
617 * Makefile.in (SIM_OBJS): Add sim-main.o.
619 * sim-main.h (address_translation, load_memory, store_memory,
620 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
622 (pr_addr, pr_uword64): Declare.
623 (sim-main.c): Include when H_REVEALS_MODULE_P.
625 * interp.c (address_translation, load_memory, store_memory,
626 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
628 * sim-main.c: To here. Fix compilation problems.
630 * configure.in: Enable inlining.
631 * configure: Re-config.
633 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
635 * configure: Regenerated to track ../common/aclocal.m4 changes.
637 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
639 * mips.igen: Include tx.igen.
640 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
641 * tx.igen: New file, contains MADD and MADDU.
643 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
644 the hardwired constant `7'.
645 (store_memory): Ditto.
646 (LOADDRMASK): Move definition to sim-main.h.
648 mips.igen (MTC0): Enable for r3900.
651 mips.igen (do_load_byte): Delete.
652 (do_load, do_store, do_load_left, do_load_write, do_store_left,
653 do_store_right): New functions.
654 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
656 configure.in: Let the tx39 use igen again.
659 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
661 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
662 not an address sized quantity. Return zero for cache sizes.
664 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
666 * mips.igen (r3900): r3900 does not support 64 bit integer
669 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
671 * configure.in (mipstx39*-*-*): Use gencode simulator rather
673 * configure : Rebuild.
675 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
677 * configure: Regenerated to track ../common/aclocal.m4 changes.
679 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
681 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
683 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
685 * configure: Regenerated to track ../common/aclocal.m4 changes.
686 * config.in: Regenerated to track ../common/aclocal.m4 changes.
688 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
690 * configure: Regenerated to track ../common/aclocal.m4 changes.
692 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
694 * interp.c (Max, Min): Comment out functions. Not yet used.
696 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
698 * configure: Regenerated to track ../common/aclocal.m4 changes.
700 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
702 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
703 configurable settings for stand-alone simulator.
705 * configure.in: Added X11 search, just in case.
707 * configure: Regenerated.
709 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
711 * interp.c (sim_write, sim_read, load_memory, store_memory):
712 Replace sim_core_*_map with read_map, write_map, exec_map resp.
714 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
716 * sim-main.h (GETFCC): Return an unsigned value.
718 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
720 * mips.igen (DIV): Fix check for -1 / MIN_INT.
721 (DADD): Result destination is RD not RT.
723 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
725 * sim-main.h (HIACCESS, LOACCESS): Always define.
727 * mdmx.igen (Maxi, Mini): Rename Max, Min.
729 * interp.c (sim_info): Delete.
731 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
733 * interp.c (DECLARE_OPTION_HANDLER): Use it.
734 (mips_option_handler): New argument `cpu'.
735 (sim_open): Update call to sim_add_option_table.
737 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
739 * mips.igen (CxC1): Add tracing.
741 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
743 * sim-main.h (Max, Min): Declare.
745 * interp.c (Max, Min): New functions.
747 * mips.igen (BC1): Add tracing.
749 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
751 * interp.c Added memory map for stack in vr4100
753 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
755 * interp.c (load_memory): Add missing "break"'s.
757 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
759 * interp.c (sim_store_register, sim_fetch_register): Pass in
760 length parameter. Return -1.
762 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
764 * interp.c: Added hardware init hook, fixed warnings.
766 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
768 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
770 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
772 * interp.c (ifetch16): New function.
774 * sim-main.h (IMEM32): Rename IMEM.
775 (IMEM16_IMMED): Define.
777 (DELAY_SLOT): Update.
779 * m16run.c (sim_engine_run): New file.
781 * m16.igen: All instructions except LB.
782 (LB): Call do_load_byte.
783 * mips.igen (do_load_byte): New function.
784 (LB): Call do_load_byte.
786 * mips.igen: Move spec for insn bit size and high bit from here.
787 * Makefile.in (tmp-igen, tmp-m16): To here.
789 * m16.dc: New file, decode mips16 instructions.
791 * Makefile.in (SIM_NO_ALL): Define.
792 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
794 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
796 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
797 point unit to 32 bit registers.
798 * configure: Re-generate.
800 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
802 * configure.in (sim_use_gen): Make IGEN the default simulator
803 generator for generic 32 and 64 bit mips targets.
804 * configure: Re-generate.
806 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
808 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
811 * interp.c (sim_fetch_register, sim_store_register): Read/write
812 FGR from correct location.
813 (sim_open): Set size of FGR's according to
814 WITH_TARGET_FLOATING_POINT_BITSIZE.
816 * sim-main.h (FGR): Store floating point registers in a separate
819 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
821 * configure: Regenerated to track ../common/aclocal.m4 changes.
823 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
825 * interp.c (ColdReset): Call PENDING_INVALIDATE.
827 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
829 * interp.c (pending_tick): New function. Deliver pending writes.
831 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
832 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
833 it can handle mixed sized quantites and single bits.
835 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
837 * interp.c (oengine.h): Do not include when building with IGEN.
838 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
839 (sim_info): Ditto for PROCESSOR_64BIT.
840 (sim_monitor): Replace ut_reg with unsigned_word.
841 (*): Ditto for t_reg.
842 (LOADDRMASK): Define.
843 (sim_open): Remove defunct check that host FP is IEEE compliant,
844 using software to emulate floating point.
845 (value_fpr, ...): Always compile, was conditional on HASFPU.
847 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
849 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
852 * interp.c (SD, CPU): Define.
853 (mips_option_handler): Set flags in each CPU.
854 (interrupt_event): Assume CPU 0 is the one being iterrupted.
855 (sim_close): Do not clear STATE, deleted anyway.
856 (sim_write, sim_read): Assume CPU zero's vm should be used for
858 (sim_create_inferior): Set the PC for all processors.
859 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
861 (mips16_entry): Pass correct nr of args to store_word, load_word.
862 (ColdReset): Cold reset all cpu's.
863 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
864 (sim_monitor, load_memory, store_memory, signal_exception): Use
865 `CPU' instead of STATE_CPU.
868 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
871 * sim-main.h (signal_exception): Add sim_cpu arg.
872 (SignalException*): Pass both SD and CPU to signal_exception.
873 * interp.c (signal_exception): Update.
875 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
877 (sync_operation, prefetch, cache_op, store_memory, load_memory,
878 address_translation): Ditto
879 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
881 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
883 * configure: Regenerated to track ../common/aclocal.m4 changes.
885 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
887 * interp.c (sim_engine_run): Add `nr_cpus' argument.
889 * mips.igen (model): Map processor names onto BFD name.
891 * sim-main.h (CPU_CIA): Delete.
892 (SET_CIA, GET_CIA): Define
894 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
896 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
899 * configure.in (default_endian): Configure a big-endian simulator
901 * configure: Re-generate.
903 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
905 * configure: Regenerated to track ../common/aclocal.m4 changes.
907 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
909 * interp.c (sim_monitor): Handle Densan monitor outbyte
910 and inbyte functions.
912 1997-12-29 Felix Lee <flee@cygnus.com>
914 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
916 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
918 * Makefile.in (tmp-igen): Arrange for $zero to always be
919 reset to zero after every instruction.
921 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
923 * configure: Regenerated to track ../common/aclocal.m4 changes.
926 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
928 * mips.igen (MSUB): Fix to work like MADD.
929 * gencode.c (MSUB): Similarly.
931 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
933 * configure: Regenerated to track ../common/aclocal.m4 changes.
935 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
937 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
939 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
941 * sim-main.h (sim-fpu.h): Include.
943 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
944 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
945 using host independant sim_fpu module.
947 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
949 * interp.c (signal_exception): Report internal errors with SIGABRT
952 * sim-main.h (C0_CONFIG): New register.
953 (signal.h): No longer include.
955 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
957 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
959 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
961 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
963 * mips.igen: Tag vr5000 instructions.
964 (ANDI): Was missing mipsIV model, fix assembler syntax.
965 (do_c_cond_fmt): New function.
966 (C.cond.fmt): Handle mips I-III which do not support CC field
968 (bc1): Handle mips IV which do not have a delaed FCC separatly.
969 (SDR): Mask paddr when BigEndianMem, not the converse as specified
971 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
972 vr5000 which saves LO in a GPR separatly.
974 * configure.in (enable-sim-igen): For vr5000, select vr5000
975 specific instructions.
976 * configure: Re-generate.
978 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
980 * Makefile.in (SIM_OBJS): Add sim-fpu module.
982 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
983 fmt_uninterpreted_64 bit cases to switch. Convert to
986 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
988 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
989 as specified in IV3.2 spec.
990 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
992 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
994 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
995 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
996 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
997 PENDING_FILL versions of instructions. Simplify.
999 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1001 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1003 (MTHI, MFHI): Disable code checking HI-LO.
1005 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1007 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1009 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1011 * gencode.c (build_mips16_operands): Replace IPC with cia.
1013 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1014 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1016 (UndefinedResult): Replace function with macro/function
1018 (sim_engine_run): Don't save PC in IPC.
1020 * sim-main.h (IPC): Delete.
1023 * interp.c (signal_exception, store_word, load_word,
1024 address_translation, load_memory, store_memory, cache_op,
1025 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1026 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1027 current instruction address - cia - argument.
1028 (sim_read, sim_write): Call address_translation directly.
1029 (sim_engine_run): Rename variable vaddr to cia.
1030 (signal_exception): Pass cia to sim_monitor
1032 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1033 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1034 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1036 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1037 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1040 * interp.c (signal_exception): Pass restart address to
1043 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1044 idecode.o): Add dependency.
1046 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1048 (DELAY_SLOT): Update NIA not PC with branch address.
1049 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1051 * mips.igen: Use CIA not PC in branch calculations.
1052 (illegal): Call SignalException.
1053 (BEQ, ADDIU): Fix assembler.
1055 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1057 * m16.igen (JALX): Was missing.
1059 * configure.in (enable-sim-igen): New configuration option.
1060 * configure: Re-generate.
1062 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1064 * interp.c (load_memory, store_memory): Delete parameter RAW.
1065 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1066 bypassing {load,store}_memory.
1068 * sim-main.h (ByteSwapMem): Delete definition.
1070 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1072 * interp.c (sim_do_command, sim_commands): Delete mips specific
1073 commands. Handled by module sim-options.
1075 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1076 (WITH_MODULO_MEMORY): Define.
1078 * interp.c (sim_info): Delete code printing memory size.
1080 * interp.c (mips_size): Nee sim_size, delete function.
1082 (monitor, monitor_base, monitor_size): Delete global variables.
1083 (sim_open, sim_close): Delete code creating monitor and other
1084 memory regions. Use sim-memopts module, via sim_do_commandf, to
1085 manage memory regions.
1086 (load_memory, store_memory): Use sim-core for memory model.
1088 * interp.c (address_translation): Delete all memory map code
1089 except line forcing 32 bit addresses.
1091 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1093 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1096 * interp.c (logfh, logfile): Delete globals.
1097 (sim_open, sim_close): Delete code opening & closing log file.
1098 (mips_option_handler): Delete -l and -n options.
1099 (OPTION mips_options): Ditto.
1101 * interp.c (OPTION mips_options): Rename option trace to dinero.
1102 (mips_option_handler): Update.
1104 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1106 * interp.c (fetch_str): New function.
1107 (sim_monitor): Rewrite using sim_read & sim_write.
1108 (sim_open): Check magic number.
1109 (sim_open): Write monitor vectors into memory using sim_write.
1110 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1111 (sim_read, sim_write): Simplify - transfer data one byte at a
1113 (load_memory, store_memory): Clarify meaning of parameter RAW.
1115 * sim-main.h (isHOST): Defete definition.
1116 (isTARGET): Mark as depreciated.
1117 (address_translation): Delete parameter HOST.
1119 * interp.c (address_translation): Delete parameter HOST.
1121 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1125 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1126 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1128 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1130 * mips.igen: Add model filter field to records.
1132 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1134 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1136 interp.c (sim_engine_run): Do not compile function sim_engine_run
1137 when WITH_IGEN == 1.
1139 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1140 target architecture.
1142 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1143 igen. Replace with configuration variables sim_igen_flags /
1146 * m16.igen: New file. Copy mips16 insns here.
1147 * mips.igen: From here.
1149 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1151 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1153 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1155 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1157 * gencode.c (build_instruction): Follow sim_write's lead in using
1158 BigEndianMem instead of !ByteSwapMem.
1160 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1162 * configure.in (sim_gen): Dependent on target, select type of
1163 generator. Always select old style generator.
1165 configure: Re-generate.
1167 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1169 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1170 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1171 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1172 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1173 SIM_@sim_gen@_*, set by autoconf.
1175 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1177 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1179 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1180 CURRENT_FLOATING_POINT instead.
1182 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1183 (address_translation): Raise exception InstructionFetch when
1184 translation fails and isINSTRUCTION.
1186 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1187 sim_engine_run): Change type of of vaddr and paddr to
1189 (address_translation, prefetch, load_memory, store_memory,
1190 cache_op): Change type of vAddr and pAddr to address_word.
1192 * gencode.c (build_instruction): Change type of vaddr and paddr to
1195 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1197 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1198 macro to obtain result of ALU op.
1200 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1202 * interp.c (sim_info): Call profile_print.
1204 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1206 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1208 * sim-main.h (WITH_PROFILE): Do not define, defined in
1209 common/sim-config.h. Use sim-profile module.
1210 (simPROFILE): Delete defintion.
1212 * interp.c (PROFILE): Delete definition.
1213 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1214 (sim_close): Delete code writing profile histogram.
1215 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1217 (sim_engine_run): Delete code profiling the PC.
1219 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1221 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1223 * interp.c (sim_monitor): Make register pointers of type
1226 * sim-main.h: Make registers of type unsigned_word not
1229 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1231 * interp.c (sync_operation): Rename from SyncOperation, make
1232 global, add SD argument.
1233 (prefetch): Rename from Prefetch, make global, add SD argument.
1234 (decode_coproc): Make global.
1236 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1238 * gencode.c (build_instruction): Generate DecodeCoproc not
1239 decode_coproc calls.
1241 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1242 (SizeFGR): Move to sim-main.h
1243 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1244 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1245 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1247 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1248 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1249 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1250 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1251 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1252 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1254 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1256 (sim-alu.h): Include.
1257 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1258 (sim_cia): Typedef to instruction_address.
1260 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1262 * Makefile.in (interp.o): Rename generated file engine.c to
1267 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1269 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1271 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1273 * gencode.c (build_instruction): For "FPSQRT", output correct
1274 number of arguments to Recip.
1276 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1278 * Makefile.in (interp.o): Depends on sim-main.h
1280 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1282 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1283 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1284 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1285 STATE, DSSTATE): Define
1286 (GPR, FGRIDX, ..): Define.
1288 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1289 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1290 (GPR, FGRIDX, ...): Delete macros.
1292 * interp.c: Update names to match defines from sim-main.h
1294 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1296 * interp.c (sim_monitor): Add SD argument.
1297 (sim_warning): Delete. Replace calls with calls to
1299 (sim_error): Delete. Replace calls with sim_io_error.
1300 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1301 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1302 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1304 (mips_size): Rename from sim_size. Add SD argument.
1306 * interp.c (simulator): Delete global variable.
1307 (callback): Delete global variable.
1308 (mips_option_handler, sim_open, sim_write, sim_read,
1309 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1310 sim_size,sim_monitor): Use sim_io_* not callback->*.
1311 (sim_open): ZALLOC simulator struct.
1312 (PROFILE): Do not define.
1314 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1316 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1317 support.h with corresponding code.
1319 * sim-main.h (word64, uword64), support.h: Move definition to
1321 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1324 * Makefile.in: Update dependencies
1325 * interp.c: Do not include.
1327 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1329 * interp.c (address_translation, load_memory, store_memory,
1330 cache_op): Rename to from AddressTranslation et.al., make global,
1333 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1336 * interp.c (SignalException): Rename to signal_exception, make
1339 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1341 * sim-main.h (SignalException, SignalExceptionInterrupt,
1342 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1343 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1344 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1347 * interp.c, support.h: Use.
1349 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1351 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1352 to value_fpr / store_fpr. Add SD argument.
1353 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1354 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1356 * sim-main.h (ValueFPR, StoreFPR): Define.
1358 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1360 * interp.c (sim_engine_run): Check consistency between configure
1361 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1364 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1365 (mips_fpu): Configure WITH_FLOATING_POINT.
1366 (mips_endian): Configure WITH_TARGET_ENDIAN.
1367 * configure: Update.
1369 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1371 * configure: Regenerated to track ../common/aclocal.m4 changes.
1373 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1375 * configure: Regenerated.
1377 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1379 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1381 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1383 * gencode.c (print_igen_insn_models): Assume certain architectures
1384 include all mips* instructions.
1385 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1388 * Makefile.in (tmp.igen): Add target. Generate igen input from
1391 * gencode.c (FEATURE_IGEN): Define.
1392 (main): Add --igen option. Generate output in igen format.
1393 (process_instructions): Format output according to igen option.
1394 (print_igen_insn_format): New function.
1395 (print_igen_insn_models): New function.
1396 (process_instructions): Only issue warnings and ignore
1397 instructions when no FEATURE_IGEN.
1399 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1401 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1404 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1406 * configure: Regenerated to track ../common/aclocal.m4 changes.
1408 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1410 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1411 SIM_RESERVED_BITS): Delete, moved to common.
1412 (SIM_EXTRA_CFLAGS): Update.
1414 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1416 * configure.in: Configure non-strict memory alignment.
1417 * configure: Regenerated to track ../common/aclocal.m4 changes.
1419 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1421 * configure: Regenerated to track ../common/aclocal.m4 changes.
1423 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1425 * gencode.c (SDBBP,DERET): Added (3900) insns.
1426 (RFE): Turn on for 3900.
1427 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1428 (dsstate): Made global.
1429 (SUBTARGET_R3900): Added.
1430 (CANCELDELAYSLOT): New.
1431 (SignalException): Ignore SystemCall rather than ignore and
1432 terminate. Add DebugBreakPoint handling.
1433 (decode_coproc): New insns RFE, DERET; and new registers Debug
1434 and DEPC protected by SUBTARGET_R3900.
1435 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1437 * Makefile.in,configure.in: Add mips subtarget option.
1438 * configure: Update.
1440 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1442 * gencode.c: Add r3900 (tx39).
1445 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1447 * gencode.c (build_instruction): Don't need to subtract 4 for
1450 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1452 * interp.c: Correct some HASFPU problems.
1454 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1456 * configure: Regenerated to track ../common/aclocal.m4 changes.
1458 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1460 * interp.c (mips_options): Fix samples option short form, should
1463 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1465 * interp.c (sim_info): Enable info code. Was just returning.
1467 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1469 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1472 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1474 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1476 (build_instruction): Ditto for LL.
1478 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1480 * configure: Regenerated to track ../common/aclocal.m4 changes.
1482 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1484 * configure: Regenerated to track ../common/aclocal.m4 changes.
1487 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1489 * interp.c (sim_open): Add call to sim_analyze_program, update
1492 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1494 * interp.c (sim_kill): Delete.
1495 (sim_create_inferior): Add ABFD argument. Set PC from same.
1496 (sim_load): Move code initializing trap handlers from here.
1497 (sim_open): To here.
1498 (sim_load): Delete, use sim-hload.c.
1500 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1502 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1504 * configure: Regenerated to track ../common/aclocal.m4 changes.
1507 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1509 * interp.c (sim_open): Add ABFD argument.
1510 (sim_load): Move call to sim_config from here.
1511 (sim_open): To here. Check return status.
1513 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1515 * gencode.c (build_instruction): Two arg MADD should
1516 not assign result to $0.
1518 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1520 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1521 * sim/mips/configure.in: Regenerate.
1523 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1525 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1526 signed8, unsigned8 et.al. types.
1528 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1529 hosts when selecting subreg.
1531 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1533 * interp.c (sim_engine_run): Reset the ZERO register to zero
1534 regardless of FEATURE_WARN_ZERO.
1535 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1537 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1539 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1540 (SignalException): For BreakPoints ignore any mode bits and just
1542 (SignalException): Always set the CAUSE register.
1544 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1546 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1547 exception has been taken.
1549 * interp.c: Implement the ERET and mt/f sr instructions.
1551 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1553 * interp.c (SignalException): Don't bother restarting an
1556 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1558 * interp.c (SignalException): Really take an interrupt.
1559 (interrupt_event): Only deliver interrupts when enabled.
1561 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1563 * interp.c (sim_info): Only print info when verbose.
1564 (sim_info) Use sim_io_printf for output.
1566 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1568 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1571 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1573 * interp.c (sim_do_command): Check for common commands if a
1574 simulator specific command fails.
1576 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1578 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1579 and simBE when DEBUG is defined.
1581 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1583 * interp.c (interrupt_event): New function. Pass exception event
1584 onto exception handler.
1586 * configure.in: Check for stdlib.h.
1587 * configure: Regenerate.
1589 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1590 variable declaration.
1591 (build_instruction): Initialize memval1.
1592 (build_instruction): Add UNUSED attribute to byte, bigend,
1594 (build_operands): Ditto.
1596 * interp.c: Fix GCC warnings.
1597 (sim_get_quit_code): Delete.
1599 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1600 * Makefile.in: Ditto.
1601 * configure: Re-generate.
1603 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1605 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1607 * interp.c (mips_option_handler): New function parse argumes using
1609 (myname): Replace with STATE_MY_NAME.
1610 (sim_open): Delete check for host endianness - performed by
1612 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1613 (sim_open): Move much of the initialization from here.
1614 (sim_load): To here. After the image has been loaded and
1616 (sim_open): Move ColdReset from here.
1617 (sim_create_inferior): To here.
1618 (sim_open): Make FP check less dependant on host endianness.
1620 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1622 * interp.c (sim_set_callbacks): Delete.
1624 * interp.c (membank, membank_base, membank_size): Replace with
1625 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1626 (sim_open): Remove call to callback->init. gdb/run do this.
1630 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1632 * interp.c (big_endian_p): Delete, replaced by
1633 current_target_byte_order.
1635 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1637 * interp.c (host_read_long, host_read_word, host_swap_word,
1638 host_swap_long): Delete. Using common sim-endian.
1639 (sim_fetch_register, sim_store_register): Use H2T.
1640 (pipeline_ticks): Delete. Handled by sim-events.
1642 (sim_engine_run): Update.
1644 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1646 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1648 (SignalException): To here. Signal using sim_engine_halt.
1649 (sim_stop_reason): Delete, moved to common.
1651 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1653 * interp.c (sim_open): Add callback argument.
1654 (sim_set_callbacks): Delete SIM_DESC argument.
1657 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1659 * Makefile.in (SIM_OBJS): Add common modules.
1661 * interp.c (sim_set_callbacks): Also set SD callback.
1662 (set_endianness, xfer_*, swap_*): Delete.
1663 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1664 Change to functions using sim-endian macros.
1665 (control_c, sim_stop): Delete, use common version.
1666 (simulate): Convert into.
1667 (sim_engine_run): This function.
1668 (sim_resume): Delete.
1670 * interp.c (simulation): New variable - the simulator object.
1671 (sim_kind): Delete global - merged into simulation.
1672 (sim_load): Cleanup. Move PC assignment from here.
1673 (sim_create_inferior): To here.
1675 * sim-main.h: New file.
1676 * interp.c (sim-main.h): Include.
1678 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1680 * configure: Regenerated to track ../common/aclocal.m4 changes.
1682 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1684 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1686 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1688 * gencode.c (build_instruction): DIV instructions: check
1689 for division by zero and integer overflow before using
1690 host's division operation.
1692 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1694 * Makefile.in (SIM_OBJS): Add sim-load.o.
1695 * interp.c: #include bfd.h.
1696 (target_byte_order): Delete.
1697 (sim_kind, myname, big_endian_p): New static locals.
1698 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1699 after argument parsing. Recognize -E arg, set endianness accordingly.
1700 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1701 load file into simulator. Set PC from bfd.
1702 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1703 (set_endianness): Use big_endian_p instead of target_byte_order.
1705 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1707 * interp.c (sim_size): Delete prototype - conflicts with
1708 definition in remote-sim.h. Correct definition.
1710 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1712 * configure: Regenerated to track ../common/aclocal.m4 changes.
1715 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1717 * interp.c (sim_open): New arg `kind'.
1719 * configure: Regenerated to track ../common/aclocal.m4 changes.
1721 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1723 * configure: Regenerated to track ../common/aclocal.m4 changes.
1725 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1727 * interp.c (sim_open): Set optind to 0 before calling getopt.
1729 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1731 * configure: Regenerated to track ../common/aclocal.m4 changes.
1733 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1735 * interp.c : Replace uses of pr_addr with pr_uword64
1736 where the bit length is always 64 independent of SIM_ADDR.
1737 (pr_uword64) : added.
1739 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1741 * configure: Re-generate.
1743 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1745 * configure: Regenerate to track ../common/aclocal.m4 changes.
1747 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1749 * interp.c (sim_open): New SIM_DESC result. Argument is now
1751 (other sim_*): New SIM_DESC argument.
1753 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1755 * interp.c: Fix printing of addresses for non-64-bit targets.
1756 (pr_addr): Add function to print address based on size.
1758 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1760 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1762 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1764 * gencode.c (build_mips16_operands): Correct computation of base
1765 address for extended PC relative instruction.
1767 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1769 * interp.c (mips16_entry): Add support for floating point cases.
1770 (SignalException): Pass floating point cases to mips16_entry.
1771 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1773 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1775 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1776 and then set the state to fmt_uninterpreted.
1777 (COP_SW): Temporarily set the state to fmt_word while calling
1780 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1782 * gencode.c (build_instruction): The high order may be set in the
1783 comparison flags at any ISA level, not just ISA 4.
1785 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1787 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1788 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1789 * configure.in: sinclude ../common/aclocal.m4.
1790 * configure: Regenerated.
1792 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1794 * configure: Rebuild after change to aclocal.m4.
1796 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1798 * configure configure.in Makefile.in: Update to new configure
1799 scheme which is more compatible with WinGDB builds.
1800 * configure.in: Improve comment on how to run autoconf.
1801 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1802 * Makefile.in: Use autoconf substitution to install common
1805 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1807 * gencode.c (build_instruction): Use BigEndianCPU instead of
1810 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1812 * interp.c (sim_monitor): Make output to stdout visible in
1813 wingdb's I/O log window.
1815 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1817 * support.h: Undo previous change to SIGTRAP
1820 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1822 * interp.c (store_word, load_word): New static functions.
1823 (mips16_entry): New static function.
1824 (SignalException): Look for mips16 entry and exit instructions.
1825 (simulate): Use the correct index when setting fpr_state after
1826 doing a pending move.
1828 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1830 * interp.c: Fix byte-swapping code throughout to work on
1831 both little- and big-endian hosts.
1833 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1835 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1836 with gdb/config/i386/xm-windows.h.
1838 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1840 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1841 that messes up arithmetic shifts.
1843 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1845 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1846 SIGTRAP and SIGQUIT for _WIN32.
1848 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1850 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1851 force a 64 bit multiplication.
1852 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1853 destination register is 0, since that is the default mips16 nop
1856 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1858 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1859 (build_endian_shift): Don't check proc64.
1860 (build_instruction): Always set memval to uword64. Cast op2 to
1861 uword64 when shifting it left in memory instructions. Always use
1862 the same code for stores--don't special case proc64.
1864 * gencode.c (build_mips16_operands): Fix base PC value for PC
1866 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1868 * interp.c (simJALDELAYSLOT): Define.
1869 (JALDELAYSLOT): Define.
1870 (INDELAYSLOT, INJALDELAYSLOT): Define.
1871 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1873 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1875 * interp.c (sim_open): add flush_cache as a PMON routine
1876 (sim_monitor): handle flush_cache by ignoring it
1878 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1880 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1882 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1883 (BigEndianMem): Rename to ByteSwapMem and change sense.
1884 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1885 BigEndianMem references to !ByteSwapMem.
1886 (set_endianness): New function, with prototype.
1887 (sim_open): Call set_endianness.
1888 (sim_info): Use simBE instead of BigEndianMem.
1889 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1890 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1891 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1892 ifdefs, keeping the prototype declaration.
1893 (swap_word): Rewrite correctly.
1894 (ColdReset): Delete references to CONFIG. Delete endianness related
1895 code; moved to set_endianness.
1897 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1899 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1900 * interp.c (CHECKHILO): Define away.
1901 (simSIGINT): New macro.
1902 (membank_size): Increase from 1MB to 2MB.
1903 (control_c): New function.
1904 (sim_resume): Rename parameter signal to signal_number. Add local
1905 variable prev. Call signal before and after simulate.
1906 (sim_stop_reason): Add simSIGINT support.
1907 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1909 (sim_warning): Delete call to SignalException. Do call printf_filtered
1911 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1912 a call to sim_warning.
1914 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1916 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1917 16 bit instructions.
1919 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1921 Add support for mips16 (16 bit MIPS implementation):
1922 * gencode.c (inst_type): Add mips16 instruction encoding types.
1923 (GETDATASIZEINSN): Define.
1924 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1925 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1927 (MIPS16_DECODE): New table, for mips16 instructions.
1928 (bitmap_val): New static function.
1929 (struct mips16_op): Define.
1930 (mips16_op_table): New table, for mips16 operands.
1931 (build_mips16_operands): New static function.
1932 (process_instructions): If PC is odd, decode a mips16
1933 instruction. Break out instruction handling into new
1934 build_instruction function.
1935 (build_instruction): New static function, broken out of
1936 process_instructions. Check modifiers rather than flags for SHIFT
1937 bit count and m[ft]{hi,lo} direction.
1938 (usage): Pass program name to fprintf.
1939 (main): Remove unused variable this_option_optind. Change
1940 ``*loptarg++'' to ``loptarg++''.
1941 (my_strtoul): Parenthesize && within ||.
1942 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1943 (simulate): If PC is odd, fetch a 16 bit instruction, and
1944 increment PC by 2 rather than 4.
1945 * configure.in: Add case for mips16*-*-*.
1946 * configure: Rebuild.
1948 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1950 * interp.c: Allow -t to enable tracing in standalone simulator.
1951 Fix garbage output in trace file and error messages.
1953 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1955 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1956 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1957 * configure.in: Simplify using macros in ../common/aclocal.m4.
1958 * configure: Regenerated.
1959 * tconfig.in: New file.
1961 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1963 * interp.c: Fix bugs in 64-bit port.
1964 Use ansi function declarations for msvc compiler.
1965 Initialize and test file pointer in trace code.
1966 Prevent duplicate definition of LAST_EMED_REGNUM.
1968 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1970 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1972 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1974 * interp.c (SignalException): Check for explicit terminating
1976 * gencode.c: Pass instruction value through SignalException()
1977 calls for Trap, Breakpoint and Syscall.
1979 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1981 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1982 only used on those hosts that provide it.
1983 * configure.in: Add sqrt() to list of functions to be checked for.
1984 * config.in: Re-generated.
1985 * configure: Re-generated.
1987 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1989 * gencode.c (process_instructions): Call build_endian_shift when
1990 expanding STORE RIGHT, to fix swr.
1991 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1992 clear the high bits.
1993 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1994 Fix float to int conversions to produce signed values.
1996 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1998 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1999 (process_instructions): Correct handling of nor instruction.
2000 Correct shift count for 32 bit shift instructions. Correct sign
2001 extension for arithmetic shifts to not shift the number of bits in
2002 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2003 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2005 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2006 It's OK to have a mult follow a mult. What's not OK is to have a
2007 mult follow an mfhi.
2008 (Convert): Comment out incorrect rounding code.
2010 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2012 * interp.c (sim_monitor): Improved monitor printf
2013 simulation. Tidied up simulator warnings, and added "--log" option
2014 for directing warning message output.
2015 * gencode.c: Use sim_warning() rather than WARNING macro.
2017 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2019 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2020 getopt1.o, rather than on gencode.c. Link objects together.
2021 Don't link against -liberty.
2022 (gencode.o, getopt.o, getopt1.o): New targets.
2023 * gencode.c: Include <ctype.h> and "ansidecl.h".
2024 (AND): Undefine after including "ansidecl.h".
2025 (ULONG_MAX): Define if not defined.
2026 (OP_*): Don't define macros; now defined in opcode/mips.h.
2027 (main): Call my_strtoul rather than strtoul.
2028 (my_strtoul): New static function.
2030 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2032 * gencode.c (process_instructions): Generate word64 and uword64
2033 instead of `long long' and `unsigned long long' data types.
2034 * interp.c: #include sysdep.h to get signals, and define default
2036 * (Convert): Work around for Visual-C++ compiler bug with type
2038 * support.h: Make things compile under Visual-C++ by using
2039 __int64 instead of `long long'. Change many refs to long long
2040 into word64/uword64 typedefs.
2042 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2044 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2045 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2047 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2048 (AC_PROG_INSTALL): Added.
2049 (AC_PROG_CC): Moved to before configure.host call.
2050 * configure: Rebuilt.
2052 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2054 * configure.in: Define @SIMCONF@ depending on mips target.
2055 * configure: Rebuild.
2056 * Makefile.in (run): Add @SIMCONF@ to control simulator
2058 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2059 * interp.c: Remove some debugging, provide more detailed error
2060 messages, update memory accesses to use LOADDRMASK.
2062 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2064 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2065 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2067 * configure: Rebuild.
2068 * config.in: New file, generated by autoheader.
2069 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2070 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2071 HAVE_ANINT and HAVE_AINT, as appropriate.
2072 * Makefile.in (run): Use @LIBS@ rather than -lm.
2073 (interp.o): Depend upon config.h.
2074 (Makefile): Just rebuild Makefile.
2075 (clean): Remove stamp-h.
2076 (mostlyclean): Make the same as clean, not as distclean.
2077 (config.h, stamp-h): New targets.
2079 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2081 * interp.c (ColdReset): Fix boolean test. Make all simulator
2084 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2086 * interp.c (xfer_direct_word, xfer_direct_long,
2087 swap_direct_word, swap_direct_long, xfer_big_word,
2088 xfer_big_long, xfer_little_word, xfer_little_long,
2089 swap_word,swap_long): Added.
2090 * interp.c (ColdReset): Provide function indirection to
2091 host<->simulated_target transfer routines.
2092 * interp.c (sim_store_register, sim_fetch_register): Updated to
2093 make use of indirected transfer routines.
2095 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2097 * gencode.c (process_instructions): Ensure FP ABS instruction
2099 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2100 system call support.
2102 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2104 * interp.c (sim_do_command): Complain if callback structure not
2107 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2109 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2110 support for Sun hosts.
2111 * Makefile.in (gencode): Ensure the host compiler and libraries
2112 used for cross-hosted build.
2114 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2116 * interp.c, gencode.c: Some more (TODO) tidying.
2118 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2120 * gencode.c, interp.c: Replaced explicit long long references with
2121 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2122 * support.h (SET64LO, SET64HI): Macros added.
2124 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2126 * configure: Regenerate with autoconf 2.7.
2128 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2130 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2131 * support.h: Remove superfluous "1" from #if.
2132 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2134 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2136 * interp.c (StoreFPR): Control UndefinedResult() call on
2137 WARN_RESULT manifest.
2139 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2141 * gencode.c: Tidied instruction decoding, and added FP instruction
2144 * interp.c: Added dineroIII, and BSD profiling support. Also
2145 run-time FP handling.
2147 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2149 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2150 gencode.c, interp.c, support.h: created.