1 2004-01-19 Chris Demetriou <cgd@broadcom.com>
3 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
4 (check_mult_hilo): Improve comments.
5 (check_div_hilo): Likewise. Also, fork off a new version
6 to handle mips32/mips64 (since there are no hazards to check
9 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
11 * mips.igen (do_dmultx): Fix check for negative operands.
13 2003-05-16 Ian Lance Taylor <ian@airs.com>
15 * Makefile.in (SHELL): Make sure this is defined.
16 (various): Use $(SHELL) whenever we invoke move-if-change.
18 2003-05-03 Chris Demetriou <cgd@broadcom.com>
20 * cp1.c: Tweak attribution slightly.
23 * mdmx.igen: Likewise.
24 * mips3d.igen: Likewise.
27 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
29 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
32 2003-02-27 Andrew Cagney <cagney@redhat.com>
34 * interp.c (sim_open): Rename _bfd to bfd.
35 (sim_create_inferior): Ditto.
37 2003-01-14 Chris Demetriou <cgd@broadcom.com>
39 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
41 2003-01-14 Chris Demetriou <cgd@broadcom.com>
43 * mips.igen (EI, DI): Remove.
45 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
47 * Makefile.in (tmp-run-multi): Fix mips16 filter.
49 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
50 Andrew Cagney <ac131313@redhat.com>
51 Gavin Romig-Koch <gavin@redhat.com>
52 Graydon Hoare <graydon@redhat.com>
53 Aldy Hernandez <aldyh@redhat.com>
54 Dave Brolley <brolley@redhat.com>
55 Chris Demetriou <cgd@broadcom.com>
57 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
58 (sim_mach_default): New variable.
59 (mips64vr-*-*, mips64vrel-*-*): New configurations.
60 Add a new simulator generator, MULTI.
61 * configure: Regenerate.
62 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
63 (multi-run.o): New dependency.
64 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
65 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
66 (tmp-multi): Combine them.
67 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
68 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
69 (distclean-extra): New rule.
70 * sim-main.h: Include bfd.h.
71 (MIPS_MACH): New macro.
72 * mips.igen (vr4120, vr5400, vr5500): New models.
73 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
74 * vr.igen: Replace with new version.
76 2003-01-04 Chris Demetriou <cgd@broadcom.com>
78 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
79 * configure: Regenerate.
81 2002-12-31 Chris Demetriou <cgd@broadcom.com>
83 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
84 * mips.igen: Remove all invocations of check_branch_bug and
87 2002-12-16 Chris Demetriou <cgd@broadcom.com>
89 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
91 2002-07-30 Chris Demetriou <cgd@broadcom.com>
93 * mips.igen (do_load_double, do_store_double): New functions.
94 (LDC1, SDC1): Rename to...
95 (LDC1b, SDC1b): respectively.
96 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
98 2002-07-29 Michael Snyder <msnyder@redhat.com>
100 * cp1.c (fp_recip2): Modify initialization expression so that
101 GCC will recognize it as constant.
103 2002-06-18 Chris Demetriou <cgd@broadcom.com>
105 * mdmx.c (SD_): Delete.
106 (Unpredictable): Re-define, for now, to directly invoke
107 unpredictable_action().
108 (mdmx_acc_op): Fix error in .ob immediate handling.
110 2002-06-18 Andrew Cagney <cagney@redhat.com>
112 * interp.c (sim_firmware_command): Initialize `address'.
114 2002-06-16 Andrew Cagney <ac131313@redhat.com>
116 * configure: Regenerated to track ../common/aclocal.m4 changes.
118 2002-06-14 Chris Demetriou <cgd@broadcom.com>
119 Ed Satterthwaite <ehs@broadcom.com>
121 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
122 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
123 * mips.igen: Include mips3d.igen.
124 (mips3d): New model name for MIPS-3D ASE instructions.
125 (CVT.W.fmt): Don't use this instruction for word (source) format
127 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
128 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
129 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
130 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
131 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
132 (RSquareRoot1, RSquareRoot2): New macros.
133 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
134 (fp_rsqrt2): New functions.
135 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
136 * configure: Regenerate.
138 2002-06-13 Chris Demetriou <cgd@broadcom.com>
139 Ed Satterthwaite <ehs@broadcom.com>
141 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
142 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
143 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
144 (convert): Note that this function is not used for paired-single
146 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
147 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
148 (check_fmt_p): Enable paired-single support.
149 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
150 (PUU.PS): New instructions.
151 (CVT.S.fmt): Don't use this instruction for paired-single format
153 * sim-main.h (FP_formats): New value 'fmt_ps.'
154 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
155 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
157 2002-06-12 Chris Demetriou <cgd@broadcom.com>
159 * mips.igen: Fix formatting of function calls in
162 2002-06-12 Chris Demetriou <cgd@broadcom.com>
164 * mips.igen (MOVN, MOVZ): Trace result.
165 (TNEI): Print "tnei" as the opcode name in traces.
166 (CEIL.W): Add disassembly string for traces.
167 (RSQRT.fmt): Make location of disassembly string consistent
168 with other instructions.
170 2002-06-12 Chris Demetriou <cgd@broadcom.com>
172 * mips.igen (X): Delete unused function.
174 2002-06-08 Andrew Cagney <cagney@redhat.com>
176 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
178 2002-06-07 Chris Demetriou <cgd@broadcom.com>
179 Ed Satterthwaite <ehs@broadcom.com>
181 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
182 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
183 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
184 (fp_nmsub): New prototypes.
185 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
186 (NegMultiplySub): New defines.
187 * mips.igen (RSQRT.fmt): Use RSquareRoot().
188 (MADD.D, MADD.S): Replace with...
189 (MADD.fmt): New instruction.
190 (MSUB.D, MSUB.S): Replace with...
191 (MSUB.fmt): New instruction.
192 (NMADD.D, NMADD.S): Replace with...
193 (NMADD.fmt): New instruction.
194 (NMSUB.D, MSUB.S): Replace with...
195 (NMSUB.fmt): New instruction.
197 2002-06-07 Chris Demetriou <cgd@broadcom.com>
198 Ed Satterthwaite <ehs@broadcom.com>
200 * cp1.c: Fix more comment spelling and formatting.
201 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
202 (denorm_mode): New function.
203 (fpu_unary, fpu_binary): Round results after operation, collect
204 status from rounding operations, and update the FCSR.
205 (convert): Collect status from integer conversions and rounding
206 operations, and update the FCSR. Adjust NaN values that result
207 from conversions. Convert to use sim_io_eprintf rather than
208 fprintf, and remove some debugging code.
209 * cp1.h (fenr_FS): New define.
211 2002-06-07 Chris Demetriou <cgd@broadcom.com>
213 * cp1.c (convert): Remove unusable debugging code, and move MIPS
214 rounding mode to sim FP rounding mode flag conversion code into...
215 (rounding_mode): New function.
217 2002-06-07 Chris Demetriou <cgd@broadcom.com>
219 * cp1.c: Clean up formatting of a few comments.
220 (value_fpr): Reformat switch statement.
222 2002-06-06 Chris Demetriou <cgd@broadcom.com>
223 Ed Satterthwaite <ehs@broadcom.com>
226 * sim-main.h: Include cp1.h.
227 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
228 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
229 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
230 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
231 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
232 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
233 * cp1.c: Don't include sim-fpu.h; already included by
234 sim-main.h. Clean up formatting of some comments.
235 (NaN, Equal, Less): Remove.
236 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
237 (fp_cmp): New functions.
238 * mips.igen (do_c_cond_fmt): Remove.
239 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
240 Compare. Add result tracing.
241 (CxC1): Remove, replace with...
242 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
243 (DMxC1): Remove, replace with...
244 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
245 (MxC1): Remove, replace with...
246 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
248 2002-06-04 Chris Demetriou <cgd@broadcom.com>
250 * sim-main.h (FGRIDX): Remove, replace all uses with...
251 (FGR_BASE): New macro.
252 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
253 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
254 (NR_FGR, FGR): Likewise.
255 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
256 * mips.igen: Likewise.
258 2002-06-04 Chris Demetriou <cgd@broadcom.com>
260 * cp1.c: Add an FSF Copyright notice to this file.
262 2002-06-04 Chris Demetriou <cgd@broadcom.com>
263 Ed Satterthwaite <ehs@broadcom.com>
265 * cp1.c (Infinity): Remove.
266 * sim-main.h (Infinity): Likewise.
268 * cp1.c (fp_unary, fp_binary): New functions.
269 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
270 (fp_sqrt): New functions, implemented in terms of the above.
271 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
272 (Recip, SquareRoot): Remove (replaced by functions above).
273 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
274 (fp_recip, fp_sqrt): New prototypes.
275 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
276 (Recip, SquareRoot): Replace prototypes with #defines which
277 invoke the functions above.
279 2002-06-03 Chris Demetriou <cgd@broadcom.com>
281 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
282 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
283 file, remove PARAMS from prototypes.
284 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
285 simulator state arguments.
286 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
287 pass simulator state arguments.
288 * cp1.c (SD): Redefine as CPU_STATE(cpu).
289 (store_fpr, convert): Remove 'sd' argument.
290 (value_fpr): Likewise. Convert to use 'SD' instead.
292 2002-06-03 Chris Demetriou <cgd@broadcom.com>
294 * cp1.c (Min, Max): Remove #if 0'd functions.
295 * sim-main.h (Min, Max): Remove.
297 2002-06-03 Chris Demetriou <cgd@broadcom.com>
299 * cp1.c: fix formatting of switch case and default labels.
300 * interp.c: Likewise.
301 * sim-main.c: Likewise.
303 2002-06-03 Chris Demetriou <cgd@broadcom.com>
305 * cp1.c: Clean up comments which describe FP formats.
306 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
308 2002-06-03 Chris Demetriou <cgd@broadcom.com>
309 Ed Satterthwaite <ehs@broadcom.com>
311 * configure.in (mipsisa64sb1*-*-*): New target for supporting
312 Broadcom SiByte SB-1 processor configurations.
313 * configure: Regenerate.
314 * sb1.igen: New file.
315 * mips.igen: Include sb1.igen.
317 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
318 * mdmx.igen: Add "sb1" model to all appropriate functions and
320 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
321 (ob_func, ob_acc): Reference the above.
322 (qh_acc): Adjust to keep the same size as ob_acc.
323 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
324 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
326 2002-06-03 Chris Demetriou <cgd@broadcom.com>
328 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
330 2002-06-02 Chris Demetriou <cgd@broadcom.com>
331 Ed Satterthwaite <ehs@broadcom.com>
333 * mips.igen (mdmx): New (pseudo-)model.
334 * mdmx.c, mdmx.igen: New files.
335 * Makefile.in (SIM_OBJS): Add mdmx.o.
336 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
338 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
339 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
340 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
341 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
342 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
343 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
344 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
345 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
346 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
347 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
348 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
349 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
350 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
351 (qh_fmtsel): New macros.
352 (_sim_cpu): New member "acc".
353 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
354 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
356 2002-05-01 Chris Demetriou <cgd@broadcom.com>
358 * interp.c: Use 'deprecated' rather than 'depreciated.'
359 * sim-main.h: Likewise.
361 2002-05-01 Chris Demetriou <cgd@broadcom.com>
363 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
364 which wouldn't compile anyway.
365 * sim-main.h (unpredictable_action): New function prototype.
366 (Unpredictable): Define to call igen function unpredictable().
367 (NotWordValue): New macro to call igen function not_word_value().
368 (UndefinedResult): Remove.
369 * interp.c (undefined_result): Remove.
370 (unpredictable_action): New function.
371 * mips.igen (not_word_value, unpredictable): New functions.
372 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
373 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
374 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
375 NotWordValue() to check for unpredictable inputs, then
376 Unpredictable() to handle them.
378 2002-02-24 Chris Demetriou <cgd@broadcom.com>
380 * mips.igen: Fix formatting of calls to Unpredictable().
382 2002-04-20 Andrew Cagney <ac131313@redhat.com>
384 * interp.c (sim_open): Revert previous change.
386 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
388 * interp.c (sim_open): Disable chunk of code that wrote code in
389 vector table entries.
391 2002-03-19 Chris Demetriou <cgd@broadcom.com>
393 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
394 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
397 2002-03-19 Chris Demetriou <cgd@broadcom.com>
399 * cp1.c: Fix many formatting issues.
401 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
403 * cp1.c (fpu_format_name): New function to replace...
404 (DOFMT): This. Delete, and update all callers.
405 (fpu_rounding_mode_name): New function to replace...
406 (RMMODE): This. Delete, and update all callers.
408 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
410 * interp.c: Move FPU support routines from here to...
411 * cp1.c: Here. New file.
412 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
415 2002-03-12 Chris Demetriou <cgd@broadcom.com>
417 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
418 * mips.igen (mips32, mips64): New models, add to all instructions
419 and functions as appropriate.
420 (loadstore_ea, check_u64): New variant for model mips64.
421 (check_fmt_p): New variant for models mipsV and mips64, remove
422 mipsV model marking fro other variant.
425 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
426 for mips32 and mips64.
427 (DCLO, DCLZ): New instructions for mips64.
429 2002-03-07 Chris Demetriou <cgd@broadcom.com>
431 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
432 immediate or code as a hex value with the "%#lx" format.
433 (ANDI): Likewise, and fix printed instruction name.
435 2002-03-05 Chris Demetriou <cgd@broadcom.com>
437 * sim-main.h (UndefinedResult, Unpredictable): New macros
438 which currently do nothing.
440 2002-03-05 Chris Demetriou <cgd@broadcom.com>
442 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
443 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
444 (status_CU3): New definitions.
446 * sim-main.h (ExceptionCause): Add new values for MIPS32
447 and MIPS64: MDMX, MCheck, CacheErr. Update comments
448 for DebugBreakPoint and NMIReset to note their status in
450 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
451 (SignalExceptionCacheErr): New exception macros.
453 2002-03-05 Chris Demetriou <cgd@broadcom.com>
455 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
456 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
458 (SignalExceptionCoProcessorUnusable): Take as argument the
459 unusable coprocessor number.
461 2002-03-05 Chris Demetriou <cgd@broadcom.com>
463 * mips.igen: Fix formatting of all SignalException calls.
465 2002-03-05 Chris Demetriou <cgd@broadcom.com>
467 * sim-main.h (SIGNEXTEND): Remove.
469 2002-03-04 Chris Demetriou <cgd@broadcom.com>
471 * mips.igen: Remove gencode comment from top of file, fix
472 spelling in another comment.
474 2002-03-04 Chris Demetriou <cgd@broadcom.com>
476 * mips.igen (check_fmt, check_fmt_p): New functions to check
477 whether specific floating point formats are usable.
478 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
479 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
480 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
481 Use the new functions.
482 (do_c_cond_fmt): Remove format checks...
483 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
485 2002-03-03 Chris Demetriou <cgd@broadcom.com>
487 * mips.igen: Fix formatting of check_fpu calls.
489 2002-03-03 Chris Demetriou <cgd@broadcom.com>
491 * mips.igen (FLOOR.L.fmt): Store correct destination register.
493 2002-03-03 Chris Demetriou <cgd@broadcom.com>
495 * mips.igen: Remove whitespace at end of lines.
497 2002-03-02 Chris Demetriou <cgd@broadcom.com>
499 * mips.igen (loadstore_ea): New function to do effective
500 address calculations.
501 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
502 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
503 CACHE): Use loadstore_ea to do effective address computations.
505 2002-03-02 Chris Demetriou <cgd@broadcom.com>
507 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
508 * mips.igen (LL, CxC1, MxC1): Likewise.
510 2002-03-02 Chris Demetriou <cgd@broadcom.com>
512 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
513 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
514 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
515 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
516 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
517 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
518 Don't split opcode fields by hand, use the opcode field values
521 2002-03-01 Chris Demetriou <cgd@broadcom.com>
523 * mips.igen (do_divu): Fix spacing.
525 * mips.igen (do_dsllv): Move to be right before DSLLV,
526 to match the rest of the do_<shift> functions.
528 2002-03-01 Chris Demetriou <cgd@broadcom.com>
530 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
531 DSRL32, do_dsrlv): Trace inputs and results.
533 2002-03-01 Chris Demetriou <cgd@broadcom.com>
535 * mips.igen (CACHE): Provide instruction-printing string.
537 * interp.c (signal_exception): Comment tokens after #endif.
539 2002-02-28 Chris Demetriou <cgd@broadcom.com>
541 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
542 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
543 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
544 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
545 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
546 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
547 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
548 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
550 2002-02-28 Chris Demetriou <cgd@broadcom.com>
552 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
553 instruction-printing string.
554 (LWU): Use '64' as the filter flag.
556 2002-02-28 Chris Demetriou <cgd@broadcom.com>
558 * mips.igen (SDXC1): Fix instruction-printing string.
560 2002-02-28 Chris Demetriou <cgd@broadcom.com>
562 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
565 2002-02-27 Chris Demetriou <cgd@broadcom.com>
567 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
570 2002-02-27 Chris Demetriou <cgd@broadcom.com>
572 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
573 add a comma) so that it more closely match the MIPS ISA
574 documentation opcode partitioning.
575 (PREF): Put useful names on opcode fields, and include
576 instruction-printing string.
578 2002-02-27 Chris Demetriou <cgd@broadcom.com>
580 * mips.igen (check_u64): New function which in the future will
581 check whether 64-bit instructions are usable and signal an
582 exception if not. Currently a no-op.
583 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
584 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
585 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
586 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
588 * mips.igen (check_fpu): New function which in the future will
589 check whether FPU instructions are usable and signal an exception
590 if not. Currently a no-op.
591 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
592 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
593 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
594 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
595 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
596 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
597 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
598 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
600 2002-02-27 Chris Demetriou <cgd@broadcom.com>
602 * mips.igen (do_load_left, do_load_right): Move to be immediately
604 (do_store_left, do_store_right): Move to be immediately following
607 2002-02-27 Chris Demetriou <cgd@broadcom.com>
609 * mips.igen (mipsV): New model name. Also, add it to
610 all instructions and functions where it is appropriate.
612 2002-02-18 Chris Demetriou <cgd@broadcom.com>
614 * mips.igen: For all functions and instructions, list model
615 names that support that instruction one per line.
617 2002-02-11 Chris Demetriou <cgd@broadcom.com>
619 * mips.igen: Add some additional comments about supported
620 models, and about which instructions go where.
621 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
622 order as is used in the rest of the file.
624 2002-02-11 Chris Demetriou <cgd@broadcom.com>
626 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
627 indicating that ALU32_END or ALU64_END are there to check
629 (DADD): Likewise, but also remove previous comment about
632 2002-02-10 Chris Demetriou <cgd@broadcom.com>
634 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
635 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
636 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
637 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
638 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
639 fields (i.e., add and move commas) so that they more closely
640 match the MIPS ISA documentation opcode partitioning.
642 2002-02-10 Chris Demetriou <cgd@broadcom.com>
644 * mips.igen (ADDI): Print immediate value.
646 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
647 (SLL): Print "nop" specially, and don't run the code
648 that does the shift for the "nop" case.
650 2001-11-17 Fred Fish <fnf@redhat.com>
652 * sim-main.h (float_operation): Move enum declaration outside
653 of _sim_cpu struct declaration.
655 2001-04-12 Jim Blandy <jimb@redhat.com>
657 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
658 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
660 * sim-main.h (COCIDX): Remove definition; this isn't supported by
661 PENDING_FILL, and you can get the intended effect gracefully by
662 calling PENDING_SCHED directly.
664 2001-02-23 Ben Elliston <bje@redhat.com>
666 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
667 already defined elsewhere.
669 2001-02-19 Ben Elliston <bje@redhat.com>
671 * sim-main.h (sim_monitor): Return an int.
672 * interp.c (sim_monitor): Add return values.
673 (signal_exception): Handle error conditions from sim_monitor.
675 2001-02-08 Ben Elliston <bje@redhat.com>
677 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
678 (store_memory): Likewise, pass cia to sim_core_write*.
680 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
682 On advice from Chris G. Demetriou <cgd@sibyte.com>:
683 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
685 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
687 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
688 * Makefile.in: Don't delete *.igen when cleaning directory.
690 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
692 * m16.igen (break): Call SignalException not sim_engine_halt.
694 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
697 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
699 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
701 * mips.igen (MxC1, DMxC1): Fix printf formatting.
703 2000-05-24 Michael Hayes <mhayes@cygnus.com>
705 * mips.igen (do_dmultx): Fix typo.
707 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
709 * configure: Regenerated to track ../common/aclocal.m4 changes.
711 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
713 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
715 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
717 * sim-main.h (GPR_CLEAR): Define macro.
719 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
721 * interp.c (decode_coproc): Output long using %lx and not %s.
723 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
725 * interp.c (sim_open): Sort & extend dummy memory regions for
726 --board=jmr3904 for eCos.
728 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
730 * configure: Regenerated.
732 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
734 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
735 calls, conditional on the simulator being in verbose mode.
737 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
739 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
740 cache don't get ReservedInstruction traps.
742 1999-11-29 Mark Salter <msalter@cygnus.com>
744 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
745 to clear status bits in sdisr register. This is how the hardware works.
747 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
748 being used by cygmon.
750 1999-11-11 Andrew Haley <aph@cygnus.com>
752 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
755 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
757 * mips.igen (MULT): Correct previous mis-applied patch.
759 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
761 * mips.igen (delayslot32): Handle sequence like
762 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
763 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
764 (MULT): Actually pass the third register...
766 1999-09-03 Mark Salter <msalter@cygnus.com>
768 * interp.c (sim_open): Added more memory aliases for additional
769 hardware being touched by cygmon on jmr3904 board.
771 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
773 * configure: Regenerated to track ../common/aclocal.m4 changes.
775 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
777 * interp.c (sim_store_register): Handle case where client - GDB -
778 specifies that a 4 byte register is 8 bytes in size.
779 (sim_fetch_register): Ditto.
781 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
783 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
784 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
785 (idt_monitor_base): Base address for IDT monitor traps.
786 (pmon_monitor_base): Ditto for PMON.
787 (lsipmon_monitor_base): Ditto for LSI PMON.
788 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
789 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
790 (sim_firmware_command): New function.
791 (mips_option_handler): Call it for OPTION_FIRMWARE.
792 (sim_open): Allocate memory for idt_monitor region. If "--board"
793 option was given, add no monitor by default. Add BREAK hooks only if
794 monitors are also there.
796 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
798 * interp.c (sim_monitor): Flush output before reading input.
800 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
802 * tconfig.in (SIM_HANDLES_LMA): Always define.
804 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
806 From Mark Salter <msalter@cygnus.com>:
807 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
808 (sim_open): Add setup for BSP board.
810 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
812 * mips.igen (MULT, MULTU): Add syntax for two operand version.
813 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
814 them as unimplemented.
816 1999-05-08 Felix Lee <flee@cygnus.com>
818 * configure: Regenerated to track ../common/aclocal.m4 changes.
820 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
822 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
824 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
826 * configure.in: Any mips64vr5*-*-* target should have
827 -DTARGET_ENABLE_FR=1.
828 (default_endian): Any mips64vr*el-*-* target should default to
830 * configure: Re-generate.
832 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
834 * mips.igen (ldl): Extend from _16_, not 32.
836 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
838 * interp.c (sim_store_register): Force registers written to by GDB
839 into an un-interpreted state.
841 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
843 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
844 CPU, start periodic background I/O polls.
845 (tx3904sio_poll): New function: periodic I/O poller.
847 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
849 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
851 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
853 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
856 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
858 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
859 (load_word): Call SIM_CORE_SIGNAL hook on error.
860 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
861 starting. For exception dispatching, pass PC instead of NULL_CIA.
862 (decode_coproc): Use COP0_BADVADDR to store faulting address.
863 * sim-main.h (COP0_BADVADDR): Define.
864 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
865 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
866 (_sim_cpu): Add exc_* fields to store register value snapshots.
867 * mips.igen (*): Replace memory-related SignalException* calls
868 with references to SIM_CORE_SIGNAL hook.
870 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
872 * sim-main.c (*): Minor warning cleanups.
874 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
876 * m16.igen (DADDIU5): Correct type-o.
878 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
880 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
883 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
885 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
887 (interp.o): Add dependency on itable.h
888 (oengine.c, gencode): Delete remaining references.
889 (BUILT_SRC_FROM_GEN): Clean up.
891 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
894 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
895 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
897 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
898 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
899 Drop the "64" qualifier to get the HACK generator working.
900 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
901 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
902 qualifier to get the hack generator working.
903 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
905 (DSLLV): Use do_dsllv.
908 (DSRLV): Use do_dsrlv.
909 (BC1): Move *vr4100 to get the HACK generator working.
910 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
911 get the HACK generator working.
912 (MACC) Rename to get the HACK generator working.
913 (DMACC,MACCS,DMACCS): Add the 64.
915 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
917 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
918 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
920 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
922 * mips/interp.c (DEBUG): Cleanups.
924 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
926 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
927 (tx3904sio_tickle): fflush after a stdout character output.
929 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
931 * interp.c (sim_close): Uninstall modules.
933 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
935 * sim-main.h, interp.c (sim_monitor): Change to global
938 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
940 * configure.in (vr4100): Only include vr4100 instructions in
942 * configure: Re-generate.
943 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
945 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
947 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
948 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
951 * configure.in (sim_default_gen, sim_use_gen): Replace with
953 (--enable-sim-igen): Delete config option. Always using IGEN.
954 * configure: Re-generate.
956 * Makefile.in (gencode): Kill, kill, kill.
959 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
961 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
962 bit mips16 igen simulator.
963 * configure: Re-generate.
965 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
966 as part of vr4100 ISA.
967 * vr.igen: Mark all instructions as 64 bit only.
969 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
971 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
974 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
976 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
977 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
978 * configure: Re-generate.
980 * m16.igen (BREAK): Define breakpoint instruction.
981 (JALX32): Mark instruction as mips16 and not r3900.
982 * mips.igen (C.cond.fmt): Fix typo in instruction format.
984 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
986 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
988 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
989 insn as a debug breakpoint.
991 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
993 (PENDING_SCHED): Clean up trace statement.
994 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
995 (PENDING_FILL): Delay write by only one cycle.
996 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
998 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1000 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1002 (pending_tick): Move incrementing of index to FOR statement.
1003 (pending_tick): Only update PENDING_OUT after a write has occured.
1005 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1007 * configure: Re-generate.
1009 * interp.c (sim_engine_run OLD): Delete explicit call to
1010 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1012 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1014 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1015 interrupt level number to match changed SignalExceptionInterrupt
1018 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1020 * interp.c: #include "itable.h" if WITH_IGEN.
1021 (get_insn_name): New function.
1022 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1023 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1025 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1027 * configure: Rebuilt to inhale new common/aclocal.m4.
1029 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1031 * dv-tx3904sio.c: Include sim-assert.h.
1033 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1035 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1036 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1037 Reorganize target-specific sim-hardware checks.
1038 * configure: rebuilt.
1039 * interp.c (sim_open): For tx39 target boards, set
1040 OPERATING_ENVIRONMENT, add tx3904sio devices.
1041 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1042 ROM executables. Install dv-sockser into sim-modules list.
1044 * dv-tx3904irc.c: Compiler warning clean-up.
1045 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1046 frequent hw-trace messages.
1048 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1050 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1052 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1054 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1056 * vr.igen: New file.
1057 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1058 * mips.igen: Define vr4100 model. Include vr.igen.
1059 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1061 * mips.igen (check_mf_hilo): Correct check.
1063 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1065 * sim-main.h (interrupt_event): Add prototype.
1067 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1068 register_ptr, register_value.
1069 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1071 * sim-main.h (tracefh): Make extern.
1073 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1075 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1076 Reduce unnecessarily high timer event frequency.
1077 * dv-tx3904cpu.c: Ditto for interrupt event.
1079 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1081 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1083 (interrupt_event): Made non-static.
1085 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1086 interchange of configuration values for external vs. internal
1089 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1091 * mips.igen (BREAK): Moved code to here for
1092 simulator-reserved break instructions.
1093 * gencode.c (build_instruction): Ditto.
1094 * interp.c (signal_exception): Code moved from here. Non-
1095 reserved instructions now use exception vector, rather
1097 * sim-main.h: Moved magic constants to here.
1099 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1101 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1102 register upon non-zero interrupt event level, clear upon zero
1104 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1105 by passing zero event value.
1106 (*_io_{read,write}_buffer): Endianness fixes.
1107 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1108 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1110 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1111 serial I/O and timer module at base address 0xFFFF0000.
1113 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1115 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1118 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1120 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1122 * configure: Update.
1124 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1126 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1127 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1128 * configure.in: Include tx3904tmr in hw_device list.
1129 * configure: Rebuilt.
1130 * interp.c (sim_open): Instantiate three timer instances.
1131 Fix address typo of tx3904irc instance.
1133 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1135 * interp.c (signal_exception): SystemCall exception now uses
1136 the exception vector.
1138 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1140 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1143 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1145 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1147 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1149 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1151 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1152 sim-main.h. Declare a struct hw_descriptor instead of struct
1153 hw_device_descriptor.
1155 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1157 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1158 right bits and then re-align left hand bytes to correct byte
1159 lanes. Fix incorrect computation in do_store_left when loading
1160 bytes from second word.
1162 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1164 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1165 * interp.c (sim_open): Only create a device tree when HW is
1168 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1169 * interp.c (signal_exception): Ditto.
1171 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1173 * gencode.c: Mark BEGEZALL as LIKELY.
1175 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1177 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1178 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1180 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1182 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1183 modules. Recognize TX39 target with "mips*tx39" pattern.
1184 * configure: Rebuilt.
1185 * sim-main.h (*): Added many macros defining bits in
1186 TX39 control registers.
1187 (SignalInterrupt): Send actual PC instead of NULL.
1188 (SignalNMIReset): New exception type.
1189 * interp.c (board): New variable for future use to identify
1190 a particular board being simulated.
1191 (mips_option_handler,mips_options): Added "--board" option.
1192 (interrupt_event): Send actual PC.
1193 (sim_open): Make memory layout conditional on board setting.
1194 (signal_exception): Initial implementation of hardware interrupt
1195 handling. Accept another break instruction variant for simulator
1197 (decode_coproc): Implement RFE instruction for TX39.
1198 (mips.igen): Decode RFE instruction as such.
1199 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1200 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1201 bbegin to implement memory map.
1202 * dv-tx3904cpu.c: New file.
1203 * dv-tx3904irc.c: New file.
1205 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1207 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1209 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1211 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1212 with calls to check_div_hilo.
1214 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1216 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1217 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1218 Add special r3900 version of do_mult_hilo.
1219 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1220 with calls to check_mult_hilo.
1221 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1222 with calls to check_div_hilo.
1224 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1226 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1227 Document a replacement.
1229 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1231 * interp.c (sim_monitor): Make mon_printf work.
1233 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1235 * sim-main.h (INSN_NAME): New arg `cpu'.
1237 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1239 * configure: Regenerated to track ../common/aclocal.m4 changes.
1241 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1243 * configure: Regenerated to track ../common/aclocal.m4 changes.
1246 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1248 * acconfig.h: New file.
1249 * configure.in: Reverted change of Apr 24; use sinclude again.
1251 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1253 * configure: Regenerated to track ../common/aclocal.m4 changes.
1256 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1258 * configure.in: Don't call sinclude.
1260 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1262 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1264 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1266 * mips.igen (ERET): Implement.
1268 * interp.c (decode_coproc): Return sign-extended EPC.
1270 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1272 * interp.c (signal_exception): Do not ignore Trap.
1273 (signal_exception): On TRAP, restart at exception address.
1274 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1275 (signal_exception): Update.
1276 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1277 so that TRAP instructions are caught.
1279 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1281 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1282 contains HI/LO access history.
1283 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1284 (HIACCESS, LOACCESS): Delete, replace with
1285 (HIHISTORY, LOHISTORY): New macros.
1286 (CHECKHILO): Delete all, moved to mips.igen
1288 * gencode.c (build_instruction): Do not generate checks for
1289 correct HI/LO register usage.
1291 * interp.c (old_engine_run): Delete checks for correct HI/LO
1294 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1295 check_mf_cycles): New functions.
1296 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1297 do_divu, domultx, do_mult, do_multu): Use.
1299 * tx.igen ("madd", "maddu"): Use.
1301 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1303 * mips.igen (DSRAV): Use function do_dsrav.
1304 (SRAV): Use new function do_srav.
1306 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1307 (B): Sign extend 11 bit immediate.
1308 (EXT-B*): Shift 16 bit immediate left by 1.
1309 (ADDIU*): Don't sign extend immediate value.
1311 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1313 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1315 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1318 * mips.igen (delayslot32, nullify_next_insn): New functions.
1319 (m16.igen): Always include.
1320 (do_*): Add more tracing.
1322 * m16.igen (delayslot16): Add NIA argument, could be called by a
1323 32 bit MIPS16 instruction.
1325 * interp.c (ifetch16): Move function from here.
1326 * sim-main.c (ifetch16): To here.
1328 * sim-main.c (ifetch16, ifetch32): Update to match current
1329 implementations of LH, LW.
1330 (signal_exception): Don't print out incorrect hex value of illegal
1333 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1335 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1338 * m16.igen: Implement MIPS16 instructions.
1340 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1341 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1342 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1343 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1344 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1345 bodies of corresponding code from 32 bit insn to these. Also used
1346 by MIPS16 versions of functions.
1348 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1349 (IMEM16): Drop NR argument from macro.
1351 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1353 * Makefile.in (SIM_OBJS): Add sim-main.o.
1355 * sim-main.h (address_translation, load_memory, store_memory,
1356 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1358 (pr_addr, pr_uword64): Declare.
1359 (sim-main.c): Include when H_REVEALS_MODULE_P.
1361 * interp.c (address_translation, load_memory, store_memory,
1362 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1364 * sim-main.c: To here. Fix compilation problems.
1366 * configure.in: Enable inlining.
1367 * configure: Re-config.
1369 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1371 * configure: Regenerated to track ../common/aclocal.m4 changes.
1373 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1375 * mips.igen: Include tx.igen.
1376 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1377 * tx.igen: New file, contains MADD and MADDU.
1379 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1380 the hardwired constant `7'.
1381 (store_memory): Ditto.
1382 (LOADDRMASK): Move definition to sim-main.h.
1384 mips.igen (MTC0): Enable for r3900.
1387 mips.igen (do_load_byte): Delete.
1388 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1389 do_store_right): New functions.
1390 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1392 configure.in: Let the tx39 use igen again.
1395 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1397 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1398 not an address sized quantity. Return zero for cache sizes.
1400 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1402 * mips.igen (r3900): r3900 does not support 64 bit integer
1405 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1407 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1409 * configure : Rebuild.
1411 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1413 * configure: Regenerated to track ../common/aclocal.m4 changes.
1415 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1417 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1419 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1421 * configure: Regenerated to track ../common/aclocal.m4 changes.
1422 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1424 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1426 * configure: Regenerated to track ../common/aclocal.m4 changes.
1428 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1430 * interp.c (Max, Min): Comment out functions. Not yet used.
1432 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1434 * configure: Regenerated to track ../common/aclocal.m4 changes.
1436 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1438 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1439 configurable settings for stand-alone simulator.
1441 * configure.in: Added X11 search, just in case.
1443 * configure: Regenerated.
1445 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1447 * interp.c (sim_write, sim_read, load_memory, store_memory):
1448 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1450 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1452 * sim-main.h (GETFCC): Return an unsigned value.
1454 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1456 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1457 (DADD): Result destination is RD not RT.
1459 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1461 * sim-main.h (HIACCESS, LOACCESS): Always define.
1463 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1465 * interp.c (sim_info): Delete.
1467 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1469 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1470 (mips_option_handler): New argument `cpu'.
1471 (sim_open): Update call to sim_add_option_table.
1473 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1475 * mips.igen (CxC1): Add tracing.
1477 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1479 * sim-main.h (Max, Min): Declare.
1481 * interp.c (Max, Min): New functions.
1483 * mips.igen (BC1): Add tracing.
1485 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1487 * interp.c Added memory map for stack in vr4100
1489 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1491 * interp.c (load_memory): Add missing "break"'s.
1493 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1495 * interp.c (sim_store_register, sim_fetch_register): Pass in
1496 length parameter. Return -1.
1498 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1500 * interp.c: Added hardware init hook, fixed warnings.
1502 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1504 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1506 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1508 * interp.c (ifetch16): New function.
1510 * sim-main.h (IMEM32): Rename IMEM.
1511 (IMEM16_IMMED): Define.
1513 (DELAY_SLOT): Update.
1515 * m16run.c (sim_engine_run): New file.
1517 * m16.igen: All instructions except LB.
1518 (LB): Call do_load_byte.
1519 * mips.igen (do_load_byte): New function.
1520 (LB): Call do_load_byte.
1522 * mips.igen: Move spec for insn bit size and high bit from here.
1523 * Makefile.in (tmp-igen, tmp-m16): To here.
1525 * m16.dc: New file, decode mips16 instructions.
1527 * Makefile.in (SIM_NO_ALL): Define.
1528 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1530 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1532 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1533 point unit to 32 bit registers.
1534 * configure: Re-generate.
1536 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1538 * configure.in (sim_use_gen): Make IGEN the default simulator
1539 generator for generic 32 and 64 bit mips targets.
1540 * configure: Re-generate.
1542 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1544 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1547 * interp.c (sim_fetch_register, sim_store_register): Read/write
1548 FGR from correct location.
1549 (sim_open): Set size of FGR's according to
1550 WITH_TARGET_FLOATING_POINT_BITSIZE.
1552 * sim-main.h (FGR): Store floating point registers in a separate
1555 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1557 * configure: Regenerated to track ../common/aclocal.m4 changes.
1559 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1561 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1563 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1565 * interp.c (pending_tick): New function. Deliver pending writes.
1567 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1568 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1569 it can handle mixed sized quantites and single bits.
1571 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1573 * interp.c (oengine.h): Do not include when building with IGEN.
1574 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1575 (sim_info): Ditto for PROCESSOR_64BIT.
1576 (sim_monitor): Replace ut_reg with unsigned_word.
1577 (*): Ditto for t_reg.
1578 (LOADDRMASK): Define.
1579 (sim_open): Remove defunct check that host FP is IEEE compliant,
1580 using software to emulate floating point.
1581 (value_fpr, ...): Always compile, was conditional on HASFPU.
1583 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1585 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1588 * interp.c (SD, CPU): Define.
1589 (mips_option_handler): Set flags in each CPU.
1590 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1591 (sim_close): Do not clear STATE, deleted anyway.
1592 (sim_write, sim_read): Assume CPU zero's vm should be used for
1594 (sim_create_inferior): Set the PC for all processors.
1595 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1597 (mips16_entry): Pass correct nr of args to store_word, load_word.
1598 (ColdReset): Cold reset all cpu's.
1599 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1600 (sim_monitor, load_memory, store_memory, signal_exception): Use
1601 `CPU' instead of STATE_CPU.
1604 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1607 * sim-main.h (signal_exception): Add sim_cpu arg.
1608 (SignalException*): Pass both SD and CPU to signal_exception.
1609 * interp.c (signal_exception): Update.
1611 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1613 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1614 address_translation): Ditto
1615 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1617 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1619 * configure: Regenerated to track ../common/aclocal.m4 changes.
1621 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1623 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1625 * mips.igen (model): Map processor names onto BFD name.
1627 * sim-main.h (CPU_CIA): Delete.
1628 (SET_CIA, GET_CIA): Define
1630 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1632 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1635 * configure.in (default_endian): Configure a big-endian simulator
1637 * configure: Re-generate.
1639 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1641 * configure: Regenerated to track ../common/aclocal.m4 changes.
1643 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1645 * interp.c (sim_monitor): Handle Densan monitor outbyte
1646 and inbyte functions.
1648 1997-12-29 Felix Lee <flee@cygnus.com>
1650 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1652 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1654 * Makefile.in (tmp-igen): Arrange for $zero to always be
1655 reset to zero after every instruction.
1657 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1659 * configure: Regenerated to track ../common/aclocal.m4 changes.
1662 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1664 * mips.igen (MSUB): Fix to work like MADD.
1665 * gencode.c (MSUB): Similarly.
1667 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1669 * configure: Regenerated to track ../common/aclocal.m4 changes.
1671 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1673 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1675 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1677 * sim-main.h (sim-fpu.h): Include.
1679 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1680 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1681 using host independant sim_fpu module.
1683 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1685 * interp.c (signal_exception): Report internal errors with SIGABRT
1688 * sim-main.h (C0_CONFIG): New register.
1689 (signal.h): No longer include.
1691 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1693 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1695 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1697 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1699 * mips.igen: Tag vr5000 instructions.
1700 (ANDI): Was missing mipsIV model, fix assembler syntax.
1701 (do_c_cond_fmt): New function.
1702 (C.cond.fmt): Handle mips I-III which do not support CC field
1704 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1705 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1707 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1708 vr5000 which saves LO in a GPR separatly.
1710 * configure.in (enable-sim-igen): For vr5000, select vr5000
1711 specific instructions.
1712 * configure: Re-generate.
1714 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1716 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1718 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1719 fmt_uninterpreted_64 bit cases to switch. Convert to
1722 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1724 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1725 as specified in IV3.2 spec.
1726 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1728 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1730 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1731 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1732 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1733 PENDING_FILL versions of instructions. Simplify.
1735 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1737 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1739 (MTHI, MFHI): Disable code checking HI-LO.
1741 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1743 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1745 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1747 * gencode.c (build_mips16_operands): Replace IPC with cia.
1749 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1750 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1752 (UndefinedResult): Replace function with macro/function
1754 (sim_engine_run): Don't save PC in IPC.
1756 * sim-main.h (IPC): Delete.
1759 * interp.c (signal_exception, store_word, load_word,
1760 address_translation, load_memory, store_memory, cache_op,
1761 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1762 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1763 current instruction address - cia - argument.
1764 (sim_read, sim_write): Call address_translation directly.
1765 (sim_engine_run): Rename variable vaddr to cia.
1766 (signal_exception): Pass cia to sim_monitor
1768 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1769 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1770 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1772 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1773 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1776 * interp.c (signal_exception): Pass restart address to
1779 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1780 idecode.o): Add dependency.
1782 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1784 (DELAY_SLOT): Update NIA not PC with branch address.
1785 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1787 * mips.igen: Use CIA not PC in branch calculations.
1788 (illegal): Call SignalException.
1789 (BEQ, ADDIU): Fix assembler.
1791 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1793 * m16.igen (JALX): Was missing.
1795 * configure.in (enable-sim-igen): New configuration option.
1796 * configure: Re-generate.
1798 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1800 * interp.c (load_memory, store_memory): Delete parameter RAW.
1801 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1802 bypassing {load,store}_memory.
1804 * sim-main.h (ByteSwapMem): Delete definition.
1806 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1808 * interp.c (sim_do_command, sim_commands): Delete mips specific
1809 commands. Handled by module sim-options.
1811 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1812 (WITH_MODULO_MEMORY): Define.
1814 * interp.c (sim_info): Delete code printing memory size.
1816 * interp.c (mips_size): Nee sim_size, delete function.
1818 (monitor, monitor_base, monitor_size): Delete global variables.
1819 (sim_open, sim_close): Delete code creating monitor and other
1820 memory regions. Use sim-memopts module, via sim_do_commandf, to
1821 manage memory regions.
1822 (load_memory, store_memory): Use sim-core for memory model.
1824 * interp.c (address_translation): Delete all memory map code
1825 except line forcing 32 bit addresses.
1827 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1829 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1832 * interp.c (logfh, logfile): Delete globals.
1833 (sim_open, sim_close): Delete code opening & closing log file.
1834 (mips_option_handler): Delete -l and -n options.
1835 (OPTION mips_options): Ditto.
1837 * interp.c (OPTION mips_options): Rename option trace to dinero.
1838 (mips_option_handler): Update.
1840 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1842 * interp.c (fetch_str): New function.
1843 (sim_monitor): Rewrite using sim_read & sim_write.
1844 (sim_open): Check magic number.
1845 (sim_open): Write monitor vectors into memory using sim_write.
1846 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1847 (sim_read, sim_write): Simplify - transfer data one byte at a
1849 (load_memory, store_memory): Clarify meaning of parameter RAW.
1851 * sim-main.h (isHOST): Defete definition.
1852 (isTARGET): Mark as depreciated.
1853 (address_translation): Delete parameter HOST.
1855 * interp.c (address_translation): Delete parameter HOST.
1857 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1861 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1862 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1864 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1866 * mips.igen: Add model filter field to records.
1868 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1870 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1872 interp.c (sim_engine_run): Do not compile function sim_engine_run
1873 when WITH_IGEN == 1.
1875 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1876 target architecture.
1878 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1879 igen. Replace with configuration variables sim_igen_flags /
1882 * m16.igen: New file. Copy mips16 insns here.
1883 * mips.igen: From here.
1885 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1887 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1889 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1891 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1893 * gencode.c (build_instruction): Follow sim_write's lead in using
1894 BigEndianMem instead of !ByteSwapMem.
1896 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1898 * configure.in (sim_gen): Dependent on target, select type of
1899 generator. Always select old style generator.
1901 configure: Re-generate.
1903 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1905 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1906 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1907 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1908 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1909 SIM_@sim_gen@_*, set by autoconf.
1911 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1913 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1915 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1916 CURRENT_FLOATING_POINT instead.
1918 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1919 (address_translation): Raise exception InstructionFetch when
1920 translation fails and isINSTRUCTION.
1922 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1923 sim_engine_run): Change type of of vaddr and paddr to
1925 (address_translation, prefetch, load_memory, store_memory,
1926 cache_op): Change type of vAddr and pAddr to address_word.
1928 * gencode.c (build_instruction): Change type of vaddr and paddr to
1931 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1933 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1934 macro to obtain result of ALU op.
1936 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1938 * interp.c (sim_info): Call profile_print.
1940 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1942 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1944 * sim-main.h (WITH_PROFILE): Do not define, defined in
1945 common/sim-config.h. Use sim-profile module.
1946 (simPROFILE): Delete defintion.
1948 * interp.c (PROFILE): Delete definition.
1949 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1950 (sim_close): Delete code writing profile histogram.
1951 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1953 (sim_engine_run): Delete code profiling the PC.
1955 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1957 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1959 * interp.c (sim_monitor): Make register pointers of type
1962 * sim-main.h: Make registers of type unsigned_word not
1965 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1967 * interp.c (sync_operation): Rename from SyncOperation, make
1968 global, add SD argument.
1969 (prefetch): Rename from Prefetch, make global, add SD argument.
1970 (decode_coproc): Make global.
1972 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1974 * gencode.c (build_instruction): Generate DecodeCoproc not
1975 decode_coproc calls.
1977 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1978 (SizeFGR): Move to sim-main.h
1979 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1980 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1981 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1983 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1984 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1985 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1986 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1987 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1988 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1990 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1992 (sim-alu.h): Include.
1993 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1994 (sim_cia): Typedef to instruction_address.
1996 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1998 * Makefile.in (interp.o): Rename generated file engine.c to
2003 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2005 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2007 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2009 * gencode.c (build_instruction): For "FPSQRT", output correct
2010 number of arguments to Recip.
2012 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2014 * Makefile.in (interp.o): Depends on sim-main.h
2016 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2018 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2019 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2020 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2021 STATE, DSSTATE): Define
2022 (GPR, FGRIDX, ..): Define.
2024 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2025 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2026 (GPR, FGRIDX, ...): Delete macros.
2028 * interp.c: Update names to match defines from sim-main.h
2030 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2032 * interp.c (sim_monitor): Add SD argument.
2033 (sim_warning): Delete. Replace calls with calls to
2035 (sim_error): Delete. Replace calls with sim_io_error.
2036 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2037 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2038 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2040 (mips_size): Rename from sim_size. Add SD argument.
2042 * interp.c (simulator): Delete global variable.
2043 (callback): Delete global variable.
2044 (mips_option_handler, sim_open, sim_write, sim_read,
2045 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2046 sim_size,sim_monitor): Use sim_io_* not callback->*.
2047 (sim_open): ZALLOC simulator struct.
2048 (PROFILE): Do not define.
2050 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2052 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2053 support.h with corresponding code.
2055 * sim-main.h (word64, uword64), support.h: Move definition to
2057 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2060 * Makefile.in: Update dependencies
2061 * interp.c: Do not include.
2063 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2065 * interp.c (address_translation, load_memory, store_memory,
2066 cache_op): Rename to from AddressTranslation et.al., make global,
2069 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2072 * interp.c (SignalException): Rename to signal_exception, make
2075 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2077 * sim-main.h (SignalException, SignalExceptionInterrupt,
2078 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2079 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2080 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2083 * interp.c, support.h: Use.
2085 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2087 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2088 to value_fpr / store_fpr. Add SD argument.
2089 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2090 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2092 * sim-main.h (ValueFPR, StoreFPR): Define.
2094 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2096 * interp.c (sim_engine_run): Check consistency between configure
2097 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2100 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2101 (mips_fpu): Configure WITH_FLOATING_POINT.
2102 (mips_endian): Configure WITH_TARGET_ENDIAN.
2103 * configure: Update.
2105 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2107 * configure: Regenerated to track ../common/aclocal.m4 changes.
2109 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2111 * configure: Regenerated.
2113 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2115 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2117 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2119 * gencode.c (print_igen_insn_models): Assume certain architectures
2120 include all mips* instructions.
2121 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2124 * Makefile.in (tmp.igen): Add target. Generate igen input from
2127 * gencode.c (FEATURE_IGEN): Define.
2128 (main): Add --igen option. Generate output in igen format.
2129 (process_instructions): Format output according to igen option.
2130 (print_igen_insn_format): New function.
2131 (print_igen_insn_models): New function.
2132 (process_instructions): Only issue warnings and ignore
2133 instructions when no FEATURE_IGEN.
2135 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2137 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2140 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2142 * configure: Regenerated to track ../common/aclocal.m4 changes.
2144 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2146 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2147 SIM_RESERVED_BITS): Delete, moved to common.
2148 (SIM_EXTRA_CFLAGS): Update.
2150 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2152 * configure.in: Configure non-strict memory alignment.
2153 * configure: Regenerated to track ../common/aclocal.m4 changes.
2155 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2157 * configure: Regenerated to track ../common/aclocal.m4 changes.
2159 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2161 * gencode.c (SDBBP,DERET): Added (3900) insns.
2162 (RFE): Turn on for 3900.
2163 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2164 (dsstate): Made global.
2165 (SUBTARGET_R3900): Added.
2166 (CANCELDELAYSLOT): New.
2167 (SignalException): Ignore SystemCall rather than ignore and
2168 terminate. Add DebugBreakPoint handling.
2169 (decode_coproc): New insns RFE, DERET; and new registers Debug
2170 and DEPC protected by SUBTARGET_R3900.
2171 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2173 * Makefile.in,configure.in: Add mips subtarget option.
2174 * configure: Update.
2176 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2178 * gencode.c: Add r3900 (tx39).
2181 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2183 * gencode.c (build_instruction): Don't need to subtract 4 for
2186 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2188 * interp.c: Correct some HASFPU problems.
2190 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2192 * configure: Regenerated to track ../common/aclocal.m4 changes.
2194 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2196 * interp.c (mips_options): Fix samples option short form, should
2199 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2201 * interp.c (sim_info): Enable info code. Was just returning.
2203 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2205 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2208 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2210 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2212 (build_instruction): Ditto for LL.
2214 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2216 * configure: Regenerated to track ../common/aclocal.m4 changes.
2218 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2220 * configure: Regenerated to track ../common/aclocal.m4 changes.
2223 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2225 * interp.c (sim_open): Add call to sim_analyze_program, update
2228 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2230 * interp.c (sim_kill): Delete.
2231 (sim_create_inferior): Add ABFD argument. Set PC from same.
2232 (sim_load): Move code initializing trap handlers from here.
2233 (sim_open): To here.
2234 (sim_load): Delete, use sim-hload.c.
2236 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2238 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2240 * configure: Regenerated to track ../common/aclocal.m4 changes.
2243 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2245 * interp.c (sim_open): Add ABFD argument.
2246 (sim_load): Move call to sim_config from here.
2247 (sim_open): To here. Check return status.
2249 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2251 * gencode.c (build_instruction): Two arg MADD should
2252 not assign result to $0.
2254 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2256 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2257 * sim/mips/configure.in: Regenerate.
2259 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2261 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2262 signed8, unsigned8 et.al. types.
2264 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2265 hosts when selecting subreg.
2267 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2269 * interp.c (sim_engine_run): Reset the ZERO register to zero
2270 regardless of FEATURE_WARN_ZERO.
2271 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2273 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2275 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2276 (SignalException): For BreakPoints ignore any mode bits and just
2278 (SignalException): Always set the CAUSE register.
2280 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2282 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2283 exception has been taken.
2285 * interp.c: Implement the ERET and mt/f sr instructions.
2287 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2289 * interp.c (SignalException): Don't bother restarting an
2292 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2294 * interp.c (SignalException): Really take an interrupt.
2295 (interrupt_event): Only deliver interrupts when enabled.
2297 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2299 * interp.c (sim_info): Only print info when verbose.
2300 (sim_info) Use sim_io_printf for output.
2302 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2304 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2307 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2309 * interp.c (sim_do_command): Check for common commands if a
2310 simulator specific command fails.
2312 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2314 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2315 and simBE when DEBUG is defined.
2317 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2319 * interp.c (interrupt_event): New function. Pass exception event
2320 onto exception handler.
2322 * configure.in: Check for stdlib.h.
2323 * configure: Regenerate.
2325 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2326 variable declaration.
2327 (build_instruction): Initialize memval1.
2328 (build_instruction): Add UNUSED attribute to byte, bigend,
2330 (build_operands): Ditto.
2332 * interp.c: Fix GCC warnings.
2333 (sim_get_quit_code): Delete.
2335 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2336 * Makefile.in: Ditto.
2337 * configure: Re-generate.
2339 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2341 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2343 * interp.c (mips_option_handler): New function parse argumes using
2345 (myname): Replace with STATE_MY_NAME.
2346 (sim_open): Delete check for host endianness - performed by
2348 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2349 (sim_open): Move much of the initialization from here.
2350 (sim_load): To here. After the image has been loaded and
2352 (sim_open): Move ColdReset from here.
2353 (sim_create_inferior): To here.
2354 (sim_open): Make FP check less dependant on host endianness.
2356 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2358 * interp.c (sim_set_callbacks): Delete.
2360 * interp.c (membank, membank_base, membank_size): Replace with
2361 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2362 (sim_open): Remove call to callback->init. gdb/run do this.
2366 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2368 * interp.c (big_endian_p): Delete, replaced by
2369 current_target_byte_order.
2371 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2373 * interp.c (host_read_long, host_read_word, host_swap_word,
2374 host_swap_long): Delete. Using common sim-endian.
2375 (sim_fetch_register, sim_store_register): Use H2T.
2376 (pipeline_ticks): Delete. Handled by sim-events.
2378 (sim_engine_run): Update.
2380 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2382 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2384 (SignalException): To here. Signal using sim_engine_halt.
2385 (sim_stop_reason): Delete, moved to common.
2387 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2389 * interp.c (sim_open): Add callback argument.
2390 (sim_set_callbacks): Delete SIM_DESC argument.
2393 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2395 * Makefile.in (SIM_OBJS): Add common modules.
2397 * interp.c (sim_set_callbacks): Also set SD callback.
2398 (set_endianness, xfer_*, swap_*): Delete.
2399 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2400 Change to functions using sim-endian macros.
2401 (control_c, sim_stop): Delete, use common version.
2402 (simulate): Convert into.
2403 (sim_engine_run): This function.
2404 (sim_resume): Delete.
2406 * interp.c (simulation): New variable - the simulator object.
2407 (sim_kind): Delete global - merged into simulation.
2408 (sim_load): Cleanup. Move PC assignment from here.
2409 (sim_create_inferior): To here.
2411 * sim-main.h: New file.
2412 * interp.c (sim-main.h): Include.
2414 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2416 * configure: Regenerated to track ../common/aclocal.m4 changes.
2418 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2420 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2422 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2424 * gencode.c (build_instruction): DIV instructions: check
2425 for division by zero and integer overflow before using
2426 host's division operation.
2428 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2430 * Makefile.in (SIM_OBJS): Add sim-load.o.
2431 * interp.c: #include bfd.h.
2432 (target_byte_order): Delete.
2433 (sim_kind, myname, big_endian_p): New static locals.
2434 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2435 after argument parsing. Recognize -E arg, set endianness accordingly.
2436 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2437 load file into simulator. Set PC from bfd.
2438 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2439 (set_endianness): Use big_endian_p instead of target_byte_order.
2441 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2443 * interp.c (sim_size): Delete prototype - conflicts with
2444 definition in remote-sim.h. Correct definition.
2446 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2448 * configure: Regenerated to track ../common/aclocal.m4 changes.
2451 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2453 * interp.c (sim_open): New arg `kind'.
2455 * configure: Regenerated to track ../common/aclocal.m4 changes.
2457 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2459 * configure: Regenerated to track ../common/aclocal.m4 changes.
2461 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2463 * interp.c (sim_open): Set optind to 0 before calling getopt.
2465 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2467 * configure: Regenerated to track ../common/aclocal.m4 changes.
2469 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2471 * interp.c : Replace uses of pr_addr with pr_uword64
2472 where the bit length is always 64 independent of SIM_ADDR.
2473 (pr_uword64) : added.
2475 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2477 * configure: Re-generate.
2479 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2481 * configure: Regenerate to track ../common/aclocal.m4 changes.
2483 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2485 * interp.c (sim_open): New SIM_DESC result. Argument is now
2487 (other sim_*): New SIM_DESC argument.
2489 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2491 * interp.c: Fix printing of addresses for non-64-bit targets.
2492 (pr_addr): Add function to print address based on size.
2494 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2496 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2498 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2500 * gencode.c (build_mips16_operands): Correct computation of base
2501 address for extended PC relative instruction.
2503 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2505 * interp.c (mips16_entry): Add support for floating point cases.
2506 (SignalException): Pass floating point cases to mips16_entry.
2507 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2509 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2511 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2512 and then set the state to fmt_uninterpreted.
2513 (COP_SW): Temporarily set the state to fmt_word while calling
2516 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2518 * gencode.c (build_instruction): The high order may be set in the
2519 comparison flags at any ISA level, not just ISA 4.
2521 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2523 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2524 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2525 * configure.in: sinclude ../common/aclocal.m4.
2526 * configure: Regenerated.
2528 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2530 * configure: Rebuild after change to aclocal.m4.
2532 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2534 * configure configure.in Makefile.in: Update to new configure
2535 scheme which is more compatible with WinGDB builds.
2536 * configure.in: Improve comment on how to run autoconf.
2537 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2538 * Makefile.in: Use autoconf substitution to install common
2541 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2543 * gencode.c (build_instruction): Use BigEndianCPU instead of
2546 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2548 * interp.c (sim_monitor): Make output to stdout visible in
2549 wingdb's I/O log window.
2551 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2553 * support.h: Undo previous change to SIGTRAP
2556 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2558 * interp.c (store_word, load_word): New static functions.
2559 (mips16_entry): New static function.
2560 (SignalException): Look for mips16 entry and exit instructions.
2561 (simulate): Use the correct index when setting fpr_state after
2562 doing a pending move.
2564 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2566 * interp.c: Fix byte-swapping code throughout to work on
2567 both little- and big-endian hosts.
2569 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2571 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2572 with gdb/config/i386/xm-windows.h.
2574 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2576 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2577 that messes up arithmetic shifts.
2579 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2581 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2582 SIGTRAP and SIGQUIT for _WIN32.
2584 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2586 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2587 force a 64 bit multiplication.
2588 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2589 destination register is 0, since that is the default mips16 nop
2592 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2594 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2595 (build_endian_shift): Don't check proc64.
2596 (build_instruction): Always set memval to uword64. Cast op2 to
2597 uword64 when shifting it left in memory instructions. Always use
2598 the same code for stores--don't special case proc64.
2600 * gencode.c (build_mips16_operands): Fix base PC value for PC
2602 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2604 * interp.c (simJALDELAYSLOT): Define.
2605 (JALDELAYSLOT): Define.
2606 (INDELAYSLOT, INJALDELAYSLOT): Define.
2607 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2609 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2611 * interp.c (sim_open): add flush_cache as a PMON routine
2612 (sim_monitor): handle flush_cache by ignoring it
2614 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2616 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2618 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2619 (BigEndianMem): Rename to ByteSwapMem and change sense.
2620 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2621 BigEndianMem references to !ByteSwapMem.
2622 (set_endianness): New function, with prototype.
2623 (sim_open): Call set_endianness.
2624 (sim_info): Use simBE instead of BigEndianMem.
2625 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2626 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2627 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2628 ifdefs, keeping the prototype declaration.
2629 (swap_word): Rewrite correctly.
2630 (ColdReset): Delete references to CONFIG. Delete endianness related
2631 code; moved to set_endianness.
2633 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2635 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2636 * interp.c (CHECKHILO): Define away.
2637 (simSIGINT): New macro.
2638 (membank_size): Increase from 1MB to 2MB.
2639 (control_c): New function.
2640 (sim_resume): Rename parameter signal to signal_number. Add local
2641 variable prev. Call signal before and after simulate.
2642 (sim_stop_reason): Add simSIGINT support.
2643 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2645 (sim_warning): Delete call to SignalException. Do call printf_filtered
2647 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2648 a call to sim_warning.
2650 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2652 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2653 16 bit instructions.
2655 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2657 Add support for mips16 (16 bit MIPS implementation):
2658 * gencode.c (inst_type): Add mips16 instruction encoding types.
2659 (GETDATASIZEINSN): Define.
2660 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2661 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2663 (MIPS16_DECODE): New table, for mips16 instructions.
2664 (bitmap_val): New static function.
2665 (struct mips16_op): Define.
2666 (mips16_op_table): New table, for mips16 operands.
2667 (build_mips16_operands): New static function.
2668 (process_instructions): If PC is odd, decode a mips16
2669 instruction. Break out instruction handling into new
2670 build_instruction function.
2671 (build_instruction): New static function, broken out of
2672 process_instructions. Check modifiers rather than flags for SHIFT
2673 bit count and m[ft]{hi,lo} direction.
2674 (usage): Pass program name to fprintf.
2675 (main): Remove unused variable this_option_optind. Change
2676 ``*loptarg++'' to ``loptarg++''.
2677 (my_strtoul): Parenthesize && within ||.
2678 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2679 (simulate): If PC is odd, fetch a 16 bit instruction, and
2680 increment PC by 2 rather than 4.
2681 * configure.in: Add case for mips16*-*-*.
2682 * configure: Rebuild.
2684 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2686 * interp.c: Allow -t to enable tracing in standalone simulator.
2687 Fix garbage output in trace file and error messages.
2689 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2691 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2692 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2693 * configure.in: Simplify using macros in ../common/aclocal.m4.
2694 * configure: Regenerated.
2695 * tconfig.in: New file.
2697 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2699 * interp.c: Fix bugs in 64-bit port.
2700 Use ansi function declarations for msvc compiler.
2701 Initialize and test file pointer in trace code.
2702 Prevent duplicate definition of LAST_EMED_REGNUM.
2704 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2706 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2708 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2710 * interp.c (SignalException): Check for explicit terminating
2712 * gencode.c: Pass instruction value through SignalException()
2713 calls for Trap, Breakpoint and Syscall.
2715 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2717 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2718 only used on those hosts that provide it.
2719 * configure.in: Add sqrt() to list of functions to be checked for.
2720 * config.in: Re-generated.
2721 * configure: Re-generated.
2723 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2725 * gencode.c (process_instructions): Call build_endian_shift when
2726 expanding STORE RIGHT, to fix swr.
2727 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2728 clear the high bits.
2729 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2730 Fix float to int conversions to produce signed values.
2732 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2734 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2735 (process_instructions): Correct handling of nor instruction.
2736 Correct shift count for 32 bit shift instructions. Correct sign
2737 extension for arithmetic shifts to not shift the number of bits in
2738 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2739 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2741 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2742 It's OK to have a mult follow a mult. What's not OK is to have a
2743 mult follow an mfhi.
2744 (Convert): Comment out incorrect rounding code.
2746 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2748 * interp.c (sim_monitor): Improved monitor printf
2749 simulation. Tidied up simulator warnings, and added "--log" option
2750 for directing warning message output.
2751 * gencode.c: Use sim_warning() rather than WARNING macro.
2753 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2755 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2756 getopt1.o, rather than on gencode.c. Link objects together.
2757 Don't link against -liberty.
2758 (gencode.o, getopt.o, getopt1.o): New targets.
2759 * gencode.c: Include <ctype.h> and "ansidecl.h".
2760 (AND): Undefine after including "ansidecl.h".
2761 (ULONG_MAX): Define if not defined.
2762 (OP_*): Don't define macros; now defined in opcode/mips.h.
2763 (main): Call my_strtoul rather than strtoul.
2764 (my_strtoul): New static function.
2766 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2768 * gencode.c (process_instructions): Generate word64 and uword64
2769 instead of `long long' and `unsigned long long' data types.
2770 * interp.c: #include sysdep.h to get signals, and define default
2772 * (Convert): Work around for Visual-C++ compiler bug with type
2774 * support.h: Make things compile under Visual-C++ by using
2775 __int64 instead of `long long'. Change many refs to long long
2776 into word64/uword64 typedefs.
2778 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2780 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2781 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2783 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2784 (AC_PROG_INSTALL): Added.
2785 (AC_PROG_CC): Moved to before configure.host call.
2786 * configure: Rebuilt.
2788 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2790 * configure.in: Define @SIMCONF@ depending on mips target.
2791 * configure: Rebuild.
2792 * Makefile.in (run): Add @SIMCONF@ to control simulator
2794 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2795 * interp.c: Remove some debugging, provide more detailed error
2796 messages, update memory accesses to use LOADDRMASK.
2798 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2800 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2801 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2803 * configure: Rebuild.
2804 * config.in: New file, generated by autoheader.
2805 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2806 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2807 HAVE_ANINT and HAVE_AINT, as appropriate.
2808 * Makefile.in (run): Use @LIBS@ rather than -lm.
2809 (interp.o): Depend upon config.h.
2810 (Makefile): Just rebuild Makefile.
2811 (clean): Remove stamp-h.
2812 (mostlyclean): Make the same as clean, not as distclean.
2813 (config.h, stamp-h): New targets.
2815 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2817 * interp.c (ColdReset): Fix boolean test. Make all simulator
2820 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2822 * interp.c (xfer_direct_word, xfer_direct_long,
2823 swap_direct_word, swap_direct_long, xfer_big_word,
2824 xfer_big_long, xfer_little_word, xfer_little_long,
2825 swap_word,swap_long): Added.
2826 * interp.c (ColdReset): Provide function indirection to
2827 host<->simulated_target transfer routines.
2828 * interp.c (sim_store_register, sim_fetch_register): Updated to
2829 make use of indirected transfer routines.
2831 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2833 * gencode.c (process_instructions): Ensure FP ABS instruction
2835 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2836 system call support.
2838 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2840 * interp.c (sim_do_command): Complain if callback structure not
2843 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2845 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2846 support for Sun hosts.
2847 * Makefile.in (gencode): Ensure the host compiler and libraries
2848 used for cross-hosted build.
2850 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2852 * interp.c, gencode.c: Some more (TODO) tidying.
2854 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2856 * gencode.c, interp.c: Replaced explicit long long references with
2857 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2858 * support.h (SET64LO, SET64HI): Macros added.
2860 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2862 * configure: Regenerate with autoconf 2.7.
2864 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2866 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2867 * support.h: Remove superfluous "1" from #if.
2868 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2870 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2872 * interp.c (StoreFPR): Control UndefinedResult() call on
2873 WARN_RESULT manifest.
2875 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2877 * gencode.c: Tidied instruction decoding, and added FP instruction
2880 * interp.c: Added dineroIII, and BSD profiling support. Also
2881 run-time FP handling.
2883 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2885 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2886 gencode.c, interp.c, support.h: created.