1 2016-01-04 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2016-01-03 Mike Frysinger <vapier@gentoo.org>
7 * interp.c (sim_open): Update sim_parse_args comment.
9 2016-01-03 Mike Frysinger <vapier@gentoo.org>
11 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
12 * configure: Regenerate.
14 2016-01-02 Mike Frysinger <vapier@gentoo.org>
16 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
17 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
18 * configure: Regenerate.
19 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
21 2016-01-02 Mike Frysinger <vapier@gentoo.org>
23 * dv-tx3904cpu.c (CPU, SD): Delete.
25 2015-12-30 Mike Frysinger <vapier@gentoo.org>
27 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
28 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
29 (sim_store_register): Rename to ...
30 (mips_reg_store): ... this. Delete local cpu var.
31 Update sim_io_eprintf calls.
32 (sim_fetch_register): Rename to ...
33 (mips_reg_fetch): ... this. Delete local cpu var.
34 Update sim_io_eprintf calls.
36 2015-12-27 Mike Frysinger <vapier@gentoo.org>
38 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
40 2015-12-26 Mike Frysinger <vapier@gentoo.org>
42 * config.in, configure: Regenerate.
44 2015-12-26 Mike Frysinger <vapier@gentoo.org>
46 * interp.c (sim_write, sim_read): Delete.
47 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
48 (load_word): Likewise.
49 * micromips.igen (cache): Likewise.
50 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
51 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
52 do_store_left, do_store_right, do_load_double, do_store_double):
54 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
56 * sim-main.c (address_translation, prefetch): Delete.
57 (ifetch32, ifetch16): Delete call to AddressTranslation and set
59 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
60 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
61 (LoadMemory, StoreMemory): Delete CCA arg.
63 2015-12-24 Mike Frysinger <vapier@gentoo.org>
65 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
66 * configure: Regenerated.
68 2015-12-24 Mike Frysinger <vapier@gentoo.org>
70 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
73 2015-12-24 Mike Frysinger <vapier@gentoo.org>
75 * tconfig.h (SIM_HANDLES_LMA): Delete.
77 2015-12-24 Mike Frysinger <vapier@gentoo.org>
79 * sim-main.h (WITH_WATCHPOINTS): Delete.
81 2015-12-24 Mike Frysinger <vapier@gentoo.org>
83 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
85 2015-12-24 Mike Frysinger <vapier@gentoo.org>
87 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
89 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
91 * micromips.igen (process_isa_mode): Fix left shift of negative
94 2015-11-17 Mike Frysinger <vapier@gentoo.org>
96 * sim-main.h (WITH_MODULO_MEMORY): Delete.
98 2015-11-15 Mike Frysinger <vapier@gentoo.org>
100 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
102 2015-11-14 Mike Frysinger <vapier@gentoo.org>
104 * interp.c (sim_close): Rename to ...
105 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
107 * sim-main.h (mips_sim_close): Declare.
108 (SIM_CLOSE_HOOK): Define.
110 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
111 Ali Lown <ali.lown@imgtec.com>
113 * Makefile.in (tmp-micromips): New rule.
114 (tmp-mach-multi): Add support for micromips.
115 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
116 that works for both mips64 and micromips64.
117 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
119 Add build support for micromips.
120 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
121 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
122 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
123 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
124 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
125 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
126 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
127 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
128 Refactored instruction code to use these functions.
129 * dsp2.igen: Refactored instruction code to use the new functions.
130 * interp.c (decode_coproc): Refactored to work with any instruction
132 (isa_mode): New variable
133 (RSVD_INSTRUCTION): Changed to 0x00000039.
134 * m16.igen (BREAK16): Refactored instruction to use do_break16.
135 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
136 * micromips.dc: New file.
137 * micromips.igen: New file.
138 * micromips16.dc: New file.
139 * micromipsdsp.igen: New file.
140 * micromipsrun.c: New file.
141 * mips.igen (do_swc1): Changed to work with any instruction encoding.
142 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
143 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
144 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
145 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
146 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
147 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
148 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
149 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
150 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
151 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
152 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
153 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
154 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
155 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
156 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
157 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
158 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
159 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
161 Refactored instruction code to use these functions.
162 (RSVD): Changed to use new reserved instruction.
163 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
164 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
165 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
166 do_store_double): Added micromips32 and micromips64 models.
167 Added include for micromips.igen and micromipsdsp.igen
168 Add micromips32 and micromips64 models.
169 (DecodeCoproc): Updated to use new macro definition.
170 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
171 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
172 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
173 Refactored instruction code to use these functions.
174 * sim-main.h (CP0_operation): New enum.
175 (DecodeCoproc): Updated macro.
176 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
177 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
178 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
179 ISA_MODE_MICROMIPS): New defines.
180 (sim_state): Add isa_mode field.
182 2015-06-23 Mike Frysinger <vapier@gentoo.org>
184 * configure: Regenerate.
186 2015-06-12 Mike Frysinger <vapier@gentoo.org>
188 * configure.ac: Change configure.in to configure.ac.
189 * configure: Regenerate.
191 2015-06-12 Mike Frysinger <vapier@gentoo.org>
193 * configure: Regenerate.
195 2015-06-12 Mike Frysinger <vapier@gentoo.org>
197 * interp.c [TRACE]: Delete.
198 (TRACE): Change to WITH_TRACE_ANY_P.
199 [!WITH_TRACE_ANY_P] (open_trace): Define.
200 (mips_option_handler, open_trace, sim_close, dotrace):
201 Change defined(TRACE) to WITH_TRACE_ANY_P.
202 (sim_open): Delete TRACE ifdef check.
203 * sim-main.c (load_memory): Delete TRACE ifdef check.
204 (store_memory): Likewise.
205 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
206 [!WITH_TRACE_ANY_P] (dotrace): Define.
208 2015-04-18 Mike Frysinger <vapier@gentoo.org>
210 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
213 2015-04-18 Mike Frysinger <vapier@gentoo.org>
215 * sim-main.h (SIM_CPU): Delete.
217 2015-04-18 Mike Frysinger <vapier@gentoo.org>
219 * sim-main.h (sim_cia): Delete.
221 2015-04-17 Mike Frysinger <vapier@gentoo.org>
223 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
225 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
226 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
227 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
228 CIA_SET to CPU_PC_SET.
229 * sim-main.h (CIA_GET, CIA_SET): Delete.
231 2015-04-15 Mike Frysinger <vapier@gentoo.org>
233 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
234 * sim-main.h (STATE_CPU): Delete.
236 2015-04-13 Mike Frysinger <vapier@gentoo.org>
238 * configure: Regenerate.
240 2015-04-13 Mike Frysinger <vapier@gentoo.org>
242 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
243 * interp.c (mips_pc_get, mips_pc_set): New functions.
244 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
245 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
246 (sim_pc_get): Delete.
247 * sim-main.h (SIM_CPU): Define.
248 (struct sim_state): Change cpu to an array of pointers.
251 2015-04-13 Mike Frysinger <vapier@gentoo.org>
253 * interp.c (mips_option_handler, open_trace, sim_close,
254 sim_write, sim_read, sim_store_register, sim_fetch_register,
255 sim_create_inferior, pr_addr, pr_uword64): Convert old style
257 (sim_open): Convert old style prototype. Change casts with
258 sim_write to unsigned char *.
259 (fetch_str): Change null to unsigned char, and change cast to
261 (sim_monitor): Change c & ch to unsigned char. Change cast to
264 2015-04-12 Mike Frysinger <vapier@gentoo.org>
266 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
268 2015-04-06 Mike Frysinger <vapier@gentoo.org>
270 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
272 2015-04-01 Mike Frysinger <vapier@gentoo.org>
274 * tconfig.h (SIM_HAVE_PROFILE): Delete.
276 2015-03-31 Mike Frysinger <vapier@gentoo.org>
278 * config.in, configure: Regenerate.
280 2015-03-24 Mike Frysinger <vapier@gentoo.org>
282 * interp.c (sim_pc_get): New function.
284 2015-03-24 Mike Frysinger <vapier@gentoo.org>
286 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
287 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
289 2015-03-24 Mike Frysinger <vapier@gentoo.org>
291 * configure: Regenerate.
293 2015-03-23 Mike Frysinger <vapier@gentoo.org>
295 * configure: Regenerate.
297 2015-03-23 Mike Frysinger <vapier@gentoo.org>
299 * configure: Regenerate.
300 * configure.ac (mips_extra_objs): Delete.
301 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
302 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
304 2015-03-23 Mike Frysinger <vapier@gentoo.org>
306 * configure: Regenerate.
307 * configure.ac: Delete sim_hw checks for dv-sockser.
309 2015-03-16 Mike Frysinger <vapier@gentoo.org>
311 * config.in, configure: Regenerate.
312 * tconfig.in: Rename file ...
313 * tconfig.h: ... here.
315 2015-03-15 Mike Frysinger <vapier@gentoo.org>
317 * tconfig.in: Delete includes.
318 [HAVE_DV_SOCKSER]: Delete.
320 2015-03-14 Mike Frysinger <vapier@gentoo.org>
322 * Makefile.in (SIM_RUN_OBJS): Delete.
324 2015-03-14 Mike Frysinger <vapier@gentoo.org>
326 * configure.ac (AC_CHECK_HEADERS): Delete.
327 * aclocal.m4, configure: Regenerate.
329 2014-08-19 Alan Modra <amodra@gmail.com>
331 * configure: Regenerate.
333 2014-08-15 Roland McGrath <mcgrathr@google.com>
335 * configure: Regenerate.
336 * config.in: Regenerate.
338 2014-03-04 Mike Frysinger <vapier@gentoo.org>
340 * configure: Regenerate.
342 2013-09-23 Alan Modra <amodra@gmail.com>
344 * configure: Regenerate.
346 2013-06-03 Mike Frysinger <vapier@gentoo.org>
348 * aclocal.m4, configure: Regenerate.
350 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
352 * configure: Rebuild.
354 2013-03-26 Mike Frysinger <vapier@gentoo.org>
356 * configure: Regenerate.
358 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
360 * configure.ac: Address use of dv-sockser.o.
361 * tconfig.in: Conditionalize use of dv_sockser_install.
362 * configure: Regenerated.
363 * config.in: Regenerated.
365 2012-10-04 Chao-ying Fu <fu@mips.com>
366 Steve Ellcey <sellcey@mips.com>
368 * mips/mips3264r2.igen (rdhwr): New.
370 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
372 * configure.ac: Always link against dv-sockser.o.
373 * configure: Regenerate.
375 2012-06-15 Joel Brobecker <brobecker@adacore.com>
377 * config.in, configure: Regenerate.
379 2012-05-18 Nick Clifton <nickc@redhat.com>
382 * interp.c: Include config.h before system header files.
384 2012-03-24 Mike Frysinger <vapier@gentoo.org>
386 * aclocal.m4, config.in, configure: Regenerate.
388 2011-12-03 Mike Frysinger <vapier@gentoo.org>
390 * aclocal.m4: New file.
391 * configure: Regenerate.
393 2011-10-19 Mike Frysinger <vapier@gentoo.org>
395 * configure: Regenerate after common/acinclude.m4 update.
397 2011-10-17 Mike Frysinger <vapier@gentoo.org>
399 * configure.ac: Change include to common/acinclude.m4.
401 2011-10-17 Mike Frysinger <vapier@gentoo.org>
403 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
404 call. Replace common.m4 include with SIM_AC_COMMON.
405 * configure: Regenerate.
407 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
409 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
411 (tmp-mach-multi): Exit early when igen fails.
413 2011-07-05 Mike Frysinger <vapier@gentoo.org>
415 * interp.c (sim_do_command): Delete.
417 2011-02-14 Mike Frysinger <vapier@gentoo.org>
419 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
420 (tx3904sio_fifo_reset): Likewise.
421 * interp.c (sim_monitor): Likewise.
423 2010-04-14 Mike Frysinger <vapier@gentoo.org>
425 * interp.c (sim_write): Add const to buffer arg.
427 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
429 * interp.c: Don't include sysdep.h
431 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
433 * configure: Regenerate.
435 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
437 * config.in: Regenerate.
438 * configure: Likewise.
440 * configure: Regenerate.
442 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
444 * configure: Regenerate to track ../common/common.m4 changes.
447 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
448 Daniel Jacobowitz <dan@codesourcery.com>
449 Joseph Myers <joseph@codesourcery.com>
451 * configure: Regenerate.
453 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
455 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
456 that unconditionally allows fmt_ps.
457 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
458 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
459 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
460 filter from 64,f to 32,f.
461 (PREFX): Change filter from 64 to 32.
462 (LDXC1, LUXC1): Provide separate mips32r2 implementations
463 that use do_load_double instead of do_load. Make both LUXC1
464 versions unpredictable if SizeFGR () != 64.
465 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
466 instead of do_store. Remove unused variable. Make both SUXC1
467 versions unpredictable if SizeFGR () != 64.
469 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
471 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
472 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
473 shifts for that case.
475 2007-09-04 Nick Clifton <nickc@redhat.com>
477 * interp.c (options enum): Add OPTION_INFO_MEMORY.
478 (display_mem_info): New static variable.
479 (mips_option_handler): Handle OPTION_INFO_MEMORY.
480 (mips_options): Add info-memory and memory-info.
481 (sim_open): After processing the command line and board
482 specification, check display_mem_info. If it is set then
483 call the real handler for the --memory-info command line
486 2007-08-24 Joel Brobecker <brobecker@adacore.com>
488 * configure.ac: Change license of multi-run.c to GPL version 3.
489 * configure: Regenerate.
491 2007-06-28 Richard Sandiford <richard@codesourcery.com>
493 * configure.ac, configure: Revert last patch.
495 2007-06-26 Richard Sandiford <richard@codesourcery.com>
497 * configure.ac (sim_mipsisa3264_configs): New variable.
498 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
499 every configuration support all four targets, using the triplet to
500 determine the default.
501 * configure: Regenerate.
503 2007-06-25 Richard Sandiford <richard@codesourcery.com>
505 * Makefile.in (m16run.o): New rule.
507 2007-05-15 Thiemo Seufer <ths@mips.com>
509 * mips3264r2.igen (DSHD): Fix compile warning.
511 2007-05-14 Thiemo Seufer <ths@mips.com>
513 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
514 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
515 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
516 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
519 2007-03-01 Thiemo Seufer <ths@mips.com>
521 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
524 2007-02-20 Thiemo Seufer <ths@mips.com>
526 * dsp.igen: Update copyright notice.
527 * dsp2.igen: Fix copyright notice.
529 2007-02-20 Thiemo Seufer <ths@mips.com>
530 Chao-Ying Fu <fu@mips.com>
532 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
533 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
534 Add dsp2 to sim_igen_machine.
535 * configure: Regenerate.
536 * dsp.igen (do_ph_op): Add MUL support when op = 2.
537 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
538 (mulq_rs.ph): Use do_ph_mulq.
539 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
540 * mips.igen: Add dsp2 model and include dsp2.igen.
541 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
542 for *mips32r2, *mips64r2, *dsp.
543 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
544 for *mips32r2, *mips64r2, *dsp2.
545 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
547 2007-02-19 Thiemo Seufer <ths@mips.com>
548 Nigel Stephens <nigel@mips.com>
550 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
551 jumps with hazard barrier.
553 2007-02-19 Thiemo Seufer <ths@mips.com>
554 Nigel Stephens <nigel@mips.com>
556 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
557 after each call to sim_io_write.
559 2007-02-19 Thiemo Seufer <ths@mips.com>
560 Nigel Stephens <nigel@mips.com>
562 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
563 supported by this simulator.
564 (decode_coproc): Recognise additional CP0 Config registers
567 2007-02-19 Thiemo Seufer <ths@mips.com>
568 Nigel Stephens <nigel@mips.com>
569 David Ung <davidu@mips.com>
571 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
572 uninterpreted formats. If fmt is one of the uninterpreted types
573 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
574 fmt_word, and fmt_uninterpreted_64 like fmt_long.
575 (store_fpr): When writing an invalid odd register, set the
576 matching even register to fmt_unknown, not the following register.
577 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
578 the the memory window at offset 0 set by --memory-size command
580 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
582 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
584 (sim_monitor): When returning the memory size to the MIPS
585 application, use the value in STATE_MEM_SIZE, not an arbitrary
587 (cop_lw): Don' mess around with FPR_STATE, just pass
588 fmt_uninterpreted_32 to StoreFPR.
590 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
592 * mips.igen (not_word_value): Single version for mips32, mips64
595 2007-02-19 Thiemo Seufer <ths@mips.com>
596 Nigel Stephens <nigel@mips.com>
598 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
601 2007-02-17 Thiemo Seufer <ths@mips.com>
603 * configure.ac (mips*-sde-elf*): Move in front of generic machine
605 * configure: Regenerate.
607 2007-02-17 Thiemo Seufer <ths@mips.com>
609 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
610 Add mdmx to sim_igen_machine.
611 (mipsisa64*-*-*): Likewise. Remove dsp.
612 (mipsisa32*-*-*): Remove dsp.
613 * configure: Regenerate.
615 2007-02-13 Thiemo Seufer <ths@mips.com>
617 * configure.ac: Add mips*-sde-elf* target.
618 * configure: Regenerate.
620 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
622 * acconfig.h: Remove.
623 * config.in, configure: Regenerate.
625 2006-11-07 Thiemo Seufer <ths@mips.com>
627 * dsp.igen (do_w_op): Fix compiler warning.
629 2006-08-29 Thiemo Seufer <ths@mips.com>
630 David Ung <davidu@mips.com>
632 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
634 * configure: Regenerate.
635 * mips.igen (model): Add smartmips.
636 (MADDU): Increment ACX if carry.
637 (do_mult): Clear ACX.
638 (ROR,RORV): Add smartmips.
639 (include): Include smartmips.igen.
640 * sim-main.h (ACX): Set to REGISTERS[89].
641 * smartmips.igen: New file.
643 2006-08-29 Thiemo Seufer <ths@mips.com>
644 David Ung <davidu@mips.com>
646 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
647 mips3264r2.igen. Add missing dependency rules.
648 * m16e.igen: Support for mips16e save/restore instructions.
650 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
652 * configure: Regenerated.
654 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
656 * configure: Regenerated.
658 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
660 * configure: Regenerated.
662 2006-05-15 Chao-ying Fu <fu@mips.com>
664 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
666 2006-04-18 Nick Clifton <nickc@redhat.com>
668 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
671 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
673 * configure: Regenerate.
675 2005-12-14 Chao-ying Fu <fu@mips.com>
677 * Makefile.in (SIM_OBJS): Add dsp.o.
678 (dsp.o): New dependency.
679 (IGEN_INCLUDE): Add dsp.igen.
680 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
681 mipsisa64*-*-*): Add dsp to sim_igen_machine.
682 * configure: Regenerate.
683 * mips.igen: Add dsp model and include dsp.igen.
684 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
685 because these instructions are extended in DSP ASE.
686 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
687 adding 6 DSP accumulator registers and 1 DSP control register.
688 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
689 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
690 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
691 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
692 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
693 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
694 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
695 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
696 DSPCR_CCOND_SMASK): New define.
697 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
698 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
700 2005-07-08 Ian Lance Taylor <ian@airs.com>
702 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
704 2005-06-16 David Ung <davidu@mips.com>
705 Nigel Stephens <nigel@mips.com>
707 * mips.igen: New mips16e model and include m16e.igen.
708 (check_u64): Add mips16e tag.
709 * m16e.igen: New file for MIPS16e instructions.
710 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
711 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
713 * configure: Regenerate.
715 2005-05-26 David Ung <davidu@mips.com>
717 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
718 tags to all instructions which are applicable to the new ISAs.
719 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
721 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
723 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
725 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
726 * configure: Regenerate.
728 2005-03-23 Mark Kettenis <kettenis@gnu.org>
730 * configure: Regenerate.
732 2005-01-14 Andrew Cagney <cagney@gnu.org>
734 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
735 explicit call to AC_CONFIG_HEADER.
736 * configure: Regenerate.
738 2005-01-12 Andrew Cagney <cagney@gnu.org>
740 * configure.ac: Update to use ../common/common.m4.
741 * configure: Re-generate.
743 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
745 * configure: Regenerated to track ../common/aclocal.m4 changes.
747 2005-01-07 Andrew Cagney <cagney@gnu.org>
749 * configure.ac: Rename configure.in, require autoconf 2.59.
750 * configure: Re-generate.
752 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
754 * configure: Regenerate for ../common/aclocal.m4 update.
756 2004-09-24 Monika Chaddha <monika@acmet.com>
758 Committed by Andrew Cagney.
759 * m16.igen (CMP, CMPI): Fix assembler.
761 2004-08-18 Chris Demetriou <cgd@broadcom.com>
763 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
764 * configure: Regenerate.
766 2004-06-25 Chris Demetriou <cgd@broadcom.com>
768 * configure.in (sim_m16_machine): Include mipsIII.
769 * configure: Regenerate.
771 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
773 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
775 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
777 2004-04-10 Chris Demetriou <cgd@broadcom.com>
779 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
781 2004-04-09 Chris Demetriou <cgd@broadcom.com>
783 * mips.igen (check_fmt): Remove.
784 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
785 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
786 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
787 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
788 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
789 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
790 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
791 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
792 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
793 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
795 2004-04-09 Chris Demetriou <cgd@broadcom.com>
797 * sb1.igen (check_sbx): New function.
798 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
800 2004-03-29 Chris Demetriou <cgd@broadcom.com>
801 Richard Sandiford <rsandifo@redhat.com>
803 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
804 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
805 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
806 separate implementations for mipsIV and mipsV. Use new macros to
807 determine whether the restrictions apply.
809 2004-01-19 Chris Demetriou <cgd@broadcom.com>
811 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
812 (check_mult_hilo): Improve comments.
813 (check_div_hilo): Likewise. Also, fork off a new version
814 to handle mips32/mips64 (since there are no hazards to check
817 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
819 * mips.igen (do_dmultx): Fix check for negative operands.
821 2003-05-16 Ian Lance Taylor <ian@airs.com>
823 * Makefile.in (SHELL): Make sure this is defined.
824 (various): Use $(SHELL) whenever we invoke move-if-change.
826 2003-05-03 Chris Demetriou <cgd@broadcom.com>
828 * cp1.c: Tweak attribution slightly.
831 * mdmx.igen: Likewise.
832 * mips3d.igen: Likewise.
833 * sb1.igen: Likewise.
835 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
837 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
840 2003-02-27 Andrew Cagney <cagney@redhat.com>
842 * interp.c (sim_open): Rename _bfd to bfd.
843 (sim_create_inferior): Ditto.
845 2003-01-14 Chris Demetriou <cgd@broadcom.com>
847 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
849 2003-01-14 Chris Demetriou <cgd@broadcom.com>
851 * mips.igen (EI, DI): Remove.
853 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
855 * Makefile.in (tmp-run-multi): Fix mips16 filter.
857 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
858 Andrew Cagney <ac131313@redhat.com>
859 Gavin Romig-Koch <gavin@redhat.com>
860 Graydon Hoare <graydon@redhat.com>
861 Aldy Hernandez <aldyh@redhat.com>
862 Dave Brolley <brolley@redhat.com>
863 Chris Demetriou <cgd@broadcom.com>
865 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
866 (sim_mach_default): New variable.
867 (mips64vr-*-*, mips64vrel-*-*): New configurations.
868 Add a new simulator generator, MULTI.
869 * configure: Regenerate.
870 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
871 (multi-run.o): New dependency.
872 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
873 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
874 (tmp-multi): Combine them.
875 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
876 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
877 (distclean-extra): New rule.
878 * sim-main.h: Include bfd.h.
879 (MIPS_MACH): New macro.
880 * mips.igen (vr4120, vr5400, vr5500): New models.
881 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
882 * vr.igen: Replace with new version.
884 2003-01-04 Chris Demetriou <cgd@broadcom.com>
886 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
887 * configure: Regenerate.
889 2002-12-31 Chris Demetriou <cgd@broadcom.com>
891 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
892 * mips.igen: Remove all invocations of check_branch_bug and
895 2002-12-16 Chris Demetriou <cgd@broadcom.com>
897 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
899 2002-07-30 Chris Demetriou <cgd@broadcom.com>
901 * mips.igen (do_load_double, do_store_double): New functions.
902 (LDC1, SDC1): Rename to...
903 (LDC1b, SDC1b): respectively.
904 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
906 2002-07-29 Michael Snyder <msnyder@redhat.com>
908 * cp1.c (fp_recip2): Modify initialization expression so that
909 GCC will recognize it as constant.
911 2002-06-18 Chris Demetriou <cgd@broadcom.com>
913 * mdmx.c (SD_): Delete.
914 (Unpredictable): Re-define, for now, to directly invoke
915 unpredictable_action().
916 (mdmx_acc_op): Fix error in .ob immediate handling.
918 2002-06-18 Andrew Cagney <cagney@redhat.com>
920 * interp.c (sim_firmware_command): Initialize `address'.
922 2002-06-16 Andrew Cagney <ac131313@redhat.com>
924 * configure: Regenerated to track ../common/aclocal.m4 changes.
926 2002-06-14 Chris Demetriou <cgd@broadcom.com>
927 Ed Satterthwaite <ehs@broadcom.com>
929 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
930 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
931 * mips.igen: Include mips3d.igen.
932 (mips3d): New model name for MIPS-3D ASE instructions.
933 (CVT.W.fmt): Don't use this instruction for word (source) format
935 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
936 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
937 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
938 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
939 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
940 (RSquareRoot1, RSquareRoot2): New macros.
941 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
942 (fp_rsqrt2): New functions.
943 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
944 * configure: Regenerate.
946 2002-06-13 Chris Demetriou <cgd@broadcom.com>
947 Ed Satterthwaite <ehs@broadcom.com>
949 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
950 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
951 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
952 (convert): Note that this function is not used for paired-single
954 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
955 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
956 (check_fmt_p): Enable paired-single support.
957 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
958 (PUU.PS): New instructions.
959 (CVT.S.fmt): Don't use this instruction for paired-single format
961 * sim-main.h (FP_formats): New value 'fmt_ps.'
962 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
963 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
965 2002-06-12 Chris Demetriou <cgd@broadcom.com>
967 * mips.igen: Fix formatting of function calls in
970 2002-06-12 Chris Demetriou <cgd@broadcom.com>
972 * mips.igen (MOVN, MOVZ): Trace result.
973 (TNEI): Print "tnei" as the opcode name in traces.
974 (CEIL.W): Add disassembly string for traces.
975 (RSQRT.fmt): Make location of disassembly string consistent
976 with other instructions.
978 2002-06-12 Chris Demetriou <cgd@broadcom.com>
980 * mips.igen (X): Delete unused function.
982 2002-06-08 Andrew Cagney <cagney@redhat.com>
984 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
986 2002-06-07 Chris Demetriou <cgd@broadcom.com>
987 Ed Satterthwaite <ehs@broadcom.com>
989 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
990 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
991 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
992 (fp_nmsub): New prototypes.
993 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
994 (NegMultiplySub): New defines.
995 * mips.igen (RSQRT.fmt): Use RSquareRoot().
996 (MADD.D, MADD.S): Replace with...
997 (MADD.fmt): New instruction.
998 (MSUB.D, MSUB.S): Replace with...
999 (MSUB.fmt): New instruction.
1000 (NMADD.D, NMADD.S): Replace with...
1001 (NMADD.fmt): New instruction.
1002 (NMSUB.D, MSUB.S): Replace with...
1003 (NMSUB.fmt): New instruction.
1005 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1006 Ed Satterthwaite <ehs@broadcom.com>
1008 * cp1.c: Fix more comment spelling and formatting.
1009 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1010 (denorm_mode): New function.
1011 (fpu_unary, fpu_binary): Round results after operation, collect
1012 status from rounding operations, and update the FCSR.
1013 (convert): Collect status from integer conversions and rounding
1014 operations, and update the FCSR. Adjust NaN values that result
1015 from conversions. Convert to use sim_io_eprintf rather than
1016 fprintf, and remove some debugging code.
1017 * cp1.h (fenr_FS): New define.
1019 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1021 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1022 rounding mode to sim FP rounding mode flag conversion code into...
1023 (rounding_mode): New function.
1025 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1027 * cp1.c: Clean up formatting of a few comments.
1028 (value_fpr): Reformat switch statement.
1030 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1031 Ed Satterthwaite <ehs@broadcom.com>
1034 * sim-main.h: Include cp1.h.
1035 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1036 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1037 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1038 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1039 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1040 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1041 * cp1.c: Don't include sim-fpu.h; already included by
1042 sim-main.h. Clean up formatting of some comments.
1043 (NaN, Equal, Less): Remove.
1044 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1045 (fp_cmp): New functions.
1046 * mips.igen (do_c_cond_fmt): Remove.
1047 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1048 Compare. Add result tracing.
1049 (CxC1): Remove, replace with...
1050 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1051 (DMxC1): Remove, replace with...
1052 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1053 (MxC1): Remove, replace with...
1054 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1056 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1058 * sim-main.h (FGRIDX): Remove, replace all uses with...
1059 (FGR_BASE): New macro.
1060 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1061 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1062 (NR_FGR, FGR): Likewise.
1063 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1064 * mips.igen: Likewise.
1066 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1068 * cp1.c: Add an FSF Copyright notice to this file.
1070 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1071 Ed Satterthwaite <ehs@broadcom.com>
1073 * cp1.c (Infinity): Remove.
1074 * sim-main.h (Infinity): Likewise.
1076 * cp1.c (fp_unary, fp_binary): New functions.
1077 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1078 (fp_sqrt): New functions, implemented in terms of the above.
1079 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1080 (Recip, SquareRoot): Remove (replaced by functions above).
1081 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1082 (fp_recip, fp_sqrt): New prototypes.
1083 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1084 (Recip, SquareRoot): Replace prototypes with #defines which
1085 invoke the functions above.
1087 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1089 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1090 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1091 file, remove PARAMS from prototypes.
1092 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1093 simulator state arguments.
1094 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1095 pass simulator state arguments.
1096 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1097 (store_fpr, convert): Remove 'sd' argument.
1098 (value_fpr): Likewise. Convert to use 'SD' instead.
1100 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1102 * cp1.c (Min, Max): Remove #if 0'd functions.
1103 * sim-main.h (Min, Max): Remove.
1105 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1107 * cp1.c: fix formatting of switch case and default labels.
1108 * interp.c: Likewise.
1109 * sim-main.c: Likewise.
1111 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1113 * cp1.c: Clean up comments which describe FP formats.
1114 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1116 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1117 Ed Satterthwaite <ehs@broadcom.com>
1119 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1120 Broadcom SiByte SB-1 processor configurations.
1121 * configure: Regenerate.
1122 * sb1.igen: New file.
1123 * mips.igen: Include sb1.igen.
1125 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1126 * mdmx.igen: Add "sb1" model to all appropriate functions and
1128 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1129 (ob_func, ob_acc): Reference the above.
1130 (qh_acc): Adjust to keep the same size as ob_acc.
1131 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1132 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1134 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1136 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1138 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1139 Ed Satterthwaite <ehs@broadcom.com>
1141 * mips.igen (mdmx): New (pseudo-)model.
1142 * mdmx.c, mdmx.igen: New files.
1143 * Makefile.in (SIM_OBJS): Add mdmx.o.
1144 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1146 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1147 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1148 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1149 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1150 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1151 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1152 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1153 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1154 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1155 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1156 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1157 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1158 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1159 (qh_fmtsel): New macros.
1160 (_sim_cpu): New member "acc".
1161 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1162 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1164 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1166 * interp.c: Use 'deprecated' rather than 'depreciated.'
1167 * sim-main.h: Likewise.
1169 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1171 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1172 which wouldn't compile anyway.
1173 * sim-main.h (unpredictable_action): New function prototype.
1174 (Unpredictable): Define to call igen function unpredictable().
1175 (NotWordValue): New macro to call igen function not_word_value().
1176 (UndefinedResult): Remove.
1177 * interp.c (undefined_result): Remove.
1178 (unpredictable_action): New function.
1179 * mips.igen (not_word_value, unpredictable): New functions.
1180 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1181 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1182 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1183 NotWordValue() to check for unpredictable inputs, then
1184 Unpredictable() to handle them.
1186 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1188 * mips.igen: Fix formatting of calls to Unpredictable().
1190 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1192 * interp.c (sim_open): Revert previous change.
1194 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1196 * interp.c (sim_open): Disable chunk of code that wrote code in
1197 vector table entries.
1199 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1201 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1202 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1205 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1207 * cp1.c: Fix many formatting issues.
1209 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1211 * cp1.c (fpu_format_name): New function to replace...
1212 (DOFMT): This. Delete, and update all callers.
1213 (fpu_rounding_mode_name): New function to replace...
1214 (RMMODE): This. Delete, and update all callers.
1216 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1218 * interp.c: Move FPU support routines from here to...
1219 * cp1.c: Here. New file.
1220 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1221 (cp1.o): New target.
1223 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1225 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1226 * mips.igen (mips32, mips64): New models, add to all instructions
1227 and functions as appropriate.
1228 (loadstore_ea, check_u64): New variant for model mips64.
1229 (check_fmt_p): New variant for models mipsV and mips64, remove
1230 mipsV model marking fro other variant.
1233 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1234 for mips32 and mips64.
1235 (DCLO, DCLZ): New instructions for mips64.
1237 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1239 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1240 immediate or code as a hex value with the "%#lx" format.
1241 (ANDI): Likewise, and fix printed instruction name.
1243 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1245 * sim-main.h (UndefinedResult, Unpredictable): New macros
1246 which currently do nothing.
1248 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1250 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1251 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1252 (status_CU3): New definitions.
1254 * sim-main.h (ExceptionCause): Add new values for MIPS32
1255 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1256 for DebugBreakPoint and NMIReset to note their status in
1258 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1259 (SignalExceptionCacheErr): New exception macros.
1261 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1263 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1264 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1266 (SignalExceptionCoProcessorUnusable): Take as argument the
1267 unusable coprocessor number.
1269 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1271 * mips.igen: Fix formatting of all SignalException calls.
1273 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1275 * sim-main.h (SIGNEXTEND): Remove.
1277 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1279 * mips.igen: Remove gencode comment from top of file, fix
1280 spelling in another comment.
1282 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1284 * mips.igen (check_fmt, check_fmt_p): New functions to check
1285 whether specific floating point formats are usable.
1286 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1287 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1288 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1289 Use the new functions.
1290 (do_c_cond_fmt): Remove format checks...
1291 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1293 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1295 * mips.igen: Fix formatting of check_fpu calls.
1297 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1299 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1301 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1303 * mips.igen: Remove whitespace at end of lines.
1305 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1307 * mips.igen (loadstore_ea): New function to do effective
1308 address calculations.
1309 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1310 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1311 CACHE): Use loadstore_ea to do effective address computations.
1313 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1315 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1316 * mips.igen (LL, CxC1, MxC1): Likewise.
1318 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1320 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1321 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1322 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1323 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1324 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1325 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1326 Don't split opcode fields by hand, use the opcode field values
1329 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1331 * mips.igen (do_divu): Fix spacing.
1333 * mips.igen (do_dsllv): Move to be right before DSLLV,
1334 to match the rest of the do_<shift> functions.
1336 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1338 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1339 DSRL32, do_dsrlv): Trace inputs and results.
1341 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1343 * mips.igen (CACHE): Provide instruction-printing string.
1345 * interp.c (signal_exception): Comment tokens after #endif.
1347 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1349 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1350 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1351 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1352 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1353 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1354 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1355 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1356 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1358 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1360 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1361 instruction-printing string.
1362 (LWU): Use '64' as the filter flag.
1364 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1366 * mips.igen (SDXC1): Fix instruction-printing string.
1368 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1370 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1371 filter flags "32,f".
1373 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1375 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1378 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1380 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1381 add a comma) so that it more closely match the MIPS ISA
1382 documentation opcode partitioning.
1383 (PREF): Put useful names on opcode fields, and include
1384 instruction-printing string.
1386 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1388 * mips.igen (check_u64): New function which in the future will
1389 check whether 64-bit instructions are usable and signal an
1390 exception if not. Currently a no-op.
1391 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1392 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1393 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1394 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1396 * mips.igen (check_fpu): New function which in the future will
1397 check whether FPU instructions are usable and signal an exception
1398 if not. Currently a no-op.
1399 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1400 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1401 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1402 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1403 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1404 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1405 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1406 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1408 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1410 * mips.igen (do_load_left, do_load_right): Move to be immediately
1412 (do_store_left, do_store_right): Move to be immediately following
1415 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1417 * mips.igen (mipsV): New model name. Also, add it to
1418 all instructions and functions where it is appropriate.
1420 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1422 * mips.igen: For all functions and instructions, list model
1423 names that support that instruction one per line.
1425 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1427 * mips.igen: Add some additional comments about supported
1428 models, and about which instructions go where.
1429 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1430 order as is used in the rest of the file.
1432 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1434 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1435 indicating that ALU32_END or ALU64_END are there to check
1437 (DADD): Likewise, but also remove previous comment about
1440 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1442 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1443 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1444 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1445 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1446 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1447 fields (i.e., add and move commas) so that they more closely
1448 match the MIPS ISA documentation opcode partitioning.
1450 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1452 * mips.igen (ADDI): Print immediate value.
1453 (BREAK): Print code.
1454 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1455 (SLL): Print "nop" specially, and don't run the code
1456 that does the shift for the "nop" case.
1458 2001-11-17 Fred Fish <fnf@redhat.com>
1460 * sim-main.h (float_operation): Move enum declaration outside
1461 of _sim_cpu struct declaration.
1463 2001-04-12 Jim Blandy <jimb@redhat.com>
1465 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1466 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1468 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1469 PENDING_FILL, and you can get the intended effect gracefully by
1470 calling PENDING_SCHED directly.
1472 2001-02-23 Ben Elliston <bje@redhat.com>
1474 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1475 already defined elsewhere.
1477 2001-02-19 Ben Elliston <bje@redhat.com>
1479 * sim-main.h (sim_monitor): Return an int.
1480 * interp.c (sim_monitor): Add return values.
1481 (signal_exception): Handle error conditions from sim_monitor.
1483 2001-02-08 Ben Elliston <bje@redhat.com>
1485 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1486 (store_memory): Likewise, pass cia to sim_core_write*.
1488 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1490 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1491 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1493 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1495 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1496 * Makefile.in: Don't delete *.igen when cleaning directory.
1498 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1500 * m16.igen (break): Call SignalException not sim_engine_halt.
1502 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1504 From Jason Eckhardt:
1505 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1507 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1509 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1511 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1513 * mips.igen (do_dmultx): Fix typo.
1515 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1517 * configure: Regenerated to track ../common/aclocal.m4 changes.
1519 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1521 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1523 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1525 * sim-main.h (GPR_CLEAR): Define macro.
1527 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1529 * interp.c (decode_coproc): Output long using %lx and not %s.
1531 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1533 * interp.c (sim_open): Sort & extend dummy memory regions for
1534 --board=jmr3904 for eCos.
1536 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1538 * configure: Regenerated.
1540 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1542 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1543 calls, conditional on the simulator being in verbose mode.
1545 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1547 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1548 cache don't get ReservedInstruction traps.
1550 1999-11-29 Mark Salter <msalter@cygnus.com>
1552 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1553 to clear status bits in sdisr register. This is how the hardware works.
1555 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1556 being used by cygmon.
1558 1999-11-11 Andrew Haley <aph@cygnus.com>
1560 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1563 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1565 * mips.igen (MULT): Correct previous mis-applied patch.
1567 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1569 * mips.igen (delayslot32): Handle sequence like
1570 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1571 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1572 (MULT): Actually pass the third register...
1574 1999-09-03 Mark Salter <msalter@cygnus.com>
1576 * interp.c (sim_open): Added more memory aliases for additional
1577 hardware being touched by cygmon on jmr3904 board.
1579 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1581 * configure: Regenerated to track ../common/aclocal.m4 changes.
1583 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1585 * interp.c (sim_store_register): Handle case where client - GDB -
1586 specifies that a 4 byte register is 8 bytes in size.
1587 (sim_fetch_register): Ditto.
1589 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1591 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1592 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1593 (idt_monitor_base): Base address for IDT monitor traps.
1594 (pmon_monitor_base): Ditto for PMON.
1595 (lsipmon_monitor_base): Ditto for LSI PMON.
1596 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1597 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1598 (sim_firmware_command): New function.
1599 (mips_option_handler): Call it for OPTION_FIRMWARE.
1600 (sim_open): Allocate memory for idt_monitor region. If "--board"
1601 option was given, add no monitor by default. Add BREAK hooks only if
1602 monitors are also there.
1604 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1606 * interp.c (sim_monitor): Flush output before reading input.
1608 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1610 * tconfig.in (SIM_HANDLES_LMA): Always define.
1612 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1614 From Mark Salter <msalter@cygnus.com>:
1615 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1616 (sim_open): Add setup for BSP board.
1618 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1620 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1621 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1622 them as unimplemented.
1624 1999-05-08 Felix Lee <flee@cygnus.com>
1626 * configure: Regenerated to track ../common/aclocal.m4 changes.
1628 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1630 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1632 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1634 * configure.in: Any mips64vr5*-*-* target should have
1635 -DTARGET_ENABLE_FR=1.
1636 (default_endian): Any mips64vr*el-*-* target should default to
1638 * configure: Re-generate.
1640 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1642 * mips.igen (ldl): Extend from _16_, not 32.
1644 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1646 * interp.c (sim_store_register): Force registers written to by GDB
1647 into an un-interpreted state.
1649 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1651 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1652 CPU, start periodic background I/O polls.
1653 (tx3904sio_poll): New function: periodic I/O poller.
1655 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1657 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1659 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1661 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1664 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1666 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1667 (load_word): Call SIM_CORE_SIGNAL hook on error.
1668 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1669 starting. For exception dispatching, pass PC instead of NULL_CIA.
1670 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1671 * sim-main.h (COP0_BADVADDR): Define.
1672 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1673 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1674 (_sim_cpu): Add exc_* fields to store register value snapshots.
1675 * mips.igen (*): Replace memory-related SignalException* calls
1676 with references to SIM_CORE_SIGNAL hook.
1678 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1680 * sim-main.c (*): Minor warning cleanups.
1682 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1684 * m16.igen (DADDIU5): Correct type-o.
1686 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1688 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1691 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1693 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1695 (interp.o): Add dependency on itable.h
1696 (oengine.c, gencode): Delete remaining references.
1697 (BUILT_SRC_FROM_GEN): Clean up.
1699 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1702 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1703 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1704 tmp-run-hack) : New.
1705 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1706 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1707 Drop the "64" qualifier to get the HACK generator working.
1708 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1709 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1710 qualifier to get the hack generator working.
1711 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1712 (DSLL): Use do_dsll.
1713 (DSLLV): Use do_dsllv.
1714 (DSRA): Use do_dsra.
1715 (DSRL): Use do_dsrl.
1716 (DSRLV): Use do_dsrlv.
1717 (BC1): Move *vr4100 to get the HACK generator working.
1718 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1719 get the HACK generator working.
1720 (MACC) Rename to get the HACK generator working.
1721 (DMACC,MACCS,DMACCS): Add the 64.
1723 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1725 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1726 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1728 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1730 * mips/interp.c (DEBUG): Cleanups.
1732 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1734 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1735 (tx3904sio_tickle): fflush after a stdout character output.
1737 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1739 * interp.c (sim_close): Uninstall modules.
1741 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1743 * sim-main.h, interp.c (sim_monitor): Change to global
1746 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1748 * configure.in (vr4100): Only include vr4100 instructions in
1750 * configure: Re-generate.
1751 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1753 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1755 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1756 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1759 * configure.in (sim_default_gen, sim_use_gen): Replace with
1761 (--enable-sim-igen): Delete config option. Always using IGEN.
1762 * configure: Re-generate.
1764 * Makefile.in (gencode): Kill, kill, kill.
1767 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1769 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1770 bit mips16 igen simulator.
1771 * configure: Re-generate.
1773 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1774 as part of vr4100 ISA.
1775 * vr.igen: Mark all instructions as 64 bit only.
1777 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1779 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1782 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1784 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1785 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1786 * configure: Re-generate.
1788 * m16.igen (BREAK): Define breakpoint instruction.
1789 (JALX32): Mark instruction as mips16 and not r3900.
1790 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1792 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1794 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1796 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1797 insn as a debug breakpoint.
1799 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1801 (PENDING_SCHED): Clean up trace statement.
1802 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1803 (PENDING_FILL): Delay write by only one cycle.
1804 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1806 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1808 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1810 (pending_tick): Move incrementing of index to FOR statement.
1811 (pending_tick): Only update PENDING_OUT after a write has occured.
1813 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1815 * configure: Re-generate.
1817 * interp.c (sim_engine_run OLD): Delete explicit call to
1818 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1820 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1822 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1823 interrupt level number to match changed SignalExceptionInterrupt
1826 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1828 * interp.c: #include "itable.h" if WITH_IGEN.
1829 (get_insn_name): New function.
1830 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1831 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1833 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1835 * configure: Rebuilt to inhale new common/aclocal.m4.
1837 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1839 * dv-tx3904sio.c: Include sim-assert.h.
1841 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1843 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1844 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1845 Reorganize target-specific sim-hardware checks.
1846 * configure: rebuilt.
1847 * interp.c (sim_open): For tx39 target boards, set
1848 OPERATING_ENVIRONMENT, add tx3904sio devices.
1849 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1850 ROM executables. Install dv-sockser into sim-modules list.
1852 * dv-tx3904irc.c: Compiler warning clean-up.
1853 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1854 frequent hw-trace messages.
1856 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1858 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1860 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1862 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1864 * vr.igen: New file.
1865 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1866 * mips.igen: Define vr4100 model. Include vr.igen.
1867 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1869 * mips.igen (check_mf_hilo): Correct check.
1871 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1873 * sim-main.h (interrupt_event): Add prototype.
1875 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1876 register_ptr, register_value.
1877 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1879 * sim-main.h (tracefh): Make extern.
1881 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1883 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1884 Reduce unnecessarily high timer event frequency.
1885 * dv-tx3904cpu.c: Ditto for interrupt event.
1887 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1889 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1891 (interrupt_event): Made non-static.
1893 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1894 interchange of configuration values for external vs. internal
1897 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1899 * mips.igen (BREAK): Moved code to here for
1900 simulator-reserved break instructions.
1901 * gencode.c (build_instruction): Ditto.
1902 * interp.c (signal_exception): Code moved from here. Non-
1903 reserved instructions now use exception vector, rather
1905 * sim-main.h: Moved magic constants to here.
1907 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1909 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1910 register upon non-zero interrupt event level, clear upon zero
1912 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1913 by passing zero event value.
1914 (*_io_{read,write}_buffer): Endianness fixes.
1915 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1916 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1918 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1919 serial I/O and timer module at base address 0xFFFF0000.
1921 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1923 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1926 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1928 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1930 * configure: Update.
1932 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1934 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1935 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1936 * configure.in: Include tx3904tmr in hw_device list.
1937 * configure: Rebuilt.
1938 * interp.c (sim_open): Instantiate three timer instances.
1939 Fix address typo of tx3904irc instance.
1941 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1943 * interp.c (signal_exception): SystemCall exception now uses
1944 the exception vector.
1946 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1948 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1951 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1953 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1955 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1957 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1959 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1960 sim-main.h. Declare a struct hw_descriptor instead of struct
1961 hw_device_descriptor.
1963 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1965 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1966 right bits and then re-align left hand bytes to correct byte
1967 lanes. Fix incorrect computation in do_store_left when loading
1968 bytes from second word.
1970 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1972 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1973 * interp.c (sim_open): Only create a device tree when HW is
1976 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1977 * interp.c (signal_exception): Ditto.
1979 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1981 * gencode.c: Mark BEGEZALL as LIKELY.
1983 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1985 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1986 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1988 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1990 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1991 modules. Recognize TX39 target with "mips*tx39" pattern.
1992 * configure: Rebuilt.
1993 * sim-main.h (*): Added many macros defining bits in
1994 TX39 control registers.
1995 (SignalInterrupt): Send actual PC instead of NULL.
1996 (SignalNMIReset): New exception type.
1997 * interp.c (board): New variable for future use to identify
1998 a particular board being simulated.
1999 (mips_option_handler,mips_options): Added "--board" option.
2000 (interrupt_event): Send actual PC.
2001 (sim_open): Make memory layout conditional on board setting.
2002 (signal_exception): Initial implementation of hardware interrupt
2003 handling. Accept another break instruction variant for simulator
2005 (decode_coproc): Implement RFE instruction for TX39.
2006 (mips.igen): Decode RFE instruction as such.
2007 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2008 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2009 bbegin to implement memory map.
2010 * dv-tx3904cpu.c: New file.
2011 * dv-tx3904irc.c: New file.
2013 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2015 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2017 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2019 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2020 with calls to check_div_hilo.
2022 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2024 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2025 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2026 Add special r3900 version of do_mult_hilo.
2027 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2028 with calls to check_mult_hilo.
2029 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2030 with calls to check_div_hilo.
2032 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2034 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2035 Document a replacement.
2037 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2039 * interp.c (sim_monitor): Make mon_printf work.
2041 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2043 * sim-main.h (INSN_NAME): New arg `cpu'.
2045 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2047 * configure: Regenerated to track ../common/aclocal.m4 changes.
2049 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2051 * configure: Regenerated to track ../common/aclocal.m4 changes.
2054 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2056 * acconfig.h: New file.
2057 * configure.in: Reverted change of Apr 24; use sinclude again.
2059 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2061 * configure: Regenerated to track ../common/aclocal.m4 changes.
2064 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2066 * configure.in: Don't call sinclude.
2068 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2070 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2072 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2074 * mips.igen (ERET): Implement.
2076 * interp.c (decode_coproc): Return sign-extended EPC.
2078 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2080 * interp.c (signal_exception): Do not ignore Trap.
2081 (signal_exception): On TRAP, restart at exception address.
2082 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2083 (signal_exception): Update.
2084 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2085 so that TRAP instructions are caught.
2087 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2089 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2090 contains HI/LO access history.
2091 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2092 (HIACCESS, LOACCESS): Delete, replace with
2093 (HIHISTORY, LOHISTORY): New macros.
2094 (CHECKHILO): Delete all, moved to mips.igen
2096 * gencode.c (build_instruction): Do not generate checks for
2097 correct HI/LO register usage.
2099 * interp.c (old_engine_run): Delete checks for correct HI/LO
2102 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2103 check_mf_cycles): New functions.
2104 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2105 do_divu, domultx, do_mult, do_multu): Use.
2107 * tx.igen ("madd", "maddu"): Use.
2109 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2111 * mips.igen (DSRAV): Use function do_dsrav.
2112 (SRAV): Use new function do_srav.
2114 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2115 (B): Sign extend 11 bit immediate.
2116 (EXT-B*): Shift 16 bit immediate left by 1.
2117 (ADDIU*): Don't sign extend immediate value.
2119 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2121 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2123 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2126 * mips.igen (delayslot32, nullify_next_insn): New functions.
2127 (m16.igen): Always include.
2128 (do_*): Add more tracing.
2130 * m16.igen (delayslot16): Add NIA argument, could be called by a
2131 32 bit MIPS16 instruction.
2133 * interp.c (ifetch16): Move function from here.
2134 * sim-main.c (ifetch16): To here.
2136 * sim-main.c (ifetch16, ifetch32): Update to match current
2137 implementations of LH, LW.
2138 (signal_exception): Don't print out incorrect hex value of illegal
2141 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2143 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2146 * m16.igen: Implement MIPS16 instructions.
2148 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2149 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2150 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2151 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2152 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2153 bodies of corresponding code from 32 bit insn to these. Also used
2154 by MIPS16 versions of functions.
2156 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2157 (IMEM16): Drop NR argument from macro.
2159 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2161 * Makefile.in (SIM_OBJS): Add sim-main.o.
2163 * sim-main.h (address_translation, load_memory, store_memory,
2164 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2166 (pr_addr, pr_uword64): Declare.
2167 (sim-main.c): Include when H_REVEALS_MODULE_P.
2169 * interp.c (address_translation, load_memory, store_memory,
2170 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2172 * sim-main.c: To here. Fix compilation problems.
2174 * configure.in: Enable inlining.
2175 * configure: Re-config.
2177 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2179 * configure: Regenerated to track ../common/aclocal.m4 changes.
2181 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2183 * mips.igen: Include tx.igen.
2184 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2185 * tx.igen: New file, contains MADD and MADDU.
2187 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2188 the hardwired constant `7'.
2189 (store_memory): Ditto.
2190 (LOADDRMASK): Move definition to sim-main.h.
2192 mips.igen (MTC0): Enable for r3900.
2195 mips.igen (do_load_byte): Delete.
2196 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2197 do_store_right): New functions.
2198 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2200 configure.in: Let the tx39 use igen again.
2203 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2205 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2206 not an address sized quantity. Return zero for cache sizes.
2208 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2210 * mips.igen (r3900): r3900 does not support 64 bit integer
2213 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2215 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2217 * configure : Rebuild.
2219 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2221 * configure: Regenerated to track ../common/aclocal.m4 changes.
2223 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2225 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2227 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2229 * configure: Regenerated to track ../common/aclocal.m4 changes.
2230 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2232 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2234 * configure: Regenerated to track ../common/aclocal.m4 changes.
2236 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2238 * interp.c (Max, Min): Comment out functions. Not yet used.
2240 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2242 * configure: Regenerated to track ../common/aclocal.m4 changes.
2244 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2246 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2247 configurable settings for stand-alone simulator.
2249 * configure.in: Added X11 search, just in case.
2251 * configure: Regenerated.
2253 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2255 * interp.c (sim_write, sim_read, load_memory, store_memory):
2256 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2258 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2260 * sim-main.h (GETFCC): Return an unsigned value.
2262 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2264 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2265 (DADD): Result destination is RD not RT.
2267 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2269 * sim-main.h (HIACCESS, LOACCESS): Always define.
2271 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2273 * interp.c (sim_info): Delete.
2275 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2277 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2278 (mips_option_handler): New argument `cpu'.
2279 (sim_open): Update call to sim_add_option_table.
2281 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2283 * mips.igen (CxC1): Add tracing.
2285 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2287 * sim-main.h (Max, Min): Declare.
2289 * interp.c (Max, Min): New functions.
2291 * mips.igen (BC1): Add tracing.
2293 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2295 * interp.c Added memory map for stack in vr4100
2297 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2299 * interp.c (load_memory): Add missing "break"'s.
2301 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2303 * interp.c (sim_store_register, sim_fetch_register): Pass in
2304 length parameter. Return -1.
2306 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2308 * interp.c: Added hardware init hook, fixed warnings.
2310 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2312 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2314 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2316 * interp.c (ifetch16): New function.
2318 * sim-main.h (IMEM32): Rename IMEM.
2319 (IMEM16_IMMED): Define.
2321 (DELAY_SLOT): Update.
2323 * m16run.c (sim_engine_run): New file.
2325 * m16.igen: All instructions except LB.
2326 (LB): Call do_load_byte.
2327 * mips.igen (do_load_byte): New function.
2328 (LB): Call do_load_byte.
2330 * mips.igen: Move spec for insn bit size and high bit from here.
2331 * Makefile.in (tmp-igen, tmp-m16): To here.
2333 * m16.dc: New file, decode mips16 instructions.
2335 * Makefile.in (SIM_NO_ALL): Define.
2336 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2338 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2340 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2341 point unit to 32 bit registers.
2342 * configure: Re-generate.
2344 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2346 * configure.in (sim_use_gen): Make IGEN the default simulator
2347 generator for generic 32 and 64 bit mips targets.
2348 * configure: Re-generate.
2350 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2352 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2355 * interp.c (sim_fetch_register, sim_store_register): Read/write
2356 FGR from correct location.
2357 (sim_open): Set size of FGR's according to
2358 WITH_TARGET_FLOATING_POINT_BITSIZE.
2360 * sim-main.h (FGR): Store floating point registers in a separate
2363 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2365 * configure: Regenerated to track ../common/aclocal.m4 changes.
2367 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2369 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2371 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2373 * interp.c (pending_tick): New function. Deliver pending writes.
2375 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2376 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2377 it can handle mixed sized quantites and single bits.
2379 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2381 * interp.c (oengine.h): Do not include when building with IGEN.
2382 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2383 (sim_info): Ditto for PROCESSOR_64BIT.
2384 (sim_monitor): Replace ut_reg with unsigned_word.
2385 (*): Ditto for t_reg.
2386 (LOADDRMASK): Define.
2387 (sim_open): Remove defunct check that host FP is IEEE compliant,
2388 using software to emulate floating point.
2389 (value_fpr, ...): Always compile, was conditional on HASFPU.
2391 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2393 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2396 * interp.c (SD, CPU): Define.
2397 (mips_option_handler): Set flags in each CPU.
2398 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2399 (sim_close): Do not clear STATE, deleted anyway.
2400 (sim_write, sim_read): Assume CPU zero's vm should be used for
2402 (sim_create_inferior): Set the PC for all processors.
2403 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2405 (mips16_entry): Pass correct nr of args to store_word, load_word.
2406 (ColdReset): Cold reset all cpu's.
2407 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2408 (sim_monitor, load_memory, store_memory, signal_exception): Use
2409 `CPU' instead of STATE_CPU.
2412 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2415 * sim-main.h (signal_exception): Add sim_cpu arg.
2416 (SignalException*): Pass both SD and CPU to signal_exception.
2417 * interp.c (signal_exception): Update.
2419 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2421 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2422 address_translation): Ditto
2423 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2425 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2427 * configure: Regenerated to track ../common/aclocal.m4 changes.
2429 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2431 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2433 * mips.igen (model): Map processor names onto BFD name.
2435 * sim-main.h (CPU_CIA): Delete.
2436 (SET_CIA, GET_CIA): Define
2438 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2440 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2443 * configure.in (default_endian): Configure a big-endian simulator
2445 * configure: Re-generate.
2447 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2449 * configure: Regenerated to track ../common/aclocal.m4 changes.
2451 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2453 * interp.c (sim_monitor): Handle Densan monitor outbyte
2454 and inbyte functions.
2456 1997-12-29 Felix Lee <flee@cygnus.com>
2458 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2460 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2462 * Makefile.in (tmp-igen): Arrange for $zero to always be
2463 reset to zero after every instruction.
2465 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2467 * configure: Regenerated to track ../common/aclocal.m4 changes.
2470 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2472 * mips.igen (MSUB): Fix to work like MADD.
2473 * gencode.c (MSUB): Similarly.
2475 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2477 * configure: Regenerated to track ../common/aclocal.m4 changes.
2479 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2481 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2483 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2485 * sim-main.h (sim-fpu.h): Include.
2487 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2488 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2489 using host independant sim_fpu module.
2491 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2493 * interp.c (signal_exception): Report internal errors with SIGABRT
2496 * sim-main.h (C0_CONFIG): New register.
2497 (signal.h): No longer include.
2499 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2501 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2503 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2505 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2507 * mips.igen: Tag vr5000 instructions.
2508 (ANDI): Was missing mipsIV model, fix assembler syntax.
2509 (do_c_cond_fmt): New function.
2510 (C.cond.fmt): Handle mips I-III which do not support CC field
2512 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2513 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2515 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2516 vr5000 which saves LO in a GPR separatly.
2518 * configure.in (enable-sim-igen): For vr5000, select vr5000
2519 specific instructions.
2520 * configure: Re-generate.
2522 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2524 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2526 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2527 fmt_uninterpreted_64 bit cases to switch. Convert to
2530 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2532 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2533 as specified in IV3.2 spec.
2534 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2536 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2538 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2539 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2540 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2541 PENDING_FILL versions of instructions. Simplify.
2543 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2545 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2547 (MTHI, MFHI): Disable code checking HI-LO.
2549 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2551 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2553 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2555 * gencode.c (build_mips16_operands): Replace IPC with cia.
2557 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2558 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2560 (UndefinedResult): Replace function with macro/function
2562 (sim_engine_run): Don't save PC in IPC.
2564 * sim-main.h (IPC): Delete.
2567 * interp.c (signal_exception, store_word, load_word,
2568 address_translation, load_memory, store_memory, cache_op,
2569 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2570 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2571 current instruction address - cia - argument.
2572 (sim_read, sim_write): Call address_translation directly.
2573 (sim_engine_run): Rename variable vaddr to cia.
2574 (signal_exception): Pass cia to sim_monitor
2576 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2577 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2578 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2580 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2581 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2584 * interp.c (signal_exception): Pass restart address to
2587 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2588 idecode.o): Add dependency.
2590 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2592 (DELAY_SLOT): Update NIA not PC with branch address.
2593 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2595 * mips.igen: Use CIA not PC in branch calculations.
2596 (illegal): Call SignalException.
2597 (BEQ, ADDIU): Fix assembler.
2599 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2601 * m16.igen (JALX): Was missing.
2603 * configure.in (enable-sim-igen): New configuration option.
2604 * configure: Re-generate.
2606 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2608 * interp.c (load_memory, store_memory): Delete parameter RAW.
2609 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2610 bypassing {load,store}_memory.
2612 * sim-main.h (ByteSwapMem): Delete definition.
2614 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2616 * interp.c (sim_do_command, sim_commands): Delete mips specific
2617 commands. Handled by module sim-options.
2619 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2620 (WITH_MODULO_MEMORY): Define.
2622 * interp.c (sim_info): Delete code printing memory size.
2624 * interp.c (mips_size): Nee sim_size, delete function.
2626 (monitor, monitor_base, monitor_size): Delete global variables.
2627 (sim_open, sim_close): Delete code creating monitor and other
2628 memory regions. Use sim-memopts module, via sim_do_commandf, to
2629 manage memory regions.
2630 (load_memory, store_memory): Use sim-core for memory model.
2632 * interp.c (address_translation): Delete all memory map code
2633 except line forcing 32 bit addresses.
2635 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2637 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2640 * interp.c (logfh, logfile): Delete globals.
2641 (sim_open, sim_close): Delete code opening & closing log file.
2642 (mips_option_handler): Delete -l and -n options.
2643 (OPTION mips_options): Ditto.
2645 * interp.c (OPTION mips_options): Rename option trace to dinero.
2646 (mips_option_handler): Update.
2648 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2650 * interp.c (fetch_str): New function.
2651 (sim_monitor): Rewrite using sim_read & sim_write.
2652 (sim_open): Check magic number.
2653 (sim_open): Write monitor vectors into memory using sim_write.
2654 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2655 (sim_read, sim_write): Simplify - transfer data one byte at a
2657 (load_memory, store_memory): Clarify meaning of parameter RAW.
2659 * sim-main.h (isHOST): Defete definition.
2660 (isTARGET): Mark as depreciated.
2661 (address_translation): Delete parameter HOST.
2663 * interp.c (address_translation): Delete parameter HOST.
2665 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2669 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2670 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2672 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2674 * mips.igen: Add model filter field to records.
2676 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2678 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2680 interp.c (sim_engine_run): Do not compile function sim_engine_run
2681 when WITH_IGEN == 1.
2683 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2684 target architecture.
2686 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2687 igen. Replace with configuration variables sim_igen_flags /
2690 * m16.igen: New file. Copy mips16 insns here.
2691 * mips.igen: From here.
2693 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2695 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2697 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2699 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2701 * gencode.c (build_instruction): Follow sim_write's lead in using
2702 BigEndianMem instead of !ByteSwapMem.
2704 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2706 * configure.in (sim_gen): Dependent on target, select type of
2707 generator. Always select old style generator.
2709 configure: Re-generate.
2711 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2713 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2714 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2715 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2716 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2717 SIM_@sim_gen@_*, set by autoconf.
2719 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2723 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2724 CURRENT_FLOATING_POINT instead.
2726 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2727 (address_translation): Raise exception InstructionFetch when
2728 translation fails and isINSTRUCTION.
2730 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2731 sim_engine_run): Change type of of vaddr and paddr to
2733 (address_translation, prefetch, load_memory, store_memory,
2734 cache_op): Change type of vAddr and pAddr to address_word.
2736 * gencode.c (build_instruction): Change type of vaddr and paddr to
2739 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2742 macro to obtain result of ALU op.
2744 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * interp.c (sim_info): Call profile_print.
2748 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2752 * sim-main.h (WITH_PROFILE): Do not define, defined in
2753 common/sim-config.h. Use sim-profile module.
2754 (simPROFILE): Delete defintion.
2756 * interp.c (PROFILE): Delete definition.
2757 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2758 (sim_close): Delete code writing profile histogram.
2759 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2761 (sim_engine_run): Delete code profiling the PC.
2763 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2767 * interp.c (sim_monitor): Make register pointers of type
2770 * sim-main.h: Make registers of type unsigned_word not
2773 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2775 * interp.c (sync_operation): Rename from SyncOperation, make
2776 global, add SD argument.
2777 (prefetch): Rename from Prefetch, make global, add SD argument.
2778 (decode_coproc): Make global.
2780 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2782 * gencode.c (build_instruction): Generate DecodeCoproc not
2783 decode_coproc calls.
2785 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2786 (SizeFGR): Move to sim-main.h
2787 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2788 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2789 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2791 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2792 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2793 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2794 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2795 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2796 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2798 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2800 (sim-alu.h): Include.
2801 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2802 (sim_cia): Typedef to instruction_address.
2804 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2806 * Makefile.in (interp.o): Rename generated file engine.c to
2811 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2813 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2815 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2817 * gencode.c (build_instruction): For "FPSQRT", output correct
2818 number of arguments to Recip.
2820 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2822 * Makefile.in (interp.o): Depends on sim-main.h
2824 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2826 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2827 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2828 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2829 STATE, DSSTATE): Define
2830 (GPR, FGRIDX, ..): Define.
2832 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2833 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2834 (GPR, FGRIDX, ...): Delete macros.
2836 * interp.c: Update names to match defines from sim-main.h
2838 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2840 * interp.c (sim_monitor): Add SD argument.
2841 (sim_warning): Delete. Replace calls with calls to
2843 (sim_error): Delete. Replace calls with sim_io_error.
2844 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2845 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2846 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2848 (mips_size): Rename from sim_size. Add SD argument.
2850 * interp.c (simulator): Delete global variable.
2851 (callback): Delete global variable.
2852 (mips_option_handler, sim_open, sim_write, sim_read,
2853 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2854 sim_size,sim_monitor): Use sim_io_* not callback->*.
2855 (sim_open): ZALLOC simulator struct.
2856 (PROFILE): Do not define.
2858 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2860 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2861 support.h with corresponding code.
2863 * sim-main.h (word64, uword64), support.h: Move definition to
2865 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2868 * Makefile.in: Update dependencies
2869 * interp.c: Do not include.
2871 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2873 * interp.c (address_translation, load_memory, store_memory,
2874 cache_op): Rename to from AddressTranslation et.al., make global,
2877 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2880 * interp.c (SignalException): Rename to signal_exception, make
2883 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2885 * sim-main.h (SignalException, SignalExceptionInterrupt,
2886 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2887 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2888 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2891 * interp.c, support.h: Use.
2893 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2895 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2896 to value_fpr / store_fpr. Add SD argument.
2897 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2898 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2900 * sim-main.h (ValueFPR, StoreFPR): Define.
2902 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2904 * interp.c (sim_engine_run): Check consistency between configure
2905 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2908 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2909 (mips_fpu): Configure WITH_FLOATING_POINT.
2910 (mips_endian): Configure WITH_TARGET_ENDIAN.
2911 * configure: Update.
2913 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2915 * configure: Regenerated to track ../common/aclocal.m4 changes.
2917 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2919 * configure: Regenerated.
2921 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2923 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2925 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2927 * gencode.c (print_igen_insn_models): Assume certain architectures
2928 include all mips* instructions.
2929 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2932 * Makefile.in (tmp.igen): Add target. Generate igen input from
2935 * gencode.c (FEATURE_IGEN): Define.
2936 (main): Add --igen option. Generate output in igen format.
2937 (process_instructions): Format output according to igen option.
2938 (print_igen_insn_format): New function.
2939 (print_igen_insn_models): New function.
2940 (process_instructions): Only issue warnings and ignore
2941 instructions when no FEATURE_IGEN.
2943 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2945 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2948 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2950 * configure: Regenerated to track ../common/aclocal.m4 changes.
2952 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2954 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2955 SIM_RESERVED_BITS): Delete, moved to common.
2956 (SIM_EXTRA_CFLAGS): Update.
2958 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2960 * configure.in: Configure non-strict memory alignment.
2961 * configure: Regenerated to track ../common/aclocal.m4 changes.
2963 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2965 * configure: Regenerated to track ../common/aclocal.m4 changes.
2967 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2969 * gencode.c (SDBBP,DERET): Added (3900) insns.
2970 (RFE): Turn on for 3900.
2971 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2972 (dsstate): Made global.
2973 (SUBTARGET_R3900): Added.
2974 (CANCELDELAYSLOT): New.
2975 (SignalException): Ignore SystemCall rather than ignore and
2976 terminate. Add DebugBreakPoint handling.
2977 (decode_coproc): New insns RFE, DERET; and new registers Debug
2978 and DEPC protected by SUBTARGET_R3900.
2979 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2981 * Makefile.in,configure.in: Add mips subtarget option.
2982 * configure: Update.
2984 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2986 * gencode.c: Add r3900 (tx39).
2989 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2991 * gencode.c (build_instruction): Don't need to subtract 4 for
2994 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2996 * interp.c: Correct some HASFPU problems.
2998 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3000 * configure: Regenerated to track ../common/aclocal.m4 changes.
3002 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3004 * interp.c (mips_options): Fix samples option short form, should
3007 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3009 * interp.c (sim_info): Enable info code. Was just returning.
3011 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3013 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3016 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3018 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3020 (build_instruction): Ditto for LL.
3022 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3024 * configure: Regenerated to track ../common/aclocal.m4 changes.
3026 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3028 * configure: Regenerated to track ../common/aclocal.m4 changes.
3031 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3033 * interp.c (sim_open): Add call to sim_analyze_program, update
3036 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3038 * interp.c (sim_kill): Delete.
3039 (sim_create_inferior): Add ABFD argument. Set PC from same.
3040 (sim_load): Move code initializing trap handlers from here.
3041 (sim_open): To here.
3042 (sim_load): Delete, use sim-hload.c.
3044 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3046 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3048 * configure: Regenerated to track ../common/aclocal.m4 changes.
3051 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3053 * interp.c (sim_open): Add ABFD argument.
3054 (sim_load): Move call to sim_config from here.
3055 (sim_open): To here. Check return status.
3057 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3059 * gencode.c (build_instruction): Two arg MADD should
3060 not assign result to $0.
3062 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3064 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3065 * sim/mips/configure.in: Regenerate.
3067 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3069 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3070 signed8, unsigned8 et.al. types.
3072 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3073 hosts when selecting subreg.
3075 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3077 * interp.c (sim_engine_run): Reset the ZERO register to zero
3078 regardless of FEATURE_WARN_ZERO.
3079 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3081 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3083 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3084 (SignalException): For BreakPoints ignore any mode bits and just
3086 (SignalException): Always set the CAUSE register.
3088 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3090 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3091 exception has been taken.
3093 * interp.c: Implement the ERET and mt/f sr instructions.
3095 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3097 * interp.c (SignalException): Don't bother restarting an
3100 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3102 * interp.c (SignalException): Really take an interrupt.
3103 (interrupt_event): Only deliver interrupts when enabled.
3105 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3107 * interp.c (sim_info): Only print info when verbose.
3108 (sim_info) Use sim_io_printf for output.
3110 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3112 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3115 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3117 * interp.c (sim_do_command): Check for common commands if a
3118 simulator specific command fails.
3120 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3122 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3123 and simBE when DEBUG is defined.
3125 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3127 * interp.c (interrupt_event): New function. Pass exception event
3128 onto exception handler.
3130 * configure.in: Check for stdlib.h.
3131 * configure: Regenerate.
3133 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3134 variable declaration.
3135 (build_instruction): Initialize memval1.
3136 (build_instruction): Add UNUSED attribute to byte, bigend,
3138 (build_operands): Ditto.
3140 * interp.c: Fix GCC warnings.
3141 (sim_get_quit_code): Delete.
3143 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3144 * Makefile.in: Ditto.
3145 * configure: Re-generate.
3147 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3149 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3151 * interp.c (mips_option_handler): New function parse argumes using
3153 (myname): Replace with STATE_MY_NAME.
3154 (sim_open): Delete check for host endianness - performed by
3156 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3157 (sim_open): Move much of the initialization from here.
3158 (sim_load): To here. After the image has been loaded and
3160 (sim_open): Move ColdReset from here.
3161 (sim_create_inferior): To here.
3162 (sim_open): Make FP check less dependant on host endianness.
3164 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3166 * interp.c (sim_set_callbacks): Delete.
3168 * interp.c (membank, membank_base, membank_size): Replace with
3169 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3170 (sim_open): Remove call to callback->init. gdb/run do this.
3174 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3176 * interp.c (big_endian_p): Delete, replaced by
3177 current_target_byte_order.
3179 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3181 * interp.c (host_read_long, host_read_word, host_swap_word,
3182 host_swap_long): Delete. Using common sim-endian.
3183 (sim_fetch_register, sim_store_register): Use H2T.
3184 (pipeline_ticks): Delete. Handled by sim-events.
3186 (sim_engine_run): Update.
3188 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3190 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3192 (SignalException): To here. Signal using sim_engine_halt.
3193 (sim_stop_reason): Delete, moved to common.
3195 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3197 * interp.c (sim_open): Add callback argument.
3198 (sim_set_callbacks): Delete SIM_DESC argument.
3201 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3203 * Makefile.in (SIM_OBJS): Add common modules.
3205 * interp.c (sim_set_callbacks): Also set SD callback.
3206 (set_endianness, xfer_*, swap_*): Delete.
3207 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3208 Change to functions using sim-endian macros.
3209 (control_c, sim_stop): Delete, use common version.
3210 (simulate): Convert into.
3211 (sim_engine_run): This function.
3212 (sim_resume): Delete.
3214 * interp.c (simulation): New variable - the simulator object.
3215 (sim_kind): Delete global - merged into simulation.
3216 (sim_load): Cleanup. Move PC assignment from here.
3217 (sim_create_inferior): To here.
3219 * sim-main.h: New file.
3220 * interp.c (sim-main.h): Include.
3222 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3224 * configure: Regenerated to track ../common/aclocal.m4 changes.
3226 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3228 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3230 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3232 * gencode.c (build_instruction): DIV instructions: check
3233 for division by zero and integer overflow before using
3234 host's division operation.
3236 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3238 * Makefile.in (SIM_OBJS): Add sim-load.o.
3239 * interp.c: #include bfd.h.
3240 (target_byte_order): Delete.
3241 (sim_kind, myname, big_endian_p): New static locals.
3242 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3243 after argument parsing. Recognize -E arg, set endianness accordingly.
3244 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3245 load file into simulator. Set PC from bfd.
3246 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3247 (set_endianness): Use big_endian_p instead of target_byte_order.
3249 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3251 * interp.c (sim_size): Delete prototype - conflicts with
3252 definition in remote-sim.h. Correct definition.
3254 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3256 * configure: Regenerated to track ../common/aclocal.m4 changes.
3259 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3261 * interp.c (sim_open): New arg `kind'.
3263 * configure: Regenerated to track ../common/aclocal.m4 changes.
3265 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3267 * configure: Regenerated to track ../common/aclocal.m4 changes.
3269 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3271 * interp.c (sim_open): Set optind to 0 before calling getopt.
3273 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3275 * configure: Regenerated to track ../common/aclocal.m4 changes.
3277 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3279 * interp.c : Replace uses of pr_addr with pr_uword64
3280 where the bit length is always 64 independent of SIM_ADDR.
3281 (pr_uword64) : added.
3283 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3285 * configure: Re-generate.
3287 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3289 * configure: Regenerate to track ../common/aclocal.m4 changes.
3291 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3293 * interp.c (sim_open): New SIM_DESC result. Argument is now
3295 (other sim_*): New SIM_DESC argument.
3297 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3299 * interp.c: Fix printing of addresses for non-64-bit targets.
3300 (pr_addr): Add function to print address based on size.
3302 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3304 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3306 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3308 * gencode.c (build_mips16_operands): Correct computation of base
3309 address for extended PC relative instruction.
3311 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3313 * interp.c (mips16_entry): Add support for floating point cases.
3314 (SignalException): Pass floating point cases to mips16_entry.
3315 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3317 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3319 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3320 and then set the state to fmt_uninterpreted.
3321 (COP_SW): Temporarily set the state to fmt_word while calling
3324 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3326 * gencode.c (build_instruction): The high order may be set in the
3327 comparison flags at any ISA level, not just ISA 4.
3329 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3331 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3332 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3333 * configure.in: sinclude ../common/aclocal.m4.
3334 * configure: Regenerated.
3336 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3338 * configure: Rebuild after change to aclocal.m4.
3340 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3342 * configure configure.in Makefile.in: Update to new configure
3343 scheme which is more compatible with WinGDB builds.
3344 * configure.in: Improve comment on how to run autoconf.
3345 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3346 * Makefile.in: Use autoconf substitution to install common
3349 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3351 * gencode.c (build_instruction): Use BigEndianCPU instead of
3354 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3356 * interp.c (sim_monitor): Make output to stdout visible in
3357 wingdb's I/O log window.
3359 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3361 * support.h: Undo previous change to SIGTRAP
3364 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3366 * interp.c (store_word, load_word): New static functions.
3367 (mips16_entry): New static function.
3368 (SignalException): Look for mips16 entry and exit instructions.
3369 (simulate): Use the correct index when setting fpr_state after
3370 doing a pending move.
3372 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3374 * interp.c: Fix byte-swapping code throughout to work on
3375 both little- and big-endian hosts.
3377 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3379 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3380 with gdb/config/i386/xm-windows.h.
3382 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3384 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3385 that messes up arithmetic shifts.
3387 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3389 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3390 SIGTRAP and SIGQUIT for _WIN32.
3392 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3394 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3395 force a 64 bit multiplication.
3396 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3397 destination register is 0, since that is the default mips16 nop
3400 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3402 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3403 (build_endian_shift): Don't check proc64.
3404 (build_instruction): Always set memval to uword64. Cast op2 to
3405 uword64 when shifting it left in memory instructions. Always use
3406 the same code for stores--don't special case proc64.
3408 * gencode.c (build_mips16_operands): Fix base PC value for PC
3410 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3412 * interp.c (simJALDELAYSLOT): Define.
3413 (JALDELAYSLOT): Define.
3414 (INDELAYSLOT, INJALDELAYSLOT): Define.
3415 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3417 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3419 * interp.c (sim_open): add flush_cache as a PMON routine
3420 (sim_monitor): handle flush_cache by ignoring it
3422 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3424 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3426 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3427 (BigEndianMem): Rename to ByteSwapMem and change sense.
3428 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3429 BigEndianMem references to !ByteSwapMem.
3430 (set_endianness): New function, with prototype.
3431 (sim_open): Call set_endianness.
3432 (sim_info): Use simBE instead of BigEndianMem.
3433 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3434 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3435 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3436 ifdefs, keeping the prototype declaration.
3437 (swap_word): Rewrite correctly.
3438 (ColdReset): Delete references to CONFIG. Delete endianness related
3439 code; moved to set_endianness.
3441 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3443 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3444 * interp.c (CHECKHILO): Define away.
3445 (simSIGINT): New macro.
3446 (membank_size): Increase from 1MB to 2MB.
3447 (control_c): New function.
3448 (sim_resume): Rename parameter signal to signal_number. Add local
3449 variable prev. Call signal before and after simulate.
3450 (sim_stop_reason): Add simSIGINT support.
3451 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3453 (sim_warning): Delete call to SignalException. Do call printf_filtered
3455 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3456 a call to sim_warning.
3458 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3460 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3461 16 bit instructions.
3463 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3465 Add support for mips16 (16 bit MIPS implementation):
3466 * gencode.c (inst_type): Add mips16 instruction encoding types.
3467 (GETDATASIZEINSN): Define.
3468 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3469 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3471 (MIPS16_DECODE): New table, for mips16 instructions.
3472 (bitmap_val): New static function.
3473 (struct mips16_op): Define.
3474 (mips16_op_table): New table, for mips16 operands.
3475 (build_mips16_operands): New static function.
3476 (process_instructions): If PC is odd, decode a mips16
3477 instruction. Break out instruction handling into new
3478 build_instruction function.
3479 (build_instruction): New static function, broken out of
3480 process_instructions. Check modifiers rather than flags for SHIFT
3481 bit count and m[ft]{hi,lo} direction.
3482 (usage): Pass program name to fprintf.
3483 (main): Remove unused variable this_option_optind. Change
3484 ``*loptarg++'' to ``loptarg++''.
3485 (my_strtoul): Parenthesize && within ||.
3486 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3487 (simulate): If PC is odd, fetch a 16 bit instruction, and
3488 increment PC by 2 rather than 4.
3489 * configure.in: Add case for mips16*-*-*.
3490 * configure: Rebuild.
3492 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3494 * interp.c: Allow -t to enable tracing in standalone simulator.
3495 Fix garbage output in trace file and error messages.
3497 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3499 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3500 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3501 * configure.in: Simplify using macros in ../common/aclocal.m4.
3502 * configure: Regenerated.
3503 * tconfig.in: New file.
3505 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3507 * interp.c: Fix bugs in 64-bit port.
3508 Use ansi function declarations for msvc compiler.
3509 Initialize and test file pointer in trace code.
3510 Prevent duplicate definition of LAST_EMED_REGNUM.
3512 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3514 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3516 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3518 * interp.c (SignalException): Check for explicit terminating
3520 * gencode.c: Pass instruction value through SignalException()
3521 calls for Trap, Breakpoint and Syscall.
3523 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3525 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3526 only used on those hosts that provide it.
3527 * configure.in: Add sqrt() to list of functions to be checked for.
3528 * config.in: Re-generated.
3529 * configure: Re-generated.
3531 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3533 * gencode.c (process_instructions): Call build_endian_shift when
3534 expanding STORE RIGHT, to fix swr.
3535 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3536 clear the high bits.
3537 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3538 Fix float to int conversions to produce signed values.
3540 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3542 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3543 (process_instructions): Correct handling of nor instruction.
3544 Correct shift count for 32 bit shift instructions. Correct sign
3545 extension for arithmetic shifts to not shift the number of bits in
3546 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3547 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3549 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3550 It's OK to have a mult follow a mult. What's not OK is to have a
3551 mult follow an mfhi.
3552 (Convert): Comment out incorrect rounding code.
3554 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3556 * interp.c (sim_monitor): Improved monitor printf
3557 simulation. Tidied up simulator warnings, and added "--log" option
3558 for directing warning message output.
3559 * gencode.c: Use sim_warning() rather than WARNING macro.
3561 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3563 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3564 getopt1.o, rather than on gencode.c. Link objects together.
3565 Don't link against -liberty.
3566 (gencode.o, getopt.o, getopt1.o): New targets.
3567 * gencode.c: Include <ctype.h> and "ansidecl.h".
3568 (AND): Undefine after including "ansidecl.h".
3569 (ULONG_MAX): Define if not defined.
3570 (OP_*): Don't define macros; now defined in opcode/mips.h.
3571 (main): Call my_strtoul rather than strtoul.
3572 (my_strtoul): New static function.
3574 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3576 * gencode.c (process_instructions): Generate word64 and uword64
3577 instead of `long long' and `unsigned long long' data types.
3578 * interp.c: #include sysdep.h to get signals, and define default
3580 * (Convert): Work around for Visual-C++ compiler bug with type
3582 * support.h: Make things compile under Visual-C++ by using
3583 __int64 instead of `long long'. Change many refs to long long
3584 into word64/uword64 typedefs.
3586 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3588 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3589 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3591 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3592 (AC_PROG_INSTALL): Added.
3593 (AC_PROG_CC): Moved to before configure.host call.
3594 * configure: Rebuilt.
3596 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3598 * configure.in: Define @SIMCONF@ depending on mips target.
3599 * configure: Rebuild.
3600 * Makefile.in (run): Add @SIMCONF@ to control simulator
3602 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3603 * interp.c: Remove some debugging, provide more detailed error
3604 messages, update memory accesses to use LOADDRMASK.
3606 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3608 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3609 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3611 * configure: Rebuild.
3612 * config.in: New file, generated by autoheader.
3613 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3614 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3615 HAVE_ANINT and HAVE_AINT, as appropriate.
3616 * Makefile.in (run): Use @LIBS@ rather than -lm.
3617 (interp.o): Depend upon config.h.
3618 (Makefile): Just rebuild Makefile.
3619 (clean): Remove stamp-h.
3620 (mostlyclean): Make the same as clean, not as distclean.
3621 (config.h, stamp-h): New targets.
3623 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3625 * interp.c (ColdReset): Fix boolean test. Make all simulator
3628 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3630 * interp.c (xfer_direct_word, xfer_direct_long,
3631 swap_direct_word, swap_direct_long, xfer_big_word,
3632 xfer_big_long, xfer_little_word, xfer_little_long,
3633 swap_word,swap_long): Added.
3634 * interp.c (ColdReset): Provide function indirection to
3635 host<->simulated_target transfer routines.
3636 * interp.c (sim_store_register, sim_fetch_register): Updated to
3637 make use of indirected transfer routines.
3639 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3641 * gencode.c (process_instructions): Ensure FP ABS instruction
3643 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3644 system call support.
3646 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3648 * interp.c (sim_do_command): Complain if callback structure not
3651 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3653 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3654 support for Sun hosts.
3655 * Makefile.in (gencode): Ensure the host compiler and libraries
3656 used for cross-hosted build.
3658 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3660 * interp.c, gencode.c: Some more (TODO) tidying.
3662 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3664 * gencode.c, interp.c: Replaced explicit long long references with
3665 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3666 * support.h (SET64LO, SET64HI): Macros added.
3668 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3670 * configure: Regenerate with autoconf 2.7.
3672 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3674 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3675 * support.h: Remove superfluous "1" from #if.
3676 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3678 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3680 * interp.c (StoreFPR): Control UndefinedResult() call on
3681 WARN_RESULT manifest.
3683 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3685 * gencode.c: Tidied instruction decoding, and added FP instruction
3688 * interp.c: Added dineroIII, and BSD profiling support. Also
3689 run-time FP handling.
3691 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3693 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3694 gencode.c, interp.c, support.h: created.
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