1 2016-01-10 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2016-01-10 Mike Frysinger <vapier@gentoo.org>
7 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
8 * configure: Regenerate.
10 2016-01-10 Mike Frysinger <vapier@gentoo.org>
12 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
13 * configure: Regenerate.
15 2016-01-10 Mike Frysinger <vapier@gentoo.org>
17 * configure: Regenerate.
19 2016-01-10 Mike Frysinger <vapier@gentoo.org>
21 * configure: Regenerate.
23 2016-01-09 Mike Frysinger <vapier@gentoo.org>
25 * config.in, configure: Regenerate.
27 2016-01-06 Mike Frysinger <vapier@gentoo.org>
29 * interp.c (sim_open): Mark argv const.
30 (sim_create_inferior): Mark argv and env const.
32 2016-01-04 Mike Frysinger <vapier@gentoo.org>
34 * configure: Regenerate.
36 2016-01-03 Mike Frysinger <vapier@gentoo.org>
38 * interp.c (sim_open): Update sim_parse_args comment.
40 2016-01-03 Mike Frysinger <vapier@gentoo.org>
42 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
43 * configure: Regenerate.
45 2016-01-02 Mike Frysinger <vapier@gentoo.org>
47 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
48 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
49 * configure: Regenerate.
50 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
52 2016-01-02 Mike Frysinger <vapier@gentoo.org>
54 * dv-tx3904cpu.c (CPU, SD): Delete.
56 2015-12-30 Mike Frysinger <vapier@gentoo.org>
58 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
59 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
60 (sim_store_register): Rename to ...
61 (mips_reg_store): ... this. Delete local cpu var.
62 Update sim_io_eprintf calls.
63 (sim_fetch_register): Rename to ...
64 (mips_reg_fetch): ... this. Delete local cpu var.
65 Update sim_io_eprintf calls.
67 2015-12-27 Mike Frysinger <vapier@gentoo.org>
69 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
71 2015-12-26 Mike Frysinger <vapier@gentoo.org>
73 * config.in, configure: Regenerate.
75 2015-12-26 Mike Frysinger <vapier@gentoo.org>
77 * interp.c (sim_write, sim_read): Delete.
78 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
79 (load_word): Likewise.
80 * micromips.igen (cache): Likewise.
81 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
82 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
83 do_store_left, do_store_right, do_load_double, do_store_double):
85 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
87 * sim-main.c (address_translation, prefetch): Delete.
88 (ifetch32, ifetch16): Delete call to AddressTranslation and set
90 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
91 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
92 (LoadMemory, StoreMemory): Delete CCA arg.
94 2015-12-24 Mike Frysinger <vapier@gentoo.org>
96 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
97 * configure: Regenerated.
99 2015-12-24 Mike Frysinger <vapier@gentoo.org>
101 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
104 2015-12-24 Mike Frysinger <vapier@gentoo.org>
106 * tconfig.h (SIM_HANDLES_LMA): Delete.
108 2015-12-24 Mike Frysinger <vapier@gentoo.org>
110 * sim-main.h (WITH_WATCHPOINTS): Delete.
112 2015-12-24 Mike Frysinger <vapier@gentoo.org>
114 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
116 2015-12-24 Mike Frysinger <vapier@gentoo.org>
118 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
120 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
122 * micromips.igen (process_isa_mode): Fix left shift of negative
125 2015-11-17 Mike Frysinger <vapier@gentoo.org>
127 * sim-main.h (WITH_MODULO_MEMORY): Delete.
129 2015-11-15 Mike Frysinger <vapier@gentoo.org>
131 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
133 2015-11-14 Mike Frysinger <vapier@gentoo.org>
135 * interp.c (sim_close): Rename to ...
136 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
138 * sim-main.h (mips_sim_close): Declare.
139 (SIM_CLOSE_HOOK): Define.
141 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
142 Ali Lown <ali.lown@imgtec.com>
144 * Makefile.in (tmp-micromips): New rule.
145 (tmp-mach-multi): Add support for micromips.
146 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
147 that works for both mips64 and micromips64.
148 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
150 Add build support for micromips.
151 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
152 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
153 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
154 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
155 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
156 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
157 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
158 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
159 Refactored instruction code to use these functions.
160 * dsp2.igen: Refactored instruction code to use the new functions.
161 * interp.c (decode_coproc): Refactored to work with any instruction
163 (isa_mode): New variable
164 (RSVD_INSTRUCTION): Changed to 0x00000039.
165 * m16.igen (BREAK16): Refactored instruction to use do_break16.
166 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
167 * micromips.dc: New file.
168 * micromips.igen: New file.
169 * micromips16.dc: New file.
170 * micromipsdsp.igen: New file.
171 * micromipsrun.c: New file.
172 * mips.igen (do_swc1): Changed to work with any instruction encoding.
173 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
174 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
175 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
176 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
177 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
178 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
179 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
180 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
181 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
182 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
183 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
184 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
185 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
186 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
187 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
188 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
189 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
190 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
192 Refactored instruction code to use these functions.
193 (RSVD): Changed to use new reserved instruction.
194 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
195 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
196 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
197 do_store_double): Added micromips32 and micromips64 models.
198 Added include for micromips.igen and micromipsdsp.igen
199 Add micromips32 and micromips64 models.
200 (DecodeCoproc): Updated to use new macro definition.
201 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
202 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
203 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
204 Refactored instruction code to use these functions.
205 * sim-main.h (CP0_operation): New enum.
206 (DecodeCoproc): Updated macro.
207 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
208 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
209 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
210 ISA_MODE_MICROMIPS): New defines.
211 (sim_state): Add isa_mode field.
213 2015-06-23 Mike Frysinger <vapier@gentoo.org>
215 * configure: Regenerate.
217 2015-06-12 Mike Frysinger <vapier@gentoo.org>
219 * configure.ac: Change configure.in to configure.ac.
220 * configure: Regenerate.
222 2015-06-12 Mike Frysinger <vapier@gentoo.org>
224 * configure: Regenerate.
226 2015-06-12 Mike Frysinger <vapier@gentoo.org>
228 * interp.c [TRACE]: Delete.
229 (TRACE): Change to WITH_TRACE_ANY_P.
230 [!WITH_TRACE_ANY_P] (open_trace): Define.
231 (mips_option_handler, open_trace, sim_close, dotrace):
232 Change defined(TRACE) to WITH_TRACE_ANY_P.
233 (sim_open): Delete TRACE ifdef check.
234 * sim-main.c (load_memory): Delete TRACE ifdef check.
235 (store_memory): Likewise.
236 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
237 [!WITH_TRACE_ANY_P] (dotrace): Define.
239 2015-04-18 Mike Frysinger <vapier@gentoo.org>
241 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
244 2015-04-18 Mike Frysinger <vapier@gentoo.org>
246 * sim-main.h (SIM_CPU): Delete.
248 2015-04-18 Mike Frysinger <vapier@gentoo.org>
250 * sim-main.h (sim_cia): Delete.
252 2015-04-17 Mike Frysinger <vapier@gentoo.org>
254 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
256 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
257 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
258 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
259 CIA_SET to CPU_PC_SET.
260 * sim-main.h (CIA_GET, CIA_SET): Delete.
262 2015-04-15 Mike Frysinger <vapier@gentoo.org>
264 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
265 * sim-main.h (STATE_CPU): Delete.
267 2015-04-13 Mike Frysinger <vapier@gentoo.org>
269 * configure: Regenerate.
271 2015-04-13 Mike Frysinger <vapier@gentoo.org>
273 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
274 * interp.c (mips_pc_get, mips_pc_set): New functions.
275 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
276 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
277 (sim_pc_get): Delete.
278 * sim-main.h (SIM_CPU): Define.
279 (struct sim_state): Change cpu to an array of pointers.
282 2015-04-13 Mike Frysinger <vapier@gentoo.org>
284 * interp.c (mips_option_handler, open_trace, sim_close,
285 sim_write, sim_read, sim_store_register, sim_fetch_register,
286 sim_create_inferior, pr_addr, pr_uword64): Convert old style
288 (sim_open): Convert old style prototype. Change casts with
289 sim_write to unsigned char *.
290 (fetch_str): Change null to unsigned char, and change cast to
292 (sim_monitor): Change c & ch to unsigned char. Change cast to
295 2015-04-12 Mike Frysinger <vapier@gentoo.org>
297 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
299 2015-04-06 Mike Frysinger <vapier@gentoo.org>
301 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
303 2015-04-01 Mike Frysinger <vapier@gentoo.org>
305 * tconfig.h (SIM_HAVE_PROFILE): Delete.
307 2015-03-31 Mike Frysinger <vapier@gentoo.org>
309 * config.in, configure: Regenerate.
311 2015-03-24 Mike Frysinger <vapier@gentoo.org>
313 * interp.c (sim_pc_get): New function.
315 2015-03-24 Mike Frysinger <vapier@gentoo.org>
317 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
318 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
320 2015-03-24 Mike Frysinger <vapier@gentoo.org>
322 * configure: Regenerate.
324 2015-03-23 Mike Frysinger <vapier@gentoo.org>
326 * configure: Regenerate.
328 2015-03-23 Mike Frysinger <vapier@gentoo.org>
330 * configure: Regenerate.
331 * configure.ac (mips_extra_objs): Delete.
332 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
333 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
335 2015-03-23 Mike Frysinger <vapier@gentoo.org>
337 * configure: Regenerate.
338 * configure.ac: Delete sim_hw checks for dv-sockser.
340 2015-03-16 Mike Frysinger <vapier@gentoo.org>
342 * config.in, configure: Regenerate.
343 * tconfig.in: Rename file ...
344 * tconfig.h: ... here.
346 2015-03-15 Mike Frysinger <vapier@gentoo.org>
348 * tconfig.in: Delete includes.
349 [HAVE_DV_SOCKSER]: Delete.
351 2015-03-14 Mike Frysinger <vapier@gentoo.org>
353 * Makefile.in (SIM_RUN_OBJS): Delete.
355 2015-03-14 Mike Frysinger <vapier@gentoo.org>
357 * configure.ac (AC_CHECK_HEADERS): Delete.
358 * aclocal.m4, configure: Regenerate.
360 2014-08-19 Alan Modra <amodra@gmail.com>
362 * configure: Regenerate.
364 2014-08-15 Roland McGrath <mcgrathr@google.com>
366 * configure: Regenerate.
367 * config.in: Regenerate.
369 2014-03-04 Mike Frysinger <vapier@gentoo.org>
371 * configure: Regenerate.
373 2013-09-23 Alan Modra <amodra@gmail.com>
375 * configure: Regenerate.
377 2013-06-03 Mike Frysinger <vapier@gentoo.org>
379 * aclocal.m4, configure: Regenerate.
381 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
383 * configure: Rebuild.
385 2013-03-26 Mike Frysinger <vapier@gentoo.org>
387 * configure: Regenerate.
389 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
391 * configure.ac: Address use of dv-sockser.o.
392 * tconfig.in: Conditionalize use of dv_sockser_install.
393 * configure: Regenerated.
394 * config.in: Regenerated.
396 2012-10-04 Chao-ying Fu <fu@mips.com>
397 Steve Ellcey <sellcey@mips.com>
399 * mips/mips3264r2.igen (rdhwr): New.
401 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
403 * configure.ac: Always link against dv-sockser.o.
404 * configure: Regenerate.
406 2012-06-15 Joel Brobecker <brobecker@adacore.com>
408 * config.in, configure: Regenerate.
410 2012-05-18 Nick Clifton <nickc@redhat.com>
413 * interp.c: Include config.h before system header files.
415 2012-03-24 Mike Frysinger <vapier@gentoo.org>
417 * aclocal.m4, config.in, configure: Regenerate.
419 2011-12-03 Mike Frysinger <vapier@gentoo.org>
421 * aclocal.m4: New file.
422 * configure: Regenerate.
424 2011-10-19 Mike Frysinger <vapier@gentoo.org>
426 * configure: Regenerate after common/acinclude.m4 update.
428 2011-10-17 Mike Frysinger <vapier@gentoo.org>
430 * configure.ac: Change include to common/acinclude.m4.
432 2011-10-17 Mike Frysinger <vapier@gentoo.org>
434 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
435 call. Replace common.m4 include with SIM_AC_COMMON.
436 * configure: Regenerate.
438 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
440 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
442 (tmp-mach-multi): Exit early when igen fails.
444 2011-07-05 Mike Frysinger <vapier@gentoo.org>
446 * interp.c (sim_do_command): Delete.
448 2011-02-14 Mike Frysinger <vapier@gentoo.org>
450 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
451 (tx3904sio_fifo_reset): Likewise.
452 * interp.c (sim_monitor): Likewise.
454 2010-04-14 Mike Frysinger <vapier@gentoo.org>
456 * interp.c (sim_write): Add const to buffer arg.
458 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
460 * interp.c: Don't include sysdep.h
462 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
464 * configure: Regenerate.
466 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
468 * config.in: Regenerate.
469 * configure: Likewise.
471 * configure: Regenerate.
473 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
475 * configure: Regenerate to track ../common/common.m4 changes.
478 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
479 Daniel Jacobowitz <dan@codesourcery.com>
480 Joseph Myers <joseph@codesourcery.com>
482 * configure: Regenerate.
484 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
486 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
487 that unconditionally allows fmt_ps.
488 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
489 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
490 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
491 filter from 64,f to 32,f.
492 (PREFX): Change filter from 64 to 32.
493 (LDXC1, LUXC1): Provide separate mips32r2 implementations
494 that use do_load_double instead of do_load. Make both LUXC1
495 versions unpredictable if SizeFGR () != 64.
496 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
497 instead of do_store. Remove unused variable. Make both SUXC1
498 versions unpredictable if SizeFGR () != 64.
500 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
502 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
503 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
504 shifts for that case.
506 2007-09-04 Nick Clifton <nickc@redhat.com>
508 * interp.c (options enum): Add OPTION_INFO_MEMORY.
509 (display_mem_info): New static variable.
510 (mips_option_handler): Handle OPTION_INFO_MEMORY.
511 (mips_options): Add info-memory and memory-info.
512 (sim_open): After processing the command line and board
513 specification, check display_mem_info. If it is set then
514 call the real handler for the --memory-info command line
517 2007-08-24 Joel Brobecker <brobecker@adacore.com>
519 * configure.ac: Change license of multi-run.c to GPL version 3.
520 * configure: Regenerate.
522 2007-06-28 Richard Sandiford <richard@codesourcery.com>
524 * configure.ac, configure: Revert last patch.
526 2007-06-26 Richard Sandiford <richard@codesourcery.com>
528 * configure.ac (sim_mipsisa3264_configs): New variable.
529 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
530 every configuration support all four targets, using the triplet to
531 determine the default.
532 * configure: Regenerate.
534 2007-06-25 Richard Sandiford <richard@codesourcery.com>
536 * Makefile.in (m16run.o): New rule.
538 2007-05-15 Thiemo Seufer <ths@mips.com>
540 * mips3264r2.igen (DSHD): Fix compile warning.
542 2007-05-14 Thiemo Seufer <ths@mips.com>
544 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
545 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
546 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
547 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
550 2007-03-01 Thiemo Seufer <ths@mips.com>
552 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
555 2007-02-20 Thiemo Seufer <ths@mips.com>
557 * dsp.igen: Update copyright notice.
558 * dsp2.igen: Fix copyright notice.
560 2007-02-20 Thiemo Seufer <ths@mips.com>
561 Chao-Ying Fu <fu@mips.com>
563 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
564 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
565 Add dsp2 to sim_igen_machine.
566 * configure: Regenerate.
567 * dsp.igen (do_ph_op): Add MUL support when op = 2.
568 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
569 (mulq_rs.ph): Use do_ph_mulq.
570 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
571 * mips.igen: Add dsp2 model and include dsp2.igen.
572 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
573 for *mips32r2, *mips64r2, *dsp.
574 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
575 for *mips32r2, *mips64r2, *dsp2.
576 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
578 2007-02-19 Thiemo Seufer <ths@mips.com>
579 Nigel Stephens <nigel@mips.com>
581 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
582 jumps with hazard barrier.
584 2007-02-19 Thiemo Seufer <ths@mips.com>
585 Nigel Stephens <nigel@mips.com>
587 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
588 after each call to sim_io_write.
590 2007-02-19 Thiemo Seufer <ths@mips.com>
591 Nigel Stephens <nigel@mips.com>
593 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
594 supported by this simulator.
595 (decode_coproc): Recognise additional CP0 Config registers
598 2007-02-19 Thiemo Seufer <ths@mips.com>
599 Nigel Stephens <nigel@mips.com>
600 David Ung <davidu@mips.com>
602 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
603 uninterpreted formats. If fmt is one of the uninterpreted types
604 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
605 fmt_word, and fmt_uninterpreted_64 like fmt_long.
606 (store_fpr): When writing an invalid odd register, set the
607 matching even register to fmt_unknown, not the following register.
608 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
609 the the memory window at offset 0 set by --memory-size command
611 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
613 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
615 (sim_monitor): When returning the memory size to the MIPS
616 application, use the value in STATE_MEM_SIZE, not an arbitrary
618 (cop_lw): Don' mess around with FPR_STATE, just pass
619 fmt_uninterpreted_32 to StoreFPR.
621 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
623 * mips.igen (not_word_value): Single version for mips32, mips64
626 2007-02-19 Thiemo Seufer <ths@mips.com>
627 Nigel Stephens <nigel@mips.com>
629 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
632 2007-02-17 Thiemo Seufer <ths@mips.com>
634 * configure.ac (mips*-sde-elf*): Move in front of generic machine
636 * configure: Regenerate.
638 2007-02-17 Thiemo Seufer <ths@mips.com>
640 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
641 Add mdmx to sim_igen_machine.
642 (mipsisa64*-*-*): Likewise. Remove dsp.
643 (mipsisa32*-*-*): Remove dsp.
644 * configure: Regenerate.
646 2007-02-13 Thiemo Seufer <ths@mips.com>
648 * configure.ac: Add mips*-sde-elf* target.
649 * configure: Regenerate.
651 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
653 * acconfig.h: Remove.
654 * config.in, configure: Regenerate.
656 2006-11-07 Thiemo Seufer <ths@mips.com>
658 * dsp.igen (do_w_op): Fix compiler warning.
660 2006-08-29 Thiemo Seufer <ths@mips.com>
661 David Ung <davidu@mips.com>
663 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
665 * configure: Regenerate.
666 * mips.igen (model): Add smartmips.
667 (MADDU): Increment ACX if carry.
668 (do_mult): Clear ACX.
669 (ROR,RORV): Add smartmips.
670 (include): Include smartmips.igen.
671 * sim-main.h (ACX): Set to REGISTERS[89].
672 * smartmips.igen: New file.
674 2006-08-29 Thiemo Seufer <ths@mips.com>
675 David Ung <davidu@mips.com>
677 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
678 mips3264r2.igen. Add missing dependency rules.
679 * m16e.igen: Support for mips16e save/restore instructions.
681 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
683 * configure: Regenerated.
685 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
687 * configure: Regenerated.
689 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
691 * configure: Regenerated.
693 2006-05-15 Chao-ying Fu <fu@mips.com>
695 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
697 2006-04-18 Nick Clifton <nickc@redhat.com>
699 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
702 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
704 * configure: Regenerate.
706 2005-12-14 Chao-ying Fu <fu@mips.com>
708 * Makefile.in (SIM_OBJS): Add dsp.o.
709 (dsp.o): New dependency.
710 (IGEN_INCLUDE): Add dsp.igen.
711 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
712 mipsisa64*-*-*): Add dsp to sim_igen_machine.
713 * configure: Regenerate.
714 * mips.igen: Add dsp model and include dsp.igen.
715 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
716 because these instructions are extended in DSP ASE.
717 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
718 adding 6 DSP accumulator registers and 1 DSP control register.
719 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
720 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
721 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
722 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
723 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
724 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
725 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
726 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
727 DSPCR_CCOND_SMASK): New define.
728 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
729 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
731 2005-07-08 Ian Lance Taylor <ian@airs.com>
733 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
735 2005-06-16 David Ung <davidu@mips.com>
736 Nigel Stephens <nigel@mips.com>
738 * mips.igen: New mips16e model and include m16e.igen.
739 (check_u64): Add mips16e tag.
740 * m16e.igen: New file for MIPS16e instructions.
741 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
742 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
744 * configure: Regenerate.
746 2005-05-26 David Ung <davidu@mips.com>
748 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
749 tags to all instructions which are applicable to the new ISAs.
750 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
752 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
754 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
756 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
757 * configure: Regenerate.
759 2005-03-23 Mark Kettenis <kettenis@gnu.org>
761 * configure: Regenerate.
763 2005-01-14 Andrew Cagney <cagney@gnu.org>
765 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
766 explicit call to AC_CONFIG_HEADER.
767 * configure: Regenerate.
769 2005-01-12 Andrew Cagney <cagney@gnu.org>
771 * configure.ac: Update to use ../common/common.m4.
772 * configure: Re-generate.
774 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
776 * configure: Regenerated to track ../common/aclocal.m4 changes.
778 2005-01-07 Andrew Cagney <cagney@gnu.org>
780 * configure.ac: Rename configure.in, require autoconf 2.59.
781 * configure: Re-generate.
783 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
785 * configure: Regenerate for ../common/aclocal.m4 update.
787 2004-09-24 Monika Chaddha <monika@acmet.com>
789 Committed by Andrew Cagney.
790 * m16.igen (CMP, CMPI): Fix assembler.
792 2004-08-18 Chris Demetriou <cgd@broadcom.com>
794 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
795 * configure: Regenerate.
797 2004-06-25 Chris Demetriou <cgd@broadcom.com>
799 * configure.in (sim_m16_machine): Include mipsIII.
800 * configure: Regenerate.
802 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
804 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
806 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
808 2004-04-10 Chris Demetriou <cgd@broadcom.com>
810 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
812 2004-04-09 Chris Demetriou <cgd@broadcom.com>
814 * mips.igen (check_fmt): Remove.
815 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
816 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
817 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
818 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
819 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
820 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
821 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
822 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
823 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
824 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
826 2004-04-09 Chris Demetriou <cgd@broadcom.com>
828 * sb1.igen (check_sbx): New function.
829 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
831 2004-03-29 Chris Demetriou <cgd@broadcom.com>
832 Richard Sandiford <rsandifo@redhat.com>
834 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
835 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
836 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
837 separate implementations for mipsIV and mipsV. Use new macros to
838 determine whether the restrictions apply.
840 2004-01-19 Chris Demetriou <cgd@broadcom.com>
842 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
843 (check_mult_hilo): Improve comments.
844 (check_div_hilo): Likewise. Also, fork off a new version
845 to handle mips32/mips64 (since there are no hazards to check
848 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
850 * mips.igen (do_dmultx): Fix check for negative operands.
852 2003-05-16 Ian Lance Taylor <ian@airs.com>
854 * Makefile.in (SHELL): Make sure this is defined.
855 (various): Use $(SHELL) whenever we invoke move-if-change.
857 2003-05-03 Chris Demetriou <cgd@broadcom.com>
859 * cp1.c: Tweak attribution slightly.
862 * mdmx.igen: Likewise.
863 * mips3d.igen: Likewise.
864 * sb1.igen: Likewise.
866 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
868 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
871 2003-02-27 Andrew Cagney <cagney@redhat.com>
873 * interp.c (sim_open): Rename _bfd to bfd.
874 (sim_create_inferior): Ditto.
876 2003-01-14 Chris Demetriou <cgd@broadcom.com>
878 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
880 2003-01-14 Chris Demetriou <cgd@broadcom.com>
882 * mips.igen (EI, DI): Remove.
884 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
886 * Makefile.in (tmp-run-multi): Fix mips16 filter.
888 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
889 Andrew Cagney <ac131313@redhat.com>
890 Gavin Romig-Koch <gavin@redhat.com>
891 Graydon Hoare <graydon@redhat.com>
892 Aldy Hernandez <aldyh@redhat.com>
893 Dave Brolley <brolley@redhat.com>
894 Chris Demetriou <cgd@broadcom.com>
896 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
897 (sim_mach_default): New variable.
898 (mips64vr-*-*, mips64vrel-*-*): New configurations.
899 Add a new simulator generator, MULTI.
900 * configure: Regenerate.
901 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
902 (multi-run.o): New dependency.
903 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
904 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
905 (tmp-multi): Combine them.
906 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
907 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
908 (distclean-extra): New rule.
909 * sim-main.h: Include bfd.h.
910 (MIPS_MACH): New macro.
911 * mips.igen (vr4120, vr5400, vr5500): New models.
912 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
913 * vr.igen: Replace with new version.
915 2003-01-04 Chris Demetriou <cgd@broadcom.com>
917 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
918 * configure: Regenerate.
920 2002-12-31 Chris Demetriou <cgd@broadcom.com>
922 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
923 * mips.igen: Remove all invocations of check_branch_bug and
926 2002-12-16 Chris Demetriou <cgd@broadcom.com>
928 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
930 2002-07-30 Chris Demetriou <cgd@broadcom.com>
932 * mips.igen (do_load_double, do_store_double): New functions.
933 (LDC1, SDC1): Rename to...
934 (LDC1b, SDC1b): respectively.
935 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
937 2002-07-29 Michael Snyder <msnyder@redhat.com>
939 * cp1.c (fp_recip2): Modify initialization expression so that
940 GCC will recognize it as constant.
942 2002-06-18 Chris Demetriou <cgd@broadcom.com>
944 * mdmx.c (SD_): Delete.
945 (Unpredictable): Re-define, for now, to directly invoke
946 unpredictable_action().
947 (mdmx_acc_op): Fix error in .ob immediate handling.
949 2002-06-18 Andrew Cagney <cagney@redhat.com>
951 * interp.c (sim_firmware_command): Initialize `address'.
953 2002-06-16 Andrew Cagney <ac131313@redhat.com>
955 * configure: Regenerated to track ../common/aclocal.m4 changes.
957 2002-06-14 Chris Demetriou <cgd@broadcom.com>
958 Ed Satterthwaite <ehs@broadcom.com>
960 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
961 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
962 * mips.igen: Include mips3d.igen.
963 (mips3d): New model name for MIPS-3D ASE instructions.
964 (CVT.W.fmt): Don't use this instruction for word (source) format
966 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
967 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
968 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
969 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
970 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
971 (RSquareRoot1, RSquareRoot2): New macros.
972 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
973 (fp_rsqrt2): New functions.
974 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
975 * configure: Regenerate.
977 2002-06-13 Chris Demetriou <cgd@broadcom.com>
978 Ed Satterthwaite <ehs@broadcom.com>
980 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
981 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
982 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
983 (convert): Note that this function is not used for paired-single
985 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
986 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
987 (check_fmt_p): Enable paired-single support.
988 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
989 (PUU.PS): New instructions.
990 (CVT.S.fmt): Don't use this instruction for paired-single format
992 * sim-main.h (FP_formats): New value 'fmt_ps.'
993 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
994 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
996 2002-06-12 Chris Demetriou <cgd@broadcom.com>
998 * mips.igen: Fix formatting of function calls in
1001 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1003 * mips.igen (MOVN, MOVZ): Trace result.
1004 (TNEI): Print "tnei" as the opcode name in traces.
1005 (CEIL.W): Add disassembly string for traces.
1006 (RSQRT.fmt): Make location of disassembly string consistent
1007 with other instructions.
1009 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1011 * mips.igen (X): Delete unused function.
1013 2002-06-08 Andrew Cagney <cagney@redhat.com>
1015 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1017 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1018 Ed Satterthwaite <ehs@broadcom.com>
1020 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1021 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1022 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1023 (fp_nmsub): New prototypes.
1024 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1025 (NegMultiplySub): New defines.
1026 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1027 (MADD.D, MADD.S): Replace with...
1028 (MADD.fmt): New instruction.
1029 (MSUB.D, MSUB.S): Replace with...
1030 (MSUB.fmt): New instruction.
1031 (NMADD.D, NMADD.S): Replace with...
1032 (NMADD.fmt): New instruction.
1033 (NMSUB.D, MSUB.S): Replace with...
1034 (NMSUB.fmt): New instruction.
1036 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1037 Ed Satterthwaite <ehs@broadcom.com>
1039 * cp1.c: Fix more comment spelling and formatting.
1040 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1041 (denorm_mode): New function.
1042 (fpu_unary, fpu_binary): Round results after operation, collect
1043 status from rounding operations, and update the FCSR.
1044 (convert): Collect status from integer conversions and rounding
1045 operations, and update the FCSR. Adjust NaN values that result
1046 from conversions. Convert to use sim_io_eprintf rather than
1047 fprintf, and remove some debugging code.
1048 * cp1.h (fenr_FS): New define.
1050 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1052 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1053 rounding mode to sim FP rounding mode flag conversion code into...
1054 (rounding_mode): New function.
1056 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1058 * cp1.c: Clean up formatting of a few comments.
1059 (value_fpr): Reformat switch statement.
1061 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1062 Ed Satterthwaite <ehs@broadcom.com>
1065 * sim-main.h: Include cp1.h.
1066 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1067 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1068 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1069 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1070 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1071 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1072 * cp1.c: Don't include sim-fpu.h; already included by
1073 sim-main.h. Clean up formatting of some comments.
1074 (NaN, Equal, Less): Remove.
1075 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1076 (fp_cmp): New functions.
1077 * mips.igen (do_c_cond_fmt): Remove.
1078 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1079 Compare. Add result tracing.
1080 (CxC1): Remove, replace with...
1081 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1082 (DMxC1): Remove, replace with...
1083 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1084 (MxC1): Remove, replace with...
1085 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1087 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1089 * sim-main.h (FGRIDX): Remove, replace all uses with...
1090 (FGR_BASE): New macro.
1091 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1092 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1093 (NR_FGR, FGR): Likewise.
1094 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1095 * mips.igen: Likewise.
1097 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1099 * cp1.c: Add an FSF Copyright notice to this file.
1101 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1102 Ed Satterthwaite <ehs@broadcom.com>
1104 * cp1.c (Infinity): Remove.
1105 * sim-main.h (Infinity): Likewise.
1107 * cp1.c (fp_unary, fp_binary): New functions.
1108 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1109 (fp_sqrt): New functions, implemented in terms of the above.
1110 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1111 (Recip, SquareRoot): Remove (replaced by functions above).
1112 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1113 (fp_recip, fp_sqrt): New prototypes.
1114 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1115 (Recip, SquareRoot): Replace prototypes with #defines which
1116 invoke the functions above.
1118 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1120 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1121 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1122 file, remove PARAMS from prototypes.
1123 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1124 simulator state arguments.
1125 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1126 pass simulator state arguments.
1127 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1128 (store_fpr, convert): Remove 'sd' argument.
1129 (value_fpr): Likewise. Convert to use 'SD' instead.
1131 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1133 * cp1.c (Min, Max): Remove #if 0'd functions.
1134 * sim-main.h (Min, Max): Remove.
1136 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1138 * cp1.c: fix formatting of switch case and default labels.
1139 * interp.c: Likewise.
1140 * sim-main.c: Likewise.
1142 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1144 * cp1.c: Clean up comments which describe FP formats.
1145 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1147 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1148 Ed Satterthwaite <ehs@broadcom.com>
1150 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1151 Broadcom SiByte SB-1 processor configurations.
1152 * configure: Regenerate.
1153 * sb1.igen: New file.
1154 * mips.igen: Include sb1.igen.
1156 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1157 * mdmx.igen: Add "sb1" model to all appropriate functions and
1159 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1160 (ob_func, ob_acc): Reference the above.
1161 (qh_acc): Adjust to keep the same size as ob_acc.
1162 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1163 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1165 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1167 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1169 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1170 Ed Satterthwaite <ehs@broadcom.com>
1172 * mips.igen (mdmx): New (pseudo-)model.
1173 * mdmx.c, mdmx.igen: New files.
1174 * Makefile.in (SIM_OBJS): Add mdmx.o.
1175 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1177 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1178 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1179 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1180 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1181 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1182 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1183 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1184 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1185 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1186 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1187 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1188 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1189 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1190 (qh_fmtsel): New macros.
1191 (_sim_cpu): New member "acc".
1192 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1193 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1195 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1197 * interp.c: Use 'deprecated' rather than 'depreciated.'
1198 * sim-main.h: Likewise.
1200 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1202 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1203 which wouldn't compile anyway.
1204 * sim-main.h (unpredictable_action): New function prototype.
1205 (Unpredictable): Define to call igen function unpredictable().
1206 (NotWordValue): New macro to call igen function not_word_value().
1207 (UndefinedResult): Remove.
1208 * interp.c (undefined_result): Remove.
1209 (unpredictable_action): New function.
1210 * mips.igen (not_word_value, unpredictable): New functions.
1211 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1212 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1213 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1214 NotWordValue() to check for unpredictable inputs, then
1215 Unpredictable() to handle them.
1217 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1219 * mips.igen: Fix formatting of calls to Unpredictable().
1221 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1223 * interp.c (sim_open): Revert previous change.
1225 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1227 * interp.c (sim_open): Disable chunk of code that wrote code in
1228 vector table entries.
1230 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1232 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1233 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1236 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1238 * cp1.c: Fix many formatting issues.
1240 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1242 * cp1.c (fpu_format_name): New function to replace...
1243 (DOFMT): This. Delete, and update all callers.
1244 (fpu_rounding_mode_name): New function to replace...
1245 (RMMODE): This. Delete, and update all callers.
1247 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1249 * interp.c: Move FPU support routines from here to...
1250 * cp1.c: Here. New file.
1251 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1252 (cp1.o): New target.
1254 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1256 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1257 * mips.igen (mips32, mips64): New models, add to all instructions
1258 and functions as appropriate.
1259 (loadstore_ea, check_u64): New variant for model mips64.
1260 (check_fmt_p): New variant for models mipsV and mips64, remove
1261 mipsV model marking fro other variant.
1264 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1265 for mips32 and mips64.
1266 (DCLO, DCLZ): New instructions for mips64.
1268 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1270 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1271 immediate or code as a hex value with the "%#lx" format.
1272 (ANDI): Likewise, and fix printed instruction name.
1274 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1276 * sim-main.h (UndefinedResult, Unpredictable): New macros
1277 which currently do nothing.
1279 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1281 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1282 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1283 (status_CU3): New definitions.
1285 * sim-main.h (ExceptionCause): Add new values for MIPS32
1286 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1287 for DebugBreakPoint and NMIReset to note their status in
1289 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1290 (SignalExceptionCacheErr): New exception macros.
1292 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1294 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1295 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1297 (SignalExceptionCoProcessorUnusable): Take as argument the
1298 unusable coprocessor number.
1300 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1302 * mips.igen: Fix formatting of all SignalException calls.
1304 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1306 * sim-main.h (SIGNEXTEND): Remove.
1308 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1310 * mips.igen: Remove gencode comment from top of file, fix
1311 spelling in another comment.
1313 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1315 * mips.igen (check_fmt, check_fmt_p): New functions to check
1316 whether specific floating point formats are usable.
1317 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1318 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1319 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1320 Use the new functions.
1321 (do_c_cond_fmt): Remove format checks...
1322 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1324 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1326 * mips.igen: Fix formatting of check_fpu calls.
1328 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1332 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1334 * mips.igen: Remove whitespace at end of lines.
1336 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1338 * mips.igen (loadstore_ea): New function to do effective
1339 address calculations.
1340 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1341 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1342 CACHE): Use loadstore_ea to do effective address computations.
1344 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1346 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1347 * mips.igen (LL, CxC1, MxC1): Likewise.
1349 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1351 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1352 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1353 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1354 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1355 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1356 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1357 Don't split opcode fields by hand, use the opcode field values
1360 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1362 * mips.igen (do_divu): Fix spacing.
1364 * mips.igen (do_dsllv): Move to be right before DSLLV,
1365 to match the rest of the do_<shift> functions.
1367 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1369 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1370 DSRL32, do_dsrlv): Trace inputs and results.
1372 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1374 * mips.igen (CACHE): Provide instruction-printing string.
1376 * interp.c (signal_exception): Comment tokens after #endif.
1378 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1380 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1381 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1382 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1383 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1384 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1385 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1386 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1387 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1389 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1391 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1392 instruction-printing string.
1393 (LWU): Use '64' as the filter flag.
1395 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1397 * mips.igen (SDXC1): Fix instruction-printing string.
1399 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1401 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1402 filter flags "32,f".
1404 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1406 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1409 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1411 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1412 add a comma) so that it more closely match the MIPS ISA
1413 documentation opcode partitioning.
1414 (PREF): Put useful names on opcode fields, and include
1415 instruction-printing string.
1417 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1419 * mips.igen (check_u64): New function which in the future will
1420 check whether 64-bit instructions are usable and signal an
1421 exception if not. Currently a no-op.
1422 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1423 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1424 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1425 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1427 * mips.igen (check_fpu): New function which in the future will
1428 check whether FPU instructions are usable and signal an exception
1429 if not. Currently a no-op.
1430 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1431 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1432 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1433 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1434 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1435 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1436 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1437 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1439 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1441 * mips.igen (do_load_left, do_load_right): Move to be immediately
1443 (do_store_left, do_store_right): Move to be immediately following
1446 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1448 * mips.igen (mipsV): New model name. Also, add it to
1449 all instructions and functions where it is appropriate.
1451 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1453 * mips.igen: For all functions and instructions, list model
1454 names that support that instruction one per line.
1456 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1458 * mips.igen: Add some additional comments about supported
1459 models, and about which instructions go where.
1460 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1461 order as is used in the rest of the file.
1463 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1465 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1466 indicating that ALU32_END or ALU64_END are there to check
1468 (DADD): Likewise, but also remove previous comment about
1471 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1473 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1474 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1475 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1476 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1477 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1478 fields (i.e., add and move commas) so that they more closely
1479 match the MIPS ISA documentation opcode partitioning.
1481 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1483 * mips.igen (ADDI): Print immediate value.
1484 (BREAK): Print code.
1485 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1486 (SLL): Print "nop" specially, and don't run the code
1487 that does the shift for the "nop" case.
1489 2001-11-17 Fred Fish <fnf@redhat.com>
1491 * sim-main.h (float_operation): Move enum declaration outside
1492 of _sim_cpu struct declaration.
1494 2001-04-12 Jim Blandy <jimb@redhat.com>
1496 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1497 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1499 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1500 PENDING_FILL, and you can get the intended effect gracefully by
1501 calling PENDING_SCHED directly.
1503 2001-02-23 Ben Elliston <bje@redhat.com>
1505 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1506 already defined elsewhere.
1508 2001-02-19 Ben Elliston <bje@redhat.com>
1510 * sim-main.h (sim_monitor): Return an int.
1511 * interp.c (sim_monitor): Add return values.
1512 (signal_exception): Handle error conditions from sim_monitor.
1514 2001-02-08 Ben Elliston <bje@redhat.com>
1516 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1517 (store_memory): Likewise, pass cia to sim_core_write*.
1519 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1521 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1522 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1524 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1526 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1527 * Makefile.in: Don't delete *.igen when cleaning directory.
1529 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1531 * m16.igen (break): Call SignalException not sim_engine_halt.
1533 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1535 From Jason Eckhardt:
1536 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1538 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1540 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1542 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1544 * mips.igen (do_dmultx): Fix typo.
1546 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1548 * configure: Regenerated to track ../common/aclocal.m4 changes.
1550 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1552 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1554 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1556 * sim-main.h (GPR_CLEAR): Define macro.
1558 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1560 * interp.c (decode_coproc): Output long using %lx and not %s.
1562 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1564 * interp.c (sim_open): Sort & extend dummy memory regions for
1565 --board=jmr3904 for eCos.
1567 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1569 * configure: Regenerated.
1571 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1573 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1574 calls, conditional on the simulator being in verbose mode.
1576 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1578 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1579 cache don't get ReservedInstruction traps.
1581 1999-11-29 Mark Salter <msalter@cygnus.com>
1583 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1584 to clear status bits in sdisr register. This is how the hardware works.
1586 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1587 being used by cygmon.
1589 1999-11-11 Andrew Haley <aph@cygnus.com>
1591 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1594 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1596 * mips.igen (MULT): Correct previous mis-applied patch.
1598 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1600 * mips.igen (delayslot32): Handle sequence like
1601 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1602 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1603 (MULT): Actually pass the third register...
1605 1999-09-03 Mark Salter <msalter@cygnus.com>
1607 * interp.c (sim_open): Added more memory aliases for additional
1608 hardware being touched by cygmon on jmr3904 board.
1610 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1612 * configure: Regenerated to track ../common/aclocal.m4 changes.
1614 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1616 * interp.c (sim_store_register): Handle case where client - GDB -
1617 specifies that a 4 byte register is 8 bytes in size.
1618 (sim_fetch_register): Ditto.
1620 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1622 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1623 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1624 (idt_monitor_base): Base address for IDT monitor traps.
1625 (pmon_monitor_base): Ditto for PMON.
1626 (lsipmon_monitor_base): Ditto for LSI PMON.
1627 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1628 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1629 (sim_firmware_command): New function.
1630 (mips_option_handler): Call it for OPTION_FIRMWARE.
1631 (sim_open): Allocate memory for idt_monitor region. If "--board"
1632 option was given, add no monitor by default. Add BREAK hooks only if
1633 monitors are also there.
1635 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1637 * interp.c (sim_monitor): Flush output before reading input.
1639 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1641 * tconfig.in (SIM_HANDLES_LMA): Always define.
1643 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1645 From Mark Salter <msalter@cygnus.com>:
1646 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1647 (sim_open): Add setup for BSP board.
1649 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1651 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1652 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1653 them as unimplemented.
1655 1999-05-08 Felix Lee <flee@cygnus.com>
1657 * configure: Regenerated to track ../common/aclocal.m4 changes.
1659 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1661 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1663 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1665 * configure.in: Any mips64vr5*-*-* target should have
1666 -DTARGET_ENABLE_FR=1.
1667 (default_endian): Any mips64vr*el-*-* target should default to
1669 * configure: Re-generate.
1671 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1673 * mips.igen (ldl): Extend from _16_, not 32.
1675 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1677 * interp.c (sim_store_register): Force registers written to by GDB
1678 into an un-interpreted state.
1680 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1682 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1683 CPU, start periodic background I/O polls.
1684 (tx3904sio_poll): New function: periodic I/O poller.
1686 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1688 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1690 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1692 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1695 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1697 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1698 (load_word): Call SIM_CORE_SIGNAL hook on error.
1699 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1700 starting. For exception dispatching, pass PC instead of NULL_CIA.
1701 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1702 * sim-main.h (COP0_BADVADDR): Define.
1703 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1704 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1705 (_sim_cpu): Add exc_* fields to store register value snapshots.
1706 * mips.igen (*): Replace memory-related SignalException* calls
1707 with references to SIM_CORE_SIGNAL hook.
1709 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1711 * sim-main.c (*): Minor warning cleanups.
1713 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1715 * m16.igen (DADDIU5): Correct type-o.
1717 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1719 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1722 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1724 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1726 (interp.o): Add dependency on itable.h
1727 (oengine.c, gencode): Delete remaining references.
1728 (BUILT_SRC_FROM_GEN): Clean up.
1730 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1733 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1734 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1735 tmp-run-hack) : New.
1736 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1737 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1738 Drop the "64" qualifier to get the HACK generator working.
1739 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1740 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1741 qualifier to get the hack generator working.
1742 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1743 (DSLL): Use do_dsll.
1744 (DSLLV): Use do_dsllv.
1745 (DSRA): Use do_dsra.
1746 (DSRL): Use do_dsrl.
1747 (DSRLV): Use do_dsrlv.
1748 (BC1): Move *vr4100 to get the HACK generator working.
1749 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1750 get the HACK generator working.
1751 (MACC) Rename to get the HACK generator working.
1752 (DMACC,MACCS,DMACCS): Add the 64.
1754 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1756 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1757 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1759 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1761 * mips/interp.c (DEBUG): Cleanups.
1763 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1765 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1766 (tx3904sio_tickle): fflush after a stdout character output.
1768 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1770 * interp.c (sim_close): Uninstall modules.
1772 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1774 * sim-main.h, interp.c (sim_monitor): Change to global
1777 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1779 * configure.in (vr4100): Only include vr4100 instructions in
1781 * configure: Re-generate.
1782 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1784 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1786 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1787 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1790 * configure.in (sim_default_gen, sim_use_gen): Replace with
1792 (--enable-sim-igen): Delete config option. Always using IGEN.
1793 * configure: Re-generate.
1795 * Makefile.in (gencode): Kill, kill, kill.
1798 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1800 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1801 bit mips16 igen simulator.
1802 * configure: Re-generate.
1804 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1805 as part of vr4100 ISA.
1806 * vr.igen: Mark all instructions as 64 bit only.
1808 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1810 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1813 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1815 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1816 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1817 * configure: Re-generate.
1819 * m16.igen (BREAK): Define breakpoint instruction.
1820 (JALX32): Mark instruction as mips16 and not r3900.
1821 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1823 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1825 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1827 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1828 insn as a debug breakpoint.
1830 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1832 (PENDING_SCHED): Clean up trace statement.
1833 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1834 (PENDING_FILL): Delay write by only one cycle.
1835 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1837 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1839 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1841 (pending_tick): Move incrementing of index to FOR statement.
1842 (pending_tick): Only update PENDING_OUT after a write has occured.
1844 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1846 * configure: Re-generate.
1848 * interp.c (sim_engine_run OLD): Delete explicit call to
1849 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1851 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1853 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1854 interrupt level number to match changed SignalExceptionInterrupt
1857 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1859 * interp.c: #include "itable.h" if WITH_IGEN.
1860 (get_insn_name): New function.
1861 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1862 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1864 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1866 * configure: Rebuilt to inhale new common/aclocal.m4.
1868 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1870 * dv-tx3904sio.c: Include sim-assert.h.
1872 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1874 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1875 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1876 Reorganize target-specific sim-hardware checks.
1877 * configure: rebuilt.
1878 * interp.c (sim_open): For tx39 target boards, set
1879 OPERATING_ENVIRONMENT, add tx3904sio devices.
1880 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1881 ROM executables. Install dv-sockser into sim-modules list.
1883 * dv-tx3904irc.c: Compiler warning clean-up.
1884 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1885 frequent hw-trace messages.
1887 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1889 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1891 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1893 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1895 * vr.igen: New file.
1896 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1897 * mips.igen: Define vr4100 model. Include vr.igen.
1898 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1900 * mips.igen (check_mf_hilo): Correct check.
1902 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1904 * sim-main.h (interrupt_event): Add prototype.
1906 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1907 register_ptr, register_value.
1908 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1910 * sim-main.h (tracefh): Make extern.
1912 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1914 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1915 Reduce unnecessarily high timer event frequency.
1916 * dv-tx3904cpu.c: Ditto for interrupt event.
1918 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1920 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1922 (interrupt_event): Made non-static.
1924 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1925 interchange of configuration values for external vs. internal
1928 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1930 * mips.igen (BREAK): Moved code to here for
1931 simulator-reserved break instructions.
1932 * gencode.c (build_instruction): Ditto.
1933 * interp.c (signal_exception): Code moved from here. Non-
1934 reserved instructions now use exception vector, rather
1936 * sim-main.h: Moved magic constants to here.
1938 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1940 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1941 register upon non-zero interrupt event level, clear upon zero
1943 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1944 by passing zero event value.
1945 (*_io_{read,write}_buffer): Endianness fixes.
1946 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1947 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1949 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1950 serial I/O and timer module at base address 0xFFFF0000.
1952 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1954 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1957 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1959 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1961 * configure: Update.
1963 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1965 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1966 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1967 * configure.in: Include tx3904tmr in hw_device list.
1968 * configure: Rebuilt.
1969 * interp.c (sim_open): Instantiate three timer instances.
1970 Fix address typo of tx3904irc instance.
1972 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1974 * interp.c (signal_exception): SystemCall exception now uses
1975 the exception vector.
1977 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1979 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1982 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1984 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1986 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1988 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1990 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1991 sim-main.h. Declare a struct hw_descriptor instead of struct
1992 hw_device_descriptor.
1994 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1996 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1997 right bits and then re-align left hand bytes to correct byte
1998 lanes. Fix incorrect computation in do_store_left when loading
1999 bytes from second word.
2001 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2003 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2004 * interp.c (sim_open): Only create a device tree when HW is
2007 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2008 * interp.c (signal_exception): Ditto.
2010 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2012 * gencode.c: Mark BEGEZALL as LIKELY.
2014 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2016 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2017 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2019 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2021 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2022 modules. Recognize TX39 target with "mips*tx39" pattern.
2023 * configure: Rebuilt.
2024 * sim-main.h (*): Added many macros defining bits in
2025 TX39 control registers.
2026 (SignalInterrupt): Send actual PC instead of NULL.
2027 (SignalNMIReset): New exception type.
2028 * interp.c (board): New variable for future use to identify
2029 a particular board being simulated.
2030 (mips_option_handler,mips_options): Added "--board" option.
2031 (interrupt_event): Send actual PC.
2032 (sim_open): Make memory layout conditional on board setting.
2033 (signal_exception): Initial implementation of hardware interrupt
2034 handling. Accept another break instruction variant for simulator
2036 (decode_coproc): Implement RFE instruction for TX39.
2037 (mips.igen): Decode RFE instruction as such.
2038 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2039 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2040 bbegin to implement memory map.
2041 * dv-tx3904cpu.c: New file.
2042 * dv-tx3904irc.c: New file.
2044 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2046 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2048 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2050 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2051 with calls to check_div_hilo.
2053 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2055 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2056 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2057 Add special r3900 version of do_mult_hilo.
2058 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2059 with calls to check_mult_hilo.
2060 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2061 with calls to check_div_hilo.
2063 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2065 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2066 Document a replacement.
2068 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2070 * interp.c (sim_monitor): Make mon_printf work.
2072 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2074 * sim-main.h (INSN_NAME): New arg `cpu'.
2076 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2078 * configure: Regenerated to track ../common/aclocal.m4 changes.
2080 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2082 * configure: Regenerated to track ../common/aclocal.m4 changes.
2085 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2087 * acconfig.h: New file.
2088 * configure.in: Reverted change of Apr 24; use sinclude again.
2090 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2092 * configure: Regenerated to track ../common/aclocal.m4 changes.
2095 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2097 * configure.in: Don't call sinclude.
2099 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2101 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2103 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2105 * mips.igen (ERET): Implement.
2107 * interp.c (decode_coproc): Return sign-extended EPC.
2109 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2111 * interp.c (signal_exception): Do not ignore Trap.
2112 (signal_exception): On TRAP, restart at exception address.
2113 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2114 (signal_exception): Update.
2115 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2116 so that TRAP instructions are caught.
2118 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2120 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2121 contains HI/LO access history.
2122 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2123 (HIACCESS, LOACCESS): Delete, replace with
2124 (HIHISTORY, LOHISTORY): New macros.
2125 (CHECKHILO): Delete all, moved to mips.igen
2127 * gencode.c (build_instruction): Do not generate checks for
2128 correct HI/LO register usage.
2130 * interp.c (old_engine_run): Delete checks for correct HI/LO
2133 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2134 check_mf_cycles): New functions.
2135 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2136 do_divu, domultx, do_mult, do_multu): Use.
2138 * tx.igen ("madd", "maddu"): Use.
2140 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2142 * mips.igen (DSRAV): Use function do_dsrav.
2143 (SRAV): Use new function do_srav.
2145 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2146 (B): Sign extend 11 bit immediate.
2147 (EXT-B*): Shift 16 bit immediate left by 1.
2148 (ADDIU*): Don't sign extend immediate value.
2150 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2152 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2154 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2157 * mips.igen (delayslot32, nullify_next_insn): New functions.
2158 (m16.igen): Always include.
2159 (do_*): Add more tracing.
2161 * m16.igen (delayslot16): Add NIA argument, could be called by a
2162 32 bit MIPS16 instruction.
2164 * interp.c (ifetch16): Move function from here.
2165 * sim-main.c (ifetch16): To here.
2167 * sim-main.c (ifetch16, ifetch32): Update to match current
2168 implementations of LH, LW.
2169 (signal_exception): Don't print out incorrect hex value of illegal
2172 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2174 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2177 * m16.igen: Implement MIPS16 instructions.
2179 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2180 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2181 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2182 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2183 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2184 bodies of corresponding code from 32 bit insn to these. Also used
2185 by MIPS16 versions of functions.
2187 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2188 (IMEM16): Drop NR argument from macro.
2190 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2192 * Makefile.in (SIM_OBJS): Add sim-main.o.
2194 * sim-main.h (address_translation, load_memory, store_memory,
2195 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2197 (pr_addr, pr_uword64): Declare.
2198 (sim-main.c): Include when H_REVEALS_MODULE_P.
2200 * interp.c (address_translation, load_memory, store_memory,
2201 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2203 * sim-main.c: To here. Fix compilation problems.
2205 * configure.in: Enable inlining.
2206 * configure: Re-config.
2208 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2210 * configure: Regenerated to track ../common/aclocal.m4 changes.
2212 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2214 * mips.igen: Include tx.igen.
2215 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2216 * tx.igen: New file, contains MADD and MADDU.
2218 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2219 the hardwired constant `7'.
2220 (store_memory): Ditto.
2221 (LOADDRMASK): Move definition to sim-main.h.
2223 mips.igen (MTC0): Enable for r3900.
2226 mips.igen (do_load_byte): Delete.
2227 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2228 do_store_right): New functions.
2229 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2231 configure.in: Let the tx39 use igen again.
2234 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2236 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2237 not an address sized quantity. Return zero for cache sizes.
2239 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2241 * mips.igen (r3900): r3900 does not support 64 bit integer
2244 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2246 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2248 * configure : Rebuild.
2250 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2252 * configure: Regenerated to track ../common/aclocal.m4 changes.
2254 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2256 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2258 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2260 * configure: Regenerated to track ../common/aclocal.m4 changes.
2261 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2263 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2265 * configure: Regenerated to track ../common/aclocal.m4 changes.
2267 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2269 * interp.c (Max, Min): Comment out functions. Not yet used.
2271 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2273 * configure: Regenerated to track ../common/aclocal.m4 changes.
2275 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2277 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2278 configurable settings for stand-alone simulator.
2280 * configure.in: Added X11 search, just in case.
2282 * configure: Regenerated.
2284 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2286 * interp.c (sim_write, sim_read, load_memory, store_memory):
2287 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2289 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2291 * sim-main.h (GETFCC): Return an unsigned value.
2293 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2295 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2296 (DADD): Result destination is RD not RT.
2298 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2300 * sim-main.h (HIACCESS, LOACCESS): Always define.
2302 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2304 * interp.c (sim_info): Delete.
2306 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2308 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2309 (mips_option_handler): New argument `cpu'.
2310 (sim_open): Update call to sim_add_option_table.
2312 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2314 * mips.igen (CxC1): Add tracing.
2316 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2318 * sim-main.h (Max, Min): Declare.
2320 * interp.c (Max, Min): New functions.
2322 * mips.igen (BC1): Add tracing.
2324 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2326 * interp.c Added memory map for stack in vr4100
2328 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2330 * interp.c (load_memory): Add missing "break"'s.
2332 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2334 * interp.c (sim_store_register, sim_fetch_register): Pass in
2335 length parameter. Return -1.
2337 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2339 * interp.c: Added hardware init hook, fixed warnings.
2341 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2343 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2345 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2347 * interp.c (ifetch16): New function.
2349 * sim-main.h (IMEM32): Rename IMEM.
2350 (IMEM16_IMMED): Define.
2352 (DELAY_SLOT): Update.
2354 * m16run.c (sim_engine_run): New file.
2356 * m16.igen: All instructions except LB.
2357 (LB): Call do_load_byte.
2358 * mips.igen (do_load_byte): New function.
2359 (LB): Call do_load_byte.
2361 * mips.igen: Move spec for insn bit size and high bit from here.
2362 * Makefile.in (tmp-igen, tmp-m16): To here.
2364 * m16.dc: New file, decode mips16 instructions.
2366 * Makefile.in (SIM_NO_ALL): Define.
2367 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2369 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2371 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2372 point unit to 32 bit registers.
2373 * configure: Re-generate.
2375 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2377 * configure.in (sim_use_gen): Make IGEN the default simulator
2378 generator for generic 32 and 64 bit mips targets.
2379 * configure: Re-generate.
2381 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2383 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2386 * interp.c (sim_fetch_register, sim_store_register): Read/write
2387 FGR from correct location.
2388 (sim_open): Set size of FGR's according to
2389 WITH_TARGET_FLOATING_POINT_BITSIZE.
2391 * sim-main.h (FGR): Store floating point registers in a separate
2394 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2396 * configure: Regenerated to track ../common/aclocal.m4 changes.
2398 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2400 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2402 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2404 * interp.c (pending_tick): New function. Deliver pending writes.
2406 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2407 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2408 it can handle mixed sized quantites and single bits.
2410 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2412 * interp.c (oengine.h): Do not include when building with IGEN.
2413 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2414 (sim_info): Ditto for PROCESSOR_64BIT.
2415 (sim_monitor): Replace ut_reg with unsigned_word.
2416 (*): Ditto for t_reg.
2417 (LOADDRMASK): Define.
2418 (sim_open): Remove defunct check that host FP is IEEE compliant,
2419 using software to emulate floating point.
2420 (value_fpr, ...): Always compile, was conditional on HASFPU.
2422 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2424 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2427 * interp.c (SD, CPU): Define.
2428 (mips_option_handler): Set flags in each CPU.
2429 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2430 (sim_close): Do not clear STATE, deleted anyway.
2431 (sim_write, sim_read): Assume CPU zero's vm should be used for
2433 (sim_create_inferior): Set the PC for all processors.
2434 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2436 (mips16_entry): Pass correct nr of args to store_word, load_word.
2437 (ColdReset): Cold reset all cpu's.
2438 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2439 (sim_monitor, load_memory, store_memory, signal_exception): Use
2440 `CPU' instead of STATE_CPU.
2443 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2446 * sim-main.h (signal_exception): Add sim_cpu arg.
2447 (SignalException*): Pass both SD and CPU to signal_exception.
2448 * interp.c (signal_exception): Update.
2450 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2452 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2453 address_translation): Ditto
2454 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2456 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2458 * configure: Regenerated to track ../common/aclocal.m4 changes.
2460 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2462 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2464 * mips.igen (model): Map processor names onto BFD name.
2466 * sim-main.h (CPU_CIA): Delete.
2467 (SET_CIA, GET_CIA): Define
2469 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2471 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2474 * configure.in (default_endian): Configure a big-endian simulator
2476 * configure: Re-generate.
2478 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2480 * configure: Regenerated to track ../common/aclocal.m4 changes.
2482 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2484 * interp.c (sim_monitor): Handle Densan monitor outbyte
2485 and inbyte functions.
2487 1997-12-29 Felix Lee <flee@cygnus.com>
2489 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2491 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2493 * Makefile.in (tmp-igen): Arrange for $zero to always be
2494 reset to zero after every instruction.
2496 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2498 * configure: Regenerated to track ../common/aclocal.m4 changes.
2501 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2503 * mips.igen (MSUB): Fix to work like MADD.
2504 * gencode.c (MSUB): Similarly.
2506 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2508 * configure: Regenerated to track ../common/aclocal.m4 changes.
2510 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2512 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2514 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2516 * sim-main.h (sim-fpu.h): Include.
2518 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2519 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2520 using host independant sim_fpu module.
2522 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2524 * interp.c (signal_exception): Report internal errors with SIGABRT
2527 * sim-main.h (C0_CONFIG): New register.
2528 (signal.h): No longer include.
2530 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2532 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2534 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2536 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2538 * mips.igen: Tag vr5000 instructions.
2539 (ANDI): Was missing mipsIV model, fix assembler syntax.
2540 (do_c_cond_fmt): New function.
2541 (C.cond.fmt): Handle mips I-III which do not support CC field
2543 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2544 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2546 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2547 vr5000 which saves LO in a GPR separatly.
2549 * configure.in (enable-sim-igen): For vr5000, select vr5000
2550 specific instructions.
2551 * configure: Re-generate.
2553 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2555 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2557 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2558 fmt_uninterpreted_64 bit cases to switch. Convert to
2561 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2563 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2564 as specified in IV3.2 spec.
2565 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2567 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2569 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2570 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2571 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2572 PENDING_FILL versions of instructions. Simplify.
2574 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2576 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2578 (MTHI, MFHI): Disable code checking HI-LO.
2580 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2582 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2584 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2586 * gencode.c (build_mips16_operands): Replace IPC with cia.
2588 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2589 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2591 (UndefinedResult): Replace function with macro/function
2593 (sim_engine_run): Don't save PC in IPC.
2595 * sim-main.h (IPC): Delete.
2598 * interp.c (signal_exception, store_word, load_word,
2599 address_translation, load_memory, store_memory, cache_op,
2600 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2601 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2602 current instruction address - cia - argument.
2603 (sim_read, sim_write): Call address_translation directly.
2604 (sim_engine_run): Rename variable vaddr to cia.
2605 (signal_exception): Pass cia to sim_monitor
2607 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2608 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2609 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2611 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2612 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2615 * interp.c (signal_exception): Pass restart address to
2618 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2619 idecode.o): Add dependency.
2621 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2623 (DELAY_SLOT): Update NIA not PC with branch address.
2624 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2626 * mips.igen: Use CIA not PC in branch calculations.
2627 (illegal): Call SignalException.
2628 (BEQ, ADDIU): Fix assembler.
2630 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2632 * m16.igen (JALX): Was missing.
2634 * configure.in (enable-sim-igen): New configuration option.
2635 * configure: Re-generate.
2637 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2639 * interp.c (load_memory, store_memory): Delete parameter RAW.
2640 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2641 bypassing {load,store}_memory.
2643 * sim-main.h (ByteSwapMem): Delete definition.
2645 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2647 * interp.c (sim_do_command, sim_commands): Delete mips specific
2648 commands. Handled by module sim-options.
2650 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2651 (WITH_MODULO_MEMORY): Define.
2653 * interp.c (sim_info): Delete code printing memory size.
2655 * interp.c (mips_size): Nee sim_size, delete function.
2657 (monitor, monitor_base, monitor_size): Delete global variables.
2658 (sim_open, sim_close): Delete code creating monitor and other
2659 memory regions. Use sim-memopts module, via sim_do_commandf, to
2660 manage memory regions.
2661 (load_memory, store_memory): Use sim-core for memory model.
2663 * interp.c (address_translation): Delete all memory map code
2664 except line forcing 32 bit addresses.
2666 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2668 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2671 * interp.c (logfh, logfile): Delete globals.
2672 (sim_open, sim_close): Delete code opening & closing log file.
2673 (mips_option_handler): Delete -l and -n options.
2674 (OPTION mips_options): Ditto.
2676 * interp.c (OPTION mips_options): Rename option trace to dinero.
2677 (mips_option_handler): Update.
2679 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2681 * interp.c (fetch_str): New function.
2682 (sim_monitor): Rewrite using sim_read & sim_write.
2683 (sim_open): Check magic number.
2684 (sim_open): Write monitor vectors into memory using sim_write.
2685 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2686 (sim_read, sim_write): Simplify - transfer data one byte at a
2688 (load_memory, store_memory): Clarify meaning of parameter RAW.
2690 * sim-main.h (isHOST): Defete definition.
2691 (isTARGET): Mark as depreciated.
2692 (address_translation): Delete parameter HOST.
2694 * interp.c (address_translation): Delete parameter HOST.
2696 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2700 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2701 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2703 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2705 * mips.igen: Add model filter field to records.
2707 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2709 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2711 interp.c (sim_engine_run): Do not compile function sim_engine_run
2712 when WITH_IGEN == 1.
2714 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2715 target architecture.
2717 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2718 igen. Replace with configuration variables sim_igen_flags /
2721 * m16.igen: New file. Copy mips16 insns here.
2722 * mips.igen: From here.
2724 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2728 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2730 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2732 * gencode.c (build_instruction): Follow sim_write's lead in using
2733 BigEndianMem instead of !ByteSwapMem.
2735 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2737 * configure.in (sim_gen): Dependent on target, select type of
2738 generator. Always select old style generator.
2740 configure: Re-generate.
2742 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2744 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2745 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2746 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2747 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2748 SIM_@sim_gen@_*, set by autoconf.
2750 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2752 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2754 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2755 CURRENT_FLOATING_POINT instead.
2757 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2758 (address_translation): Raise exception InstructionFetch when
2759 translation fails and isINSTRUCTION.
2761 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2762 sim_engine_run): Change type of of vaddr and paddr to
2764 (address_translation, prefetch, load_memory, store_memory,
2765 cache_op): Change type of vAddr and pAddr to address_word.
2767 * gencode.c (build_instruction): Change type of vaddr and paddr to
2770 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2772 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2773 macro to obtain result of ALU op.
2775 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2777 * interp.c (sim_info): Call profile_print.
2779 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2781 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2783 * sim-main.h (WITH_PROFILE): Do not define, defined in
2784 common/sim-config.h. Use sim-profile module.
2785 (simPROFILE): Delete defintion.
2787 * interp.c (PROFILE): Delete definition.
2788 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2789 (sim_close): Delete code writing profile histogram.
2790 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2792 (sim_engine_run): Delete code profiling the PC.
2794 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2796 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2798 * interp.c (sim_monitor): Make register pointers of type
2801 * sim-main.h: Make registers of type unsigned_word not
2804 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2806 * interp.c (sync_operation): Rename from SyncOperation, make
2807 global, add SD argument.
2808 (prefetch): Rename from Prefetch, make global, add SD argument.
2809 (decode_coproc): Make global.
2811 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2813 * gencode.c (build_instruction): Generate DecodeCoproc not
2814 decode_coproc calls.
2816 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2817 (SizeFGR): Move to sim-main.h
2818 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2819 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2820 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2822 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2823 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2824 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2825 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2826 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2827 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2829 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2831 (sim-alu.h): Include.
2832 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2833 (sim_cia): Typedef to instruction_address.
2835 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2837 * Makefile.in (interp.o): Rename generated file engine.c to
2842 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2844 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2846 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2848 * gencode.c (build_instruction): For "FPSQRT", output correct
2849 number of arguments to Recip.
2851 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2853 * Makefile.in (interp.o): Depends on sim-main.h
2855 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2857 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2858 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2859 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2860 STATE, DSSTATE): Define
2861 (GPR, FGRIDX, ..): Define.
2863 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2864 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2865 (GPR, FGRIDX, ...): Delete macros.
2867 * interp.c: Update names to match defines from sim-main.h
2869 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2871 * interp.c (sim_monitor): Add SD argument.
2872 (sim_warning): Delete. Replace calls with calls to
2874 (sim_error): Delete. Replace calls with sim_io_error.
2875 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2876 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2877 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2879 (mips_size): Rename from sim_size. Add SD argument.
2881 * interp.c (simulator): Delete global variable.
2882 (callback): Delete global variable.
2883 (mips_option_handler, sim_open, sim_write, sim_read,
2884 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2885 sim_size,sim_monitor): Use sim_io_* not callback->*.
2886 (sim_open): ZALLOC simulator struct.
2887 (PROFILE): Do not define.
2889 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2891 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2892 support.h with corresponding code.
2894 * sim-main.h (word64, uword64), support.h: Move definition to
2896 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2899 * Makefile.in: Update dependencies
2900 * interp.c: Do not include.
2902 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2904 * interp.c (address_translation, load_memory, store_memory,
2905 cache_op): Rename to from AddressTranslation et.al., make global,
2908 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2911 * interp.c (SignalException): Rename to signal_exception, make
2914 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2916 * sim-main.h (SignalException, SignalExceptionInterrupt,
2917 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2918 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2919 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2922 * interp.c, support.h: Use.
2924 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2926 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2927 to value_fpr / store_fpr. Add SD argument.
2928 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2929 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2931 * sim-main.h (ValueFPR, StoreFPR): Define.
2933 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2935 * interp.c (sim_engine_run): Check consistency between configure
2936 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2939 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2940 (mips_fpu): Configure WITH_FLOATING_POINT.
2941 (mips_endian): Configure WITH_TARGET_ENDIAN.
2942 * configure: Update.
2944 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2946 * configure: Regenerated to track ../common/aclocal.m4 changes.
2948 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2950 * configure: Regenerated.
2952 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2954 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2956 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2958 * gencode.c (print_igen_insn_models): Assume certain architectures
2959 include all mips* instructions.
2960 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2963 * Makefile.in (tmp.igen): Add target. Generate igen input from
2966 * gencode.c (FEATURE_IGEN): Define.
2967 (main): Add --igen option. Generate output in igen format.
2968 (process_instructions): Format output according to igen option.
2969 (print_igen_insn_format): New function.
2970 (print_igen_insn_models): New function.
2971 (process_instructions): Only issue warnings and ignore
2972 instructions when no FEATURE_IGEN.
2974 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2976 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2979 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2981 * configure: Regenerated to track ../common/aclocal.m4 changes.
2983 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2985 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2986 SIM_RESERVED_BITS): Delete, moved to common.
2987 (SIM_EXTRA_CFLAGS): Update.
2989 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2991 * configure.in: Configure non-strict memory alignment.
2992 * configure: Regenerated to track ../common/aclocal.m4 changes.
2994 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2996 * configure: Regenerated to track ../common/aclocal.m4 changes.
2998 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3000 * gencode.c (SDBBP,DERET): Added (3900) insns.
3001 (RFE): Turn on for 3900.
3002 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3003 (dsstate): Made global.
3004 (SUBTARGET_R3900): Added.
3005 (CANCELDELAYSLOT): New.
3006 (SignalException): Ignore SystemCall rather than ignore and
3007 terminate. Add DebugBreakPoint handling.
3008 (decode_coproc): New insns RFE, DERET; and new registers Debug
3009 and DEPC protected by SUBTARGET_R3900.
3010 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3012 * Makefile.in,configure.in: Add mips subtarget option.
3013 * configure: Update.
3015 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3017 * gencode.c: Add r3900 (tx39).
3020 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3022 * gencode.c (build_instruction): Don't need to subtract 4 for
3025 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3027 * interp.c: Correct some HASFPU problems.
3029 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3031 * configure: Regenerated to track ../common/aclocal.m4 changes.
3033 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3035 * interp.c (mips_options): Fix samples option short form, should
3038 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3040 * interp.c (sim_info): Enable info code. Was just returning.
3042 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3044 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3047 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3049 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3051 (build_instruction): Ditto for LL.
3053 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3055 * configure: Regenerated to track ../common/aclocal.m4 changes.
3057 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3059 * configure: Regenerated to track ../common/aclocal.m4 changes.
3062 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3064 * interp.c (sim_open): Add call to sim_analyze_program, update
3067 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3069 * interp.c (sim_kill): Delete.
3070 (sim_create_inferior): Add ABFD argument. Set PC from same.
3071 (sim_load): Move code initializing trap handlers from here.
3072 (sim_open): To here.
3073 (sim_load): Delete, use sim-hload.c.
3075 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3077 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3079 * configure: Regenerated to track ../common/aclocal.m4 changes.
3082 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3084 * interp.c (sim_open): Add ABFD argument.
3085 (sim_load): Move call to sim_config from here.
3086 (sim_open): To here. Check return status.
3088 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3090 * gencode.c (build_instruction): Two arg MADD should
3091 not assign result to $0.
3093 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3095 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3096 * sim/mips/configure.in: Regenerate.
3098 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3100 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3101 signed8, unsigned8 et.al. types.
3103 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3104 hosts when selecting subreg.
3106 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3108 * interp.c (sim_engine_run): Reset the ZERO register to zero
3109 regardless of FEATURE_WARN_ZERO.
3110 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3112 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3114 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3115 (SignalException): For BreakPoints ignore any mode bits and just
3117 (SignalException): Always set the CAUSE register.
3119 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3121 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3122 exception has been taken.
3124 * interp.c: Implement the ERET and mt/f sr instructions.
3126 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3128 * interp.c (SignalException): Don't bother restarting an
3131 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3133 * interp.c (SignalException): Really take an interrupt.
3134 (interrupt_event): Only deliver interrupts when enabled.
3136 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3138 * interp.c (sim_info): Only print info when verbose.
3139 (sim_info) Use sim_io_printf for output.
3141 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3143 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3146 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3148 * interp.c (sim_do_command): Check for common commands if a
3149 simulator specific command fails.
3151 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3153 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3154 and simBE when DEBUG is defined.
3156 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3158 * interp.c (interrupt_event): New function. Pass exception event
3159 onto exception handler.
3161 * configure.in: Check for stdlib.h.
3162 * configure: Regenerate.
3164 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3165 variable declaration.
3166 (build_instruction): Initialize memval1.
3167 (build_instruction): Add UNUSED attribute to byte, bigend,
3169 (build_operands): Ditto.
3171 * interp.c: Fix GCC warnings.
3172 (sim_get_quit_code): Delete.
3174 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3175 * Makefile.in: Ditto.
3176 * configure: Re-generate.
3178 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3180 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3182 * interp.c (mips_option_handler): New function parse argumes using
3184 (myname): Replace with STATE_MY_NAME.
3185 (sim_open): Delete check for host endianness - performed by
3187 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3188 (sim_open): Move much of the initialization from here.
3189 (sim_load): To here. After the image has been loaded and
3191 (sim_open): Move ColdReset from here.
3192 (sim_create_inferior): To here.
3193 (sim_open): Make FP check less dependant on host endianness.
3195 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3197 * interp.c (sim_set_callbacks): Delete.
3199 * interp.c (membank, membank_base, membank_size): Replace with
3200 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3201 (sim_open): Remove call to callback->init. gdb/run do this.
3205 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3207 * interp.c (big_endian_p): Delete, replaced by
3208 current_target_byte_order.
3210 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3212 * interp.c (host_read_long, host_read_word, host_swap_word,
3213 host_swap_long): Delete. Using common sim-endian.
3214 (sim_fetch_register, sim_store_register): Use H2T.
3215 (pipeline_ticks): Delete. Handled by sim-events.
3217 (sim_engine_run): Update.
3219 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3221 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3223 (SignalException): To here. Signal using sim_engine_halt.
3224 (sim_stop_reason): Delete, moved to common.
3226 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3228 * interp.c (sim_open): Add callback argument.
3229 (sim_set_callbacks): Delete SIM_DESC argument.
3232 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3234 * Makefile.in (SIM_OBJS): Add common modules.
3236 * interp.c (sim_set_callbacks): Also set SD callback.
3237 (set_endianness, xfer_*, swap_*): Delete.
3238 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3239 Change to functions using sim-endian macros.
3240 (control_c, sim_stop): Delete, use common version.
3241 (simulate): Convert into.
3242 (sim_engine_run): This function.
3243 (sim_resume): Delete.
3245 * interp.c (simulation): New variable - the simulator object.
3246 (sim_kind): Delete global - merged into simulation.
3247 (sim_load): Cleanup. Move PC assignment from here.
3248 (sim_create_inferior): To here.
3250 * sim-main.h: New file.
3251 * interp.c (sim-main.h): Include.
3253 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3255 * configure: Regenerated to track ../common/aclocal.m4 changes.
3257 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3259 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3261 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3263 * gencode.c (build_instruction): DIV instructions: check
3264 for division by zero and integer overflow before using
3265 host's division operation.
3267 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3269 * Makefile.in (SIM_OBJS): Add sim-load.o.
3270 * interp.c: #include bfd.h.
3271 (target_byte_order): Delete.
3272 (sim_kind, myname, big_endian_p): New static locals.
3273 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3274 after argument parsing. Recognize -E arg, set endianness accordingly.
3275 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3276 load file into simulator. Set PC from bfd.
3277 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3278 (set_endianness): Use big_endian_p instead of target_byte_order.
3280 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3282 * interp.c (sim_size): Delete prototype - conflicts with
3283 definition in remote-sim.h. Correct definition.
3285 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3287 * configure: Regenerated to track ../common/aclocal.m4 changes.
3290 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3292 * interp.c (sim_open): New arg `kind'.
3294 * configure: Regenerated to track ../common/aclocal.m4 changes.
3296 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3298 * configure: Regenerated to track ../common/aclocal.m4 changes.
3300 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3302 * interp.c (sim_open): Set optind to 0 before calling getopt.
3304 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3306 * configure: Regenerated to track ../common/aclocal.m4 changes.
3308 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3310 * interp.c : Replace uses of pr_addr with pr_uword64
3311 where the bit length is always 64 independent of SIM_ADDR.
3312 (pr_uword64) : added.
3314 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3316 * configure: Re-generate.
3318 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3320 * configure: Regenerate to track ../common/aclocal.m4 changes.
3322 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3324 * interp.c (sim_open): New SIM_DESC result. Argument is now
3326 (other sim_*): New SIM_DESC argument.
3328 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3330 * interp.c: Fix printing of addresses for non-64-bit targets.
3331 (pr_addr): Add function to print address based on size.
3333 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3335 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3337 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3339 * gencode.c (build_mips16_operands): Correct computation of base
3340 address for extended PC relative instruction.
3342 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3344 * interp.c (mips16_entry): Add support for floating point cases.
3345 (SignalException): Pass floating point cases to mips16_entry.
3346 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3348 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3350 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3351 and then set the state to fmt_uninterpreted.
3352 (COP_SW): Temporarily set the state to fmt_word while calling
3355 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3357 * gencode.c (build_instruction): The high order may be set in the
3358 comparison flags at any ISA level, not just ISA 4.
3360 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3362 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3363 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3364 * configure.in: sinclude ../common/aclocal.m4.
3365 * configure: Regenerated.
3367 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3369 * configure: Rebuild after change to aclocal.m4.
3371 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3373 * configure configure.in Makefile.in: Update to new configure
3374 scheme which is more compatible with WinGDB builds.
3375 * configure.in: Improve comment on how to run autoconf.
3376 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3377 * Makefile.in: Use autoconf substitution to install common
3380 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3382 * gencode.c (build_instruction): Use BigEndianCPU instead of
3385 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3387 * interp.c (sim_monitor): Make output to stdout visible in
3388 wingdb's I/O log window.
3390 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3392 * support.h: Undo previous change to SIGTRAP
3395 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3397 * interp.c (store_word, load_word): New static functions.
3398 (mips16_entry): New static function.
3399 (SignalException): Look for mips16 entry and exit instructions.
3400 (simulate): Use the correct index when setting fpr_state after
3401 doing a pending move.
3403 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3405 * interp.c: Fix byte-swapping code throughout to work on
3406 both little- and big-endian hosts.
3408 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3410 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3411 with gdb/config/i386/xm-windows.h.
3413 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3415 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3416 that messes up arithmetic shifts.
3418 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3420 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3421 SIGTRAP and SIGQUIT for _WIN32.
3423 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3425 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3426 force a 64 bit multiplication.
3427 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3428 destination register is 0, since that is the default mips16 nop
3431 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3433 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3434 (build_endian_shift): Don't check proc64.
3435 (build_instruction): Always set memval to uword64. Cast op2 to
3436 uword64 when shifting it left in memory instructions. Always use
3437 the same code for stores--don't special case proc64.
3439 * gencode.c (build_mips16_operands): Fix base PC value for PC
3441 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3443 * interp.c (simJALDELAYSLOT): Define.
3444 (JALDELAYSLOT): Define.
3445 (INDELAYSLOT, INJALDELAYSLOT): Define.
3446 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3448 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3450 * interp.c (sim_open): add flush_cache as a PMON routine
3451 (sim_monitor): handle flush_cache by ignoring it
3453 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3455 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3457 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3458 (BigEndianMem): Rename to ByteSwapMem and change sense.
3459 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3460 BigEndianMem references to !ByteSwapMem.
3461 (set_endianness): New function, with prototype.
3462 (sim_open): Call set_endianness.
3463 (sim_info): Use simBE instead of BigEndianMem.
3464 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3465 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3466 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3467 ifdefs, keeping the prototype declaration.
3468 (swap_word): Rewrite correctly.
3469 (ColdReset): Delete references to CONFIG. Delete endianness related
3470 code; moved to set_endianness.
3472 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3474 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3475 * interp.c (CHECKHILO): Define away.
3476 (simSIGINT): New macro.
3477 (membank_size): Increase from 1MB to 2MB.
3478 (control_c): New function.
3479 (sim_resume): Rename parameter signal to signal_number. Add local
3480 variable prev. Call signal before and after simulate.
3481 (sim_stop_reason): Add simSIGINT support.
3482 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3484 (sim_warning): Delete call to SignalException. Do call printf_filtered
3486 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3487 a call to sim_warning.
3489 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3491 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3492 16 bit instructions.
3494 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3496 Add support for mips16 (16 bit MIPS implementation):
3497 * gencode.c (inst_type): Add mips16 instruction encoding types.
3498 (GETDATASIZEINSN): Define.
3499 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3500 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3502 (MIPS16_DECODE): New table, for mips16 instructions.
3503 (bitmap_val): New static function.
3504 (struct mips16_op): Define.
3505 (mips16_op_table): New table, for mips16 operands.
3506 (build_mips16_operands): New static function.
3507 (process_instructions): If PC is odd, decode a mips16
3508 instruction. Break out instruction handling into new
3509 build_instruction function.
3510 (build_instruction): New static function, broken out of
3511 process_instructions. Check modifiers rather than flags for SHIFT
3512 bit count and m[ft]{hi,lo} direction.
3513 (usage): Pass program name to fprintf.
3514 (main): Remove unused variable this_option_optind. Change
3515 ``*loptarg++'' to ``loptarg++''.
3516 (my_strtoul): Parenthesize && within ||.
3517 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3518 (simulate): If PC is odd, fetch a 16 bit instruction, and
3519 increment PC by 2 rather than 4.
3520 * configure.in: Add case for mips16*-*-*.
3521 * configure: Rebuild.
3523 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3525 * interp.c: Allow -t to enable tracing in standalone simulator.
3526 Fix garbage output in trace file and error messages.
3528 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3530 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3531 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3532 * configure.in: Simplify using macros in ../common/aclocal.m4.
3533 * configure: Regenerated.
3534 * tconfig.in: New file.
3536 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3538 * interp.c: Fix bugs in 64-bit port.
3539 Use ansi function declarations for msvc compiler.
3540 Initialize and test file pointer in trace code.
3541 Prevent duplicate definition of LAST_EMED_REGNUM.
3543 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3545 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3547 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3549 * interp.c (SignalException): Check for explicit terminating
3551 * gencode.c: Pass instruction value through SignalException()
3552 calls for Trap, Breakpoint and Syscall.
3554 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3556 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3557 only used on those hosts that provide it.
3558 * configure.in: Add sqrt() to list of functions to be checked for.
3559 * config.in: Re-generated.
3560 * configure: Re-generated.
3562 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3564 * gencode.c (process_instructions): Call build_endian_shift when
3565 expanding STORE RIGHT, to fix swr.
3566 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3567 clear the high bits.
3568 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3569 Fix float to int conversions to produce signed values.
3571 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3573 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3574 (process_instructions): Correct handling of nor instruction.
3575 Correct shift count for 32 bit shift instructions. Correct sign
3576 extension for arithmetic shifts to not shift the number of bits in
3577 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3578 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3580 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3581 It's OK to have a mult follow a mult. What's not OK is to have a
3582 mult follow an mfhi.
3583 (Convert): Comment out incorrect rounding code.
3585 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3587 * interp.c (sim_monitor): Improved monitor printf
3588 simulation. Tidied up simulator warnings, and added "--log" option
3589 for directing warning message output.
3590 * gencode.c: Use sim_warning() rather than WARNING macro.
3592 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3594 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3595 getopt1.o, rather than on gencode.c. Link objects together.
3596 Don't link against -liberty.
3597 (gencode.o, getopt.o, getopt1.o): New targets.
3598 * gencode.c: Include <ctype.h> and "ansidecl.h".
3599 (AND): Undefine after including "ansidecl.h".
3600 (ULONG_MAX): Define if not defined.
3601 (OP_*): Don't define macros; now defined in opcode/mips.h.
3602 (main): Call my_strtoul rather than strtoul.
3603 (my_strtoul): New static function.
3605 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3607 * gencode.c (process_instructions): Generate word64 and uword64
3608 instead of `long long' and `unsigned long long' data types.
3609 * interp.c: #include sysdep.h to get signals, and define default
3611 * (Convert): Work around for Visual-C++ compiler bug with type
3613 * support.h: Make things compile under Visual-C++ by using
3614 __int64 instead of `long long'. Change many refs to long long
3615 into word64/uword64 typedefs.
3617 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3619 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3620 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3622 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3623 (AC_PROG_INSTALL): Added.
3624 (AC_PROG_CC): Moved to before configure.host call.
3625 * configure: Rebuilt.
3627 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3629 * configure.in: Define @SIMCONF@ depending on mips target.
3630 * configure: Rebuild.
3631 * Makefile.in (run): Add @SIMCONF@ to control simulator
3633 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3634 * interp.c: Remove some debugging, provide more detailed error
3635 messages, update memory accesses to use LOADDRMASK.
3637 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3639 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3640 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3642 * configure: Rebuild.
3643 * config.in: New file, generated by autoheader.
3644 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3645 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3646 HAVE_ANINT and HAVE_AINT, as appropriate.
3647 * Makefile.in (run): Use @LIBS@ rather than -lm.
3648 (interp.o): Depend upon config.h.
3649 (Makefile): Just rebuild Makefile.
3650 (clean): Remove stamp-h.
3651 (mostlyclean): Make the same as clean, not as distclean.
3652 (config.h, stamp-h): New targets.
3654 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3656 * interp.c (ColdReset): Fix boolean test. Make all simulator
3659 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3661 * interp.c (xfer_direct_word, xfer_direct_long,
3662 swap_direct_word, swap_direct_long, xfer_big_word,
3663 xfer_big_long, xfer_little_word, xfer_little_long,
3664 swap_word,swap_long): Added.
3665 * interp.c (ColdReset): Provide function indirection to
3666 host<->simulated_target transfer routines.
3667 * interp.c (sim_store_register, sim_fetch_register): Updated to
3668 make use of indirected transfer routines.
3670 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3672 * gencode.c (process_instructions): Ensure FP ABS instruction
3674 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3675 system call support.
3677 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3679 * interp.c (sim_do_command): Complain if callback structure not
3682 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3684 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3685 support for Sun hosts.
3686 * Makefile.in (gencode): Ensure the host compiler and libraries
3687 used for cross-hosted build.
3689 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3691 * interp.c, gencode.c: Some more (TODO) tidying.
3693 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3695 * gencode.c, interp.c: Replaced explicit long long references with
3696 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3697 * support.h (SET64LO, SET64HI): Macros added.
3699 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3701 * configure: Regenerate with autoconf 2.7.
3703 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3705 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3706 * support.h: Remove superfluous "1" from #if.
3707 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3709 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3711 * interp.c (StoreFPR): Control UndefinedResult() call on
3712 WARN_RESULT manifest.
3714 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3716 * gencode.c: Tidied instruction decoding, and added FP instruction
3719 * interp.c: Added dineroIII, and BSD profiling support. Also
3720 run-time FP handling.
3722 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3724 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3725 gencode.c, interp.c, support.h: created.