1 2015-12-24 Mike Frysinger <vapier@gentoo.org>
3 * sim-main.h (WITH_WATCHPOINTS): Delete.
5 2015-12-24 Mike Frysinger <vapier@gentoo.org>
7 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
9 2015-12-24 Mike Frysinger <vapier@gentoo.org>
11 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
13 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
15 * micromips.igen (process_isa_mode): Fix left shift of negative
18 2015-11-17 Mike Frysinger <vapier@gentoo.org>
20 * sim-main.h (WITH_MODULO_MEMORY): Delete.
22 2015-11-15 Mike Frysinger <vapier@gentoo.org>
24 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
26 2015-11-14 Mike Frysinger <vapier@gentoo.org>
28 * interp.c (sim_close): Rename to ...
29 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
31 * sim-main.h (mips_sim_close): Declare.
32 (SIM_CLOSE_HOOK): Define.
34 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
35 Ali Lown <ali.lown@imgtec.com>
37 * Makefile.in (tmp-micromips): New rule.
38 (tmp-mach-multi): Add support for micromips.
39 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
40 that works for both mips64 and micromips64.
41 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
43 Add build support for micromips.
44 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
45 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
46 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
47 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
48 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
49 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
50 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
51 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
52 Refactored instruction code to use these functions.
53 * dsp2.igen: Refactored instruction code to use the new functions.
54 * interp.c (decode_coproc): Refactored to work with any instruction
56 (isa_mode): New variable
57 (RSVD_INSTRUCTION): Changed to 0x00000039.
58 * m16.igen (BREAK16): Refactored instruction to use do_break16.
59 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
60 * micromips.dc: New file.
61 * micromips.igen: New file.
62 * micromips16.dc: New file.
63 * micromipsdsp.igen: New file.
64 * micromipsrun.c: New file.
65 * mips.igen (do_swc1): Changed to work with any instruction encoding.
66 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
67 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
68 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
69 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
70 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
71 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
72 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
73 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
74 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
75 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
76 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
77 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
78 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
79 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
80 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
81 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
82 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
83 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
85 Refactored instruction code to use these functions.
86 (RSVD): Changed to use new reserved instruction.
87 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
88 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
89 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
90 do_store_double): Added micromips32 and micromips64 models.
91 Added include for micromips.igen and micromipsdsp.igen
92 Add micromips32 and micromips64 models.
93 (DecodeCoproc): Updated to use new macro definition.
94 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
95 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
96 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
97 Refactored instruction code to use these functions.
98 * sim-main.h (CP0_operation): New enum.
99 (DecodeCoproc): Updated macro.
100 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
101 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
102 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
103 ISA_MODE_MICROMIPS): New defines.
104 (sim_state): Add isa_mode field.
106 2015-06-23 Mike Frysinger <vapier@gentoo.org>
108 * configure: Regenerate.
110 2015-06-12 Mike Frysinger <vapier@gentoo.org>
112 * configure.ac: Change configure.in to configure.ac.
113 * configure: Regenerate.
115 2015-06-12 Mike Frysinger <vapier@gentoo.org>
117 * configure: Regenerate.
119 2015-06-12 Mike Frysinger <vapier@gentoo.org>
121 * interp.c [TRACE]: Delete.
122 (TRACE): Change to WITH_TRACE_ANY_P.
123 [!WITH_TRACE_ANY_P] (open_trace): Define.
124 (mips_option_handler, open_trace, sim_close, dotrace):
125 Change defined(TRACE) to WITH_TRACE_ANY_P.
126 (sim_open): Delete TRACE ifdef check.
127 * sim-main.c (load_memory): Delete TRACE ifdef check.
128 (store_memory): Likewise.
129 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
130 [!WITH_TRACE_ANY_P] (dotrace): Define.
132 2015-04-18 Mike Frysinger <vapier@gentoo.org>
134 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
137 2015-04-18 Mike Frysinger <vapier@gentoo.org>
139 * sim-main.h (SIM_CPU): Delete.
141 2015-04-18 Mike Frysinger <vapier@gentoo.org>
143 * sim-main.h (sim_cia): Delete.
145 2015-04-17 Mike Frysinger <vapier@gentoo.org>
147 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
149 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
150 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
151 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
152 CIA_SET to CPU_PC_SET.
153 * sim-main.h (CIA_GET, CIA_SET): Delete.
155 2015-04-15 Mike Frysinger <vapier@gentoo.org>
157 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
158 * sim-main.h (STATE_CPU): Delete.
160 2015-04-13 Mike Frysinger <vapier@gentoo.org>
162 * configure: Regenerate.
164 2015-04-13 Mike Frysinger <vapier@gentoo.org>
166 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
167 * interp.c (mips_pc_get, mips_pc_set): New functions.
168 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
169 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
170 (sim_pc_get): Delete.
171 * sim-main.h (SIM_CPU): Define.
172 (struct sim_state): Change cpu to an array of pointers.
175 2015-04-13 Mike Frysinger <vapier@gentoo.org>
177 * interp.c (mips_option_handler, open_trace, sim_close,
178 sim_write, sim_read, sim_store_register, sim_fetch_register,
179 sim_create_inferior, pr_addr, pr_uword64): Convert old style
181 (sim_open): Convert old style prototype. Change casts with
182 sim_write to unsigned char *.
183 (fetch_str): Change null to unsigned char, and change cast to
185 (sim_monitor): Change c & ch to unsigned char. Change cast to
188 2015-04-12 Mike Frysinger <vapier@gentoo.org>
190 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
192 2015-04-06 Mike Frysinger <vapier@gentoo.org>
194 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
196 2015-04-01 Mike Frysinger <vapier@gentoo.org>
198 * tconfig.h (SIM_HAVE_PROFILE): Delete.
200 2015-03-31 Mike Frysinger <vapier@gentoo.org>
202 * config.in, configure: Regenerate.
204 2015-03-24 Mike Frysinger <vapier@gentoo.org>
206 * interp.c (sim_pc_get): New function.
208 2015-03-24 Mike Frysinger <vapier@gentoo.org>
210 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
211 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
213 2015-03-24 Mike Frysinger <vapier@gentoo.org>
215 * configure: Regenerate.
217 2015-03-23 Mike Frysinger <vapier@gentoo.org>
219 * configure: Regenerate.
221 2015-03-23 Mike Frysinger <vapier@gentoo.org>
223 * configure: Regenerate.
224 * configure.ac (mips_extra_objs): Delete.
225 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
226 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
228 2015-03-23 Mike Frysinger <vapier@gentoo.org>
230 * configure: Regenerate.
231 * configure.ac: Delete sim_hw checks for dv-sockser.
233 2015-03-16 Mike Frysinger <vapier@gentoo.org>
235 * config.in, configure: Regenerate.
236 * tconfig.in: Rename file ...
237 * tconfig.h: ... here.
239 2015-03-15 Mike Frysinger <vapier@gentoo.org>
241 * tconfig.in: Delete includes.
242 [HAVE_DV_SOCKSER]: Delete.
244 2015-03-14 Mike Frysinger <vapier@gentoo.org>
246 * Makefile.in (SIM_RUN_OBJS): Delete.
248 2015-03-14 Mike Frysinger <vapier@gentoo.org>
250 * configure.ac (AC_CHECK_HEADERS): Delete.
251 * aclocal.m4, configure: Regenerate.
253 2014-08-19 Alan Modra <amodra@gmail.com>
255 * configure: Regenerate.
257 2014-08-15 Roland McGrath <mcgrathr@google.com>
259 * configure: Regenerate.
260 * config.in: Regenerate.
262 2014-03-04 Mike Frysinger <vapier@gentoo.org>
264 * configure: Regenerate.
266 2013-09-23 Alan Modra <amodra@gmail.com>
268 * configure: Regenerate.
270 2013-06-03 Mike Frysinger <vapier@gentoo.org>
272 * aclocal.m4, configure: Regenerate.
274 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
276 * configure: Rebuild.
278 2013-03-26 Mike Frysinger <vapier@gentoo.org>
280 * configure: Regenerate.
282 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
284 * configure.ac: Address use of dv-sockser.o.
285 * tconfig.in: Conditionalize use of dv_sockser_install.
286 * configure: Regenerated.
287 * config.in: Regenerated.
289 2012-10-04 Chao-ying Fu <fu@mips.com>
290 Steve Ellcey <sellcey@mips.com>
292 * mips/mips3264r2.igen (rdhwr): New.
294 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
296 * configure.ac: Always link against dv-sockser.o.
297 * configure: Regenerate.
299 2012-06-15 Joel Brobecker <brobecker@adacore.com>
301 * config.in, configure: Regenerate.
303 2012-05-18 Nick Clifton <nickc@redhat.com>
306 * interp.c: Include config.h before system header files.
308 2012-03-24 Mike Frysinger <vapier@gentoo.org>
310 * aclocal.m4, config.in, configure: Regenerate.
312 2011-12-03 Mike Frysinger <vapier@gentoo.org>
314 * aclocal.m4: New file.
315 * configure: Regenerate.
317 2011-10-19 Mike Frysinger <vapier@gentoo.org>
319 * configure: Regenerate after common/acinclude.m4 update.
321 2011-10-17 Mike Frysinger <vapier@gentoo.org>
323 * configure.ac: Change include to common/acinclude.m4.
325 2011-10-17 Mike Frysinger <vapier@gentoo.org>
327 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
328 call. Replace common.m4 include with SIM_AC_COMMON.
329 * configure: Regenerate.
331 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
333 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
335 (tmp-mach-multi): Exit early when igen fails.
337 2011-07-05 Mike Frysinger <vapier@gentoo.org>
339 * interp.c (sim_do_command): Delete.
341 2011-02-14 Mike Frysinger <vapier@gentoo.org>
343 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
344 (tx3904sio_fifo_reset): Likewise.
345 * interp.c (sim_monitor): Likewise.
347 2010-04-14 Mike Frysinger <vapier@gentoo.org>
349 * interp.c (sim_write): Add const to buffer arg.
351 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
353 * interp.c: Don't include sysdep.h
355 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
357 * configure: Regenerate.
359 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
361 * config.in: Regenerate.
362 * configure: Likewise.
364 * configure: Regenerate.
366 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
368 * configure: Regenerate to track ../common/common.m4 changes.
371 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
372 Daniel Jacobowitz <dan@codesourcery.com>
373 Joseph Myers <joseph@codesourcery.com>
375 * configure: Regenerate.
377 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
379 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
380 that unconditionally allows fmt_ps.
381 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
382 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
383 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
384 filter from 64,f to 32,f.
385 (PREFX): Change filter from 64 to 32.
386 (LDXC1, LUXC1): Provide separate mips32r2 implementations
387 that use do_load_double instead of do_load. Make both LUXC1
388 versions unpredictable if SizeFGR () != 64.
389 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
390 instead of do_store. Remove unused variable. Make both SUXC1
391 versions unpredictable if SizeFGR () != 64.
393 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
395 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
396 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
397 shifts for that case.
399 2007-09-04 Nick Clifton <nickc@redhat.com>
401 * interp.c (options enum): Add OPTION_INFO_MEMORY.
402 (display_mem_info): New static variable.
403 (mips_option_handler): Handle OPTION_INFO_MEMORY.
404 (mips_options): Add info-memory and memory-info.
405 (sim_open): After processing the command line and board
406 specification, check display_mem_info. If it is set then
407 call the real handler for the --memory-info command line
410 2007-08-24 Joel Brobecker <brobecker@adacore.com>
412 * configure.ac: Change license of multi-run.c to GPL version 3.
413 * configure: Regenerate.
415 2007-06-28 Richard Sandiford <richard@codesourcery.com>
417 * configure.ac, configure: Revert last patch.
419 2007-06-26 Richard Sandiford <richard@codesourcery.com>
421 * configure.ac (sim_mipsisa3264_configs): New variable.
422 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
423 every configuration support all four targets, using the triplet to
424 determine the default.
425 * configure: Regenerate.
427 2007-06-25 Richard Sandiford <richard@codesourcery.com>
429 * Makefile.in (m16run.o): New rule.
431 2007-05-15 Thiemo Seufer <ths@mips.com>
433 * mips3264r2.igen (DSHD): Fix compile warning.
435 2007-05-14 Thiemo Seufer <ths@mips.com>
437 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
438 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
439 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
440 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
443 2007-03-01 Thiemo Seufer <ths@mips.com>
445 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
448 2007-02-20 Thiemo Seufer <ths@mips.com>
450 * dsp.igen: Update copyright notice.
451 * dsp2.igen: Fix copyright notice.
453 2007-02-20 Thiemo Seufer <ths@mips.com>
454 Chao-Ying Fu <fu@mips.com>
456 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
457 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
458 Add dsp2 to sim_igen_machine.
459 * configure: Regenerate.
460 * dsp.igen (do_ph_op): Add MUL support when op = 2.
461 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
462 (mulq_rs.ph): Use do_ph_mulq.
463 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
464 * mips.igen: Add dsp2 model and include dsp2.igen.
465 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
466 for *mips32r2, *mips64r2, *dsp.
467 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
468 for *mips32r2, *mips64r2, *dsp2.
469 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
471 2007-02-19 Thiemo Seufer <ths@mips.com>
472 Nigel Stephens <nigel@mips.com>
474 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
475 jumps with hazard barrier.
477 2007-02-19 Thiemo Seufer <ths@mips.com>
478 Nigel Stephens <nigel@mips.com>
480 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
481 after each call to sim_io_write.
483 2007-02-19 Thiemo Seufer <ths@mips.com>
484 Nigel Stephens <nigel@mips.com>
486 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
487 supported by this simulator.
488 (decode_coproc): Recognise additional CP0 Config registers
491 2007-02-19 Thiemo Seufer <ths@mips.com>
492 Nigel Stephens <nigel@mips.com>
493 David Ung <davidu@mips.com>
495 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
496 uninterpreted formats. If fmt is one of the uninterpreted types
497 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
498 fmt_word, and fmt_uninterpreted_64 like fmt_long.
499 (store_fpr): When writing an invalid odd register, set the
500 matching even register to fmt_unknown, not the following register.
501 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
502 the the memory window at offset 0 set by --memory-size command
504 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
506 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
508 (sim_monitor): When returning the memory size to the MIPS
509 application, use the value in STATE_MEM_SIZE, not an arbitrary
511 (cop_lw): Don' mess around with FPR_STATE, just pass
512 fmt_uninterpreted_32 to StoreFPR.
514 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
516 * mips.igen (not_word_value): Single version for mips32, mips64
519 2007-02-19 Thiemo Seufer <ths@mips.com>
520 Nigel Stephens <nigel@mips.com>
522 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
525 2007-02-17 Thiemo Seufer <ths@mips.com>
527 * configure.ac (mips*-sde-elf*): Move in front of generic machine
529 * configure: Regenerate.
531 2007-02-17 Thiemo Seufer <ths@mips.com>
533 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
534 Add mdmx to sim_igen_machine.
535 (mipsisa64*-*-*): Likewise. Remove dsp.
536 (mipsisa32*-*-*): Remove dsp.
537 * configure: Regenerate.
539 2007-02-13 Thiemo Seufer <ths@mips.com>
541 * configure.ac: Add mips*-sde-elf* target.
542 * configure: Regenerate.
544 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
546 * acconfig.h: Remove.
547 * config.in, configure: Regenerate.
549 2006-11-07 Thiemo Seufer <ths@mips.com>
551 * dsp.igen (do_w_op): Fix compiler warning.
553 2006-08-29 Thiemo Seufer <ths@mips.com>
554 David Ung <davidu@mips.com>
556 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
558 * configure: Regenerate.
559 * mips.igen (model): Add smartmips.
560 (MADDU): Increment ACX if carry.
561 (do_mult): Clear ACX.
562 (ROR,RORV): Add smartmips.
563 (include): Include smartmips.igen.
564 * sim-main.h (ACX): Set to REGISTERS[89].
565 * smartmips.igen: New file.
567 2006-08-29 Thiemo Seufer <ths@mips.com>
568 David Ung <davidu@mips.com>
570 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
571 mips3264r2.igen. Add missing dependency rules.
572 * m16e.igen: Support for mips16e save/restore instructions.
574 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
576 * configure: Regenerated.
578 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
580 * configure: Regenerated.
582 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
584 * configure: Regenerated.
586 2006-05-15 Chao-ying Fu <fu@mips.com>
588 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
590 2006-04-18 Nick Clifton <nickc@redhat.com>
592 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
595 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
597 * configure: Regenerate.
599 2005-12-14 Chao-ying Fu <fu@mips.com>
601 * Makefile.in (SIM_OBJS): Add dsp.o.
602 (dsp.o): New dependency.
603 (IGEN_INCLUDE): Add dsp.igen.
604 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
605 mipsisa64*-*-*): Add dsp to sim_igen_machine.
606 * configure: Regenerate.
607 * mips.igen: Add dsp model and include dsp.igen.
608 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
609 because these instructions are extended in DSP ASE.
610 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
611 adding 6 DSP accumulator registers and 1 DSP control register.
612 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
613 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
614 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
615 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
616 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
617 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
618 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
619 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
620 DSPCR_CCOND_SMASK): New define.
621 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
622 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
624 2005-07-08 Ian Lance Taylor <ian@airs.com>
626 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
628 2005-06-16 David Ung <davidu@mips.com>
629 Nigel Stephens <nigel@mips.com>
631 * mips.igen: New mips16e model and include m16e.igen.
632 (check_u64): Add mips16e tag.
633 * m16e.igen: New file for MIPS16e instructions.
634 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
635 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
637 * configure: Regenerate.
639 2005-05-26 David Ung <davidu@mips.com>
641 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
642 tags to all instructions which are applicable to the new ISAs.
643 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
645 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
647 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
649 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
650 * configure: Regenerate.
652 2005-03-23 Mark Kettenis <kettenis@gnu.org>
654 * configure: Regenerate.
656 2005-01-14 Andrew Cagney <cagney@gnu.org>
658 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
659 explicit call to AC_CONFIG_HEADER.
660 * configure: Regenerate.
662 2005-01-12 Andrew Cagney <cagney@gnu.org>
664 * configure.ac: Update to use ../common/common.m4.
665 * configure: Re-generate.
667 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
669 * configure: Regenerated to track ../common/aclocal.m4 changes.
671 2005-01-07 Andrew Cagney <cagney@gnu.org>
673 * configure.ac: Rename configure.in, require autoconf 2.59.
674 * configure: Re-generate.
676 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
678 * configure: Regenerate for ../common/aclocal.m4 update.
680 2004-09-24 Monika Chaddha <monika@acmet.com>
682 Committed by Andrew Cagney.
683 * m16.igen (CMP, CMPI): Fix assembler.
685 2004-08-18 Chris Demetriou <cgd@broadcom.com>
687 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
688 * configure: Regenerate.
690 2004-06-25 Chris Demetriou <cgd@broadcom.com>
692 * configure.in (sim_m16_machine): Include mipsIII.
693 * configure: Regenerate.
695 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
697 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
699 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
701 2004-04-10 Chris Demetriou <cgd@broadcom.com>
703 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
705 2004-04-09 Chris Demetriou <cgd@broadcom.com>
707 * mips.igen (check_fmt): Remove.
708 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
709 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
710 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
711 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
712 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
713 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
714 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
715 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
716 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
717 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
719 2004-04-09 Chris Demetriou <cgd@broadcom.com>
721 * sb1.igen (check_sbx): New function.
722 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
724 2004-03-29 Chris Demetriou <cgd@broadcom.com>
725 Richard Sandiford <rsandifo@redhat.com>
727 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
728 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
729 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
730 separate implementations for mipsIV and mipsV. Use new macros to
731 determine whether the restrictions apply.
733 2004-01-19 Chris Demetriou <cgd@broadcom.com>
735 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
736 (check_mult_hilo): Improve comments.
737 (check_div_hilo): Likewise. Also, fork off a new version
738 to handle mips32/mips64 (since there are no hazards to check
741 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
743 * mips.igen (do_dmultx): Fix check for negative operands.
745 2003-05-16 Ian Lance Taylor <ian@airs.com>
747 * Makefile.in (SHELL): Make sure this is defined.
748 (various): Use $(SHELL) whenever we invoke move-if-change.
750 2003-05-03 Chris Demetriou <cgd@broadcom.com>
752 * cp1.c: Tweak attribution slightly.
755 * mdmx.igen: Likewise.
756 * mips3d.igen: Likewise.
757 * sb1.igen: Likewise.
759 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
761 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
764 2003-02-27 Andrew Cagney <cagney@redhat.com>
766 * interp.c (sim_open): Rename _bfd to bfd.
767 (sim_create_inferior): Ditto.
769 2003-01-14 Chris Demetriou <cgd@broadcom.com>
771 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
773 2003-01-14 Chris Demetriou <cgd@broadcom.com>
775 * mips.igen (EI, DI): Remove.
777 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
779 * Makefile.in (tmp-run-multi): Fix mips16 filter.
781 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
782 Andrew Cagney <ac131313@redhat.com>
783 Gavin Romig-Koch <gavin@redhat.com>
784 Graydon Hoare <graydon@redhat.com>
785 Aldy Hernandez <aldyh@redhat.com>
786 Dave Brolley <brolley@redhat.com>
787 Chris Demetriou <cgd@broadcom.com>
789 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
790 (sim_mach_default): New variable.
791 (mips64vr-*-*, mips64vrel-*-*): New configurations.
792 Add a new simulator generator, MULTI.
793 * configure: Regenerate.
794 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
795 (multi-run.o): New dependency.
796 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
797 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
798 (tmp-multi): Combine them.
799 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
800 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
801 (distclean-extra): New rule.
802 * sim-main.h: Include bfd.h.
803 (MIPS_MACH): New macro.
804 * mips.igen (vr4120, vr5400, vr5500): New models.
805 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
806 * vr.igen: Replace with new version.
808 2003-01-04 Chris Demetriou <cgd@broadcom.com>
810 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
811 * configure: Regenerate.
813 2002-12-31 Chris Demetriou <cgd@broadcom.com>
815 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
816 * mips.igen: Remove all invocations of check_branch_bug and
819 2002-12-16 Chris Demetriou <cgd@broadcom.com>
821 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
823 2002-07-30 Chris Demetriou <cgd@broadcom.com>
825 * mips.igen (do_load_double, do_store_double): New functions.
826 (LDC1, SDC1): Rename to...
827 (LDC1b, SDC1b): respectively.
828 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
830 2002-07-29 Michael Snyder <msnyder@redhat.com>
832 * cp1.c (fp_recip2): Modify initialization expression so that
833 GCC will recognize it as constant.
835 2002-06-18 Chris Demetriou <cgd@broadcom.com>
837 * mdmx.c (SD_): Delete.
838 (Unpredictable): Re-define, for now, to directly invoke
839 unpredictable_action().
840 (mdmx_acc_op): Fix error in .ob immediate handling.
842 2002-06-18 Andrew Cagney <cagney@redhat.com>
844 * interp.c (sim_firmware_command): Initialize `address'.
846 2002-06-16 Andrew Cagney <ac131313@redhat.com>
848 * configure: Regenerated to track ../common/aclocal.m4 changes.
850 2002-06-14 Chris Demetriou <cgd@broadcom.com>
851 Ed Satterthwaite <ehs@broadcom.com>
853 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
854 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
855 * mips.igen: Include mips3d.igen.
856 (mips3d): New model name for MIPS-3D ASE instructions.
857 (CVT.W.fmt): Don't use this instruction for word (source) format
859 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
860 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
861 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
862 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
863 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
864 (RSquareRoot1, RSquareRoot2): New macros.
865 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
866 (fp_rsqrt2): New functions.
867 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
868 * configure: Regenerate.
870 2002-06-13 Chris Demetriou <cgd@broadcom.com>
871 Ed Satterthwaite <ehs@broadcom.com>
873 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
874 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
875 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
876 (convert): Note that this function is not used for paired-single
878 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
879 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
880 (check_fmt_p): Enable paired-single support.
881 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
882 (PUU.PS): New instructions.
883 (CVT.S.fmt): Don't use this instruction for paired-single format
885 * sim-main.h (FP_formats): New value 'fmt_ps.'
886 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
887 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
889 2002-06-12 Chris Demetriou <cgd@broadcom.com>
891 * mips.igen: Fix formatting of function calls in
894 2002-06-12 Chris Demetriou <cgd@broadcom.com>
896 * mips.igen (MOVN, MOVZ): Trace result.
897 (TNEI): Print "tnei" as the opcode name in traces.
898 (CEIL.W): Add disassembly string for traces.
899 (RSQRT.fmt): Make location of disassembly string consistent
900 with other instructions.
902 2002-06-12 Chris Demetriou <cgd@broadcom.com>
904 * mips.igen (X): Delete unused function.
906 2002-06-08 Andrew Cagney <cagney@redhat.com>
908 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
910 2002-06-07 Chris Demetriou <cgd@broadcom.com>
911 Ed Satterthwaite <ehs@broadcom.com>
913 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
914 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
915 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
916 (fp_nmsub): New prototypes.
917 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
918 (NegMultiplySub): New defines.
919 * mips.igen (RSQRT.fmt): Use RSquareRoot().
920 (MADD.D, MADD.S): Replace with...
921 (MADD.fmt): New instruction.
922 (MSUB.D, MSUB.S): Replace with...
923 (MSUB.fmt): New instruction.
924 (NMADD.D, NMADD.S): Replace with...
925 (NMADD.fmt): New instruction.
926 (NMSUB.D, MSUB.S): Replace with...
927 (NMSUB.fmt): New instruction.
929 2002-06-07 Chris Demetriou <cgd@broadcom.com>
930 Ed Satterthwaite <ehs@broadcom.com>
932 * cp1.c: Fix more comment spelling and formatting.
933 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
934 (denorm_mode): New function.
935 (fpu_unary, fpu_binary): Round results after operation, collect
936 status from rounding operations, and update the FCSR.
937 (convert): Collect status from integer conversions and rounding
938 operations, and update the FCSR. Adjust NaN values that result
939 from conversions. Convert to use sim_io_eprintf rather than
940 fprintf, and remove some debugging code.
941 * cp1.h (fenr_FS): New define.
943 2002-06-07 Chris Demetriou <cgd@broadcom.com>
945 * cp1.c (convert): Remove unusable debugging code, and move MIPS
946 rounding mode to sim FP rounding mode flag conversion code into...
947 (rounding_mode): New function.
949 2002-06-07 Chris Demetriou <cgd@broadcom.com>
951 * cp1.c: Clean up formatting of a few comments.
952 (value_fpr): Reformat switch statement.
954 2002-06-06 Chris Demetriou <cgd@broadcom.com>
955 Ed Satterthwaite <ehs@broadcom.com>
958 * sim-main.h: Include cp1.h.
959 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
960 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
961 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
962 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
963 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
964 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
965 * cp1.c: Don't include sim-fpu.h; already included by
966 sim-main.h. Clean up formatting of some comments.
967 (NaN, Equal, Less): Remove.
968 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
969 (fp_cmp): New functions.
970 * mips.igen (do_c_cond_fmt): Remove.
971 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
972 Compare. Add result tracing.
973 (CxC1): Remove, replace with...
974 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
975 (DMxC1): Remove, replace with...
976 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
977 (MxC1): Remove, replace with...
978 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
980 2002-06-04 Chris Demetriou <cgd@broadcom.com>
982 * sim-main.h (FGRIDX): Remove, replace all uses with...
983 (FGR_BASE): New macro.
984 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
985 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
986 (NR_FGR, FGR): Likewise.
987 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
988 * mips.igen: Likewise.
990 2002-06-04 Chris Demetriou <cgd@broadcom.com>
992 * cp1.c: Add an FSF Copyright notice to this file.
994 2002-06-04 Chris Demetriou <cgd@broadcom.com>
995 Ed Satterthwaite <ehs@broadcom.com>
997 * cp1.c (Infinity): Remove.
998 * sim-main.h (Infinity): Likewise.
1000 * cp1.c (fp_unary, fp_binary): New functions.
1001 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1002 (fp_sqrt): New functions, implemented in terms of the above.
1003 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1004 (Recip, SquareRoot): Remove (replaced by functions above).
1005 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1006 (fp_recip, fp_sqrt): New prototypes.
1007 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1008 (Recip, SquareRoot): Replace prototypes with #defines which
1009 invoke the functions above.
1011 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1013 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1014 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1015 file, remove PARAMS from prototypes.
1016 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1017 simulator state arguments.
1018 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1019 pass simulator state arguments.
1020 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1021 (store_fpr, convert): Remove 'sd' argument.
1022 (value_fpr): Likewise. Convert to use 'SD' instead.
1024 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1026 * cp1.c (Min, Max): Remove #if 0'd functions.
1027 * sim-main.h (Min, Max): Remove.
1029 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1031 * cp1.c: fix formatting of switch case and default labels.
1032 * interp.c: Likewise.
1033 * sim-main.c: Likewise.
1035 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1037 * cp1.c: Clean up comments which describe FP formats.
1038 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1040 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1041 Ed Satterthwaite <ehs@broadcom.com>
1043 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1044 Broadcom SiByte SB-1 processor configurations.
1045 * configure: Regenerate.
1046 * sb1.igen: New file.
1047 * mips.igen: Include sb1.igen.
1049 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1050 * mdmx.igen: Add "sb1" model to all appropriate functions and
1052 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1053 (ob_func, ob_acc): Reference the above.
1054 (qh_acc): Adjust to keep the same size as ob_acc.
1055 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1056 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1058 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1060 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1062 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1063 Ed Satterthwaite <ehs@broadcom.com>
1065 * mips.igen (mdmx): New (pseudo-)model.
1066 * mdmx.c, mdmx.igen: New files.
1067 * Makefile.in (SIM_OBJS): Add mdmx.o.
1068 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1070 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1071 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1072 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1073 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1074 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1075 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1076 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1077 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1078 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1079 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1080 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1081 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1082 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1083 (qh_fmtsel): New macros.
1084 (_sim_cpu): New member "acc".
1085 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1086 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1088 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1090 * interp.c: Use 'deprecated' rather than 'depreciated.'
1091 * sim-main.h: Likewise.
1093 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1095 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1096 which wouldn't compile anyway.
1097 * sim-main.h (unpredictable_action): New function prototype.
1098 (Unpredictable): Define to call igen function unpredictable().
1099 (NotWordValue): New macro to call igen function not_word_value().
1100 (UndefinedResult): Remove.
1101 * interp.c (undefined_result): Remove.
1102 (unpredictable_action): New function.
1103 * mips.igen (not_word_value, unpredictable): New functions.
1104 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1105 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1106 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1107 NotWordValue() to check for unpredictable inputs, then
1108 Unpredictable() to handle them.
1110 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1112 * mips.igen: Fix formatting of calls to Unpredictable().
1114 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1116 * interp.c (sim_open): Revert previous change.
1118 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1120 * interp.c (sim_open): Disable chunk of code that wrote code in
1121 vector table entries.
1123 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1125 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1126 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1129 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1131 * cp1.c: Fix many formatting issues.
1133 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1135 * cp1.c (fpu_format_name): New function to replace...
1136 (DOFMT): This. Delete, and update all callers.
1137 (fpu_rounding_mode_name): New function to replace...
1138 (RMMODE): This. Delete, and update all callers.
1140 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1142 * interp.c: Move FPU support routines from here to...
1143 * cp1.c: Here. New file.
1144 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1145 (cp1.o): New target.
1147 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1149 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1150 * mips.igen (mips32, mips64): New models, add to all instructions
1151 and functions as appropriate.
1152 (loadstore_ea, check_u64): New variant for model mips64.
1153 (check_fmt_p): New variant for models mipsV and mips64, remove
1154 mipsV model marking fro other variant.
1157 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1158 for mips32 and mips64.
1159 (DCLO, DCLZ): New instructions for mips64.
1161 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1163 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1164 immediate or code as a hex value with the "%#lx" format.
1165 (ANDI): Likewise, and fix printed instruction name.
1167 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1169 * sim-main.h (UndefinedResult, Unpredictable): New macros
1170 which currently do nothing.
1172 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1174 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1175 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1176 (status_CU3): New definitions.
1178 * sim-main.h (ExceptionCause): Add new values for MIPS32
1179 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1180 for DebugBreakPoint and NMIReset to note their status in
1182 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1183 (SignalExceptionCacheErr): New exception macros.
1185 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1187 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1188 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1190 (SignalExceptionCoProcessorUnusable): Take as argument the
1191 unusable coprocessor number.
1193 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1195 * mips.igen: Fix formatting of all SignalException calls.
1197 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1199 * sim-main.h (SIGNEXTEND): Remove.
1201 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1203 * mips.igen: Remove gencode comment from top of file, fix
1204 spelling in another comment.
1206 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1208 * mips.igen (check_fmt, check_fmt_p): New functions to check
1209 whether specific floating point formats are usable.
1210 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1211 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1212 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1213 Use the new functions.
1214 (do_c_cond_fmt): Remove format checks...
1215 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1217 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1219 * mips.igen: Fix formatting of check_fpu calls.
1221 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1223 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1225 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1227 * mips.igen: Remove whitespace at end of lines.
1229 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1231 * mips.igen (loadstore_ea): New function to do effective
1232 address calculations.
1233 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1234 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1235 CACHE): Use loadstore_ea to do effective address computations.
1237 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1239 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1240 * mips.igen (LL, CxC1, MxC1): Likewise.
1242 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1244 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1245 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1246 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1247 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1248 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1249 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1250 Don't split opcode fields by hand, use the opcode field values
1253 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1255 * mips.igen (do_divu): Fix spacing.
1257 * mips.igen (do_dsllv): Move to be right before DSLLV,
1258 to match the rest of the do_<shift> functions.
1260 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1262 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1263 DSRL32, do_dsrlv): Trace inputs and results.
1265 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1267 * mips.igen (CACHE): Provide instruction-printing string.
1269 * interp.c (signal_exception): Comment tokens after #endif.
1271 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1273 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1274 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1275 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1276 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1277 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1278 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1279 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1280 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1282 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1284 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1285 instruction-printing string.
1286 (LWU): Use '64' as the filter flag.
1288 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1290 * mips.igen (SDXC1): Fix instruction-printing string.
1292 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1294 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1295 filter flags "32,f".
1297 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1299 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1302 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1304 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1305 add a comma) so that it more closely match the MIPS ISA
1306 documentation opcode partitioning.
1307 (PREF): Put useful names on opcode fields, and include
1308 instruction-printing string.
1310 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1312 * mips.igen (check_u64): New function which in the future will
1313 check whether 64-bit instructions are usable and signal an
1314 exception if not. Currently a no-op.
1315 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1316 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1317 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1318 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1320 * mips.igen (check_fpu): New function which in the future will
1321 check whether FPU instructions are usable and signal an exception
1322 if not. Currently a no-op.
1323 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1324 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1325 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1326 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1327 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1328 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1329 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1330 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1332 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1334 * mips.igen (do_load_left, do_load_right): Move to be immediately
1336 (do_store_left, do_store_right): Move to be immediately following
1339 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1341 * mips.igen (mipsV): New model name. Also, add it to
1342 all instructions and functions where it is appropriate.
1344 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1346 * mips.igen: For all functions and instructions, list model
1347 names that support that instruction one per line.
1349 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1351 * mips.igen: Add some additional comments about supported
1352 models, and about which instructions go where.
1353 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1354 order as is used in the rest of the file.
1356 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1358 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1359 indicating that ALU32_END or ALU64_END are there to check
1361 (DADD): Likewise, but also remove previous comment about
1364 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1366 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1367 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1368 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1369 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1370 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1371 fields (i.e., add and move commas) so that they more closely
1372 match the MIPS ISA documentation opcode partitioning.
1374 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1376 * mips.igen (ADDI): Print immediate value.
1377 (BREAK): Print code.
1378 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1379 (SLL): Print "nop" specially, and don't run the code
1380 that does the shift for the "nop" case.
1382 2001-11-17 Fred Fish <fnf@redhat.com>
1384 * sim-main.h (float_operation): Move enum declaration outside
1385 of _sim_cpu struct declaration.
1387 2001-04-12 Jim Blandy <jimb@redhat.com>
1389 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1390 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1392 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1393 PENDING_FILL, and you can get the intended effect gracefully by
1394 calling PENDING_SCHED directly.
1396 2001-02-23 Ben Elliston <bje@redhat.com>
1398 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1399 already defined elsewhere.
1401 2001-02-19 Ben Elliston <bje@redhat.com>
1403 * sim-main.h (sim_monitor): Return an int.
1404 * interp.c (sim_monitor): Add return values.
1405 (signal_exception): Handle error conditions from sim_monitor.
1407 2001-02-08 Ben Elliston <bje@redhat.com>
1409 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1410 (store_memory): Likewise, pass cia to sim_core_write*.
1412 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1414 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1415 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1417 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1419 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1420 * Makefile.in: Don't delete *.igen when cleaning directory.
1422 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1424 * m16.igen (break): Call SignalException not sim_engine_halt.
1426 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1428 From Jason Eckhardt:
1429 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1431 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1433 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1435 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1437 * mips.igen (do_dmultx): Fix typo.
1439 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1441 * configure: Regenerated to track ../common/aclocal.m4 changes.
1443 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1445 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1447 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1449 * sim-main.h (GPR_CLEAR): Define macro.
1451 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1453 * interp.c (decode_coproc): Output long using %lx and not %s.
1455 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1457 * interp.c (sim_open): Sort & extend dummy memory regions for
1458 --board=jmr3904 for eCos.
1460 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1462 * configure: Regenerated.
1464 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1466 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1467 calls, conditional on the simulator being in verbose mode.
1469 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1471 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1472 cache don't get ReservedInstruction traps.
1474 1999-11-29 Mark Salter <msalter@cygnus.com>
1476 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1477 to clear status bits in sdisr register. This is how the hardware works.
1479 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1480 being used by cygmon.
1482 1999-11-11 Andrew Haley <aph@cygnus.com>
1484 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1487 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1489 * mips.igen (MULT): Correct previous mis-applied patch.
1491 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1493 * mips.igen (delayslot32): Handle sequence like
1494 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1495 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1496 (MULT): Actually pass the third register...
1498 1999-09-03 Mark Salter <msalter@cygnus.com>
1500 * interp.c (sim_open): Added more memory aliases for additional
1501 hardware being touched by cygmon on jmr3904 board.
1503 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1505 * configure: Regenerated to track ../common/aclocal.m4 changes.
1507 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1509 * interp.c (sim_store_register): Handle case where client - GDB -
1510 specifies that a 4 byte register is 8 bytes in size.
1511 (sim_fetch_register): Ditto.
1513 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1515 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1516 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1517 (idt_monitor_base): Base address for IDT monitor traps.
1518 (pmon_monitor_base): Ditto for PMON.
1519 (lsipmon_monitor_base): Ditto for LSI PMON.
1520 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1521 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1522 (sim_firmware_command): New function.
1523 (mips_option_handler): Call it for OPTION_FIRMWARE.
1524 (sim_open): Allocate memory for idt_monitor region. If "--board"
1525 option was given, add no monitor by default. Add BREAK hooks only if
1526 monitors are also there.
1528 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1530 * interp.c (sim_monitor): Flush output before reading input.
1532 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1534 * tconfig.in (SIM_HANDLES_LMA): Always define.
1536 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1538 From Mark Salter <msalter@cygnus.com>:
1539 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1540 (sim_open): Add setup for BSP board.
1542 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1544 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1545 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1546 them as unimplemented.
1548 1999-05-08 Felix Lee <flee@cygnus.com>
1550 * configure: Regenerated to track ../common/aclocal.m4 changes.
1552 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1554 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1556 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1558 * configure.in: Any mips64vr5*-*-* target should have
1559 -DTARGET_ENABLE_FR=1.
1560 (default_endian): Any mips64vr*el-*-* target should default to
1562 * configure: Re-generate.
1564 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1566 * mips.igen (ldl): Extend from _16_, not 32.
1568 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1570 * interp.c (sim_store_register): Force registers written to by GDB
1571 into an un-interpreted state.
1573 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1575 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1576 CPU, start periodic background I/O polls.
1577 (tx3904sio_poll): New function: periodic I/O poller.
1579 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1581 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1583 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1585 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1588 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1590 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1591 (load_word): Call SIM_CORE_SIGNAL hook on error.
1592 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1593 starting. For exception dispatching, pass PC instead of NULL_CIA.
1594 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1595 * sim-main.h (COP0_BADVADDR): Define.
1596 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1597 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1598 (_sim_cpu): Add exc_* fields to store register value snapshots.
1599 * mips.igen (*): Replace memory-related SignalException* calls
1600 with references to SIM_CORE_SIGNAL hook.
1602 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1604 * sim-main.c (*): Minor warning cleanups.
1606 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1608 * m16.igen (DADDIU5): Correct type-o.
1610 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1612 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1615 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1617 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1619 (interp.o): Add dependency on itable.h
1620 (oengine.c, gencode): Delete remaining references.
1621 (BUILT_SRC_FROM_GEN): Clean up.
1623 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1626 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1627 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1628 tmp-run-hack) : New.
1629 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1630 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1631 Drop the "64" qualifier to get the HACK generator working.
1632 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1633 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1634 qualifier to get the hack generator working.
1635 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1636 (DSLL): Use do_dsll.
1637 (DSLLV): Use do_dsllv.
1638 (DSRA): Use do_dsra.
1639 (DSRL): Use do_dsrl.
1640 (DSRLV): Use do_dsrlv.
1641 (BC1): Move *vr4100 to get the HACK generator working.
1642 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1643 get the HACK generator working.
1644 (MACC) Rename to get the HACK generator working.
1645 (DMACC,MACCS,DMACCS): Add the 64.
1647 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1649 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1650 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1652 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1654 * mips/interp.c (DEBUG): Cleanups.
1656 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1658 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1659 (tx3904sio_tickle): fflush after a stdout character output.
1661 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1663 * interp.c (sim_close): Uninstall modules.
1665 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1667 * sim-main.h, interp.c (sim_monitor): Change to global
1670 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1672 * configure.in (vr4100): Only include vr4100 instructions in
1674 * configure: Re-generate.
1675 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1677 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1679 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1680 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1683 * configure.in (sim_default_gen, sim_use_gen): Replace with
1685 (--enable-sim-igen): Delete config option. Always using IGEN.
1686 * configure: Re-generate.
1688 * Makefile.in (gencode): Kill, kill, kill.
1691 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1693 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1694 bit mips16 igen simulator.
1695 * configure: Re-generate.
1697 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1698 as part of vr4100 ISA.
1699 * vr.igen: Mark all instructions as 64 bit only.
1701 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1703 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1706 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1708 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1709 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1710 * configure: Re-generate.
1712 * m16.igen (BREAK): Define breakpoint instruction.
1713 (JALX32): Mark instruction as mips16 and not r3900.
1714 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1716 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1718 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1720 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1721 insn as a debug breakpoint.
1723 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1725 (PENDING_SCHED): Clean up trace statement.
1726 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1727 (PENDING_FILL): Delay write by only one cycle.
1728 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1730 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1732 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1734 (pending_tick): Move incrementing of index to FOR statement.
1735 (pending_tick): Only update PENDING_OUT after a write has occured.
1737 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1739 * configure: Re-generate.
1741 * interp.c (sim_engine_run OLD): Delete explicit call to
1742 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1744 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1746 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1747 interrupt level number to match changed SignalExceptionInterrupt
1750 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1752 * interp.c: #include "itable.h" if WITH_IGEN.
1753 (get_insn_name): New function.
1754 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1755 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1757 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1759 * configure: Rebuilt to inhale new common/aclocal.m4.
1761 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1763 * dv-tx3904sio.c: Include sim-assert.h.
1765 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1767 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1768 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1769 Reorganize target-specific sim-hardware checks.
1770 * configure: rebuilt.
1771 * interp.c (sim_open): For tx39 target boards, set
1772 OPERATING_ENVIRONMENT, add tx3904sio devices.
1773 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1774 ROM executables. Install dv-sockser into sim-modules list.
1776 * dv-tx3904irc.c: Compiler warning clean-up.
1777 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1778 frequent hw-trace messages.
1780 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1782 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1784 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1786 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1788 * vr.igen: New file.
1789 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1790 * mips.igen: Define vr4100 model. Include vr.igen.
1791 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1793 * mips.igen (check_mf_hilo): Correct check.
1795 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1797 * sim-main.h (interrupt_event): Add prototype.
1799 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1800 register_ptr, register_value.
1801 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1803 * sim-main.h (tracefh): Make extern.
1805 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1807 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1808 Reduce unnecessarily high timer event frequency.
1809 * dv-tx3904cpu.c: Ditto for interrupt event.
1811 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1813 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1815 (interrupt_event): Made non-static.
1817 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1818 interchange of configuration values for external vs. internal
1821 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1823 * mips.igen (BREAK): Moved code to here for
1824 simulator-reserved break instructions.
1825 * gencode.c (build_instruction): Ditto.
1826 * interp.c (signal_exception): Code moved from here. Non-
1827 reserved instructions now use exception vector, rather
1829 * sim-main.h: Moved magic constants to here.
1831 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1833 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1834 register upon non-zero interrupt event level, clear upon zero
1836 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1837 by passing zero event value.
1838 (*_io_{read,write}_buffer): Endianness fixes.
1839 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1840 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1842 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1843 serial I/O and timer module at base address 0xFFFF0000.
1845 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1847 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1850 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1852 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1854 * configure: Update.
1856 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1858 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1859 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1860 * configure.in: Include tx3904tmr in hw_device list.
1861 * configure: Rebuilt.
1862 * interp.c (sim_open): Instantiate three timer instances.
1863 Fix address typo of tx3904irc instance.
1865 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1867 * interp.c (signal_exception): SystemCall exception now uses
1868 the exception vector.
1870 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1872 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1875 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1877 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1879 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1881 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1883 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1884 sim-main.h. Declare a struct hw_descriptor instead of struct
1885 hw_device_descriptor.
1887 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1889 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1890 right bits and then re-align left hand bytes to correct byte
1891 lanes. Fix incorrect computation in do_store_left when loading
1892 bytes from second word.
1894 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1896 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1897 * interp.c (sim_open): Only create a device tree when HW is
1900 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1901 * interp.c (signal_exception): Ditto.
1903 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1905 * gencode.c: Mark BEGEZALL as LIKELY.
1907 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1909 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1910 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1912 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1914 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1915 modules. Recognize TX39 target with "mips*tx39" pattern.
1916 * configure: Rebuilt.
1917 * sim-main.h (*): Added many macros defining bits in
1918 TX39 control registers.
1919 (SignalInterrupt): Send actual PC instead of NULL.
1920 (SignalNMIReset): New exception type.
1921 * interp.c (board): New variable for future use to identify
1922 a particular board being simulated.
1923 (mips_option_handler,mips_options): Added "--board" option.
1924 (interrupt_event): Send actual PC.
1925 (sim_open): Make memory layout conditional on board setting.
1926 (signal_exception): Initial implementation of hardware interrupt
1927 handling. Accept another break instruction variant for simulator
1929 (decode_coproc): Implement RFE instruction for TX39.
1930 (mips.igen): Decode RFE instruction as such.
1931 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1932 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1933 bbegin to implement memory map.
1934 * dv-tx3904cpu.c: New file.
1935 * dv-tx3904irc.c: New file.
1937 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1939 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1941 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1943 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1944 with calls to check_div_hilo.
1946 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1948 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1949 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1950 Add special r3900 version of do_mult_hilo.
1951 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1952 with calls to check_mult_hilo.
1953 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1954 with calls to check_div_hilo.
1956 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1958 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1959 Document a replacement.
1961 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1963 * interp.c (sim_monitor): Make mon_printf work.
1965 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1967 * sim-main.h (INSN_NAME): New arg `cpu'.
1969 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1971 * configure: Regenerated to track ../common/aclocal.m4 changes.
1973 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1975 * configure: Regenerated to track ../common/aclocal.m4 changes.
1978 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1980 * acconfig.h: New file.
1981 * configure.in: Reverted change of Apr 24; use sinclude again.
1983 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1985 * configure: Regenerated to track ../common/aclocal.m4 changes.
1988 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1990 * configure.in: Don't call sinclude.
1992 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1994 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1996 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1998 * mips.igen (ERET): Implement.
2000 * interp.c (decode_coproc): Return sign-extended EPC.
2002 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2004 * interp.c (signal_exception): Do not ignore Trap.
2005 (signal_exception): On TRAP, restart at exception address.
2006 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2007 (signal_exception): Update.
2008 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2009 so that TRAP instructions are caught.
2011 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2013 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2014 contains HI/LO access history.
2015 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2016 (HIACCESS, LOACCESS): Delete, replace with
2017 (HIHISTORY, LOHISTORY): New macros.
2018 (CHECKHILO): Delete all, moved to mips.igen
2020 * gencode.c (build_instruction): Do not generate checks for
2021 correct HI/LO register usage.
2023 * interp.c (old_engine_run): Delete checks for correct HI/LO
2026 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2027 check_mf_cycles): New functions.
2028 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2029 do_divu, domultx, do_mult, do_multu): Use.
2031 * tx.igen ("madd", "maddu"): Use.
2033 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2035 * mips.igen (DSRAV): Use function do_dsrav.
2036 (SRAV): Use new function do_srav.
2038 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2039 (B): Sign extend 11 bit immediate.
2040 (EXT-B*): Shift 16 bit immediate left by 1.
2041 (ADDIU*): Don't sign extend immediate value.
2043 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2045 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2047 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2050 * mips.igen (delayslot32, nullify_next_insn): New functions.
2051 (m16.igen): Always include.
2052 (do_*): Add more tracing.
2054 * m16.igen (delayslot16): Add NIA argument, could be called by a
2055 32 bit MIPS16 instruction.
2057 * interp.c (ifetch16): Move function from here.
2058 * sim-main.c (ifetch16): To here.
2060 * sim-main.c (ifetch16, ifetch32): Update to match current
2061 implementations of LH, LW.
2062 (signal_exception): Don't print out incorrect hex value of illegal
2065 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2067 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2070 * m16.igen: Implement MIPS16 instructions.
2072 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2073 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2074 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2075 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2076 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2077 bodies of corresponding code from 32 bit insn to these. Also used
2078 by MIPS16 versions of functions.
2080 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2081 (IMEM16): Drop NR argument from macro.
2083 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2085 * Makefile.in (SIM_OBJS): Add sim-main.o.
2087 * sim-main.h (address_translation, load_memory, store_memory,
2088 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2090 (pr_addr, pr_uword64): Declare.
2091 (sim-main.c): Include when H_REVEALS_MODULE_P.
2093 * interp.c (address_translation, load_memory, store_memory,
2094 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2096 * sim-main.c: To here. Fix compilation problems.
2098 * configure.in: Enable inlining.
2099 * configure: Re-config.
2101 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2103 * configure: Regenerated to track ../common/aclocal.m4 changes.
2105 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2107 * mips.igen: Include tx.igen.
2108 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2109 * tx.igen: New file, contains MADD and MADDU.
2111 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2112 the hardwired constant `7'.
2113 (store_memory): Ditto.
2114 (LOADDRMASK): Move definition to sim-main.h.
2116 mips.igen (MTC0): Enable for r3900.
2119 mips.igen (do_load_byte): Delete.
2120 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2121 do_store_right): New functions.
2122 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2124 configure.in: Let the tx39 use igen again.
2127 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2129 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2130 not an address sized quantity. Return zero for cache sizes.
2132 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2134 * mips.igen (r3900): r3900 does not support 64 bit integer
2137 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2139 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2141 * configure : Rebuild.
2143 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2145 * configure: Regenerated to track ../common/aclocal.m4 changes.
2147 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2149 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2151 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2153 * configure: Regenerated to track ../common/aclocal.m4 changes.
2154 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2156 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * configure: Regenerated to track ../common/aclocal.m4 changes.
2160 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2162 * interp.c (Max, Min): Comment out functions. Not yet used.
2164 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2166 * configure: Regenerated to track ../common/aclocal.m4 changes.
2168 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2170 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2171 configurable settings for stand-alone simulator.
2173 * configure.in: Added X11 search, just in case.
2175 * configure: Regenerated.
2177 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2179 * interp.c (sim_write, sim_read, load_memory, store_memory):
2180 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2182 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2184 * sim-main.h (GETFCC): Return an unsigned value.
2186 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2188 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2189 (DADD): Result destination is RD not RT.
2191 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2193 * sim-main.h (HIACCESS, LOACCESS): Always define.
2195 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2197 * interp.c (sim_info): Delete.
2199 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2201 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2202 (mips_option_handler): New argument `cpu'.
2203 (sim_open): Update call to sim_add_option_table.
2205 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2207 * mips.igen (CxC1): Add tracing.
2209 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2211 * sim-main.h (Max, Min): Declare.
2213 * interp.c (Max, Min): New functions.
2215 * mips.igen (BC1): Add tracing.
2217 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2219 * interp.c Added memory map for stack in vr4100
2221 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2223 * interp.c (load_memory): Add missing "break"'s.
2225 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2227 * interp.c (sim_store_register, sim_fetch_register): Pass in
2228 length parameter. Return -1.
2230 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2232 * interp.c: Added hardware init hook, fixed warnings.
2234 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2236 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2238 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2240 * interp.c (ifetch16): New function.
2242 * sim-main.h (IMEM32): Rename IMEM.
2243 (IMEM16_IMMED): Define.
2245 (DELAY_SLOT): Update.
2247 * m16run.c (sim_engine_run): New file.
2249 * m16.igen: All instructions except LB.
2250 (LB): Call do_load_byte.
2251 * mips.igen (do_load_byte): New function.
2252 (LB): Call do_load_byte.
2254 * mips.igen: Move spec for insn bit size and high bit from here.
2255 * Makefile.in (tmp-igen, tmp-m16): To here.
2257 * m16.dc: New file, decode mips16 instructions.
2259 * Makefile.in (SIM_NO_ALL): Define.
2260 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2262 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2264 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2265 point unit to 32 bit registers.
2266 * configure: Re-generate.
2268 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2270 * configure.in (sim_use_gen): Make IGEN the default simulator
2271 generator for generic 32 and 64 bit mips targets.
2272 * configure: Re-generate.
2274 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2276 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2279 * interp.c (sim_fetch_register, sim_store_register): Read/write
2280 FGR from correct location.
2281 (sim_open): Set size of FGR's according to
2282 WITH_TARGET_FLOATING_POINT_BITSIZE.
2284 * sim-main.h (FGR): Store floating point registers in a separate
2287 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2289 * configure: Regenerated to track ../common/aclocal.m4 changes.
2291 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2293 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2295 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2297 * interp.c (pending_tick): New function. Deliver pending writes.
2299 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2300 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2301 it can handle mixed sized quantites and single bits.
2303 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2305 * interp.c (oengine.h): Do not include when building with IGEN.
2306 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2307 (sim_info): Ditto for PROCESSOR_64BIT.
2308 (sim_monitor): Replace ut_reg with unsigned_word.
2309 (*): Ditto for t_reg.
2310 (LOADDRMASK): Define.
2311 (sim_open): Remove defunct check that host FP is IEEE compliant,
2312 using software to emulate floating point.
2313 (value_fpr, ...): Always compile, was conditional on HASFPU.
2315 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2317 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2320 * interp.c (SD, CPU): Define.
2321 (mips_option_handler): Set flags in each CPU.
2322 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2323 (sim_close): Do not clear STATE, deleted anyway.
2324 (sim_write, sim_read): Assume CPU zero's vm should be used for
2326 (sim_create_inferior): Set the PC for all processors.
2327 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2329 (mips16_entry): Pass correct nr of args to store_word, load_word.
2330 (ColdReset): Cold reset all cpu's.
2331 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2332 (sim_monitor, load_memory, store_memory, signal_exception): Use
2333 `CPU' instead of STATE_CPU.
2336 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2339 * sim-main.h (signal_exception): Add sim_cpu arg.
2340 (SignalException*): Pass both SD and CPU to signal_exception.
2341 * interp.c (signal_exception): Update.
2343 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2345 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2346 address_translation): Ditto
2347 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2349 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2351 * configure: Regenerated to track ../common/aclocal.m4 changes.
2353 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2355 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2357 * mips.igen (model): Map processor names onto BFD name.
2359 * sim-main.h (CPU_CIA): Delete.
2360 (SET_CIA, GET_CIA): Define
2362 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2364 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2367 * configure.in (default_endian): Configure a big-endian simulator
2369 * configure: Re-generate.
2371 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2373 * configure: Regenerated to track ../common/aclocal.m4 changes.
2375 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2377 * interp.c (sim_monitor): Handle Densan monitor outbyte
2378 and inbyte functions.
2380 1997-12-29 Felix Lee <flee@cygnus.com>
2382 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2384 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2386 * Makefile.in (tmp-igen): Arrange for $zero to always be
2387 reset to zero after every instruction.
2389 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2391 * configure: Regenerated to track ../common/aclocal.m4 changes.
2394 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2396 * mips.igen (MSUB): Fix to work like MADD.
2397 * gencode.c (MSUB): Similarly.
2399 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2401 * configure: Regenerated to track ../common/aclocal.m4 changes.
2403 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2405 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2407 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2409 * sim-main.h (sim-fpu.h): Include.
2411 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2412 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2413 using host independant sim_fpu module.
2415 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2417 * interp.c (signal_exception): Report internal errors with SIGABRT
2420 * sim-main.h (C0_CONFIG): New register.
2421 (signal.h): No longer include.
2423 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2425 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2427 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2429 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2431 * mips.igen: Tag vr5000 instructions.
2432 (ANDI): Was missing mipsIV model, fix assembler syntax.
2433 (do_c_cond_fmt): New function.
2434 (C.cond.fmt): Handle mips I-III which do not support CC field
2436 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2437 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2439 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2440 vr5000 which saves LO in a GPR separatly.
2442 * configure.in (enable-sim-igen): For vr5000, select vr5000
2443 specific instructions.
2444 * configure: Re-generate.
2446 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2448 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2450 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2451 fmt_uninterpreted_64 bit cases to switch. Convert to
2454 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2456 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2457 as specified in IV3.2 spec.
2458 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2460 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2462 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2463 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2464 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2465 PENDING_FILL versions of instructions. Simplify.
2467 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2469 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2471 (MTHI, MFHI): Disable code checking HI-LO.
2473 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2475 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2477 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2479 * gencode.c (build_mips16_operands): Replace IPC with cia.
2481 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2482 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2484 (UndefinedResult): Replace function with macro/function
2486 (sim_engine_run): Don't save PC in IPC.
2488 * sim-main.h (IPC): Delete.
2491 * interp.c (signal_exception, store_word, load_word,
2492 address_translation, load_memory, store_memory, cache_op,
2493 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2494 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2495 current instruction address - cia - argument.
2496 (sim_read, sim_write): Call address_translation directly.
2497 (sim_engine_run): Rename variable vaddr to cia.
2498 (signal_exception): Pass cia to sim_monitor
2500 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2501 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2502 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2504 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2505 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2508 * interp.c (signal_exception): Pass restart address to
2511 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2512 idecode.o): Add dependency.
2514 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2516 (DELAY_SLOT): Update NIA not PC with branch address.
2517 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2519 * mips.igen: Use CIA not PC in branch calculations.
2520 (illegal): Call SignalException.
2521 (BEQ, ADDIU): Fix assembler.
2523 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2525 * m16.igen (JALX): Was missing.
2527 * configure.in (enable-sim-igen): New configuration option.
2528 * configure: Re-generate.
2530 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2532 * interp.c (load_memory, store_memory): Delete parameter RAW.
2533 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2534 bypassing {load,store}_memory.
2536 * sim-main.h (ByteSwapMem): Delete definition.
2538 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2540 * interp.c (sim_do_command, sim_commands): Delete mips specific
2541 commands. Handled by module sim-options.
2543 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2544 (WITH_MODULO_MEMORY): Define.
2546 * interp.c (sim_info): Delete code printing memory size.
2548 * interp.c (mips_size): Nee sim_size, delete function.
2550 (monitor, monitor_base, monitor_size): Delete global variables.
2551 (sim_open, sim_close): Delete code creating monitor and other
2552 memory regions. Use sim-memopts module, via sim_do_commandf, to
2553 manage memory regions.
2554 (load_memory, store_memory): Use sim-core for memory model.
2556 * interp.c (address_translation): Delete all memory map code
2557 except line forcing 32 bit addresses.
2559 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2561 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2564 * interp.c (logfh, logfile): Delete globals.
2565 (sim_open, sim_close): Delete code opening & closing log file.
2566 (mips_option_handler): Delete -l and -n options.
2567 (OPTION mips_options): Ditto.
2569 * interp.c (OPTION mips_options): Rename option trace to dinero.
2570 (mips_option_handler): Update.
2572 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2574 * interp.c (fetch_str): New function.
2575 (sim_monitor): Rewrite using sim_read & sim_write.
2576 (sim_open): Check magic number.
2577 (sim_open): Write monitor vectors into memory using sim_write.
2578 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2579 (sim_read, sim_write): Simplify - transfer data one byte at a
2581 (load_memory, store_memory): Clarify meaning of parameter RAW.
2583 * sim-main.h (isHOST): Defete definition.
2584 (isTARGET): Mark as depreciated.
2585 (address_translation): Delete parameter HOST.
2587 * interp.c (address_translation): Delete parameter HOST.
2589 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2593 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2594 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2596 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2598 * mips.igen: Add model filter field to records.
2600 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2602 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2604 interp.c (sim_engine_run): Do not compile function sim_engine_run
2605 when WITH_IGEN == 1.
2607 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2608 target architecture.
2610 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2611 igen. Replace with configuration variables sim_igen_flags /
2614 * m16.igen: New file. Copy mips16 insns here.
2615 * mips.igen: From here.
2617 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2619 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2621 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2623 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2625 * gencode.c (build_instruction): Follow sim_write's lead in using
2626 BigEndianMem instead of !ByteSwapMem.
2628 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2630 * configure.in (sim_gen): Dependent on target, select type of
2631 generator. Always select old style generator.
2633 configure: Re-generate.
2635 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2637 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2638 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2639 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2640 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2641 SIM_@sim_gen@_*, set by autoconf.
2643 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2645 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2647 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2648 CURRENT_FLOATING_POINT instead.
2650 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2651 (address_translation): Raise exception InstructionFetch when
2652 translation fails and isINSTRUCTION.
2654 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2655 sim_engine_run): Change type of of vaddr and paddr to
2657 (address_translation, prefetch, load_memory, store_memory,
2658 cache_op): Change type of vAddr and pAddr to address_word.
2660 * gencode.c (build_instruction): Change type of vaddr and paddr to
2663 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2665 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2666 macro to obtain result of ALU op.
2668 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2670 * interp.c (sim_info): Call profile_print.
2672 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2674 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2676 * sim-main.h (WITH_PROFILE): Do not define, defined in
2677 common/sim-config.h. Use sim-profile module.
2678 (simPROFILE): Delete defintion.
2680 * interp.c (PROFILE): Delete definition.
2681 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2682 (sim_close): Delete code writing profile histogram.
2683 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2685 (sim_engine_run): Delete code profiling the PC.
2687 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2689 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2691 * interp.c (sim_monitor): Make register pointers of type
2694 * sim-main.h: Make registers of type unsigned_word not
2697 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2699 * interp.c (sync_operation): Rename from SyncOperation, make
2700 global, add SD argument.
2701 (prefetch): Rename from Prefetch, make global, add SD argument.
2702 (decode_coproc): Make global.
2704 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2706 * gencode.c (build_instruction): Generate DecodeCoproc not
2707 decode_coproc calls.
2709 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2710 (SizeFGR): Move to sim-main.h
2711 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2712 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2713 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2715 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2716 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2717 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2718 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2719 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2720 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2722 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2724 (sim-alu.h): Include.
2725 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2726 (sim_cia): Typedef to instruction_address.
2728 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * Makefile.in (interp.o): Rename generated file engine.c to
2735 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2737 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2739 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * gencode.c (build_instruction): For "FPSQRT", output correct
2742 number of arguments to Recip.
2744 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * Makefile.in (interp.o): Depends on sim-main.h
2748 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2750 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2751 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2752 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2753 STATE, DSSTATE): Define
2754 (GPR, FGRIDX, ..): Define.
2756 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2757 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2758 (GPR, FGRIDX, ...): Delete macros.
2760 * interp.c: Update names to match defines from sim-main.h
2762 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2764 * interp.c (sim_monitor): Add SD argument.
2765 (sim_warning): Delete. Replace calls with calls to
2767 (sim_error): Delete. Replace calls with sim_io_error.
2768 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2769 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2770 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2772 (mips_size): Rename from sim_size. Add SD argument.
2774 * interp.c (simulator): Delete global variable.
2775 (callback): Delete global variable.
2776 (mips_option_handler, sim_open, sim_write, sim_read,
2777 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2778 sim_size,sim_monitor): Use sim_io_* not callback->*.
2779 (sim_open): ZALLOC simulator struct.
2780 (PROFILE): Do not define.
2782 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2784 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2785 support.h with corresponding code.
2787 * sim-main.h (word64, uword64), support.h: Move definition to
2789 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2792 * Makefile.in: Update dependencies
2793 * interp.c: Do not include.
2795 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2797 * interp.c (address_translation, load_memory, store_memory,
2798 cache_op): Rename to from AddressTranslation et.al., make global,
2801 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2804 * interp.c (SignalException): Rename to signal_exception, make
2807 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2809 * sim-main.h (SignalException, SignalExceptionInterrupt,
2810 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2811 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2812 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2815 * interp.c, support.h: Use.
2817 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2819 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2820 to value_fpr / store_fpr. Add SD argument.
2821 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2822 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2824 * sim-main.h (ValueFPR, StoreFPR): Define.
2826 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2828 * interp.c (sim_engine_run): Check consistency between configure
2829 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2832 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2833 (mips_fpu): Configure WITH_FLOATING_POINT.
2834 (mips_endian): Configure WITH_TARGET_ENDIAN.
2835 * configure: Update.
2837 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2839 * configure: Regenerated to track ../common/aclocal.m4 changes.
2841 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2843 * configure: Regenerated.
2845 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2847 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2849 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2851 * gencode.c (print_igen_insn_models): Assume certain architectures
2852 include all mips* instructions.
2853 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2856 * Makefile.in (tmp.igen): Add target. Generate igen input from
2859 * gencode.c (FEATURE_IGEN): Define.
2860 (main): Add --igen option. Generate output in igen format.
2861 (process_instructions): Format output according to igen option.
2862 (print_igen_insn_format): New function.
2863 (print_igen_insn_models): New function.
2864 (process_instructions): Only issue warnings and ignore
2865 instructions when no FEATURE_IGEN.
2867 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2869 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2872 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2874 * configure: Regenerated to track ../common/aclocal.m4 changes.
2876 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2878 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2879 SIM_RESERVED_BITS): Delete, moved to common.
2880 (SIM_EXTRA_CFLAGS): Update.
2882 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2884 * configure.in: Configure non-strict memory alignment.
2885 * configure: Regenerated to track ../common/aclocal.m4 changes.
2887 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2889 * configure: Regenerated to track ../common/aclocal.m4 changes.
2891 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2893 * gencode.c (SDBBP,DERET): Added (3900) insns.
2894 (RFE): Turn on for 3900.
2895 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2896 (dsstate): Made global.
2897 (SUBTARGET_R3900): Added.
2898 (CANCELDELAYSLOT): New.
2899 (SignalException): Ignore SystemCall rather than ignore and
2900 terminate. Add DebugBreakPoint handling.
2901 (decode_coproc): New insns RFE, DERET; and new registers Debug
2902 and DEPC protected by SUBTARGET_R3900.
2903 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2905 * Makefile.in,configure.in: Add mips subtarget option.
2906 * configure: Update.
2908 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2910 * gencode.c: Add r3900 (tx39).
2913 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2915 * gencode.c (build_instruction): Don't need to subtract 4 for
2918 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2920 * interp.c: Correct some HASFPU problems.
2922 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2924 * configure: Regenerated to track ../common/aclocal.m4 changes.
2926 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2928 * interp.c (mips_options): Fix samples option short form, should
2931 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2933 * interp.c (sim_info): Enable info code. Was just returning.
2935 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2937 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2940 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2942 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2944 (build_instruction): Ditto for LL.
2946 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2948 * configure: Regenerated to track ../common/aclocal.m4 changes.
2950 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2952 * configure: Regenerated to track ../common/aclocal.m4 changes.
2955 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2957 * interp.c (sim_open): Add call to sim_analyze_program, update
2960 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2962 * interp.c (sim_kill): Delete.
2963 (sim_create_inferior): Add ABFD argument. Set PC from same.
2964 (sim_load): Move code initializing trap handlers from here.
2965 (sim_open): To here.
2966 (sim_load): Delete, use sim-hload.c.
2968 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2970 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2972 * configure: Regenerated to track ../common/aclocal.m4 changes.
2975 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2977 * interp.c (sim_open): Add ABFD argument.
2978 (sim_load): Move call to sim_config from here.
2979 (sim_open): To here. Check return status.
2981 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2983 * gencode.c (build_instruction): Two arg MADD should
2984 not assign result to $0.
2986 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2988 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2989 * sim/mips/configure.in: Regenerate.
2991 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2993 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2994 signed8, unsigned8 et.al. types.
2996 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2997 hosts when selecting subreg.
2999 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3001 * interp.c (sim_engine_run): Reset the ZERO register to zero
3002 regardless of FEATURE_WARN_ZERO.
3003 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3005 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3007 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3008 (SignalException): For BreakPoints ignore any mode bits and just
3010 (SignalException): Always set the CAUSE register.
3012 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3014 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3015 exception has been taken.
3017 * interp.c: Implement the ERET and mt/f sr instructions.
3019 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3021 * interp.c (SignalException): Don't bother restarting an
3024 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3026 * interp.c (SignalException): Really take an interrupt.
3027 (interrupt_event): Only deliver interrupts when enabled.
3029 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3031 * interp.c (sim_info): Only print info when verbose.
3032 (sim_info) Use sim_io_printf for output.
3034 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3036 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3039 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3041 * interp.c (sim_do_command): Check for common commands if a
3042 simulator specific command fails.
3044 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3046 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3047 and simBE when DEBUG is defined.
3049 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3051 * interp.c (interrupt_event): New function. Pass exception event
3052 onto exception handler.
3054 * configure.in: Check for stdlib.h.
3055 * configure: Regenerate.
3057 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3058 variable declaration.
3059 (build_instruction): Initialize memval1.
3060 (build_instruction): Add UNUSED attribute to byte, bigend,
3062 (build_operands): Ditto.
3064 * interp.c: Fix GCC warnings.
3065 (sim_get_quit_code): Delete.
3067 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3068 * Makefile.in: Ditto.
3069 * configure: Re-generate.
3071 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3073 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3075 * interp.c (mips_option_handler): New function parse argumes using
3077 (myname): Replace with STATE_MY_NAME.
3078 (sim_open): Delete check for host endianness - performed by
3080 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3081 (sim_open): Move much of the initialization from here.
3082 (sim_load): To here. After the image has been loaded and
3084 (sim_open): Move ColdReset from here.
3085 (sim_create_inferior): To here.
3086 (sim_open): Make FP check less dependant on host endianness.
3088 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3090 * interp.c (sim_set_callbacks): Delete.
3092 * interp.c (membank, membank_base, membank_size): Replace with
3093 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3094 (sim_open): Remove call to callback->init. gdb/run do this.
3098 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3100 * interp.c (big_endian_p): Delete, replaced by
3101 current_target_byte_order.
3103 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3105 * interp.c (host_read_long, host_read_word, host_swap_word,
3106 host_swap_long): Delete. Using common sim-endian.
3107 (sim_fetch_register, sim_store_register): Use H2T.
3108 (pipeline_ticks): Delete. Handled by sim-events.
3110 (sim_engine_run): Update.
3112 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3114 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3116 (SignalException): To here. Signal using sim_engine_halt.
3117 (sim_stop_reason): Delete, moved to common.
3119 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3121 * interp.c (sim_open): Add callback argument.
3122 (sim_set_callbacks): Delete SIM_DESC argument.
3125 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3127 * Makefile.in (SIM_OBJS): Add common modules.
3129 * interp.c (sim_set_callbacks): Also set SD callback.
3130 (set_endianness, xfer_*, swap_*): Delete.
3131 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3132 Change to functions using sim-endian macros.
3133 (control_c, sim_stop): Delete, use common version.
3134 (simulate): Convert into.
3135 (sim_engine_run): This function.
3136 (sim_resume): Delete.
3138 * interp.c (simulation): New variable - the simulator object.
3139 (sim_kind): Delete global - merged into simulation.
3140 (sim_load): Cleanup. Move PC assignment from here.
3141 (sim_create_inferior): To here.
3143 * sim-main.h: New file.
3144 * interp.c (sim-main.h): Include.
3146 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3148 * configure: Regenerated to track ../common/aclocal.m4 changes.
3150 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3152 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3154 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3156 * gencode.c (build_instruction): DIV instructions: check
3157 for division by zero and integer overflow before using
3158 host's division operation.
3160 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3162 * Makefile.in (SIM_OBJS): Add sim-load.o.
3163 * interp.c: #include bfd.h.
3164 (target_byte_order): Delete.
3165 (sim_kind, myname, big_endian_p): New static locals.
3166 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3167 after argument parsing. Recognize -E arg, set endianness accordingly.
3168 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3169 load file into simulator. Set PC from bfd.
3170 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3171 (set_endianness): Use big_endian_p instead of target_byte_order.
3173 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3175 * interp.c (sim_size): Delete prototype - conflicts with
3176 definition in remote-sim.h. Correct definition.
3178 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3180 * configure: Regenerated to track ../common/aclocal.m4 changes.
3183 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3185 * interp.c (sim_open): New arg `kind'.
3187 * configure: Regenerated to track ../common/aclocal.m4 changes.
3189 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3191 * configure: Regenerated to track ../common/aclocal.m4 changes.
3193 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3195 * interp.c (sim_open): Set optind to 0 before calling getopt.
3197 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3199 * configure: Regenerated to track ../common/aclocal.m4 changes.
3201 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3203 * interp.c : Replace uses of pr_addr with pr_uword64
3204 where the bit length is always 64 independent of SIM_ADDR.
3205 (pr_uword64) : added.
3207 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3209 * configure: Re-generate.
3211 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3213 * configure: Regenerate to track ../common/aclocal.m4 changes.
3215 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3217 * interp.c (sim_open): New SIM_DESC result. Argument is now
3219 (other sim_*): New SIM_DESC argument.
3221 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3223 * interp.c: Fix printing of addresses for non-64-bit targets.
3224 (pr_addr): Add function to print address based on size.
3226 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3228 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3230 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3232 * gencode.c (build_mips16_operands): Correct computation of base
3233 address for extended PC relative instruction.
3235 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3237 * interp.c (mips16_entry): Add support for floating point cases.
3238 (SignalException): Pass floating point cases to mips16_entry.
3239 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3241 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3243 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3244 and then set the state to fmt_uninterpreted.
3245 (COP_SW): Temporarily set the state to fmt_word while calling
3248 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3250 * gencode.c (build_instruction): The high order may be set in the
3251 comparison flags at any ISA level, not just ISA 4.
3253 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3255 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3256 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3257 * configure.in: sinclude ../common/aclocal.m4.
3258 * configure: Regenerated.
3260 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3262 * configure: Rebuild after change to aclocal.m4.
3264 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3266 * configure configure.in Makefile.in: Update to new configure
3267 scheme which is more compatible with WinGDB builds.
3268 * configure.in: Improve comment on how to run autoconf.
3269 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3270 * Makefile.in: Use autoconf substitution to install common
3273 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3275 * gencode.c (build_instruction): Use BigEndianCPU instead of
3278 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3280 * interp.c (sim_monitor): Make output to stdout visible in
3281 wingdb's I/O log window.
3283 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3285 * support.h: Undo previous change to SIGTRAP
3288 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3290 * interp.c (store_word, load_word): New static functions.
3291 (mips16_entry): New static function.
3292 (SignalException): Look for mips16 entry and exit instructions.
3293 (simulate): Use the correct index when setting fpr_state after
3294 doing a pending move.
3296 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3298 * interp.c: Fix byte-swapping code throughout to work on
3299 both little- and big-endian hosts.
3301 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3303 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3304 with gdb/config/i386/xm-windows.h.
3306 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3308 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3309 that messes up arithmetic shifts.
3311 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3313 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3314 SIGTRAP and SIGQUIT for _WIN32.
3316 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3318 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3319 force a 64 bit multiplication.
3320 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3321 destination register is 0, since that is the default mips16 nop
3324 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3326 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3327 (build_endian_shift): Don't check proc64.
3328 (build_instruction): Always set memval to uword64. Cast op2 to
3329 uword64 when shifting it left in memory instructions. Always use
3330 the same code for stores--don't special case proc64.
3332 * gencode.c (build_mips16_operands): Fix base PC value for PC
3334 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3336 * interp.c (simJALDELAYSLOT): Define.
3337 (JALDELAYSLOT): Define.
3338 (INDELAYSLOT, INJALDELAYSLOT): Define.
3339 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3341 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3343 * interp.c (sim_open): add flush_cache as a PMON routine
3344 (sim_monitor): handle flush_cache by ignoring it
3346 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3348 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3350 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3351 (BigEndianMem): Rename to ByteSwapMem and change sense.
3352 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3353 BigEndianMem references to !ByteSwapMem.
3354 (set_endianness): New function, with prototype.
3355 (sim_open): Call set_endianness.
3356 (sim_info): Use simBE instead of BigEndianMem.
3357 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3358 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3359 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3360 ifdefs, keeping the prototype declaration.
3361 (swap_word): Rewrite correctly.
3362 (ColdReset): Delete references to CONFIG. Delete endianness related
3363 code; moved to set_endianness.
3365 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3367 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3368 * interp.c (CHECKHILO): Define away.
3369 (simSIGINT): New macro.
3370 (membank_size): Increase from 1MB to 2MB.
3371 (control_c): New function.
3372 (sim_resume): Rename parameter signal to signal_number. Add local
3373 variable prev. Call signal before and after simulate.
3374 (sim_stop_reason): Add simSIGINT support.
3375 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3377 (sim_warning): Delete call to SignalException. Do call printf_filtered
3379 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3380 a call to sim_warning.
3382 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3384 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3385 16 bit instructions.
3387 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3389 Add support for mips16 (16 bit MIPS implementation):
3390 * gencode.c (inst_type): Add mips16 instruction encoding types.
3391 (GETDATASIZEINSN): Define.
3392 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3393 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3395 (MIPS16_DECODE): New table, for mips16 instructions.
3396 (bitmap_val): New static function.
3397 (struct mips16_op): Define.
3398 (mips16_op_table): New table, for mips16 operands.
3399 (build_mips16_operands): New static function.
3400 (process_instructions): If PC is odd, decode a mips16
3401 instruction. Break out instruction handling into new
3402 build_instruction function.
3403 (build_instruction): New static function, broken out of
3404 process_instructions. Check modifiers rather than flags for SHIFT
3405 bit count and m[ft]{hi,lo} direction.
3406 (usage): Pass program name to fprintf.
3407 (main): Remove unused variable this_option_optind. Change
3408 ``*loptarg++'' to ``loptarg++''.
3409 (my_strtoul): Parenthesize && within ||.
3410 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3411 (simulate): If PC is odd, fetch a 16 bit instruction, and
3412 increment PC by 2 rather than 4.
3413 * configure.in: Add case for mips16*-*-*.
3414 * configure: Rebuild.
3416 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3418 * interp.c: Allow -t to enable tracing in standalone simulator.
3419 Fix garbage output in trace file and error messages.
3421 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3423 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3424 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3425 * configure.in: Simplify using macros in ../common/aclocal.m4.
3426 * configure: Regenerated.
3427 * tconfig.in: New file.
3429 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3431 * interp.c: Fix bugs in 64-bit port.
3432 Use ansi function declarations for msvc compiler.
3433 Initialize and test file pointer in trace code.
3434 Prevent duplicate definition of LAST_EMED_REGNUM.
3436 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3438 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3440 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3442 * interp.c (SignalException): Check for explicit terminating
3444 * gencode.c: Pass instruction value through SignalException()
3445 calls for Trap, Breakpoint and Syscall.
3447 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3449 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3450 only used on those hosts that provide it.
3451 * configure.in: Add sqrt() to list of functions to be checked for.
3452 * config.in: Re-generated.
3453 * configure: Re-generated.
3455 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3457 * gencode.c (process_instructions): Call build_endian_shift when
3458 expanding STORE RIGHT, to fix swr.
3459 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3460 clear the high bits.
3461 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3462 Fix float to int conversions to produce signed values.
3464 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3466 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3467 (process_instructions): Correct handling of nor instruction.
3468 Correct shift count for 32 bit shift instructions. Correct sign
3469 extension for arithmetic shifts to not shift the number of bits in
3470 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3471 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3473 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3474 It's OK to have a mult follow a mult. What's not OK is to have a
3475 mult follow an mfhi.
3476 (Convert): Comment out incorrect rounding code.
3478 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3480 * interp.c (sim_monitor): Improved monitor printf
3481 simulation. Tidied up simulator warnings, and added "--log" option
3482 for directing warning message output.
3483 * gencode.c: Use sim_warning() rather than WARNING macro.
3485 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3487 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3488 getopt1.o, rather than on gencode.c. Link objects together.
3489 Don't link against -liberty.
3490 (gencode.o, getopt.o, getopt1.o): New targets.
3491 * gencode.c: Include <ctype.h> and "ansidecl.h".
3492 (AND): Undefine after including "ansidecl.h".
3493 (ULONG_MAX): Define if not defined.
3494 (OP_*): Don't define macros; now defined in opcode/mips.h.
3495 (main): Call my_strtoul rather than strtoul.
3496 (my_strtoul): New static function.
3498 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3500 * gencode.c (process_instructions): Generate word64 and uword64
3501 instead of `long long' and `unsigned long long' data types.
3502 * interp.c: #include sysdep.h to get signals, and define default
3504 * (Convert): Work around for Visual-C++ compiler bug with type
3506 * support.h: Make things compile under Visual-C++ by using
3507 __int64 instead of `long long'. Change many refs to long long
3508 into word64/uword64 typedefs.
3510 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3512 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3513 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3515 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3516 (AC_PROG_INSTALL): Added.
3517 (AC_PROG_CC): Moved to before configure.host call.
3518 * configure: Rebuilt.
3520 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3522 * configure.in: Define @SIMCONF@ depending on mips target.
3523 * configure: Rebuild.
3524 * Makefile.in (run): Add @SIMCONF@ to control simulator
3526 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3527 * interp.c: Remove some debugging, provide more detailed error
3528 messages, update memory accesses to use LOADDRMASK.
3530 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3532 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3533 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3535 * configure: Rebuild.
3536 * config.in: New file, generated by autoheader.
3537 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3538 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3539 HAVE_ANINT and HAVE_AINT, as appropriate.
3540 * Makefile.in (run): Use @LIBS@ rather than -lm.
3541 (interp.o): Depend upon config.h.
3542 (Makefile): Just rebuild Makefile.
3543 (clean): Remove stamp-h.
3544 (mostlyclean): Make the same as clean, not as distclean.
3545 (config.h, stamp-h): New targets.
3547 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3549 * interp.c (ColdReset): Fix boolean test. Make all simulator
3552 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3554 * interp.c (xfer_direct_word, xfer_direct_long,
3555 swap_direct_word, swap_direct_long, xfer_big_word,
3556 xfer_big_long, xfer_little_word, xfer_little_long,
3557 swap_word,swap_long): Added.
3558 * interp.c (ColdReset): Provide function indirection to
3559 host<->simulated_target transfer routines.
3560 * interp.c (sim_store_register, sim_fetch_register): Updated to
3561 make use of indirected transfer routines.
3563 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3565 * gencode.c (process_instructions): Ensure FP ABS instruction
3567 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3568 system call support.
3570 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3572 * interp.c (sim_do_command): Complain if callback structure not
3575 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3577 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3578 support for Sun hosts.
3579 * Makefile.in (gencode): Ensure the host compiler and libraries
3580 used for cross-hosted build.
3582 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3584 * interp.c, gencode.c: Some more (TODO) tidying.
3586 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3588 * gencode.c, interp.c: Replaced explicit long long references with
3589 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3590 * support.h (SET64LO, SET64HI): Macros added.
3592 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3594 * configure: Regenerate with autoconf 2.7.
3596 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3598 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3599 * support.h: Remove superfluous "1" from #if.
3600 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3602 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3604 * interp.c (StoreFPR): Control UndefinedResult() call on
3605 WARN_RESULT manifest.
3607 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3609 * gencode.c: Tidied instruction decoding, and added FP instruction
3612 * interp.c: Added dineroIII, and BSD profiling support. Also
3613 run-time FP handling.
3615 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3617 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3618 gencode.c, interp.c, support.h: created.
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