1 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
3 * configure.ac: Address use of dv-sockser.o.
4 * tconfig.in: Conditionalize use of dv_sockser_install.
5 * configure: Regenerated.
6 * config.in: Regenerated.
8 2012-10-04 Chao-ying Fu <fu@mips.com>
9 Steve Ellcey <sellcey@mips.com>
11 * mips/mips3264r2.igen (rdhwr): New.
13 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
15 * configure.ac: Always link against dv-sockser.o.
16 * configure: Regenerate.
18 2012-06-15 Joel Brobecker <brobecker@adacore.com>
20 * config.in, configure: Regenerate.
22 2012-05-18 Nick Clifton <nickc@redhat.com>
25 * interp.c: Include config.h before system header files.
27 2012-03-24 Mike Frysinger <vapier@gentoo.org>
29 * aclocal.m4, config.in, configure: Regenerate.
31 2011-12-03 Mike Frysinger <vapier@gentoo.org>
33 * aclocal.m4: New file.
34 * configure: Regenerate.
36 2011-10-19 Mike Frysinger <vapier@gentoo.org>
38 * configure: Regenerate after common/acinclude.m4 update.
40 2011-10-17 Mike Frysinger <vapier@gentoo.org>
42 * configure.ac: Change include to common/acinclude.m4.
44 2011-10-17 Mike Frysinger <vapier@gentoo.org>
46 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
47 call. Replace common.m4 include with SIM_AC_COMMON.
48 * configure: Regenerate.
50 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
52 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
54 (tmp-mach-multi): Exit early when igen fails.
56 2011-07-05 Mike Frysinger <vapier@gentoo.org>
58 * interp.c (sim_do_command): Delete.
60 2011-02-14 Mike Frysinger <vapier@gentoo.org>
62 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
63 (tx3904sio_fifo_reset): Likewise.
64 * interp.c (sim_monitor): Likewise.
66 2010-04-14 Mike Frysinger <vapier@gentoo.org>
68 * interp.c (sim_write): Add const to buffer arg.
70 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
72 * interp.c: Don't include sysdep.h
74 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
76 * configure: Regenerate.
78 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
80 * config.in: Regenerate.
81 * configure: Likewise.
83 * configure: Regenerate.
85 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
87 * configure: Regenerate to track ../common/common.m4 changes.
90 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
91 Daniel Jacobowitz <dan@codesourcery.com>
92 Joseph Myers <joseph@codesourcery.com>
94 * configure: Regenerate.
96 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
98 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
99 that unconditionally allows fmt_ps.
100 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
101 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
102 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
103 filter from 64,f to 32,f.
104 (PREFX): Change filter from 64 to 32.
105 (LDXC1, LUXC1): Provide separate mips32r2 implementations
106 that use do_load_double instead of do_load. Make both LUXC1
107 versions unpredictable if SizeFGR () != 64.
108 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
109 instead of do_store. Remove unused variable. Make both SUXC1
110 versions unpredictable if SizeFGR () != 64.
112 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
114 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
115 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
116 shifts for that case.
118 2007-09-04 Nick Clifton <nickc@redhat.com>
120 * interp.c (options enum): Add OPTION_INFO_MEMORY.
121 (display_mem_info): New static variable.
122 (mips_option_handler): Handle OPTION_INFO_MEMORY.
123 (mips_options): Add info-memory and memory-info.
124 (sim_open): After processing the command line and board
125 specification, check display_mem_info. If it is set then
126 call the real handler for the --memory-info command line
129 2007-08-24 Joel Brobecker <brobecker@adacore.com>
131 * configure.ac: Change license of multi-run.c to GPL version 3.
132 * configure: Regenerate.
134 2007-06-28 Richard Sandiford <richard@codesourcery.com>
136 * configure.ac, configure: Revert last patch.
138 2007-06-26 Richard Sandiford <richard@codesourcery.com>
140 * configure.ac (sim_mipsisa3264_configs): New variable.
141 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
142 every configuration support all four targets, using the triplet to
143 determine the default.
144 * configure: Regenerate.
146 2007-06-25 Richard Sandiford <richard@codesourcery.com>
148 * Makefile.in (m16run.o): New rule.
150 2007-05-15 Thiemo Seufer <ths@mips.com>
152 * mips3264r2.igen (DSHD): Fix compile warning.
154 2007-05-14 Thiemo Seufer <ths@mips.com>
156 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
157 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
158 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
159 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
162 2007-03-01 Thiemo Seufer <ths@mips.com>
164 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
167 2007-02-20 Thiemo Seufer <ths@mips.com>
169 * dsp.igen: Update copyright notice.
170 * dsp2.igen: Fix copyright notice.
172 2007-02-20 Thiemo Seufer <ths@mips.com>
173 Chao-Ying Fu <fu@mips.com>
175 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
176 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
177 Add dsp2 to sim_igen_machine.
178 * configure: Regenerate.
179 * dsp.igen (do_ph_op): Add MUL support when op = 2.
180 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
181 (mulq_rs.ph): Use do_ph_mulq.
182 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
183 * mips.igen: Add dsp2 model and include dsp2.igen.
184 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
185 for *mips32r2, *mips64r2, *dsp.
186 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
187 for *mips32r2, *mips64r2, *dsp2.
188 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
190 2007-02-19 Thiemo Seufer <ths@mips.com>
191 Nigel Stephens <nigel@mips.com>
193 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
194 jumps with hazard barrier.
196 2007-02-19 Thiemo Seufer <ths@mips.com>
197 Nigel Stephens <nigel@mips.com>
199 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
200 after each call to sim_io_write.
202 2007-02-19 Thiemo Seufer <ths@mips.com>
203 Nigel Stephens <nigel@mips.com>
205 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
206 supported by this simulator.
207 (decode_coproc): Recognise additional CP0 Config registers
210 2007-02-19 Thiemo Seufer <ths@mips.com>
211 Nigel Stephens <nigel@mips.com>
212 David Ung <davidu@mips.com>
214 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
215 uninterpreted formats. If fmt is one of the uninterpreted types
216 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
217 fmt_word, and fmt_uninterpreted_64 like fmt_long.
218 (store_fpr): When writing an invalid odd register, set the
219 matching even register to fmt_unknown, not the following register.
220 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
221 the the memory window at offset 0 set by --memory-size command
223 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
225 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
227 (sim_monitor): When returning the memory size to the MIPS
228 application, use the value in STATE_MEM_SIZE, not an arbitrary
230 (cop_lw): Don' mess around with FPR_STATE, just pass
231 fmt_uninterpreted_32 to StoreFPR.
233 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
235 * mips.igen (not_word_value): Single version for mips32, mips64
238 2007-02-19 Thiemo Seufer <ths@mips.com>
239 Nigel Stephens <nigel@mips.com>
241 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
244 2007-02-17 Thiemo Seufer <ths@mips.com>
246 * configure.ac (mips*-sde-elf*): Move in front of generic machine
248 * configure: Regenerate.
250 2007-02-17 Thiemo Seufer <ths@mips.com>
252 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
253 Add mdmx to sim_igen_machine.
254 (mipsisa64*-*-*): Likewise. Remove dsp.
255 (mipsisa32*-*-*): Remove dsp.
256 * configure: Regenerate.
258 2007-02-13 Thiemo Seufer <ths@mips.com>
260 * configure.ac: Add mips*-sde-elf* target.
261 * configure: Regenerate.
263 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
265 * acconfig.h: Remove.
266 * config.in, configure: Regenerate.
268 2006-11-07 Thiemo Seufer <ths@mips.com>
270 * dsp.igen (do_w_op): Fix compiler warning.
272 2006-08-29 Thiemo Seufer <ths@mips.com>
273 David Ung <davidu@mips.com>
275 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
277 * configure: Regenerate.
278 * mips.igen (model): Add smartmips.
279 (MADDU): Increment ACX if carry.
280 (do_mult): Clear ACX.
281 (ROR,RORV): Add smartmips.
282 (include): Include smartmips.igen.
283 * sim-main.h (ACX): Set to REGISTERS[89].
284 * smartmips.igen: New file.
286 2006-08-29 Thiemo Seufer <ths@mips.com>
287 David Ung <davidu@mips.com>
289 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
290 mips3264r2.igen. Add missing dependency rules.
291 * m16e.igen: Support for mips16e save/restore instructions.
293 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
295 * configure: Regenerated.
297 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
299 * configure: Regenerated.
301 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
303 * configure: Regenerated.
305 2006-05-15 Chao-ying Fu <fu@mips.com>
307 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
309 2006-04-18 Nick Clifton <nickc@redhat.com>
311 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
314 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
316 * configure: Regenerate.
318 2005-12-14 Chao-ying Fu <fu@mips.com>
320 * Makefile.in (SIM_OBJS): Add dsp.o.
321 (dsp.o): New dependency.
322 (IGEN_INCLUDE): Add dsp.igen.
323 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
324 mipsisa64*-*-*): Add dsp to sim_igen_machine.
325 * configure: Regenerate.
326 * mips.igen: Add dsp model and include dsp.igen.
327 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
328 because these instructions are extended in DSP ASE.
329 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
330 adding 6 DSP accumulator registers and 1 DSP control register.
331 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
332 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
333 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
334 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
335 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
336 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
337 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
338 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
339 DSPCR_CCOND_SMASK): New define.
340 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
341 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
343 2005-07-08 Ian Lance Taylor <ian@airs.com>
345 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
347 2005-06-16 David Ung <davidu@mips.com>
348 Nigel Stephens <nigel@mips.com>
350 * mips.igen: New mips16e model and include m16e.igen.
351 (check_u64): Add mips16e tag.
352 * m16e.igen: New file for MIPS16e instructions.
353 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
354 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
356 * configure: Regenerate.
358 2005-05-26 David Ung <davidu@mips.com>
360 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
361 tags to all instructions which are applicable to the new ISAs.
362 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
364 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
366 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
368 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
369 * configure: Regenerate.
371 2005-03-23 Mark Kettenis <kettenis@gnu.org>
373 * configure: Regenerate.
375 2005-01-14 Andrew Cagney <cagney@gnu.org>
377 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
378 explicit call to AC_CONFIG_HEADER.
379 * configure: Regenerate.
381 2005-01-12 Andrew Cagney <cagney@gnu.org>
383 * configure.ac: Update to use ../common/common.m4.
384 * configure: Re-generate.
386 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
388 * configure: Regenerated to track ../common/aclocal.m4 changes.
390 2005-01-07 Andrew Cagney <cagney@gnu.org>
392 * configure.ac: Rename configure.in, require autoconf 2.59.
393 * configure: Re-generate.
395 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
397 * configure: Regenerate for ../common/aclocal.m4 update.
399 2004-09-24 Monika Chaddha <monika@acmet.com>
401 Committed by Andrew Cagney.
402 * m16.igen (CMP, CMPI): Fix assembler.
404 2004-08-18 Chris Demetriou <cgd@broadcom.com>
406 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
407 * configure: Regenerate.
409 2004-06-25 Chris Demetriou <cgd@broadcom.com>
411 * configure.in (sim_m16_machine): Include mipsIII.
412 * configure: Regenerate.
414 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
416 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
418 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
420 2004-04-10 Chris Demetriou <cgd@broadcom.com>
422 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
424 2004-04-09 Chris Demetriou <cgd@broadcom.com>
426 * mips.igen (check_fmt): Remove.
427 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
428 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
429 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
430 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
431 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
432 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
433 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
434 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
435 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
436 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
438 2004-04-09 Chris Demetriou <cgd@broadcom.com>
440 * sb1.igen (check_sbx): New function.
441 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
443 2004-03-29 Chris Demetriou <cgd@broadcom.com>
444 Richard Sandiford <rsandifo@redhat.com>
446 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
447 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
448 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
449 separate implementations for mipsIV and mipsV. Use new macros to
450 determine whether the restrictions apply.
452 2004-01-19 Chris Demetriou <cgd@broadcom.com>
454 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
455 (check_mult_hilo): Improve comments.
456 (check_div_hilo): Likewise. Also, fork off a new version
457 to handle mips32/mips64 (since there are no hazards to check
460 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
462 * mips.igen (do_dmultx): Fix check for negative operands.
464 2003-05-16 Ian Lance Taylor <ian@airs.com>
466 * Makefile.in (SHELL): Make sure this is defined.
467 (various): Use $(SHELL) whenever we invoke move-if-change.
469 2003-05-03 Chris Demetriou <cgd@broadcom.com>
471 * cp1.c: Tweak attribution slightly.
474 * mdmx.igen: Likewise.
475 * mips3d.igen: Likewise.
476 * sb1.igen: Likewise.
478 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
480 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
483 2003-02-27 Andrew Cagney <cagney@redhat.com>
485 * interp.c (sim_open): Rename _bfd to bfd.
486 (sim_create_inferior): Ditto.
488 2003-01-14 Chris Demetriou <cgd@broadcom.com>
490 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
492 2003-01-14 Chris Demetriou <cgd@broadcom.com>
494 * mips.igen (EI, DI): Remove.
496 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
498 * Makefile.in (tmp-run-multi): Fix mips16 filter.
500 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
501 Andrew Cagney <ac131313@redhat.com>
502 Gavin Romig-Koch <gavin@redhat.com>
503 Graydon Hoare <graydon@redhat.com>
504 Aldy Hernandez <aldyh@redhat.com>
505 Dave Brolley <brolley@redhat.com>
506 Chris Demetriou <cgd@broadcom.com>
508 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
509 (sim_mach_default): New variable.
510 (mips64vr-*-*, mips64vrel-*-*): New configurations.
511 Add a new simulator generator, MULTI.
512 * configure: Regenerate.
513 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
514 (multi-run.o): New dependency.
515 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
516 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
517 (tmp-multi): Combine them.
518 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
519 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
520 (distclean-extra): New rule.
521 * sim-main.h: Include bfd.h.
522 (MIPS_MACH): New macro.
523 * mips.igen (vr4120, vr5400, vr5500): New models.
524 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
525 * vr.igen: Replace with new version.
527 2003-01-04 Chris Demetriou <cgd@broadcom.com>
529 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
530 * configure: Regenerate.
532 2002-12-31 Chris Demetriou <cgd@broadcom.com>
534 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
535 * mips.igen: Remove all invocations of check_branch_bug and
538 2002-12-16 Chris Demetriou <cgd@broadcom.com>
540 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
542 2002-07-30 Chris Demetriou <cgd@broadcom.com>
544 * mips.igen (do_load_double, do_store_double): New functions.
545 (LDC1, SDC1): Rename to...
546 (LDC1b, SDC1b): respectively.
547 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
549 2002-07-29 Michael Snyder <msnyder@redhat.com>
551 * cp1.c (fp_recip2): Modify initialization expression so that
552 GCC will recognize it as constant.
554 2002-06-18 Chris Demetriou <cgd@broadcom.com>
556 * mdmx.c (SD_): Delete.
557 (Unpredictable): Re-define, for now, to directly invoke
558 unpredictable_action().
559 (mdmx_acc_op): Fix error in .ob immediate handling.
561 2002-06-18 Andrew Cagney <cagney@redhat.com>
563 * interp.c (sim_firmware_command): Initialize `address'.
565 2002-06-16 Andrew Cagney <ac131313@redhat.com>
567 * configure: Regenerated to track ../common/aclocal.m4 changes.
569 2002-06-14 Chris Demetriou <cgd@broadcom.com>
570 Ed Satterthwaite <ehs@broadcom.com>
572 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
573 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
574 * mips.igen: Include mips3d.igen.
575 (mips3d): New model name for MIPS-3D ASE instructions.
576 (CVT.W.fmt): Don't use this instruction for word (source) format
578 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
579 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
580 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
581 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
582 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
583 (RSquareRoot1, RSquareRoot2): New macros.
584 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
585 (fp_rsqrt2): New functions.
586 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
587 * configure: Regenerate.
589 2002-06-13 Chris Demetriou <cgd@broadcom.com>
590 Ed Satterthwaite <ehs@broadcom.com>
592 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
593 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
594 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
595 (convert): Note that this function is not used for paired-single
597 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
598 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
599 (check_fmt_p): Enable paired-single support.
600 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
601 (PUU.PS): New instructions.
602 (CVT.S.fmt): Don't use this instruction for paired-single format
604 * sim-main.h (FP_formats): New value 'fmt_ps.'
605 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
606 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
608 2002-06-12 Chris Demetriou <cgd@broadcom.com>
610 * mips.igen: Fix formatting of function calls in
613 2002-06-12 Chris Demetriou <cgd@broadcom.com>
615 * mips.igen (MOVN, MOVZ): Trace result.
616 (TNEI): Print "tnei" as the opcode name in traces.
617 (CEIL.W): Add disassembly string for traces.
618 (RSQRT.fmt): Make location of disassembly string consistent
619 with other instructions.
621 2002-06-12 Chris Demetriou <cgd@broadcom.com>
623 * mips.igen (X): Delete unused function.
625 2002-06-08 Andrew Cagney <cagney@redhat.com>
627 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
629 2002-06-07 Chris Demetriou <cgd@broadcom.com>
630 Ed Satterthwaite <ehs@broadcom.com>
632 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
633 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
634 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
635 (fp_nmsub): New prototypes.
636 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
637 (NegMultiplySub): New defines.
638 * mips.igen (RSQRT.fmt): Use RSquareRoot().
639 (MADD.D, MADD.S): Replace with...
640 (MADD.fmt): New instruction.
641 (MSUB.D, MSUB.S): Replace with...
642 (MSUB.fmt): New instruction.
643 (NMADD.D, NMADD.S): Replace with...
644 (NMADD.fmt): New instruction.
645 (NMSUB.D, MSUB.S): Replace with...
646 (NMSUB.fmt): New instruction.
648 2002-06-07 Chris Demetriou <cgd@broadcom.com>
649 Ed Satterthwaite <ehs@broadcom.com>
651 * cp1.c: Fix more comment spelling and formatting.
652 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
653 (denorm_mode): New function.
654 (fpu_unary, fpu_binary): Round results after operation, collect
655 status from rounding operations, and update the FCSR.
656 (convert): Collect status from integer conversions and rounding
657 operations, and update the FCSR. Adjust NaN values that result
658 from conversions. Convert to use sim_io_eprintf rather than
659 fprintf, and remove some debugging code.
660 * cp1.h (fenr_FS): New define.
662 2002-06-07 Chris Demetriou <cgd@broadcom.com>
664 * cp1.c (convert): Remove unusable debugging code, and move MIPS
665 rounding mode to sim FP rounding mode flag conversion code into...
666 (rounding_mode): New function.
668 2002-06-07 Chris Demetriou <cgd@broadcom.com>
670 * cp1.c: Clean up formatting of a few comments.
671 (value_fpr): Reformat switch statement.
673 2002-06-06 Chris Demetriou <cgd@broadcom.com>
674 Ed Satterthwaite <ehs@broadcom.com>
677 * sim-main.h: Include cp1.h.
678 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
679 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
680 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
681 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
682 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
683 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
684 * cp1.c: Don't include sim-fpu.h; already included by
685 sim-main.h. Clean up formatting of some comments.
686 (NaN, Equal, Less): Remove.
687 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
688 (fp_cmp): New functions.
689 * mips.igen (do_c_cond_fmt): Remove.
690 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
691 Compare. Add result tracing.
692 (CxC1): Remove, replace with...
693 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
694 (DMxC1): Remove, replace with...
695 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
696 (MxC1): Remove, replace with...
697 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
699 2002-06-04 Chris Demetriou <cgd@broadcom.com>
701 * sim-main.h (FGRIDX): Remove, replace all uses with...
702 (FGR_BASE): New macro.
703 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
704 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
705 (NR_FGR, FGR): Likewise.
706 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
707 * mips.igen: Likewise.
709 2002-06-04 Chris Demetriou <cgd@broadcom.com>
711 * cp1.c: Add an FSF Copyright notice to this file.
713 2002-06-04 Chris Demetriou <cgd@broadcom.com>
714 Ed Satterthwaite <ehs@broadcom.com>
716 * cp1.c (Infinity): Remove.
717 * sim-main.h (Infinity): Likewise.
719 * cp1.c (fp_unary, fp_binary): New functions.
720 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
721 (fp_sqrt): New functions, implemented in terms of the above.
722 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
723 (Recip, SquareRoot): Remove (replaced by functions above).
724 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
725 (fp_recip, fp_sqrt): New prototypes.
726 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
727 (Recip, SquareRoot): Replace prototypes with #defines which
728 invoke the functions above.
730 2002-06-03 Chris Demetriou <cgd@broadcom.com>
732 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
733 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
734 file, remove PARAMS from prototypes.
735 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
736 simulator state arguments.
737 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
738 pass simulator state arguments.
739 * cp1.c (SD): Redefine as CPU_STATE(cpu).
740 (store_fpr, convert): Remove 'sd' argument.
741 (value_fpr): Likewise. Convert to use 'SD' instead.
743 2002-06-03 Chris Demetriou <cgd@broadcom.com>
745 * cp1.c (Min, Max): Remove #if 0'd functions.
746 * sim-main.h (Min, Max): Remove.
748 2002-06-03 Chris Demetriou <cgd@broadcom.com>
750 * cp1.c: fix formatting of switch case and default labels.
751 * interp.c: Likewise.
752 * sim-main.c: Likewise.
754 2002-06-03 Chris Demetriou <cgd@broadcom.com>
756 * cp1.c: Clean up comments which describe FP formats.
757 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
759 2002-06-03 Chris Demetriou <cgd@broadcom.com>
760 Ed Satterthwaite <ehs@broadcom.com>
762 * configure.in (mipsisa64sb1*-*-*): New target for supporting
763 Broadcom SiByte SB-1 processor configurations.
764 * configure: Regenerate.
765 * sb1.igen: New file.
766 * mips.igen: Include sb1.igen.
768 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
769 * mdmx.igen: Add "sb1" model to all appropriate functions and
771 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
772 (ob_func, ob_acc): Reference the above.
773 (qh_acc): Adjust to keep the same size as ob_acc.
774 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
775 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
777 2002-06-03 Chris Demetriou <cgd@broadcom.com>
779 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
781 2002-06-02 Chris Demetriou <cgd@broadcom.com>
782 Ed Satterthwaite <ehs@broadcom.com>
784 * mips.igen (mdmx): New (pseudo-)model.
785 * mdmx.c, mdmx.igen: New files.
786 * Makefile.in (SIM_OBJS): Add mdmx.o.
787 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
789 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
790 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
791 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
792 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
793 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
794 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
795 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
796 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
797 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
798 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
799 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
800 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
801 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
802 (qh_fmtsel): New macros.
803 (_sim_cpu): New member "acc".
804 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
805 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
807 2002-05-01 Chris Demetriou <cgd@broadcom.com>
809 * interp.c: Use 'deprecated' rather than 'depreciated.'
810 * sim-main.h: Likewise.
812 2002-05-01 Chris Demetriou <cgd@broadcom.com>
814 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
815 which wouldn't compile anyway.
816 * sim-main.h (unpredictable_action): New function prototype.
817 (Unpredictable): Define to call igen function unpredictable().
818 (NotWordValue): New macro to call igen function not_word_value().
819 (UndefinedResult): Remove.
820 * interp.c (undefined_result): Remove.
821 (unpredictable_action): New function.
822 * mips.igen (not_word_value, unpredictable): New functions.
823 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
824 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
825 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
826 NotWordValue() to check for unpredictable inputs, then
827 Unpredictable() to handle them.
829 2002-02-24 Chris Demetriou <cgd@broadcom.com>
831 * mips.igen: Fix formatting of calls to Unpredictable().
833 2002-04-20 Andrew Cagney <ac131313@redhat.com>
835 * interp.c (sim_open): Revert previous change.
837 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
839 * interp.c (sim_open): Disable chunk of code that wrote code in
840 vector table entries.
842 2002-03-19 Chris Demetriou <cgd@broadcom.com>
844 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
845 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
848 2002-03-19 Chris Demetriou <cgd@broadcom.com>
850 * cp1.c: Fix many formatting issues.
852 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
854 * cp1.c (fpu_format_name): New function to replace...
855 (DOFMT): This. Delete, and update all callers.
856 (fpu_rounding_mode_name): New function to replace...
857 (RMMODE): This. Delete, and update all callers.
859 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
861 * interp.c: Move FPU support routines from here to...
862 * cp1.c: Here. New file.
863 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
866 2002-03-12 Chris Demetriou <cgd@broadcom.com>
868 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
869 * mips.igen (mips32, mips64): New models, add to all instructions
870 and functions as appropriate.
871 (loadstore_ea, check_u64): New variant for model mips64.
872 (check_fmt_p): New variant for models mipsV and mips64, remove
873 mipsV model marking fro other variant.
876 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
877 for mips32 and mips64.
878 (DCLO, DCLZ): New instructions for mips64.
880 2002-03-07 Chris Demetriou <cgd@broadcom.com>
882 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
883 immediate or code as a hex value with the "%#lx" format.
884 (ANDI): Likewise, and fix printed instruction name.
886 2002-03-05 Chris Demetriou <cgd@broadcom.com>
888 * sim-main.h (UndefinedResult, Unpredictable): New macros
889 which currently do nothing.
891 2002-03-05 Chris Demetriou <cgd@broadcom.com>
893 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
894 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
895 (status_CU3): New definitions.
897 * sim-main.h (ExceptionCause): Add new values for MIPS32
898 and MIPS64: MDMX, MCheck, CacheErr. Update comments
899 for DebugBreakPoint and NMIReset to note their status in
901 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
902 (SignalExceptionCacheErr): New exception macros.
904 2002-03-05 Chris Demetriou <cgd@broadcom.com>
906 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
907 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
909 (SignalExceptionCoProcessorUnusable): Take as argument the
910 unusable coprocessor number.
912 2002-03-05 Chris Demetriou <cgd@broadcom.com>
914 * mips.igen: Fix formatting of all SignalException calls.
916 2002-03-05 Chris Demetriou <cgd@broadcom.com>
918 * sim-main.h (SIGNEXTEND): Remove.
920 2002-03-04 Chris Demetriou <cgd@broadcom.com>
922 * mips.igen: Remove gencode comment from top of file, fix
923 spelling in another comment.
925 2002-03-04 Chris Demetriou <cgd@broadcom.com>
927 * mips.igen (check_fmt, check_fmt_p): New functions to check
928 whether specific floating point formats are usable.
929 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
930 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
931 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
932 Use the new functions.
933 (do_c_cond_fmt): Remove format checks...
934 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
936 2002-03-03 Chris Demetriou <cgd@broadcom.com>
938 * mips.igen: Fix formatting of check_fpu calls.
940 2002-03-03 Chris Demetriou <cgd@broadcom.com>
942 * mips.igen (FLOOR.L.fmt): Store correct destination register.
944 2002-03-03 Chris Demetriou <cgd@broadcom.com>
946 * mips.igen: Remove whitespace at end of lines.
948 2002-03-02 Chris Demetriou <cgd@broadcom.com>
950 * mips.igen (loadstore_ea): New function to do effective
951 address calculations.
952 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
953 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
954 CACHE): Use loadstore_ea to do effective address computations.
956 2002-03-02 Chris Demetriou <cgd@broadcom.com>
958 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
959 * mips.igen (LL, CxC1, MxC1): Likewise.
961 2002-03-02 Chris Demetriou <cgd@broadcom.com>
963 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
964 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
965 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
966 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
967 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
968 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
969 Don't split opcode fields by hand, use the opcode field values
972 2002-03-01 Chris Demetriou <cgd@broadcom.com>
974 * mips.igen (do_divu): Fix spacing.
976 * mips.igen (do_dsllv): Move to be right before DSLLV,
977 to match the rest of the do_<shift> functions.
979 2002-03-01 Chris Demetriou <cgd@broadcom.com>
981 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
982 DSRL32, do_dsrlv): Trace inputs and results.
984 2002-03-01 Chris Demetriou <cgd@broadcom.com>
986 * mips.igen (CACHE): Provide instruction-printing string.
988 * interp.c (signal_exception): Comment tokens after #endif.
990 2002-02-28 Chris Demetriou <cgd@broadcom.com>
992 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
993 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
994 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
995 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
996 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
997 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
998 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
999 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1001 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1003 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1004 instruction-printing string.
1005 (LWU): Use '64' as the filter flag.
1007 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1009 * mips.igen (SDXC1): Fix instruction-printing string.
1011 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1013 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1014 filter flags "32,f".
1016 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1018 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1021 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1023 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1024 add a comma) so that it more closely match the MIPS ISA
1025 documentation opcode partitioning.
1026 (PREF): Put useful names on opcode fields, and include
1027 instruction-printing string.
1029 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1031 * mips.igen (check_u64): New function which in the future will
1032 check whether 64-bit instructions are usable and signal an
1033 exception if not. Currently a no-op.
1034 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1035 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1036 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1037 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1039 * mips.igen (check_fpu): New function which in the future will
1040 check whether FPU instructions are usable and signal an exception
1041 if not. Currently a no-op.
1042 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1043 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1044 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1045 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1046 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1047 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1048 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1049 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1051 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1053 * mips.igen (do_load_left, do_load_right): Move to be immediately
1055 (do_store_left, do_store_right): Move to be immediately following
1058 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1060 * mips.igen (mipsV): New model name. Also, add it to
1061 all instructions and functions where it is appropriate.
1063 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1065 * mips.igen: For all functions and instructions, list model
1066 names that support that instruction one per line.
1068 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1070 * mips.igen: Add some additional comments about supported
1071 models, and about which instructions go where.
1072 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1073 order as is used in the rest of the file.
1075 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1077 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1078 indicating that ALU32_END or ALU64_END are there to check
1080 (DADD): Likewise, but also remove previous comment about
1083 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1085 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1086 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1087 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1088 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1089 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1090 fields (i.e., add and move commas) so that they more closely
1091 match the MIPS ISA documentation opcode partitioning.
1093 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1095 * mips.igen (ADDI): Print immediate value.
1096 (BREAK): Print code.
1097 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1098 (SLL): Print "nop" specially, and don't run the code
1099 that does the shift for the "nop" case.
1101 2001-11-17 Fred Fish <fnf@redhat.com>
1103 * sim-main.h (float_operation): Move enum declaration outside
1104 of _sim_cpu struct declaration.
1106 2001-04-12 Jim Blandy <jimb@redhat.com>
1108 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1109 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1111 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1112 PENDING_FILL, and you can get the intended effect gracefully by
1113 calling PENDING_SCHED directly.
1115 2001-02-23 Ben Elliston <bje@redhat.com>
1117 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1118 already defined elsewhere.
1120 2001-02-19 Ben Elliston <bje@redhat.com>
1122 * sim-main.h (sim_monitor): Return an int.
1123 * interp.c (sim_monitor): Add return values.
1124 (signal_exception): Handle error conditions from sim_monitor.
1126 2001-02-08 Ben Elliston <bje@redhat.com>
1128 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1129 (store_memory): Likewise, pass cia to sim_core_write*.
1131 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1133 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1134 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1136 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1138 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1139 * Makefile.in: Don't delete *.igen when cleaning directory.
1141 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1143 * m16.igen (break): Call SignalException not sim_engine_halt.
1145 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1147 From Jason Eckhardt:
1148 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1150 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1152 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1154 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1156 * mips.igen (do_dmultx): Fix typo.
1158 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1160 * configure: Regenerated to track ../common/aclocal.m4 changes.
1162 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1164 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1166 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1168 * sim-main.h (GPR_CLEAR): Define macro.
1170 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1172 * interp.c (decode_coproc): Output long using %lx and not %s.
1174 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1176 * interp.c (sim_open): Sort & extend dummy memory regions for
1177 --board=jmr3904 for eCos.
1179 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1181 * configure: Regenerated.
1183 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1185 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1186 calls, conditional on the simulator being in verbose mode.
1188 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1190 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1191 cache don't get ReservedInstruction traps.
1193 1999-11-29 Mark Salter <msalter@cygnus.com>
1195 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1196 to clear status bits in sdisr register. This is how the hardware works.
1198 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1199 being used by cygmon.
1201 1999-11-11 Andrew Haley <aph@cygnus.com>
1203 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1206 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1208 * mips.igen (MULT): Correct previous mis-applied patch.
1210 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1212 * mips.igen (delayslot32): Handle sequence like
1213 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1214 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1215 (MULT): Actually pass the third register...
1217 1999-09-03 Mark Salter <msalter@cygnus.com>
1219 * interp.c (sim_open): Added more memory aliases for additional
1220 hardware being touched by cygmon on jmr3904 board.
1222 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1224 * configure: Regenerated to track ../common/aclocal.m4 changes.
1226 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1228 * interp.c (sim_store_register): Handle case where client - GDB -
1229 specifies that a 4 byte register is 8 bytes in size.
1230 (sim_fetch_register): Ditto.
1232 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1234 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1235 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1236 (idt_monitor_base): Base address for IDT monitor traps.
1237 (pmon_monitor_base): Ditto for PMON.
1238 (lsipmon_monitor_base): Ditto for LSI PMON.
1239 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1240 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1241 (sim_firmware_command): New function.
1242 (mips_option_handler): Call it for OPTION_FIRMWARE.
1243 (sim_open): Allocate memory for idt_monitor region. If "--board"
1244 option was given, add no monitor by default. Add BREAK hooks only if
1245 monitors are also there.
1247 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1249 * interp.c (sim_monitor): Flush output before reading input.
1251 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1253 * tconfig.in (SIM_HANDLES_LMA): Always define.
1255 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1257 From Mark Salter <msalter@cygnus.com>:
1258 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1259 (sim_open): Add setup for BSP board.
1261 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1263 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1264 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1265 them as unimplemented.
1267 1999-05-08 Felix Lee <flee@cygnus.com>
1269 * configure: Regenerated to track ../common/aclocal.m4 changes.
1271 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1273 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1275 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1277 * configure.in: Any mips64vr5*-*-* target should have
1278 -DTARGET_ENABLE_FR=1.
1279 (default_endian): Any mips64vr*el-*-* target should default to
1281 * configure: Re-generate.
1283 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1285 * mips.igen (ldl): Extend from _16_, not 32.
1287 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1289 * interp.c (sim_store_register): Force registers written to by GDB
1290 into an un-interpreted state.
1292 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1294 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1295 CPU, start periodic background I/O polls.
1296 (tx3904sio_poll): New function: periodic I/O poller.
1298 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1300 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1302 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1304 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1307 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1309 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1310 (load_word): Call SIM_CORE_SIGNAL hook on error.
1311 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1312 starting. For exception dispatching, pass PC instead of NULL_CIA.
1313 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1314 * sim-main.h (COP0_BADVADDR): Define.
1315 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1316 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1317 (_sim_cpu): Add exc_* fields to store register value snapshots.
1318 * mips.igen (*): Replace memory-related SignalException* calls
1319 with references to SIM_CORE_SIGNAL hook.
1321 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1323 * sim-main.c (*): Minor warning cleanups.
1325 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1327 * m16.igen (DADDIU5): Correct type-o.
1329 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1331 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1334 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1336 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1338 (interp.o): Add dependency on itable.h
1339 (oengine.c, gencode): Delete remaining references.
1340 (BUILT_SRC_FROM_GEN): Clean up.
1342 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1345 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1346 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1347 tmp-run-hack) : New.
1348 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1349 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1350 Drop the "64" qualifier to get the HACK generator working.
1351 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1352 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1353 qualifier to get the hack generator working.
1354 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1355 (DSLL): Use do_dsll.
1356 (DSLLV): Use do_dsllv.
1357 (DSRA): Use do_dsra.
1358 (DSRL): Use do_dsrl.
1359 (DSRLV): Use do_dsrlv.
1360 (BC1): Move *vr4100 to get the HACK generator working.
1361 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1362 get the HACK generator working.
1363 (MACC) Rename to get the HACK generator working.
1364 (DMACC,MACCS,DMACCS): Add the 64.
1366 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1368 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1369 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1371 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1373 * mips/interp.c (DEBUG): Cleanups.
1375 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1377 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1378 (tx3904sio_tickle): fflush after a stdout character output.
1380 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1382 * interp.c (sim_close): Uninstall modules.
1384 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1386 * sim-main.h, interp.c (sim_monitor): Change to global
1389 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1391 * configure.in (vr4100): Only include vr4100 instructions in
1393 * configure: Re-generate.
1394 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1396 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1398 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1399 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1402 * configure.in (sim_default_gen, sim_use_gen): Replace with
1404 (--enable-sim-igen): Delete config option. Always using IGEN.
1405 * configure: Re-generate.
1407 * Makefile.in (gencode): Kill, kill, kill.
1410 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1412 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1413 bit mips16 igen simulator.
1414 * configure: Re-generate.
1416 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1417 as part of vr4100 ISA.
1418 * vr.igen: Mark all instructions as 64 bit only.
1420 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1422 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1425 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1427 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1428 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1429 * configure: Re-generate.
1431 * m16.igen (BREAK): Define breakpoint instruction.
1432 (JALX32): Mark instruction as mips16 and not r3900.
1433 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1435 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1437 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1439 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1440 insn as a debug breakpoint.
1442 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1444 (PENDING_SCHED): Clean up trace statement.
1445 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1446 (PENDING_FILL): Delay write by only one cycle.
1447 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1449 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1451 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1453 (pending_tick): Move incrementing of index to FOR statement.
1454 (pending_tick): Only update PENDING_OUT after a write has occured.
1456 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1458 * configure: Re-generate.
1460 * interp.c (sim_engine_run OLD): Delete explicit call to
1461 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1463 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1465 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1466 interrupt level number to match changed SignalExceptionInterrupt
1469 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1471 * interp.c: #include "itable.h" if WITH_IGEN.
1472 (get_insn_name): New function.
1473 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1474 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1476 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1478 * configure: Rebuilt to inhale new common/aclocal.m4.
1480 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1482 * dv-tx3904sio.c: Include sim-assert.h.
1484 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1486 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1487 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1488 Reorganize target-specific sim-hardware checks.
1489 * configure: rebuilt.
1490 * interp.c (sim_open): For tx39 target boards, set
1491 OPERATING_ENVIRONMENT, add tx3904sio devices.
1492 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1493 ROM executables. Install dv-sockser into sim-modules list.
1495 * dv-tx3904irc.c: Compiler warning clean-up.
1496 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1497 frequent hw-trace messages.
1499 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1501 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1503 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1505 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1507 * vr.igen: New file.
1508 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1509 * mips.igen: Define vr4100 model. Include vr.igen.
1510 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1512 * mips.igen (check_mf_hilo): Correct check.
1514 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1516 * sim-main.h (interrupt_event): Add prototype.
1518 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1519 register_ptr, register_value.
1520 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1522 * sim-main.h (tracefh): Make extern.
1524 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1526 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1527 Reduce unnecessarily high timer event frequency.
1528 * dv-tx3904cpu.c: Ditto for interrupt event.
1530 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1532 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1534 (interrupt_event): Made non-static.
1536 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1537 interchange of configuration values for external vs. internal
1540 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1542 * mips.igen (BREAK): Moved code to here for
1543 simulator-reserved break instructions.
1544 * gencode.c (build_instruction): Ditto.
1545 * interp.c (signal_exception): Code moved from here. Non-
1546 reserved instructions now use exception vector, rather
1548 * sim-main.h: Moved magic constants to here.
1550 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1552 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1553 register upon non-zero interrupt event level, clear upon zero
1555 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1556 by passing zero event value.
1557 (*_io_{read,write}_buffer): Endianness fixes.
1558 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1559 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1561 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1562 serial I/O and timer module at base address 0xFFFF0000.
1564 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1566 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1569 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1571 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1573 * configure: Update.
1575 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1577 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1578 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1579 * configure.in: Include tx3904tmr in hw_device list.
1580 * configure: Rebuilt.
1581 * interp.c (sim_open): Instantiate three timer instances.
1582 Fix address typo of tx3904irc instance.
1584 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1586 * interp.c (signal_exception): SystemCall exception now uses
1587 the exception vector.
1589 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1591 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1594 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1596 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1598 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1600 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1602 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1603 sim-main.h. Declare a struct hw_descriptor instead of struct
1604 hw_device_descriptor.
1606 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1608 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1609 right bits and then re-align left hand bytes to correct byte
1610 lanes. Fix incorrect computation in do_store_left when loading
1611 bytes from second word.
1613 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1615 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1616 * interp.c (sim_open): Only create a device tree when HW is
1619 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1620 * interp.c (signal_exception): Ditto.
1622 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1624 * gencode.c: Mark BEGEZALL as LIKELY.
1626 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1628 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1629 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1631 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1633 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1634 modules. Recognize TX39 target with "mips*tx39" pattern.
1635 * configure: Rebuilt.
1636 * sim-main.h (*): Added many macros defining bits in
1637 TX39 control registers.
1638 (SignalInterrupt): Send actual PC instead of NULL.
1639 (SignalNMIReset): New exception type.
1640 * interp.c (board): New variable for future use to identify
1641 a particular board being simulated.
1642 (mips_option_handler,mips_options): Added "--board" option.
1643 (interrupt_event): Send actual PC.
1644 (sim_open): Make memory layout conditional on board setting.
1645 (signal_exception): Initial implementation of hardware interrupt
1646 handling. Accept another break instruction variant for simulator
1648 (decode_coproc): Implement RFE instruction for TX39.
1649 (mips.igen): Decode RFE instruction as such.
1650 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1651 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1652 bbegin to implement memory map.
1653 * dv-tx3904cpu.c: New file.
1654 * dv-tx3904irc.c: New file.
1656 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1658 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1660 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1662 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1663 with calls to check_div_hilo.
1665 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1667 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1668 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1669 Add special r3900 version of do_mult_hilo.
1670 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1671 with calls to check_mult_hilo.
1672 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1673 with calls to check_div_hilo.
1675 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1677 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1678 Document a replacement.
1680 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1682 * interp.c (sim_monitor): Make mon_printf work.
1684 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1686 * sim-main.h (INSN_NAME): New arg `cpu'.
1688 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1690 * configure: Regenerated to track ../common/aclocal.m4 changes.
1692 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1694 * configure: Regenerated to track ../common/aclocal.m4 changes.
1697 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1699 * acconfig.h: New file.
1700 * configure.in: Reverted change of Apr 24; use sinclude again.
1702 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1704 * configure: Regenerated to track ../common/aclocal.m4 changes.
1707 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1709 * configure.in: Don't call sinclude.
1711 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1713 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1715 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1717 * mips.igen (ERET): Implement.
1719 * interp.c (decode_coproc): Return sign-extended EPC.
1721 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1723 * interp.c (signal_exception): Do not ignore Trap.
1724 (signal_exception): On TRAP, restart at exception address.
1725 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1726 (signal_exception): Update.
1727 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1728 so that TRAP instructions are caught.
1730 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1732 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1733 contains HI/LO access history.
1734 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1735 (HIACCESS, LOACCESS): Delete, replace with
1736 (HIHISTORY, LOHISTORY): New macros.
1737 (CHECKHILO): Delete all, moved to mips.igen
1739 * gencode.c (build_instruction): Do not generate checks for
1740 correct HI/LO register usage.
1742 * interp.c (old_engine_run): Delete checks for correct HI/LO
1745 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1746 check_mf_cycles): New functions.
1747 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1748 do_divu, domultx, do_mult, do_multu): Use.
1750 * tx.igen ("madd", "maddu"): Use.
1752 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1754 * mips.igen (DSRAV): Use function do_dsrav.
1755 (SRAV): Use new function do_srav.
1757 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1758 (B): Sign extend 11 bit immediate.
1759 (EXT-B*): Shift 16 bit immediate left by 1.
1760 (ADDIU*): Don't sign extend immediate value.
1762 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1764 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1766 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1769 * mips.igen (delayslot32, nullify_next_insn): New functions.
1770 (m16.igen): Always include.
1771 (do_*): Add more tracing.
1773 * m16.igen (delayslot16): Add NIA argument, could be called by a
1774 32 bit MIPS16 instruction.
1776 * interp.c (ifetch16): Move function from here.
1777 * sim-main.c (ifetch16): To here.
1779 * sim-main.c (ifetch16, ifetch32): Update to match current
1780 implementations of LH, LW.
1781 (signal_exception): Don't print out incorrect hex value of illegal
1784 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1786 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1789 * m16.igen: Implement MIPS16 instructions.
1791 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1792 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1793 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1794 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1795 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1796 bodies of corresponding code from 32 bit insn to these. Also used
1797 by MIPS16 versions of functions.
1799 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1800 (IMEM16): Drop NR argument from macro.
1802 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1804 * Makefile.in (SIM_OBJS): Add sim-main.o.
1806 * sim-main.h (address_translation, load_memory, store_memory,
1807 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1809 (pr_addr, pr_uword64): Declare.
1810 (sim-main.c): Include when H_REVEALS_MODULE_P.
1812 * interp.c (address_translation, load_memory, store_memory,
1813 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1815 * sim-main.c: To here. Fix compilation problems.
1817 * configure.in: Enable inlining.
1818 * configure: Re-config.
1820 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1822 * configure: Regenerated to track ../common/aclocal.m4 changes.
1824 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1826 * mips.igen: Include tx.igen.
1827 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1828 * tx.igen: New file, contains MADD and MADDU.
1830 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1831 the hardwired constant `7'.
1832 (store_memory): Ditto.
1833 (LOADDRMASK): Move definition to sim-main.h.
1835 mips.igen (MTC0): Enable for r3900.
1838 mips.igen (do_load_byte): Delete.
1839 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1840 do_store_right): New functions.
1841 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1843 configure.in: Let the tx39 use igen again.
1846 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1848 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1849 not an address sized quantity. Return zero for cache sizes.
1851 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1853 * mips.igen (r3900): r3900 does not support 64 bit integer
1856 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1858 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1860 * configure : Rebuild.
1862 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1864 * configure: Regenerated to track ../common/aclocal.m4 changes.
1866 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1868 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1870 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1872 * configure: Regenerated to track ../common/aclocal.m4 changes.
1873 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1875 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1877 * configure: Regenerated to track ../common/aclocal.m4 changes.
1879 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1881 * interp.c (Max, Min): Comment out functions. Not yet used.
1883 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1885 * configure: Regenerated to track ../common/aclocal.m4 changes.
1887 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1889 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1890 configurable settings for stand-alone simulator.
1892 * configure.in: Added X11 search, just in case.
1894 * configure: Regenerated.
1896 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1898 * interp.c (sim_write, sim_read, load_memory, store_memory):
1899 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1901 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1903 * sim-main.h (GETFCC): Return an unsigned value.
1905 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1907 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1908 (DADD): Result destination is RD not RT.
1910 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1912 * sim-main.h (HIACCESS, LOACCESS): Always define.
1914 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1916 * interp.c (sim_info): Delete.
1918 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1920 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1921 (mips_option_handler): New argument `cpu'.
1922 (sim_open): Update call to sim_add_option_table.
1924 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1926 * mips.igen (CxC1): Add tracing.
1928 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1930 * sim-main.h (Max, Min): Declare.
1932 * interp.c (Max, Min): New functions.
1934 * mips.igen (BC1): Add tracing.
1936 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1938 * interp.c Added memory map for stack in vr4100
1940 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1942 * interp.c (load_memory): Add missing "break"'s.
1944 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * interp.c (sim_store_register, sim_fetch_register): Pass in
1947 length parameter. Return -1.
1949 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1951 * interp.c: Added hardware init hook, fixed warnings.
1953 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1955 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1957 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1959 * interp.c (ifetch16): New function.
1961 * sim-main.h (IMEM32): Rename IMEM.
1962 (IMEM16_IMMED): Define.
1964 (DELAY_SLOT): Update.
1966 * m16run.c (sim_engine_run): New file.
1968 * m16.igen: All instructions except LB.
1969 (LB): Call do_load_byte.
1970 * mips.igen (do_load_byte): New function.
1971 (LB): Call do_load_byte.
1973 * mips.igen: Move spec for insn bit size and high bit from here.
1974 * Makefile.in (tmp-igen, tmp-m16): To here.
1976 * m16.dc: New file, decode mips16 instructions.
1978 * Makefile.in (SIM_NO_ALL): Define.
1979 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1981 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1983 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1984 point unit to 32 bit registers.
1985 * configure: Re-generate.
1987 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1989 * configure.in (sim_use_gen): Make IGEN the default simulator
1990 generator for generic 32 and 64 bit mips targets.
1991 * configure: Re-generate.
1993 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1995 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1998 * interp.c (sim_fetch_register, sim_store_register): Read/write
1999 FGR from correct location.
2000 (sim_open): Set size of FGR's according to
2001 WITH_TARGET_FLOATING_POINT_BITSIZE.
2003 * sim-main.h (FGR): Store floating point registers in a separate
2006 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2008 * configure: Regenerated to track ../common/aclocal.m4 changes.
2010 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2012 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2014 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2016 * interp.c (pending_tick): New function. Deliver pending writes.
2018 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2019 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2020 it can handle mixed sized quantites and single bits.
2022 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2024 * interp.c (oengine.h): Do not include when building with IGEN.
2025 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2026 (sim_info): Ditto for PROCESSOR_64BIT.
2027 (sim_monitor): Replace ut_reg with unsigned_word.
2028 (*): Ditto for t_reg.
2029 (LOADDRMASK): Define.
2030 (sim_open): Remove defunct check that host FP is IEEE compliant,
2031 using software to emulate floating point.
2032 (value_fpr, ...): Always compile, was conditional on HASFPU.
2034 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2036 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2039 * interp.c (SD, CPU): Define.
2040 (mips_option_handler): Set flags in each CPU.
2041 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2042 (sim_close): Do not clear STATE, deleted anyway.
2043 (sim_write, sim_read): Assume CPU zero's vm should be used for
2045 (sim_create_inferior): Set the PC for all processors.
2046 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2048 (mips16_entry): Pass correct nr of args to store_word, load_word.
2049 (ColdReset): Cold reset all cpu's.
2050 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2051 (sim_monitor, load_memory, store_memory, signal_exception): Use
2052 `CPU' instead of STATE_CPU.
2055 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2058 * sim-main.h (signal_exception): Add sim_cpu arg.
2059 (SignalException*): Pass both SD and CPU to signal_exception.
2060 * interp.c (signal_exception): Update.
2062 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2064 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2065 address_translation): Ditto
2066 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2068 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2070 * configure: Regenerated to track ../common/aclocal.m4 changes.
2072 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2074 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2076 * mips.igen (model): Map processor names onto BFD name.
2078 * sim-main.h (CPU_CIA): Delete.
2079 (SET_CIA, GET_CIA): Define
2081 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2083 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2086 * configure.in (default_endian): Configure a big-endian simulator
2088 * configure: Re-generate.
2090 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2092 * configure: Regenerated to track ../common/aclocal.m4 changes.
2094 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2096 * interp.c (sim_monitor): Handle Densan monitor outbyte
2097 and inbyte functions.
2099 1997-12-29 Felix Lee <flee@cygnus.com>
2101 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2103 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2105 * Makefile.in (tmp-igen): Arrange for $zero to always be
2106 reset to zero after every instruction.
2108 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2110 * configure: Regenerated to track ../common/aclocal.m4 changes.
2113 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2115 * mips.igen (MSUB): Fix to work like MADD.
2116 * gencode.c (MSUB): Similarly.
2118 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2120 * configure: Regenerated to track ../common/aclocal.m4 changes.
2122 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2124 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2126 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2128 * sim-main.h (sim-fpu.h): Include.
2130 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2131 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2132 using host independant sim_fpu module.
2134 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2136 * interp.c (signal_exception): Report internal errors with SIGABRT
2139 * sim-main.h (C0_CONFIG): New register.
2140 (signal.h): No longer include.
2142 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2144 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2146 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2148 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2150 * mips.igen: Tag vr5000 instructions.
2151 (ANDI): Was missing mipsIV model, fix assembler syntax.
2152 (do_c_cond_fmt): New function.
2153 (C.cond.fmt): Handle mips I-III which do not support CC field
2155 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2156 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2158 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2159 vr5000 which saves LO in a GPR separatly.
2161 * configure.in (enable-sim-igen): For vr5000, select vr5000
2162 specific instructions.
2163 * configure: Re-generate.
2165 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2167 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2169 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2170 fmt_uninterpreted_64 bit cases to switch. Convert to
2173 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2175 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2176 as specified in IV3.2 spec.
2177 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2179 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2181 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2182 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2183 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2184 PENDING_FILL versions of instructions. Simplify.
2186 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2188 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2190 (MTHI, MFHI): Disable code checking HI-LO.
2192 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2194 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2196 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2198 * gencode.c (build_mips16_operands): Replace IPC with cia.
2200 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2201 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2203 (UndefinedResult): Replace function with macro/function
2205 (sim_engine_run): Don't save PC in IPC.
2207 * sim-main.h (IPC): Delete.
2210 * interp.c (signal_exception, store_word, load_word,
2211 address_translation, load_memory, store_memory, cache_op,
2212 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2213 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2214 current instruction address - cia - argument.
2215 (sim_read, sim_write): Call address_translation directly.
2216 (sim_engine_run): Rename variable vaddr to cia.
2217 (signal_exception): Pass cia to sim_monitor
2219 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2220 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2221 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2223 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2224 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2227 * interp.c (signal_exception): Pass restart address to
2230 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2231 idecode.o): Add dependency.
2233 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2235 (DELAY_SLOT): Update NIA not PC with branch address.
2236 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2238 * mips.igen: Use CIA not PC in branch calculations.
2239 (illegal): Call SignalException.
2240 (BEQ, ADDIU): Fix assembler.
2242 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2244 * m16.igen (JALX): Was missing.
2246 * configure.in (enable-sim-igen): New configuration option.
2247 * configure: Re-generate.
2249 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2251 * interp.c (load_memory, store_memory): Delete parameter RAW.
2252 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2253 bypassing {load,store}_memory.
2255 * sim-main.h (ByteSwapMem): Delete definition.
2257 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2259 * interp.c (sim_do_command, sim_commands): Delete mips specific
2260 commands. Handled by module sim-options.
2262 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2263 (WITH_MODULO_MEMORY): Define.
2265 * interp.c (sim_info): Delete code printing memory size.
2267 * interp.c (mips_size): Nee sim_size, delete function.
2269 (monitor, monitor_base, monitor_size): Delete global variables.
2270 (sim_open, sim_close): Delete code creating monitor and other
2271 memory regions. Use sim-memopts module, via sim_do_commandf, to
2272 manage memory regions.
2273 (load_memory, store_memory): Use sim-core for memory model.
2275 * interp.c (address_translation): Delete all memory map code
2276 except line forcing 32 bit addresses.
2278 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2280 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2283 * interp.c (logfh, logfile): Delete globals.
2284 (sim_open, sim_close): Delete code opening & closing log file.
2285 (mips_option_handler): Delete -l and -n options.
2286 (OPTION mips_options): Ditto.
2288 * interp.c (OPTION mips_options): Rename option trace to dinero.
2289 (mips_option_handler): Update.
2291 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2293 * interp.c (fetch_str): New function.
2294 (sim_monitor): Rewrite using sim_read & sim_write.
2295 (sim_open): Check magic number.
2296 (sim_open): Write monitor vectors into memory using sim_write.
2297 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2298 (sim_read, sim_write): Simplify - transfer data one byte at a
2300 (load_memory, store_memory): Clarify meaning of parameter RAW.
2302 * sim-main.h (isHOST): Defete definition.
2303 (isTARGET): Mark as depreciated.
2304 (address_translation): Delete parameter HOST.
2306 * interp.c (address_translation): Delete parameter HOST.
2308 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2312 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2313 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2315 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2317 * mips.igen: Add model filter field to records.
2319 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2321 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2323 interp.c (sim_engine_run): Do not compile function sim_engine_run
2324 when WITH_IGEN == 1.
2326 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2327 target architecture.
2329 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2330 igen. Replace with configuration variables sim_igen_flags /
2333 * m16.igen: New file. Copy mips16 insns here.
2334 * mips.igen: From here.
2336 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2338 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2340 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2342 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2344 * gencode.c (build_instruction): Follow sim_write's lead in using
2345 BigEndianMem instead of !ByteSwapMem.
2347 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2349 * configure.in (sim_gen): Dependent on target, select type of
2350 generator. Always select old style generator.
2352 configure: Re-generate.
2354 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2356 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2357 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2358 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2359 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2360 SIM_@sim_gen@_*, set by autoconf.
2362 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2364 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2366 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2367 CURRENT_FLOATING_POINT instead.
2369 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2370 (address_translation): Raise exception InstructionFetch when
2371 translation fails and isINSTRUCTION.
2373 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2374 sim_engine_run): Change type of of vaddr and paddr to
2376 (address_translation, prefetch, load_memory, store_memory,
2377 cache_op): Change type of vAddr and pAddr to address_word.
2379 * gencode.c (build_instruction): Change type of vaddr and paddr to
2382 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2384 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2385 macro to obtain result of ALU op.
2387 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2389 * interp.c (sim_info): Call profile_print.
2391 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2393 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2395 * sim-main.h (WITH_PROFILE): Do not define, defined in
2396 common/sim-config.h. Use sim-profile module.
2397 (simPROFILE): Delete defintion.
2399 * interp.c (PROFILE): Delete definition.
2400 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2401 (sim_close): Delete code writing profile histogram.
2402 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2404 (sim_engine_run): Delete code profiling the PC.
2406 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2408 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2410 * interp.c (sim_monitor): Make register pointers of type
2413 * sim-main.h: Make registers of type unsigned_word not
2416 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2418 * interp.c (sync_operation): Rename from SyncOperation, make
2419 global, add SD argument.
2420 (prefetch): Rename from Prefetch, make global, add SD argument.
2421 (decode_coproc): Make global.
2423 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2425 * gencode.c (build_instruction): Generate DecodeCoproc not
2426 decode_coproc calls.
2428 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2429 (SizeFGR): Move to sim-main.h
2430 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2431 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2432 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2434 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2435 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2436 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2437 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2438 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2439 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2441 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2443 (sim-alu.h): Include.
2444 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2445 (sim_cia): Typedef to instruction_address.
2447 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2449 * Makefile.in (interp.o): Rename generated file engine.c to
2454 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2456 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2458 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2460 * gencode.c (build_instruction): For "FPSQRT", output correct
2461 number of arguments to Recip.
2463 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2465 * Makefile.in (interp.o): Depends on sim-main.h
2467 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2469 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2470 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2471 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2472 STATE, DSSTATE): Define
2473 (GPR, FGRIDX, ..): Define.
2475 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2476 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2477 (GPR, FGRIDX, ...): Delete macros.
2479 * interp.c: Update names to match defines from sim-main.h
2481 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2483 * interp.c (sim_monitor): Add SD argument.
2484 (sim_warning): Delete. Replace calls with calls to
2486 (sim_error): Delete. Replace calls with sim_io_error.
2487 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2488 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2489 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2491 (mips_size): Rename from sim_size. Add SD argument.
2493 * interp.c (simulator): Delete global variable.
2494 (callback): Delete global variable.
2495 (mips_option_handler, sim_open, sim_write, sim_read,
2496 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2497 sim_size,sim_monitor): Use sim_io_* not callback->*.
2498 (sim_open): ZALLOC simulator struct.
2499 (PROFILE): Do not define.
2501 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2503 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2504 support.h with corresponding code.
2506 * sim-main.h (word64, uword64), support.h: Move definition to
2508 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2511 * Makefile.in: Update dependencies
2512 * interp.c: Do not include.
2514 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2516 * interp.c (address_translation, load_memory, store_memory,
2517 cache_op): Rename to from AddressTranslation et.al., make global,
2520 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2523 * interp.c (SignalException): Rename to signal_exception, make
2526 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2528 * sim-main.h (SignalException, SignalExceptionInterrupt,
2529 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2530 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2531 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2534 * interp.c, support.h: Use.
2536 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2538 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2539 to value_fpr / store_fpr. Add SD argument.
2540 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2541 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2543 * sim-main.h (ValueFPR, StoreFPR): Define.
2545 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2547 * interp.c (sim_engine_run): Check consistency between configure
2548 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2551 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2552 (mips_fpu): Configure WITH_FLOATING_POINT.
2553 (mips_endian): Configure WITH_TARGET_ENDIAN.
2554 * configure: Update.
2556 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2558 * configure: Regenerated to track ../common/aclocal.m4 changes.
2560 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2562 * configure: Regenerated.
2564 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2566 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2568 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2570 * gencode.c (print_igen_insn_models): Assume certain architectures
2571 include all mips* instructions.
2572 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2575 * Makefile.in (tmp.igen): Add target. Generate igen input from
2578 * gencode.c (FEATURE_IGEN): Define.
2579 (main): Add --igen option. Generate output in igen format.
2580 (process_instructions): Format output according to igen option.
2581 (print_igen_insn_format): New function.
2582 (print_igen_insn_models): New function.
2583 (process_instructions): Only issue warnings and ignore
2584 instructions when no FEATURE_IGEN.
2586 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2588 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2591 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2593 * configure: Regenerated to track ../common/aclocal.m4 changes.
2595 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2597 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2598 SIM_RESERVED_BITS): Delete, moved to common.
2599 (SIM_EXTRA_CFLAGS): Update.
2601 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2603 * configure.in: Configure non-strict memory alignment.
2604 * configure: Regenerated to track ../common/aclocal.m4 changes.
2606 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2608 * configure: Regenerated to track ../common/aclocal.m4 changes.
2610 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2612 * gencode.c (SDBBP,DERET): Added (3900) insns.
2613 (RFE): Turn on for 3900.
2614 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2615 (dsstate): Made global.
2616 (SUBTARGET_R3900): Added.
2617 (CANCELDELAYSLOT): New.
2618 (SignalException): Ignore SystemCall rather than ignore and
2619 terminate. Add DebugBreakPoint handling.
2620 (decode_coproc): New insns RFE, DERET; and new registers Debug
2621 and DEPC protected by SUBTARGET_R3900.
2622 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2624 * Makefile.in,configure.in: Add mips subtarget option.
2625 * configure: Update.
2627 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2629 * gencode.c: Add r3900 (tx39).
2632 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2634 * gencode.c (build_instruction): Don't need to subtract 4 for
2637 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2639 * interp.c: Correct some HASFPU problems.
2641 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2643 * configure: Regenerated to track ../common/aclocal.m4 changes.
2645 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2647 * interp.c (mips_options): Fix samples option short form, should
2650 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2652 * interp.c (sim_info): Enable info code. Was just returning.
2654 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2656 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2659 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2661 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2663 (build_instruction): Ditto for LL.
2665 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2667 * configure: Regenerated to track ../common/aclocal.m4 changes.
2669 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2671 * configure: Regenerated to track ../common/aclocal.m4 changes.
2674 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2676 * interp.c (sim_open): Add call to sim_analyze_program, update
2679 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2681 * interp.c (sim_kill): Delete.
2682 (sim_create_inferior): Add ABFD argument. Set PC from same.
2683 (sim_load): Move code initializing trap handlers from here.
2684 (sim_open): To here.
2685 (sim_load): Delete, use sim-hload.c.
2687 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2689 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2691 * configure: Regenerated to track ../common/aclocal.m4 changes.
2694 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2696 * interp.c (sim_open): Add ABFD argument.
2697 (sim_load): Move call to sim_config from here.
2698 (sim_open): To here. Check return status.
2700 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2702 * gencode.c (build_instruction): Two arg MADD should
2703 not assign result to $0.
2705 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2707 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2708 * sim/mips/configure.in: Regenerate.
2710 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2712 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2713 signed8, unsigned8 et.al. types.
2715 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2716 hosts when selecting subreg.
2718 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2720 * interp.c (sim_engine_run): Reset the ZERO register to zero
2721 regardless of FEATURE_WARN_ZERO.
2722 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2724 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2727 (SignalException): For BreakPoints ignore any mode bits and just
2729 (SignalException): Always set the CAUSE register.
2731 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2733 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2734 exception has been taken.
2736 * interp.c: Implement the ERET and mt/f sr instructions.
2738 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2740 * interp.c (SignalException): Don't bother restarting an
2743 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2745 * interp.c (SignalException): Really take an interrupt.
2746 (interrupt_event): Only deliver interrupts when enabled.
2748 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2750 * interp.c (sim_info): Only print info when verbose.
2751 (sim_info) Use sim_io_printf for output.
2753 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2755 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2758 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2760 * interp.c (sim_do_command): Check for common commands if a
2761 simulator specific command fails.
2763 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2765 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2766 and simBE when DEBUG is defined.
2768 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2770 * interp.c (interrupt_event): New function. Pass exception event
2771 onto exception handler.
2773 * configure.in: Check for stdlib.h.
2774 * configure: Regenerate.
2776 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2777 variable declaration.
2778 (build_instruction): Initialize memval1.
2779 (build_instruction): Add UNUSED attribute to byte, bigend,
2781 (build_operands): Ditto.
2783 * interp.c: Fix GCC warnings.
2784 (sim_get_quit_code): Delete.
2786 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2787 * Makefile.in: Ditto.
2788 * configure: Re-generate.
2790 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2792 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2794 * interp.c (mips_option_handler): New function parse argumes using
2796 (myname): Replace with STATE_MY_NAME.
2797 (sim_open): Delete check for host endianness - performed by
2799 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2800 (sim_open): Move much of the initialization from here.
2801 (sim_load): To here. After the image has been loaded and
2803 (sim_open): Move ColdReset from here.
2804 (sim_create_inferior): To here.
2805 (sim_open): Make FP check less dependant on host endianness.
2807 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2809 * interp.c (sim_set_callbacks): Delete.
2811 * interp.c (membank, membank_base, membank_size): Replace with
2812 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2813 (sim_open): Remove call to callback->init. gdb/run do this.
2817 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2819 * interp.c (big_endian_p): Delete, replaced by
2820 current_target_byte_order.
2822 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2824 * interp.c (host_read_long, host_read_word, host_swap_word,
2825 host_swap_long): Delete. Using common sim-endian.
2826 (sim_fetch_register, sim_store_register): Use H2T.
2827 (pipeline_ticks): Delete. Handled by sim-events.
2829 (sim_engine_run): Update.
2831 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2833 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2835 (SignalException): To here. Signal using sim_engine_halt.
2836 (sim_stop_reason): Delete, moved to common.
2838 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2840 * interp.c (sim_open): Add callback argument.
2841 (sim_set_callbacks): Delete SIM_DESC argument.
2844 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2846 * Makefile.in (SIM_OBJS): Add common modules.
2848 * interp.c (sim_set_callbacks): Also set SD callback.
2849 (set_endianness, xfer_*, swap_*): Delete.
2850 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2851 Change to functions using sim-endian macros.
2852 (control_c, sim_stop): Delete, use common version.
2853 (simulate): Convert into.
2854 (sim_engine_run): This function.
2855 (sim_resume): Delete.
2857 * interp.c (simulation): New variable - the simulator object.
2858 (sim_kind): Delete global - merged into simulation.
2859 (sim_load): Cleanup. Move PC assignment from here.
2860 (sim_create_inferior): To here.
2862 * sim-main.h: New file.
2863 * interp.c (sim-main.h): Include.
2865 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2867 * configure: Regenerated to track ../common/aclocal.m4 changes.
2869 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2871 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2873 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2875 * gencode.c (build_instruction): DIV instructions: check
2876 for division by zero and integer overflow before using
2877 host's division operation.
2879 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2881 * Makefile.in (SIM_OBJS): Add sim-load.o.
2882 * interp.c: #include bfd.h.
2883 (target_byte_order): Delete.
2884 (sim_kind, myname, big_endian_p): New static locals.
2885 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2886 after argument parsing. Recognize -E arg, set endianness accordingly.
2887 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2888 load file into simulator. Set PC from bfd.
2889 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2890 (set_endianness): Use big_endian_p instead of target_byte_order.
2892 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2894 * interp.c (sim_size): Delete prototype - conflicts with
2895 definition in remote-sim.h. Correct definition.
2897 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2899 * configure: Regenerated to track ../common/aclocal.m4 changes.
2902 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2904 * interp.c (sim_open): New arg `kind'.
2906 * configure: Regenerated to track ../common/aclocal.m4 changes.
2908 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2910 * configure: Regenerated to track ../common/aclocal.m4 changes.
2912 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2914 * interp.c (sim_open): Set optind to 0 before calling getopt.
2916 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2918 * configure: Regenerated to track ../common/aclocal.m4 changes.
2920 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2922 * interp.c : Replace uses of pr_addr with pr_uword64
2923 where the bit length is always 64 independent of SIM_ADDR.
2924 (pr_uword64) : added.
2926 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2928 * configure: Re-generate.
2930 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2932 * configure: Regenerate to track ../common/aclocal.m4 changes.
2934 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2936 * interp.c (sim_open): New SIM_DESC result. Argument is now
2938 (other sim_*): New SIM_DESC argument.
2940 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2942 * interp.c: Fix printing of addresses for non-64-bit targets.
2943 (pr_addr): Add function to print address based on size.
2945 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2947 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2949 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2951 * gencode.c (build_mips16_operands): Correct computation of base
2952 address for extended PC relative instruction.
2954 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2956 * interp.c (mips16_entry): Add support for floating point cases.
2957 (SignalException): Pass floating point cases to mips16_entry.
2958 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2960 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2962 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2963 and then set the state to fmt_uninterpreted.
2964 (COP_SW): Temporarily set the state to fmt_word while calling
2967 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2969 * gencode.c (build_instruction): The high order may be set in the
2970 comparison flags at any ISA level, not just ISA 4.
2972 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2974 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2975 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2976 * configure.in: sinclude ../common/aclocal.m4.
2977 * configure: Regenerated.
2979 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2981 * configure: Rebuild after change to aclocal.m4.
2983 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2985 * configure configure.in Makefile.in: Update to new configure
2986 scheme which is more compatible with WinGDB builds.
2987 * configure.in: Improve comment on how to run autoconf.
2988 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2989 * Makefile.in: Use autoconf substitution to install common
2992 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2994 * gencode.c (build_instruction): Use BigEndianCPU instead of
2997 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2999 * interp.c (sim_monitor): Make output to stdout visible in
3000 wingdb's I/O log window.
3002 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3004 * support.h: Undo previous change to SIGTRAP
3007 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3009 * interp.c (store_word, load_word): New static functions.
3010 (mips16_entry): New static function.
3011 (SignalException): Look for mips16 entry and exit instructions.
3012 (simulate): Use the correct index when setting fpr_state after
3013 doing a pending move.
3015 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3017 * interp.c: Fix byte-swapping code throughout to work on
3018 both little- and big-endian hosts.
3020 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3022 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3023 with gdb/config/i386/xm-windows.h.
3025 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3027 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3028 that messes up arithmetic shifts.
3030 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3032 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3033 SIGTRAP and SIGQUIT for _WIN32.
3035 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3037 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3038 force a 64 bit multiplication.
3039 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3040 destination register is 0, since that is the default mips16 nop
3043 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3045 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3046 (build_endian_shift): Don't check proc64.
3047 (build_instruction): Always set memval to uword64. Cast op2 to
3048 uword64 when shifting it left in memory instructions. Always use
3049 the same code for stores--don't special case proc64.
3051 * gencode.c (build_mips16_operands): Fix base PC value for PC
3053 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3055 * interp.c (simJALDELAYSLOT): Define.
3056 (JALDELAYSLOT): Define.
3057 (INDELAYSLOT, INJALDELAYSLOT): Define.
3058 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3060 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3062 * interp.c (sim_open): add flush_cache as a PMON routine
3063 (sim_monitor): handle flush_cache by ignoring it
3065 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3067 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3069 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3070 (BigEndianMem): Rename to ByteSwapMem and change sense.
3071 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3072 BigEndianMem references to !ByteSwapMem.
3073 (set_endianness): New function, with prototype.
3074 (sim_open): Call set_endianness.
3075 (sim_info): Use simBE instead of BigEndianMem.
3076 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3077 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3078 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3079 ifdefs, keeping the prototype declaration.
3080 (swap_word): Rewrite correctly.
3081 (ColdReset): Delete references to CONFIG. Delete endianness related
3082 code; moved to set_endianness.
3084 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3086 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3087 * interp.c (CHECKHILO): Define away.
3088 (simSIGINT): New macro.
3089 (membank_size): Increase from 1MB to 2MB.
3090 (control_c): New function.
3091 (sim_resume): Rename parameter signal to signal_number. Add local
3092 variable prev. Call signal before and after simulate.
3093 (sim_stop_reason): Add simSIGINT support.
3094 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3096 (sim_warning): Delete call to SignalException. Do call printf_filtered
3098 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3099 a call to sim_warning.
3101 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3103 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3104 16 bit instructions.
3106 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3108 Add support for mips16 (16 bit MIPS implementation):
3109 * gencode.c (inst_type): Add mips16 instruction encoding types.
3110 (GETDATASIZEINSN): Define.
3111 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3112 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3114 (MIPS16_DECODE): New table, for mips16 instructions.
3115 (bitmap_val): New static function.
3116 (struct mips16_op): Define.
3117 (mips16_op_table): New table, for mips16 operands.
3118 (build_mips16_operands): New static function.
3119 (process_instructions): If PC is odd, decode a mips16
3120 instruction. Break out instruction handling into new
3121 build_instruction function.
3122 (build_instruction): New static function, broken out of
3123 process_instructions. Check modifiers rather than flags for SHIFT
3124 bit count and m[ft]{hi,lo} direction.
3125 (usage): Pass program name to fprintf.
3126 (main): Remove unused variable this_option_optind. Change
3127 ``*loptarg++'' to ``loptarg++''.
3128 (my_strtoul): Parenthesize && within ||.
3129 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3130 (simulate): If PC is odd, fetch a 16 bit instruction, and
3131 increment PC by 2 rather than 4.
3132 * configure.in: Add case for mips16*-*-*.
3133 * configure: Rebuild.
3135 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3137 * interp.c: Allow -t to enable tracing in standalone simulator.
3138 Fix garbage output in trace file and error messages.
3140 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3142 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3143 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3144 * configure.in: Simplify using macros in ../common/aclocal.m4.
3145 * configure: Regenerated.
3146 * tconfig.in: New file.
3148 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3150 * interp.c: Fix bugs in 64-bit port.
3151 Use ansi function declarations for msvc compiler.
3152 Initialize and test file pointer in trace code.
3153 Prevent duplicate definition of LAST_EMED_REGNUM.
3155 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3157 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3159 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3161 * interp.c (SignalException): Check for explicit terminating
3163 * gencode.c: Pass instruction value through SignalException()
3164 calls for Trap, Breakpoint and Syscall.
3166 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3168 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3169 only used on those hosts that provide it.
3170 * configure.in: Add sqrt() to list of functions to be checked for.
3171 * config.in: Re-generated.
3172 * configure: Re-generated.
3174 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3176 * gencode.c (process_instructions): Call build_endian_shift when
3177 expanding STORE RIGHT, to fix swr.
3178 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3179 clear the high bits.
3180 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3181 Fix float to int conversions to produce signed values.
3183 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3185 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3186 (process_instructions): Correct handling of nor instruction.
3187 Correct shift count for 32 bit shift instructions. Correct sign
3188 extension for arithmetic shifts to not shift the number of bits in
3189 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3190 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3192 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3193 It's OK to have a mult follow a mult. What's not OK is to have a
3194 mult follow an mfhi.
3195 (Convert): Comment out incorrect rounding code.
3197 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3199 * interp.c (sim_monitor): Improved monitor printf
3200 simulation. Tidied up simulator warnings, and added "--log" option
3201 for directing warning message output.
3202 * gencode.c: Use sim_warning() rather than WARNING macro.
3204 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3206 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3207 getopt1.o, rather than on gencode.c. Link objects together.
3208 Don't link against -liberty.
3209 (gencode.o, getopt.o, getopt1.o): New targets.
3210 * gencode.c: Include <ctype.h> and "ansidecl.h".
3211 (AND): Undefine after including "ansidecl.h".
3212 (ULONG_MAX): Define if not defined.
3213 (OP_*): Don't define macros; now defined in opcode/mips.h.
3214 (main): Call my_strtoul rather than strtoul.
3215 (my_strtoul): New static function.
3217 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3219 * gencode.c (process_instructions): Generate word64 and uword64
3220 instead of `long long' and `unsigned long long' data types.
3221 * interp.c: #include sysdep.h to get signals, and define default
3223 * (Convert): Work around for Visual-C++ compiler bug with type
3225 * support.h: Make things compile under Visual-C++ by using
3226 __int64 instead of `long long'. Change many refs to long long
3227 into word64/uword64 typedefs.
3229 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3231 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3232 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3234 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3235 (AC_PROG_INSTALL): Added.
3236 (AC_PROG_CC): Moved to before configure.host call.
3237 * configure: Rebuilt.
3239 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3241 * configure.in: Define @SIMCONF@ depending on mips target.
3242 * configure: Rebuild.
3243 * Makefile.in (run): Add @SIMCONF@ to control simulator
3245 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3246 * interp.c: Remove some debugging, provide more detailed error
3247 messages, update memory accesses to use LOADDRMASK.
3249 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3251 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3252 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3254 * configure: Rebuild.
3255 * config.in: New file, generated by autoheader.
3256 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3257 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3258 HAVE_ANINT and HAVE_AINT, as appropriate.
3259 * Makefile.in (run): Use @LIBS@ rather than -lm.
3260 (interp.o): Depend upon config.h.
3261 (Makefile): Just rebuild Makefile.
3262 (clean): Remove stamp-h.
3263 (mostlyclean): Make the same as clean, not as distclean.
3264 (config.h, stamp-h): New targets.
3266 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3268 * interp.c (ColdReset): Fix boolean test. Make all simulator
3271 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3273 * interp.c (xfer_direct_word, xfer_direct_long,
3274 swap_direct_word, swap_direct_long, xfer_big_word,
3275 xfer_big_long, xfer_little_word, xfer_little_long,
3276 swap_word,swap_long): Added.
3277 * interp.c (ColdReset): Provide function indirection to
3278 host<->simulated_target transfer routines.
3279 * interp.c (sim_store_register, sim_fetch_register): Updated to
3280 make use of indirected transfer routines.
3282 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3284 * gencode.c (process_instructions): Ensure FP ABS instruction
3286 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3287 system call support.
3289 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3291 * interp.c (sim_do_command): Complain if callback structure not
3294 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3296 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3297 support for Sun hosts.
3298 * Makefile.in (gencode): Ensure the host compiler and libraries
3299 used for cross-hosted build.
3301 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3303 * interp.c, gencode.c: Some more (TODO) tidying.
3305 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3307 * gencode.c, interp.c: Replaced explicit long long references with
3308 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3309 * support.h (SET64LO, SET64HI): Macros added.
3311 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3313 * configure: Regenerate with autoconf 2.7.
3315 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3317 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3318 * support.h: Remove superfluous "1" from #if.
3319 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3321 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3323 * interp.c (StoreFPR): Control UndefinedResult() call on
3324 WARN_RESULT manifest.
3326 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3328 * gencode.c: Tidied instruction decoding, and added FP instruction
3331 * interp.c: Added dineroIII, and BSD profiling support. Also
3332 run-time FP handling.
3334 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3336 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3337 gencode.c, interp.c, support.h: created.
projects / external / binutils.git / blob