1 2016-01-10 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2016-01-10 Mike Frysinger <vapier@gentoo.org>
7 * configure: Regenerate.
9 2016-01-10 Mike Frysinger <vapier@gentoo.org>
11 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
12 * configure: Regenerate.
14 2016-01-10 Mike Frysinger <vapier@gentoo.org>
16 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
17 * configure: Regenerate.
19 2016-01-10 Mike Frysinger <vapier@gentoo.org>
21 * configure: Regenerate.
23 2016-01-10 Mike Frysinger <vapier@gentoo.org>
25 * configure: Regenerate.
27 2016-01-09 Mike Frysinger <vapier@gentoo.org>
29 * config.in, configure: Regenerate.
31 2016-01-06 Mike Frysinger <vapier@gentoo.org>
33 * interp.c (sim_open): Mark argv const.
34 (sim_create_inferior): Mark argv and env const.
36 2016-01-04 Mike Frysinger <vapier@gentoo.org>
38 * configure: Regenerate.
40 2016-01-03 Mike Frysinger <vapier@gentoo.org>
42 * interp.c (sim_open): Update sim_parse_args comment.
44 2016-01-03 Mike Frysinger <vapier@gentoo.org>
46 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
47 * configure: Regenerate.
49 2016-01-02 Mike Frysinger <vapier@gentoo.org>
51 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
52 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
53 * configure: Regenerate.
54 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
56 2016-01-02 Mike Frysinger <vapier@gentoo.org>
58 * dv-tx3904cpu.c (CPU, SD): Delete.
60 2015-12-30 Mike Frysinger <vapier@gentoo.org>
62 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
63 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
64 (sim_store_register): Rename to ...
65 (mips_reg_store): ... this. Delete local cpu var.
66 Update sim_io_eprintf calls.
67 (sim_fetch_register): Rename to ...
68 (mips_reg_fetch): ... this. Delete local cpu var.
69 Update sim_io_eprintf calls.
71 2015-12-27 Mike Frysinger <vapier@gentoo.org>
73 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
75 2015-12-26 Mike Frysinger <vapier@gentoo.org>
77 * config.in, configure: Regenerate.
79 2015-12-26 Mike Frysinger <vapier@gentoo.org>
81 * interp.c (sim_write, sim_read): Delete.
82 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
83 (load_word): Likewise.
84 * micromips.igen (cache): Likewise.
85 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
86 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
87 do_store_left, do_store_right, do_load_double, do_store_double):
89 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
91 * sim-main.c (address_translation, prefetch): Delete.
92 (ifetch32, ifetch16): Delete call to AddressTranslation and set
94 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
95 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
96 (LoadMemory, StoreMemory): Delete CCA arg.
98 2015-12-24 Mike Frysinger <vapier@gentoo.org>
100 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
101 * configure: Regenerated.
103 2015-12-24 Mike Frysinger <vapier@gentoo.org>
105 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
108 2015-12-24 Mike Frysinger <vapier@gentoo.org>
110 * tconfig.h (SIM_HANDLES_LMA): Delete.
112 2015-12-24 Mike Frysinger <vapier@gentoo.org>
114 * sim-main.h (WITH_WATCHPOINTS): Delete.
116 2015-12-24 Mike Frysinger <vapier@gentoo.org>
118 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
120 2015-12-24 Mike Frysinger <vapier@gentoo.org>
122 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
124 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
126 * micromips.igen (process_isa_mode): Fix left shift of negative
129 2015-11-17 Mike Frysinger <vapier@gentoo.org>
131 * sim-main.h (WITH_MODULO_MEMORY): Delete.
133 2015-11-15 Mike Frysinger <vapier@gentoo.org>
135 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
137 2015-11-14 Mike Frysinger <vapier@gentoo.org>
139 * interp.c (sim_close): Rename to ...
140 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
142 * sim-main.h (mips_sim_close): Declare.
143 (SIM_CLOSE_HOOK): Define.
145 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
146 Ali Lown <ali.lown@imgtec.com>
148 * Makefile.in (tmp-micromips): New rule.
149 (tmp-mach-multi): Add support for micromips.
150 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
151 that works for both mips64 and micromips64.
152 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
154 Add build support for micromips.
155 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
156 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
157 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
158 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
159 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
160 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
161 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
162 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
163 Refactored instruction code to use these functions.
164 * dsp2.igen: Refactored instruction code to use the new functions.
165 * interp.c (decode_coproc): Refactored to work with any instruction
167 (isa_mode): New variable
168 (RSVD_INSTRUCTION): Changed to 0x00000039.
169 * m16.igen (BREAK16): Refactored instruction to use do_break16.
170 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
171 * micromips.dc: New file.
172 * micromips.igen: New file.
173 * micromips16.dc: New file.
174 * micromipsdsp.igen: New file.
175 * micromipsrun.c: New file.
176 * mips.igen (do_swc1): Changed to work with any instruction encoding.
177 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
178 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
179 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
180 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
181 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
182 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
183 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
184 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
185 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
186 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
187 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
188 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
189 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
190 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
191 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
192 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
193 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
194 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
196 Refactored instruction code to use these functions.
197 (RSVD): Changed to use new reserved instruction.
198 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
199 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
200 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
201 do_store_double): Added micromips32 and micromips64 models.
202 Added include for micromips.igen and micromipsdsp.igen
203 Add micromips32 and micromips64 models.
204 (DecodeCoproc): Updated to use new macro definition.
205 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
206 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
207 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
208 Refactored instruction code to use these functions.
209 * sim-main.h (CP0_operation): New enum.
210 (DecodeCoproc): Updated macro.
211 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
212 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
213 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
214 ISA_MODE_MICROMIPS): New defines.
215 (sim_state): Add isa_mode field.
217 2015-06-23 Mike Frysinger <vapier@gentoo.org>
219 * configure: Regenerate.
221 2015-06-12 Mike Frysinger <vapier@gentoo.org>
223 * configure.ac: Change configure.in to configure.ac.
224 * configure: Regenerate.
226 2015-06-12 Mike Frysinger <vapier@gentoo.org>
228 * configure: Regenerate.
230 2015-06-12 Mike Frysinger <vapier@gentoo.org>
232 * interp.c [TRACE]: Delete.
233 (TRACE): Change to WITH_TRACE_ANY_P.
234 [!WITH_TRACE_ANY_P] (open_trace): Define.
235 (mips_option_handler, open_trace, sim_close, dotrace):
236 Change defined(TRACE) to WITH_TRACE_ANY_P.
237 (sim_open): Delete TRACE ifdef check.
238 * sim-main.c (load_memory): Delete TRACE ifdef check.
239 (store_memory): Likewise.
240 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
241 [!WITH_TRACE_ANY_P] (dotrace): Define.
243 2015-04-18 Mike Frysinger <vapier@gentoo.org>
245 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
248 2015-04-18 Mike Frysinger <vapier@gentoo.org>
250 * sim-main.h (SIM_CPU): Delete.
252 2015-04-18 Mike Frysinger <vapier@gentoo.org>
254 * sim-main.h (sim_cia): Delete.
256 2015-04-17 Mike Frysinger <vapier@gentoo.org>
258 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
260 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
261 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
262 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
263 CIA_SET to CPU_PC_SET.
264 * sim-main.h (CIA_GET, CIA_SET): Delete.
266 2015-04-15 Mike Frysinger <vapier@gentoo.org>
268 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
269 * sim-main.h (STATE_CPU): Delete.
271 2015-04-13 Mike Frysinger <vapier@gentoo.org>
273 * configure: Regenerate.
275 2015-04-13 Mike Frysinger <vapier@gentoo.org>
277 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
278 * interp.c (mips_pc_get, mips_pc_set): New functions.
279 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
280 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
281 (sim_pc_get): Delete.
282 * sim-main.h (SIM_CPU): Define.
283 (struct sim_state): Change cpu to an array of pointers.
286 2015-04-13 Mike Frysinger <vapier@gentoo.org>
288 * interp.c (mips_option_handler, open_trace, sim_close,
289 sim_write, sim_read, sim_store_register, sim_fetch_register,
290 sim_create_inferior, pr_addr, pr_uword64): Convert old style
292 (sim_open): Convert old style prototype. Change casts with
293 sim_write to unsigned char *.
294 (fetch_str): Change null to unsigned char, and change cast to
296 (sim_monitor): Change c & ch to unsigned char. Change cast to
299 2015-04-12 Mike Frysinger <vapier@gentoo.org>
301 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
303 2015-04-06 Mike Frysinger <vapier@gentoo.org>
305 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
307 2015-04-01 Mike Frysinger <vapier@gentoo.org>
309 * tconfig.h (SIM_HAVE_PROFILE): Delete.
311 2015-03-31 Mike Frysinger <vapier@gentoo.org>
313 * config.in, configure: Regenerate.
315 2015-03-24 Mike Frysinger <vapier@gentoo.org>
317 * interp.c (sim_pc_get): New function.
319 2015-03-24 Mike Frysinger <vapier@gentoo.org>
321 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
322 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
324 2015-03-24 Mike Frysinger <vapier@gentoo.org>
326 * configure: Regenerate.
328 2015-03-23 Mike Frysinger <vapier@gentoo.org>
330 * configure: Regenerate.
332 2015-03-23 Mike Frysinger <vapier@gentoo.org>
334 * configure: Regenerate.
335 * configure.ac (mips_extra_objs): Delete.
336 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
337 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
339 2015-03-23 Mike Frysinger <vapier@gentoo.org>
341 * configure: Regenerate.
342 * configure.ac: Delete sim_hw checks for dv-sockser.
344 2015-03-16 Mike Frysinger <vapier@gentoo.org>
346 * config.in, configure: Regenerate.
347 * tconfig.in: Rename file ...
348 * tconfig.h: ... here.
350 2015-03-15 Mike Frysinger <vapier@gentoo.org>
352 * tconfig.in: Delete includes.
353 [HAVE_DV_SOCKSER]: Delete.
355 2015-03-14 Mike Frysinger <vapier@gentoo.org>
357 * Makefile.in (SIM_RUN_OBJS): Delete.
359 2015-03-14 Mike Frysinger <vapier@gentoo.org>
361 * configure.ac (AC_CHECK_HEADERS): Delete.
362 * aclocal.m4, configure: Regenerate.
364 2014-08-19 Alan Modra <amodra@gmail.com>
366 * configure: Regenerate.
368 2014-08-15 Roland McGrath <mcgrathr@google.com>
370 * configure: Regenerate.
371 * config.in: Regenerate.
373 2014-03-04 Mike Frysinger <vapier@gentoo.org>
375 * configure: Regenerate.
377 2013-09-23 Alan Modra <amodra@gmail.com>
379 * configure: Regenerate.
381 2013-06-03 Mike Frysinger <vapier@gentoo.org>
383 * aclocal.m4, configure: Regenerate.
385 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
387 * configure: Rebuild.
389 2013-03-26 Mike Frysinger <vapier@gentoo.org>
391 * configure: Regenerate.
393 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
395 * configure.ac: Address use of dv-sockser.o.
396 * tconfig.in: Conditionalize use of dv_sockser_install.
397 * configure: Regenerated.
398 * config.in: Regenerated.
400 2012-10-04 Chao-ying Fu <fu@mips.com>
401 Steve Ellcey <sellcey@mips.com>
403 * mips/mips3264r2.igen (rdhwr): New.
405 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
407 * configure.ac: Always link against dv-sockser.o.
408 * configure: Regenerate.
410 2012-06-15 Joel Brobecker <brobecker@adacore.com>
412 * config.in, configure: Regenerate.
414 2012-05-18 Nick Clifton <nickc@redhat.com>
417 * interp.c: Include config.h before system header files.
419 2012-03-24 Mike Frysinger <vapier@gentoo.org>
421 * aclocal.m4, config.in, configure: Regenerate.
423 2011-12-03 Mike Frysinger <vapier@gentoo.org>
425 * aclocal.m4: New file.
426 * configure: Regenerate.
428 2011-10-19 Mike Frysinger <vapier@gentoo.org>
430 * configure: Regenerate after common/acinclude.m4 update.
432 2011-10-17 Mike Frysinger <vapier@gentoo.org>
434 * configure.ac: Change include to common/acinclude.m4.
436 2011-10-17 Mike Frysinger <vapier@gentoo.org>
438 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
439 call. Replace common.m4 include with SIM_AC_COMMON.
440 * configure: Regenerate.
442 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
444 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
446 (tmp-mach-multi): Exit early when igen fails.
448 2011-07-05 Mike Frysinger <vapier@gentoo.org>
450 * interp.c (sim_do_command): Delete.
452 2011-02-14 Mike Frysinger <vapier@gentoo.org>
454 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
455 (tx3904sio_fifo_reset): Likewise.
456 * interp.c (sim_monitor): Likewise.
458 2010-04-14 Mike Frysinger <vapier@gentoo.org>
460 * interp.c (sim_write): Add const to buffer arg.
462 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
464 * interp.c: Don't include sysdep.h
466 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
468 * configure: Regenerate.
470 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
472 * config.in: Regenerate.
473 * configure: Likewise.
475 * configure: Regenerate.
477 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
479 * configure: Regenerate to track ../common/common.m4 changes.
482 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
483 Daniel Jacobowitz <dan@codesourcery.com>
484 Joseph Myers <joseph@codesourcery.com>
486 * configure: Regenerate.
488 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
490 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
491 that unconditionally allows fmt_ps.
492 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
493 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
494 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
495 filter from 64,f to 32,f.
496 (PREFX): Change filter from 64 to 32.
497 (LDXC1, LUXC1): Provide separate mips32r2 implementations
498 that use do_load_double instead of do_load. Make both LUXC1
499 versions unpredictable if SizeFGR () != 64.
500 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
501 instead of do_store. Remove unused variable. Make both SUXC1
502 versions unpredictable if SizeFGR () != 64.
504 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
506 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
507 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
508 shifts for that case.
510 2007-09-04 Nick Clifton <nickc@redhat.com>
512 * interp.c (options enum): Add OPTION_INFO_MEMORY.
513 (display_mem_info): New static variable.
514 (mips_option_handler): Handle OPTION_INFO_MEMORY.
515 (mips_options): Add info-memory and memory-info.
516 (sim_open): After processing the command line and board
517 specification, check display_mem_info. If it is set then
518 call the real handler for the --memory-info command line
521 2007-08-24 Joel Brobecker <brobecker@adacore.com>
523 * configure.ac: Change license of multi-run.c to GPL version 3.
524 * configure: Regenerate.
526 2007-06-28 Richard Sandiford <richard@codesourcery.com>
528 * configure.ac, configure: Revert last patch.
530 2007-06-26 Richard Sandiford <richard@codesourcery.com>
532 * configure.ac (sim_mipsisa3264_configs): New variable.
533 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
534 every configuration support all four targets, using the triplet to
535 determine the default.
536 * configure: Regenerate.
538 2007-06-25 Richard Sandiford <richard@codesourcery.com>
540 * Makefile.in (m16run.o): New rule.
542 2007-05-15 Thiemo Seufer <ths@mips.com>
544 * mips3264r2.igen (DSHD): Fix compile warning.
546 2007-05-14 Thiemo Seufer <ths@mips.com>
548 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
549 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
550 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
551 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
554 2007-03-01 Thiemo Seufer <ths@mips.com>
556 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
559 2007-02-20 Thiemo Seufer <ths@mips.com>
561 * dsp.igen: Update copyright notice.
562 * dsp2.igen: Fix copyright notice.
564 2007-02-20 Thiemo Seufer <ths@mips.com>
565 Chao-Ying Fu <fu@mips.com>
567 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
568 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
569 Add dsp2 to sim_igen_machine.
570 * configure: Regenerate.
571 * dsp.igen (do_ph_op): Add MUL support when op = 2.
572 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
573 (mulq_rs.ph): Use do_ph_mulq.
574 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
575 * mips.igen: Add dsp2 model and include dsp2.igen.
576 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
577 for *mips32r2, *mips64r2, *dsp.
578 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
579 for *mips32r2, *mips64r2, *dsp2.
580 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
582 2007-02-19 Thiemo Seufer <ths@mips.com>
583 Nigel Stephens <nigel@mips.com>
585 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
586 jumps with hazard barrier.
588 2007-02-19 Thiemo Seufer <ths@mips.com>
589 Nigel Stephens <nigel@mips.com>
591 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
592 after each call to sim_io_write.
594 2007-02-19 Thiemo Seufer <ths@mips.com>
595 Nigel Stephens <nigel@mips.com>
597 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
598 supported by this simulator.
599 (decode_coproc): Recognise additional CP0 Config registers
602 2007-02-19 Thiemo Seufer <ths@mips.com>
603 Nigel Stephens <nigel@mips.com>
604 David Ung <davidu@mips.com>
606 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
607 uninterpreted formats. If fmt is one of the uninterpreted types
608 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
609 fmt_word, and fmt_uninterpreted_64 like fmt_long.
610 (store_fpr): When writing an invalid odd register, set the
611 matching even register to fmt_unknown, not the following register.
612 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
613 the the memory window at offset 0 set by --memory-size command
615 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
617 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
619 (sim_monitor): When returning the memory size to the MIPS
620 application, use the value in STATE_MEM_SIZE, not an arbitrary
622 (cop_lw): Don' mess around with FPR_STATE, just pass
623 fmt_uninterpreted_32 to StoreFPR.
625 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
627 * mips.igen (not_word_value): Single version for mips32, mips64
630 2007-02-19 Thiemo Seufer <ths@mips.com>
631 Nigel Stephens <nigel@mips.com>
633 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
636 2007-02-17 Thiemo Seufer <ths@mips.com>
638 * configure.ac (mips*-sde-elf*): Move in front of generic machine
640 * configure: Regenerate.
642 2007-02-17 Thiemo Seufer <ths@mips.com>
644 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
645 Add mdmx to sim_igen_machine.
646 (mipsisa64*-*-*): Likewise. Remove dsp.
647 (mipsisa32*-*-*): Remove dsp.
648 * configure: Regenerate.
650 2007-02-13 Thiemo Seufer <ths@mips.com>
652 * configure.ac: Add mips*-sde-elf* target.
653 * configure: Regenerate.
655 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
657 * acconfig.h: Remove.
658 * config.in, configure: Regenerate.
660 2006-11-07 Thiemo Seufer <ths@mips.com>
662 * dsp.igen (do_w_op): Fix compiler warning.
664 2006-08-29 Thiemo Seufer <ths@mips.com>
665 David Ung <davidu@mips.com>
667 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
669 * configure: Regenerate.
670 * mips.igen (model): Add smartmips.
671 (MADDU): Increment ACX if carry.
672 (do_mult): Clear ACX.
673 (ROR,RORV): Add smartmips.
674 (include): Include smartmips.igen.
675 * sim-main.h (ACX): Set to REGISTERS[89].
676 * smartmips.igen: New file.
678 2006-08-29 Thiemo Seufer <ths@mips.com>
679 David Ung <davidu@mips.com>
681 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
682 mips3264r2.igen. Add missing dependency rules.
683 * m16e.igen: Support for mips16e save/restore instructions.
685 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
687 * configure: Regenerated.
689 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
691 * configure: Regenerated.
693 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
695 * configure: Regenerated.
697 2006-05-15 Chao-ying Fu <fu@mips.com>
699 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
701 2006-04-18 Nick Clifton <nickc@redhat.com>
703 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
706 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
708 * configure: Regenerate.
710 2005-12-14 Chao-ying Fu <fu@mips.com>
712 * Makefile.in (SIM_OBJS): Add dsp.o.
713 (dsp.o): New dependency.
714 (IGEN_INCLUDE): Add dsp.igen.
715 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
716 mipsisa64*-*-*): Add dsp to sim_igen_machine.
717 * configure: Regenerate.
718 * mips.igen: Add dsp model and include dsp.igen.
719 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
720 because these instructions are extended in DSP ASE.
721 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
722 adding 6 DSP accumulator registers and 1 DSP control register.
723 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
724 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
725 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
726 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
727 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
728 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
729 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
730 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
731 DSPCR_CCOND_SMASK): New define.
732 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
733 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
735 2005-07-08 Ian Lance Taylor <ian@airs.com>
737 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
739 2005-06-16 David Ung <davidu@mips.com>
740 Nigel Stephens <nigel@mips.com>
742 * mips.igen: New mips16e model and include m16e.igen.
743 (check_u64): Add mips16e tag.
744 * m16e.igen: New file for MIPS16e instructions.
745 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
746 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
748 * configure: Regenerate.
750 2005-05-26 David Ung <davidu@mips.com>
752 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
753 tags to all instructions which are applicable to the new ISAs.
754 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
756 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
758 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
760 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
761 * configure: Regenerate.
763 2005-03-23 Mark Kettenis <kettenis@gnu.org>
765 * configure: Regenerate.
767 2005-01-14 Andrew Cagney <cagney@gnu.org>
769 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
770 explicit call to AC_CONFIG_HEADER.
771 * configure: Regenerate.
773 2005-01-12 Andrew Cagney <cagney@gnu.org>
775 * configure.ac: Update to use ../common/common.m4.
776 * configure: Re-generate.
778 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
780 * configure: Regenerated to track ../common/aclocal.m4 changes.
782 2005-01-07 Andrew Cagney <cagney@gnu.org>
784 * configure.ac: Rename configure.in, require autoconf 2.59.
785 * configure: Re-generate.
787 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
789 * configure: Regenerate for ../common/aclocal.m4 update.
791 2004-09-24 Monika Chaddha <monika@acmet.com>
793 Committed by Andrew Cagney.
794 * m16.igen (CMP, CMPI): Fix assembler.
796 2004-08-18 Chris Demetriou <cgd@broadcom.com>
798 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
799 * configure: Regenerate.
801 2004-06-25 Chris Demetriou <cgd@broadcom.com>
803 * configure.in (sim_m16_machine): Include mipsIII.
804 * configure: Regenerate.
806 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
808 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
810 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
812 2004-04-10 Chris Demetriou <cgd@broadcom.com>
814 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
816 2004-04-09 Chris Demetriou <cgd@broadcom.com>
818 * mips.igen (check_fmt): Remove.
819 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
820 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
821 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
822 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
823 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
824 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
825 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
826 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
827 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
828 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
830 2004-04-09 Chris Demetriou <cgd@broadcom.com>
832 * sb1.igen (check_sbx): New function.
833 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
835 2004-03-29 Chris Demetriou <cgd@broadcom.com>
836 Richard Sandiford <rsandifo@redhat.com>
838 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
839 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
840 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
841 separate implementations for mipsIV and mipsV. Use new macros to
842 determine whether the restrictions apply.
844 2004-01-19 Chris Demetriou <cgd@broadcom.com>
846 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
847 (check_mult_hilo): Improve comments.
848 (check_div_hilo): Likewise. Also, fork off a new version
849 to handle mips32/mips64 (since there are no hazards to check
852 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
854 * mips.igen (do_dmultx): Fix check for negative operands.
856 2003-05-16 Ian Lance Taylor <ian@airs.com>
858 * Makefile.in (SHELL): Make sure this is defined.
859 (various): Use $(SHELL) whenever we invoke move-if-change.
861 2003-05-03 Chris Demetriou <cgd@broadcom.com>
863 * cp1.c: Tweak attribution slightly.
866 * mdmx.igen: Likewise.
867 * mips3d.igen: Likewise.
868 * sb1.igen: Likewise.
870 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
872 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
875 2003-02-27 Andrew Cagney <cagney@redhat.com>
877 * interp.c (sim_open): Rename _bfd to bfd.
878 (sim_create_inferior): Ditto.
880 2003-01-14 Chris Demetriou <cgd@broadcom.com>
882 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
884 2003-01-14 Chris Demetriou <cgd@broadcom.com>
886 * mips.igen (EI, DI): Remove.
888 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
890 * Makefile.in (tmp-run-multi): Fix mips16 filter.
892 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
893 Andrew Cagney <ac131313@redhat.com>
894 Gavin Romig-Koch <gavin@redhat.com>
895 Graydon Hoare <graydon@redhat.com>
896 Aldy Hernandez <aldyh@redhat.com>
897 Dave Brolley <brolley@redhat.com>
898 Chris Demetriou <cgd@broadcom.com>
900 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
901 (sim_mach_default): New variable.
902 (mips64vr-*-*, mips64vrel-*-*): New configurations.
903 Add a new simulator generator, MULTI.
904 * configure: Regenerate.
905 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
906 (multi-run.o): New dependency.
907 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
908 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
909 (tmp-multi): Combine them.
910 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
911 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
912 (distclean-extra): New rule.
913 * sim-main.h: Include bfd.h.
914 (MIPS_MACH): New macro.
915 * mips.igen (vr4120, vr5400, vr5500): New models.
916 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
917 * vr.igen: Replace with new version.
919 2003-01-04 Chris Demetriou <cgd@broadcom.com>
921 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
922 * configure: Regenerate.
924 2002-12-31 Chris Demetriou <cgd@broadcom.com>
926 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
927 * mips.igen: Remove all invocations of check_branch_bug and
930 2002-12-16 Chris Demetriou <cgd@broadcom.com>
932 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
934 2002-07-30 Chris Demetriou <cgd@broadcom.com>
936 * mips.igen (do_load_double, do_store_double): New functions.
937 (LDC1, SDC1): Rename to...
938 (LDC1b, SDC1b): respectively.
939 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
941 2002-07-29 Michael Snyder <msnyder@redhat.com>
943 * cp1.c (fp_recip2): Modify initialization expression so that
944 GCC will recognize it as constant.
946 2002-06-18 Chris Demetriou <cgd@broadcom.com>
948 * mdmx.c (SD_): Delete.
949 (Unpredictable): Re-define, for now, to directly invoke
950 unpredictable_action().
951 (mdmx_acc_op): Fix error in .ob immediate handling.
953 2002-06-18 Andrew Cagney <cagney@redhat.com>
955 * interp.c (sim_firmware_command): Initialize `address'.
957 2002-06-16 Andrew Cagney <ac131313@redhat.com>
959 * configure: Regenerated to track ../common/aclocal.m4 changes.
961 2002-06-14 Chris Demetriou <cgd@broadcom.com>
962 Ed Satterthwaite <ehs@broadcom.com>
964 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
965 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
966 * mips.igen: Include mips3d.igen.
967 (mips3d): New model name for MIPS-3D ASE instructions.
968 (CVT.W.fmt): Don't use this instruction for word (source) format
970 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
971 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
972 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
973 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
974 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
975 (RSquareRoot1, RSquareRoot2): New macros.
976 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
977 (fp_rsqrt2): New functions.
978 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
979 * configure: Regenerate.
981 2002-06-13 Chris Demetriou <cgd@broadcom.com>
982 Ed Satterthwaite <ehs@broadcom.com>
984 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
985 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
986 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
987 (convert): Note that this function is not used for paired-single
989 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
990 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
991 (check_fmt_p): Enable paired-single support.
992 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
993 (PUU.PS): New instructions.
994 (CVT.S.fmt): Don't use this instruction for paired-single format
996 * sim-main.h (FP_formats): New value 'fmt_ps.'
997 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
998 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1000 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1002 * mips.igen: Fix formatting of function calls in
1005 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1007 * mips.igen (MOVN, MOVZ): Trace result.
1008 (TNEI): Print "tnei" as the opcode name in traces.
1009 (CEIL.W): Add disassembly string for traces.
1010 (RSQRT.fmt): Make location of disassembly string consistent
1011 with other instructions.
1013 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1015 * mips.igen (X): Delete unused function.
1017 2002-06-08 Andrew Cagney <cagney@redhat.com>
1019 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1021 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1022 Ed Satterthwaite <ehs@broadcom.com>
1024 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1025 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1026 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1027 (fp_nmsub): New prototypes.
1028 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1029 (NegMultiplySub): New defines.
1030 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1031 (MADD.D, MADD.S): Replace with...
1032 (MADD.fmt): New instruction.
1033 (MSUB.D, MSUB.S): Replace with...
1034 (MSUB.fmt): New instruction.
1035 (NMADD.D, NMADD.S): Replace with...
1036 (NMADD.fmt): New instruction.
1037 (NMSUB.D, MSUB.S): Replace with...
1038 (NMSUB.fmt): New instruction.
1040 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1041 Ed Satterthwaite <ehs@broadcom.com>
1043 * cp1.c: Fix more comment spelling and formatting.
1044 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1045 (denorm_mode): New function.
1046 (fpu_unary, fpu_binary): Round results after operation, collect
1047 status from rounding operations, and update the FCSR.
1048 (convert): Collect status from integer conversions and rounding
1049 operations, and update the FCSR. Adjust NaN values that result
1050 from conversions. Convert to use sim_io_eprintf rather than
1051 fprintf, and remove some debugging code.
1052 * cp1.h (fenr_FS): New define.
1054 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1056 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1057 rounding mode to sim FP rounding mode flag conversion code into...
1058 (rounding_mode): New function.
1060 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1062 * cp1.c: Clean up formatting of a few comments.
1063 (value_fpr): Reformat switch statement.
1065 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1066 Ed Satterthwaite <ehs@broadcom.com>
1069 * sim-main.h: Include cp1.h.
1070 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1071 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1072 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1073 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1074 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1075 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1076 * cp1.c: Don't include sim-fpu.h; already included by
1077 sim-main.h. Clean up formatting of some comments.
1078 (NaN, Equal, Less): Remove.
1079 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1080 (fp_cmp): New functions.
1081 * mips.igen (do_c_cond_fmt): Remove.
1082 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1083 Compare. Add result tracing.
1084 (CxC1): Remove, replace with...
1085 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1086 (DMxC1): Remove, replace with...
1087 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1088 (MxC1): Remove, replace with...
1089 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1091 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1093 * sim-main.h (FGRIDX): Remove, replace all uses with...
1094 (FGR_BASE): New macro.
1095 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1096 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1097 (NR_FGR, FGR): Likewise.
1098 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1099 * mips.igen: Likewise.
1101 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1103 * cp1.c: Add an FSF Copyright notice to this file.
1105 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1106 Ed Satterthwaite <ehs@broadcom.com>
1108 * cp1.c (Infinity): Remove.
1109 * sim-main.h (Infinity): Likewise.
1111 * cp1.c (fp_unary, fp_binary): New functions.
1112 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1113 (fp_sqrt): New functions, implemented in terms of the above.
1114 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1115 (Recip, SquareRoot): Remove (replaced by functions above).
1116 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1117 (fp_recip, fp_sqrt): New prototypes.
1118 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1119 (Recip, SquareRoot): Replace prototypes with #defines which
1120 invoke the functions above.
1122 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1124 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1125 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1126 file, remove PARAMS from prototypes.
1127 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1128 simulator state arguments.
1129 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1130 pass simulator state arguments.
1131 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1132 (store_fpr, convert): Remove 'sd' argument.
1133 (value_fpr): Likewise. Convert to use 'SD' instead.
1135 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1137 * cp1.c (Min, Max): Remove #if 0'd functions.
1138 * sim-main.h (Min, Max): Remove.
1140 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1142 * cp1.c: fix formatting of switch case and default labels.
1143 * interp.c: Likewise.
1144 * sim-main.c: Likewise.
1146 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1148 * cp1.c: Clean up comments which describe FP formats.
1149 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1151 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1152 Ed Satterthwaite <ehs@broadcom.com>
1154 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1155 Broadcom SiByte SB-1 processor configurations.
1156 * configure: Regenerate.
1157 * sb1.igen: New file.
1158 * mips.igen: Include sb1.igen.
1160 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1161 * mdmx.igen: Add "sb1" model to all appropriate functions and
1163 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1164 (ob_func, ob_acc): Reference the above.
1165 (qh_acc): Adjust to keep the same size as ob_acc.
1166 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1167 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1169 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1171 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1173 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1174 Ed Satterthwaite <ehs@broadcom.com>
1176 * mips.igen (mdmx): New (pseudo-)model.
1177 * mdmx.c, mdmx.igen: New files.
1178 * Makefile.in (SIM_OBJS): Add mdmx.o.
1179 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1181 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1182 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1183 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1184 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1185 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1186 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1187 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1188 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1189 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1190 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1191 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1192 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1193 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1194 (qh_fmtsel): New macros.
1195 (_sim_cpu): New member "acc".
1196 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1197 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1199 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1201 * interp.c: Use 'deprecated' rather than 'depreciated.'
1202 * sim-main.h: Likewise.
1204 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1206 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1207 which wouldn't compile anyway.
1208 * sim-main.h (unpredictable_action): New function prototype.
1209 (Unpredictable): Define to call igen function unpredictable().
1210 (NotWordValue): New macro to call igen function not_word_value().
1211 (UndefinedResult): Remove.
1212 * interp.c (undefined_result): Remove.
1213 (unpredictable_action): New function.
1214 * mips.igen (not_word_value, unpredictable): New functions.
1215 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1216 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1217 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1218 NotWordValue() to check for unpredictable inputs, then
1219 Unpredictable() to handle them.
1221 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1223 * mips.igen: Fix formatting of calls to Unpredictable().
1225 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1227 * interp.c (sim_open): Revert previous change.
1229 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1231 * interp.c (sim_open): Disable chunk of code that wrote code in
1232 vector table entries.
1234 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1236 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1237 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1240 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1242 * cp1.c: Fix many formatting issues.
1244 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1246 * cp1.c (fpu_format_name): New function to replace...
1247 (DOFMT): This. Delete, and update all callers.
1248 (fpu_rounding_mode_name): New function to replace...
1249 (RMMODE): This. Delete, and update all callers.
1251 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1253 * interp.c: Move FPU support routines from here to...
1254 * cp1.c: Here. New file.
1255 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1256 (cp1.o): New target.
1258 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1260 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1261 * mips.igen (mips32, mips64): New models, add to all instructions
1262 and functions as appropriate.
1263 (loadstore_ea, check_u64): New variant for model mips64.
1264 (check_fmt_p): New variant for models mipsV and mips64, remove
1265 mipsV model marking fro other variant.
1268 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1269 for mips32 and mips64.
1270 (DCLO, DCLZ): New instructions for mips64.
1272 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1274 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1275 immediate or code as a hex value with the "%#lx" format.
1276 (ANDI): Likewise, and fix printed instruction name.
1278 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1280 * sim-main.h (UndefinedResult, Unpredictable): New macros
1281 which currently do nothing.
1283 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1285 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1286 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1287 (status_CU3): New definitions.
1289 * sim-main.h (ExceptionCause): Add new values for MIPS32
1290 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1291 for DebugBreakPoint and NMIReset to note their status in
1293 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1294 (SignalExceptionCacheErr): New exception macros.
1296 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1298 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1299 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1301 (SignalExceptionCoProcessorUnusable): Take as argument the
1302 unusable coprocessor number.
1304 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1306 * mips.igen: Fix formatting of all SignalException calls.
1308 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1310 * sim-main.h (SIGNEXTEND): Remove.
1312 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1314 * mips.igen: Remove gencode comment from top of file, fix
1315 spelling in another comment.
1317 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1319 * mips.igen (check_fmt, check_fmt_p): New functions to check
1320 whether specific floating point formats are usable.
1321 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1322 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1323 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1324 Use the new functions.
1325 (do_c_cond_fmt): Remove format checks...
1326 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1328 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen: Fix formatting of check_fpu calls.
1332 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1334 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1336 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1338 * mips.igen: Remove whitespace at end of lines.
1340 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1342 * mips.igen (loadstore_ea): New function to do effective
1343 address calculations.
1344 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1345 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1346 CACHE): Use loadstore_ea to do effective address computations.
1348 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1350 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1351 * mips.igen (LL, CxC1, MxC1): Likewise.
1353 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1355 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1356 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1357 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1358 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1359 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1360 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1361 Don't split opcode fields by hand, use the opcode field values
1364 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1366 * mips.igen (do_divu): Fix spacing.
1368 * mips.igen (do_dsllv): Move to be right before DSLLV,
1369 to match the rest of the do_<shift> functions.
1371 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1373 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1374 DSRL32, do_dsrlv): Trace inputs and results.
1376 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1378 * mips.igen (CACHE): Provide instruction-printing string.
1380 * interp.c (signal_exception): Comment tokens after #endif.
1382 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1384 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1385 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1386 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1387 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1388 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1389 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1390 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1391 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1393 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1395 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1396 instruction-printing string.
1397 (LWU): Use '64' as the filter flag.
1399 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1401 * mips.igen (SDXC1): Fix instruction-printing string.
1403 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1405 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1406 filter flags "32,f".
1408 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1410 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1413 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1415 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1416 add a comma) so that it more closely match the MIPS ISA
1417 documentation opcode partitioning.
1418 (PREF): Put useful names on opcode fields, and include
1419 instruction-printing string.
1421 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1423 * mips.igen (check_u64): New function which in the future will
1424 check whether 64-bit instructions are usable and signal an
1425 exception if not. Currently a no-op.
1426 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1427 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1428 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1429 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1431 * mips.igen (check_fpu): New function which in the future will
1432 check whether FPU instructions are usable and signal an exception
1433 if not. Currently a no-op.
1434 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1435 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1436 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1437 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1438 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1439 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1440 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1441 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1443 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1445 * mips.igen (do_load_left, do_load_right): Move to be immediately
1447 (do_store_left, do_store_right): Move to be immediately following
1450 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1452 * mips.igen (mipsV): New model name. Also, add it to
1453 all instructions and functions where it is appropriate.
1455 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1457 * mips.igen: For all functions and instructions, list model
1458 names that support that instruction one per line.
1460 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1462 * mips.igen: Add some additional comments about supported
1463 models, and about which instructions go where.
1464 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1465 order as is used in the rest of the file.
1467 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1469 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1470 indicating that ALU32_END or ALU64_END are there to check
1472 (DADD): Likewise, but also remove previous comment about
1475 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1477 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1478 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1479 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1480 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1481 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1482 fields (i.e., add and move commas) so that they more closely
1483 match the MIPS ISA documentation opcode partitioning.
1485 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1487 * mips.igen (ADDI): Print immediate value.
1488 (BREAK): Print code.
1489 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1490 (SLL): Print "nop" specially, and don't run the code
1491 that does the shift for the "nop" case.
1493 2001-11-17 Fred Fish <fnf@redhat.com>
1495 * sim-main.h (float_operation): Move enum declaration outside
1496 of _sim_cpu struct declaration.
1498 2001-04-12 Jim Blandy <jimb@redhat.com>
1500 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1501 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1503 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1504 PENDING_FILL, and you can get the intended effect gracefully by
1505 calling PENDING_SCHED directly.
1507 2001-02-23 Ben Elliston <bje@redhat.com>
1509 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1510 already defined elsewhere.
1512 2001-02-19 Ben Elliston <bje@redhat.com>
1514 * sim-main.h (sim_monitor): Return an int.
1515 * interp.c (sim_monitor): Add return values.
1516 (signal_exception): Handle error conditions from sim_monitor.
1518 2001-02-08 Ben Elliston <bje@redhat.com>
1520 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1521 (store_memory): Likewise, pass cia to sim_core_write*.
1523 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1525 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1526 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1528 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1530 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1531 * Makefile.in: Don't delete *.igen when cleaning directory.
1533 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1535 * m16.igen (break): Call SignalException not sim_engine_halt.
1537 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1539 From Jason Eckhardt:
1540 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1542 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1544 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1546 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1548 * mips.igen (do_dmultx): Fix typo.
1550 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1552 * configure: Regenerated to track ../common/aclocal.m4 changes.
1554 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1556 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1558 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1560 * sim-main.h (GPR_CLEAR): Define macro.
1562 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1564 * interp.c (decode_coproc): Output long using %lx and not %s.
1566 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1568 * interp.c (sim_open): Sort & extend dummy memory regions for
1569 --board=jmr3904 for eCos.
1571 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1573 * configure: Regenerated.
1575 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1577 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1578 calls, conditional on the simulator being in verbose mode.
1580 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1582 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1583 cache don't get ReservedInstruction traps.
1585 1999-11-29 Mark Salter <msalter@cygnus.com>
1587 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1588 to clear status bits in sdisr register. This is how the hardware works.
1590 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1591 being used by cygmon.
1593 1999-11-11 Andrew Haley <aph@cygnus.com>
1595 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1598 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1600 * mips.igen (MULT): Correct previous mis-applied patch.
1602 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1604 * mips.igen (delayslot32): Handle sequence like
1605 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1606 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1607 (MULT): Actually pass the third register...
1609 1999-09-03 Mark Salter <msalter@cygnus.com>
1611 * interp.c (sim_open): Added more memory aliases for additional
1612 hardware being touched by cygmon on jmr3904 board.
1614 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1616 * configure: Regenerated to track ../common/aclocal.m4 changes.
1618 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1620 * interp.c (sim_store_register): Handle case where client - GDB -
1621 specifies that a 4 byte register is 8 bytes in size.
1622 (sim_fetch_register): Ditto.
1624 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1626 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1627 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1628 (idt_monitor_base): Base address for IDT monitor traps.
1629 (pmon_monitor_base): Ditto for PMON.
1630 (lsipmon_monitor_base): Ditto for LSI PMON.
1631 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1632 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1633 (sim_firmware_command): New function.
1634 (mips_option_handler): Call it for OPTION_FIRMWARE.
1635 (sim_open): Allocate memory for idt_monitor region. If "--board"
1636 option was given, add no monitor by default. Add BREAK hooks only if
1637 monitors are also there.
1639 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1641 * interp.c (sim_monitor): Flush output before reading input.
1643 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1645 * tconfig.in (SIM_HANDLES_LMA): Always define.
1647 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1649 From Mark Salter <msalter@cygnus.com>:
1650 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1651 (sim_open): Add setup for BSP board.
1653 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1655 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1656 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1657 them as unimplemented.
1659 1999-05-08 Felix Lee <flee@cygnus.com>
1661 * configure: Regenerated to track ../common/aclocal.m4 changes.
1663 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1665 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1667 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1669 * configure.in: Any mips64vr5*-*-* target should have
1670 -DTARGET_ENABLE_FR=1.
1671 (default_endian): Any mips64vr*el-*-* target should default to
1673 * configure: Re-generate.
1675 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1677 * mips.igen (ldl): Extend from _16_, not 32.
1679 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1681 * interp.c (sim_store_register): Force registers written to by GDB
1682 into an un-interpreted state.
1684 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1686 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1687 CPU, start periodic background I/O polls.
1688 (tx3904sio_poll): New function: periodic I/O poller.
1690 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1692 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1694 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1696 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1699 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1701 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1702 (load_word): Call SIM_CORE_SIGNAL hook on error.
1703 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1704 starting. For exception dispatching, pass PC instead of NULL_CIA.
1705 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1706 * sim-main.h (COP0_BADVADDR): Define.
1707 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1708 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1709 (_sim_cpu): Add exc_* fields to store register value snapshots.
1710 * mips.igen (*): Replace memory-related SignalException* calls
1711 with references to SIM_CORE_SIGNAL hook.
1713 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1715 * sim-main.c (*): Minor warning cleanups.
1717 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1719 * m16.igen (DADDIU5): Correct type-o.
1721 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1723 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1726 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1728 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1730 (interp.o): Add dependency on itable.h
1731 (oengine.c, gencode): Delete remaining references.
1732 (BUILT_SRC_FROM_GEN): Clean up.
1734 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1737 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1738 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1739 tmp-run-hack) : New.
1740 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1741 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1742 Drop the "64" qualifier to get the HACK generator working.
1743 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1744 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1745 qualifier to get the hack generator working.
1746 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1747 (DSLL): Use do_dsll.
1748 (DSLLV): Use do_dsllv.
1749 (DSRA): Use do_dsra.
1750 (DSRL): Use do_dsrl.
1751 (DSRLV): Use do_dsrlv.
1752 (BC1): Move *vr4100 to get the HACK generator working.
1753 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1754 get the HACK generator working.
1755 (MACC) Rename to get the HACK generator working.
1756 (DMACC,MACCS,DMACCS): Add the 64.
1758 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1760 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1761 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1763 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1765 * mips/interp.c (DEBUG): Cleanups.
1767 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1769 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1770 (tx3904sio_tickle): fflush after a stdout character output.
1772 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1774 * interp.c (sim_close): Uninstall modules.
1776 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1778 * sim-main.h, interp.c (sim_monitor): Change to global
1781 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1783 * configure.in (vr4100): Only include vr4100 instructions in
1785 * configure: Re-generate.
1786 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1788 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1790 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1791 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1794 * configure.in (sim_default_gen, sim_use_gen): Replace with
1796 (--enable-sim-igen): Delete config option. Always using IGEN.
1797 * configure: Re-generate.
1799 * Makefile.in (gencode): Kill, kill, kill.
1802 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1804 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1805 bit mips16 igen simulator.
1806 * configure: Re-generate.
1808 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1809 as part of vr4100 ISA.
1810 * vr.igen: Mark all instructions as 64 bit only.
1812 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1814 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1817 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1819 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1820 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1821 * configure: Re-generate.
1823 * m16.igen (BREAK): Define breakpoint instruction.
1824 (JALX32): Mark instruction as mips16 and not r3900.
1825 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1827 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1829 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1831 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1832 insn as a debug breakpoint.
1834 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1836 (PENDING_SCHED): Clean up trace statement.
1837 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1838 (PENDING_FILL): Delay write by only one cycle.
1839 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1841 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1843 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1845 (pending_tick): Move incrementing of index to FOR statement.
1846 (pending_tick): Only update PENDING_OUT after a write has occured.
1848 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1850 * configure: Re-generate.
1852 * interp.c (sim_engine_run OLD): Delete explicit call to
1853 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1855 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1857 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1858 interrupt level number to match changed SignalExceptionInterrupt
1861 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1863 * interp.c: #include "itable.h" if WITH_IGEN.
1864 (get_insn_name): New function.
1865 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1866 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1868 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1870 * configure: Rebuilt to inhale new common/aclocal.m4.
1872 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1874 * dv-tx3904sio.c: Include sim-assert.h.
1876 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1878 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1879 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1880 Reorganize target-specific sim-hardware checks.
1881 * configure: rebuilt.
1882 * interp.c (sim_open): For tx39 target boards, set
1883 OPERATING_ENVIRONMENT, add tx3904sio devices.
1884 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1885 ROM executables. Install dv-sockser into sim-modules list.
1887 * dv-tx3904irc.c: Compiler warning clean-up.
1888 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1889 frequent hw-trace messages.
1891 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1893 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1895 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1897 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1899 * vr.igen: New file.
1900 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1901 * mips.igen: Define vr4100 model. Include vr.igen.
1902 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1904 * mips.igen (check_mf_hilo): Correct check.
1906 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1908 * sim-main.h (interrupt_event): Add prototype.
1910 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1911 register_ptr, register_value.
1912 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1914 * sim-main.h (tracefh): Make extern.
1916 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1918 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1919 Reduce unnecessarily high timer event frequency.
1920 * dv-tx3904cpu.c: Ditto for interrupt event.
1922 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1924 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1926 (interrupt_event): Made non-static.
1928 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1929 interchange of configuration values for external vs. internal
1932 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1934 * mips.igen (BREAK): Moved code to here for
1935 simulator-reserved break instructions.
1936 * gencode.c (build_instruction): Ditto.
1937 * interp.c (signal_exception): Code moved from here. Non-
1938 reserved instructions now use exception vector, rather
1940 * sim-main.h: Moved magic constants to here.
1942 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1944 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1945 register upon non-zero interrupt event level, clear upon zero
1947 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1948 by passing zero event value.
1949 (*_io_{read,write}_buffer): Endianness fixes.
1950 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1951 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1953 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1954 serial I/O and timer module at base address 0xFFFF0000.
1956 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1958 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1961 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1963 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1965 * configure: Update.
1967 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1969 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1970 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1971 * configure.in: Include tx3904tmr in hw_device list.
1972 * configure: Rebuilt.
1973 * interp.c (sim_open): Instantiate three timer instances.
1974 Fix address typo of tx3904irc instance.
1976 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1978 * interp.c (signal_exception): SystemCall exception now uses
1979 the exception vector.
1981 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1983 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1986 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1988 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1990 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1992 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1994 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1995 sim-main.h. Declare a struct hw_descriptor instead of struct
1996 hw_device_descriptor.
1998 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2000 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2001 right bits and then re-align left hand bytes to correct byte
2002 lanes. Fix incorrect computation in do_store_left when loading
2003 bytes from second word.
2005 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2007 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2008 * interp.c (sim_open): Only create a device tree when HW is
2011 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2012 * interp.c (signal_exception): Ditto.
2014 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2016 * gencode.c: Mark BEGEZALL as LIKELY.
2018 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2020 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2021 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2023 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2025 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2026 modules. Recognize TX39 target with "mips*tx39" pattern.
2027 * configure: Rebuilt.
2028 * sim-main.h (*): Added many macros defining bits in
2029 TX39 control registers.
2030 (SignalInterrupt): Send actual PC instead of NULL.
2031 (SignalNMIReset): New exception type.
2032 * interp.c (board): New variable for future use to identify
2033 a particular board being simulated.
2034 (mips_option_handler,mips_options): Added "--board" option.
2035 (interrupt_event): Send actual PC.
2036 (sim_open): Make memory layout conditional on board setting.
2037 (signal_exception): Initial implementation of hardware interrupt
2038 handling. Accept another break instruction variant for simulator
2040 (decode_coproc): Implement RFE instruction for TX39.
2041 (mips.igen): Decode RFE instruction as such.
2042 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2043 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2044 bbegin to implement memory map.
2045 * dv-tx3904cpu.c: New file.
2046 * dv-tx3904irc.c: New file.
2048 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2050 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2052 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2054 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2055 with calls to check_div_hilo.
2057 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2059 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2060 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2061 Add special r3900 version of do_mult_hilo.
2062 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2063 with calls to check_mult_hilo.
2064 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2065 with calls to check_div_hilo.
2067 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2069 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2070 Document a replacement.
2072 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2074 * interp.c (sim_monitor): Make mon_printf work.
2076 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2078 * sim-main.h (INSN_NAME): New arg `cpu'.
2080 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2082 * configure: Regenerated to track ../common/aclocal.m4 changes.
2084 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2086 * configure: Regenerated to track ../common/aclocal.m4 changes.
2089 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2091 * acconfig.h: New file.
2092 * configure.in: Reverted change of Apr 24; use sinclude again.
2094 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2096 * configure: Regenerated to track ../common/aclocal.m4 changes.
2099 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2101 * configure.in: Don't call sinclude.
2103 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2105 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2107 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2109 * mips.igen (ERET): Implement.
2111 * interp.c (decode_coproc): Return sign-extended EPC.
2113 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2115 * interp.c (signal_exception): Do not ignore Trap.
2116 (signal_exception): On TRAP, restart at exception address.
2117 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2118 (signal_exception): Update.
2119 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2120 so that TRAP instructions are caught.
2122 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2124 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2125 contains HI/LO access history.
2126 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2127 (HIACCESS, LOACCESS): Delete, replace with
2128 (HIHISTORY, LOHISTORY): New macros.
2129 (CHECKHILO): Delete all, moved to mips.igen
2131 * gencode.c (build_instruction): Do not generate checks for
2132 correct HI/LO register usage.
2134 * interp.c (old_engine_run): Delete checks for correct HI/LO
2137 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2138 check_mf_cycles): New functions.
2139 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2140 do_divu, domultx, do_mult, do_multu): Use.
2142 * tx.igen ("madd", "maddu"): Use.
2144 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2146 * mips.igen (DSRAV): Use function do_dsrav.
2147 (SRAV): Use new function do_srav.
2149 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2150 (B): Sign extend 11 bit immediate.
2151 (EXT-B*): Shift 16 bit immediate left by 1.
2152 (ADDIU*): Don't sign extend immediate value.
2154 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2156 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2158 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2161 * mips.igen (delayslot32, nullify_next_insn): New functions.
2162 (m16.igen): Always include.
2163 (do_*): Add more tracing.
2165 * m16.igen (delayslot16): Add NIA argument, could be called by a
2166 32 bit MIPS16 instruction.
2168 * interp.c (ifetch16): Move function from here.
2169 * sim-main.c (ifetch16): To here.
2171 * sim-main.c (ifetch16, ifetch32): Update to match current
2172 implementations of LH, LW.
2173 (signal_exception): Don't print out incorrect hex value of illegal
2176 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2178 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2181 * m16.igen: Implement MIPS16 instructions.
2183 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2184 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2185 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2186 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2187 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2188 bodies of corresponding code from 32 bit insn to these. Also used
2189 by MIPS16 versions of functions.
2191 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2192 (IMEM16): Drop NR argument from macro.
2194 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2196 * Makefile.in (SIM_OBJS): Add sim-main.o.
2198 * sim-main.h (address_translation, load_memory, store_memory,
2199 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2201 (pr_addr, pr_uword64): Declare.
2202 (sim-main.c): Include when H_REVEALS_MODULE_P.
2204 * interp.c (address_translation, load_memory, store_memory,
2205 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2207 * sim-main.c: To here. Fix compilation problems.
2209 * configure.in: Enable inlining.
2210 * configure: Re-config.
2212 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2214 * configure: Regenerated to track ../common/aclocal.m4 changes.
2216 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2218 * mips.igen: Include tx.igen.
2219 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2220 * tx.igen: New file, contains MADD and MADDU.
2222 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2223 the hardwired constant `7'.
2224 (store_memory): Ditto.
2225 (LOADDRMASK): Move definition to sim-main.h.
2227 mips.igen (MTC0): Enable for r3900.
2230 mips.igen (do_load_byte): Delete.
2231 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2232 do_store_right): New functions.
2233 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2235 configure.in: Let the tx39 use igen again.
2238 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2240 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2241 not an address sized quantity. Return zero for cache sizes.
2243 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2245 * mips.igen (r3900): r3900 does not support 64 bit integer
2248 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2250 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2252 * configure : Rebuild.
2254 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2256 * configure: Regenerated to track ../common/aclocal.m4 changes.
2258 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2260 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2262 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2264 * configure: Regenerated to track ../common/aclocal.m4 changes.
2265 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2267 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2269 * configure: Regenerated to track ../common/aclocal.m4 changes.
2271 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2273 * interp.c (Max, Min): Comment out functions. Not yet used.
2275 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2277 * configure: Regenerated to track ../common/aclocal.m4 changes.
2279 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2281 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2282 configurable settings for stand-alone simulator.
2284 * configure.in: Added X11 search, just in case.
2286 * configure: Regenerated.
2288 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2290 * interp.c (sim_write, sim_read, load_memory, store_memory):
2291 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2293 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2295 * sim-main.h (GETFCC): Return an unsigned value.
2297 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2299 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2300 (DADD): Result destination is RD not RT.
2302 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2304 * sim-main.h (HIACCESS, LOACCESS): Always define.
2306 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2308 * interp.c (sim_info): Delete.
2310 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2312 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2313 (mips_option_handler): New argument `cpu'.
2314 (sim_open): Update call to sim_add_option_table.
2316 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2318 * mips.igen (CxC1): Add tracing.
2320 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2322 * sim-main.h (Max, Min): Declare.
2324 * interp.c (Max, Min): New functions.
2326 * mips.igen (BC1): Add tracing.
2328 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2330 * interp.c Added memory map for stack in vr4100
2332 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2334 * interp.c (load_memory): Add missing "break"'s.
2336 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2338 * interp.c (sim_store_register, sim_fetch_register): Pass in
2339 length parameter. Return -1.
2341 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2343 * interp.c: Added hardware init hook, fixed warnings.
2345 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2347 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2349 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2351 * interp.c (ifetch16): New function.
2353 * sim-main.h (IMEM32): Rename IMEM.
2354 (IMEM16_IMMED): Define.
2356 (DELAY_SLOT): Update.
2358 * m16run.c (sim_engine_run): New file.
2360 * m16.igen: All instructions except LB.
2361 (LB): Call do_load_byte.
2362 * mips.igen (do_load_byte): New function.
2363 (LB): Call do_load_byte.
2365 * mips.igen: Move spec for insn bit size and high bit from here.
2366 * Makefile.in (tmp-igen, tmp-m16): To here.
2368 * m16.dc: New file, decode mips16 instructions.
2370 * Makefile.in (SIM_NO_ALL): Define.
2371 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2373 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2375 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2376 point unit to 32 bit registers.
2377 * configure: Re-generate.
2379 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2381 * configure.in (sim_use_gen): Make IGEN the default simulator
2382 generator for generic 32 and 64 bit mips targets.
2383 * configure: Re-generate.
2385 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2387 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2390 * interp.c (sim_fetch_register, sim_store_register): Read/write
2391 FGR from correct location.
2392 (sim_open): Set size of FGR's according to
2393 WITH_TARGET_FLOATING_POINT_BITSIZE.
2395 * sim-main.h (FGR): Store floating point registers in a separate
2398 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2400 * configure: Regenerated to track ../common/aclocal.m4 changes.
2402 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2404 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2406 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2408 * interp.c (pending_tick): New function. Deliver pending writes.
2410 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2411 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2412 it can handle mixed sized quantites and single bits.
2414 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2416 * interp.c (oengine.h): Do not include when building with IGEN.
2417 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2418 (sim_info): Ditto for PROCESSOR_64BIT.
2419 (sim_monitor): Replace ut_reg with unsigned_word.
2420 (*): Ditto for t_reg.
2421 (LOADDRMASK): Define.
2422 (sim_open): Remove defunct check that host FP is IEEE compliant,
2423 using software to emulate floating point.
2424 (value_fpr, ...): Always compile, was conditional on HASFPU.
2426 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2428 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2431 * interp.c (SD, CPU): Define.
2432 (mips_option_handler): Set flags in each CPU.
2433 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2434 (sim_close): Do not clear STATE, deleted anyway.
2435 (sim_write, sim_read): Assume CPU zero's vm should be used for
2437 (sim_create_inferior): Set the PC for all processors.
2438 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2440 (mips16_entry): Pass correct nr of args to store_word, load_word.
2441 (ColdReset): Cold reset all cpu's.
2442 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2443 (sim_monitor, load_memory, store_memory, signal_exception): Use
2444 `CPU' instead of STATE_CPU.
2447 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2450 * sim-main.h (signal_exception): Add sim_cpu arg.
2451 (SignalException*): Pass both SD and CPU to signal_exception.
2452 * interp.c (signal_exception): Update.
2454 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2456 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2457 address_translation): Ditto
2458 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2460 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2462 * configure: Regenerated to track ../common/aclocal.m4 changes.
2464 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2466 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2468 * mips.igen (model): Map processor names onto BFD name.
2470 * sim-main.h (CPU_CIA): Delete.
2471 (SET_CIA, GET_CIA): Define
2473 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2475 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2478 * configure.in (default_endian): Configure a big-endian simulator
2480 * configure: Re-generate.
2482 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2484 * configure: Regenerated to track ../common/aclocal.m4 changes.
2486 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2488 * interp.c (sim_monitor): Handle Densan monitor outbyte
2489 and inbyte functions.
2491 1997-12-29 Felix Lee <flee@cygnus.com>
2493 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2495 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2497 * Makefile.in (tmp-igen): Arrange for $zero to always be
2498 reset to zero after every instruction.
2500 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2502 * configure: Regenerated to track ../common/aclocal.m4 changes.
2505 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2507 * mips.igen (MSUB): Fix to work like MADD.
2508 * gencode.c (MSUB): Similarly.
2510 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2512 * configure: Regenerated to track ../common/aclocal.m4 changes.
2514 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2516 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2518 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2520 * sim-main.h (sim-fpu.h): Include.
2522 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2523 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2524 using host independant sim_fpu module.
2526 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2528 * interp.c (signal_exception): Report internal errors with SIGABRT
2531 * sim-main.h (C0_CONFIG): New register.
2532 (signal.h): No longer include.
2534 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2536 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2538 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2540 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2542 * mips.igen: Tag vr5000 instructions.
2543 (ANDI): Was missing mipsIV model, fix assembler syntax.
2544 (do_c_cond_fmt): New function.
2545 (C.cond.fmt): Handle mips I-III which do not support CC field
2547 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2548 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2550 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2551 vr5000 which saves LO in a GPR separatly.
2553 * configure.in (enable-sim-igen): For vr5000, select vr5000
2554 specific instructions.
2555 * configure: Re-generate.
2557 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2559 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2561 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2562 fmt_uninterpreted_64 bit cases to switch. Convert to
2565 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2567 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2568 as specified in IV3.2 spec.
2569 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2571 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2573 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2574 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2575 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2576 PENDING_FILL versions of instructions. Simplify.
2578 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2580 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2582 (MTHI, MFHI): Disable code checking HI-LO.
2584 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2586 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2588 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * gencode.c (build_mips16_operands): Replace IPC with cia.
2592 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2593 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2595 (UndefinedResult): Replace function with macro/function
2597 (sim_engine_run): Don't save PC in IPC.
2599 * sim-main.h (IPC): Delete.
2602 * interp.c (signal_exception, store_word, load_word,
2603 address_translation, load_memory, store_memory, cache_op,
2604 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2605 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2606 current instruction address - cia - argument.
2607 (sim_read, sim_write): Call address_translation directly.
2608 (sim_engine_run): Rename variable vaddr to cia.
2609 (signal_exception): Pass cia to sim_monitor
2611 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2612 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2613 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2615 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2616 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2619 * interp.c (signal_exception): Pass restart address to
2622 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2623 idecode.o): Add dependency.
2625 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2627 (DELAY_SLOT): Update NIA not PC with branch address.
2628 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2630 * mips.igen: Use CIA not PC in branch calculations.
2631 (illegal): Call SignalException.
2632 (BEQ, ADDIU): Fix assembler.
2634 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2636 * m16.igen (JALX): Was missing.
2638 * configure.in (enable-sim-igen): New configuration option.
2639 * configure: Re-generate.
2641 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2643 * interp.c (load_memory, store_memory): Delete parameter RAW.
2644 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2645 bypassing {load,store}_memory.
2647 * sim-main.h (ByteSwapMem): Delete definition.
2649 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2651 * interp.c (sim_do_command, sim_commands): Delete mips specific
2652 commands. Handled by module sim-options.
2654 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2655 (WITH_MODULO_MEMORY): Define.
2657 * interp.c (sim_info): Delete code printing memory size.
2659 * interp.c (mips_size): Nee sim_size, delete function.
2661 (monitor, monitor_base, monitor_size): Delete global variables.
2662 (sim_open, sim_close): Delete code creating monitor and other
2663 memory regions. Use sim-memopts module, via sim_do_commandf, to
2664 manage memory regions.
2665 (load_memory, store_memory): Use sim-core for memory model.
2667 * interp.c (address_translation): Delete all memory map code
2668 except line forcing 32 bit addresses.
2670 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2672 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2675 * interp.c (logfh, logfile): Delete globals.
2676 (sim_open, sim_close): Delete code opening & closing log file.
2677 (mips_option_handler): Delete -l and -n options.
2678 (OPTION mips_options): Ditto.
2680 * interp.c (OPTION mips_options): Rename option trace to dinero.
2681 (mips_option_handler): Update.
2683 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2685 * interp.c (fetch_str): New function.
2686 (sim_monitor): Rewrite using sim_read & sim_write.
2687 (sim_open): Check magic number.
2688 (sim_open): Write monitor vectors into memory using sim_write.
2689 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2690 (sim_read, sim_write): Simplify - transfer data one byte at a
2692 (load_memory, store_memory): Clarify meaning of parameter RAW.
2694 * sim-main.h (isHOST): Defete definition.
2695 (isTARGET): Mark as depreciated.
2696 (address_translation): Delete parameter HOST.
2698 * interp.c (address_translation): Delete parameter HOST.
2700 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2704 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2705 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2707 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2709 * mips.igen: Add model filter field to records.
2711 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2713 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2715 interp.c (sim_engine_run): Do not compile function sim_engine_run
2716 when WITH_IGEN == 1.
2718 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2719 target architecture.
2721 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2722 igen. Replace with configuration variables sim_igen_flags /
2725 * m16.igen: New file. Copy mips16 insns here.
2726 * mips.igen: From here.
2728 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2732 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2734 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2736 * gencode.c (build_instruction): Follow sim_write's lead in using
2737 BigEndianMem instead of !ByteSwapMem.
2739 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * configure.in (sim_gen): Dependent on target, select type of
2742 generator. Always select old style generator.
2744 configure: Re-generate.
2746 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2748 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2749 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2750 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2751 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2752 SIM_@sim_gen@_*, set by autoconf.
2754 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2756 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2758 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2759 CURRENT_FLOATING_POINT instead.
2761 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2762 (address_translation): Raise exception InstructionFetch when
2763 translation fails and isINSTRUCTION.
2765 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2766 sim_engine_run): Change type of of vaddr and paddr to
2768 (address_translation, prefetch, load_memory, store_memory,
2769 cache_op): Change type of vAddr and pAddr to address_word.
2771 * gencode.c (build_instruction): Change type of vaddr and paddr to
2774 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2776 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2777 macro to obtain result of ALU op.
2779 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2781 * interp.c (sim_info): Call profile_print.
2783 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2785 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2787 * sim-main.h (WITH_PROFILE): Do not define, defined in
2788 common/sim-config.h. Use sim-profile module.
2789 (simPROFILE): Delete defintion.
2791 * interp.c (PROFILE): Delete definition.
2792 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2793 (sim_close): Delete code writing profile histogram.
2794 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2796 (sim_engine_run): Delete code profiling the PC.
2798 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2800 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2802 * interp.c (sim_monitor): Make register pointers of type
2805 * sim-main.h: Make registers of type unsigned_word not
2808 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2810 * interp.c (sync_operation): Rename from SyncOperation, make
2811 global, add SD argument.
2812 (prefetch): Rename from Prefetch, make global, add SD argument.
2813 (decode_coproc): Make global.
2815 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2817 * gencode.c (build_instruction): Generate DecodeCoproc not
2818 decode_coproc calls.
2820 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2821 (SizeFGR): Move to sim-main.h
2822 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2823 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2824 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2826 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2827 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2828 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2829 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2830 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2831 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2833 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2835 (sim-alu.h): Include.
2836 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2837 (sim_cia): Typedef to instruction_address.
2839 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2841 * Makefile.in (interp.o): Rename generated file engine.c to
2846 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2848 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2850 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2852 * gencode.c (build_instruction): For "FPSQRT", output correct
2853 number of arguments to Recip.
2855 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2857 * Makefile.in (interp.o): Depends on sim-main.h
2859 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2861 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2862 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2863 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2864 STATE, DSSTATE): Define
2865 (GPR, FGRIDX, ..): Define.
2867 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2868 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2869 (GPR, FGRIDX, ...): Delete macros.
2871 * interp.c: Update names to match defines from sim-main.h
2873 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2875 * interp.c (sim_monitor): Add SD argument.
2876 (sim_warning): Delete. Replace calls with calls to
2878 (sim_error): Delete. Replace calls with sim_io_error.
2879 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2880 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2881 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2883 (mips_size): Rename from sim_size. Add SD argument.
2885 * interp.c (simulator): Delete global variable.
2886 (callback): Delete global variable.
2887 (mips_option_handler, sim_open, sim_write, sim_read,
2888 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2889 sim_size,sim_monitor): Use sim_io_* not callback->*.
2890 (sim_open): ZALLOC simulator struct.
2891 (PROFILE): Do not define.
2893 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2895 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2896 support.h with corresponding code.
2898 * sim-main.h (word64, uword64), support.h: Move definition to
2900 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2903 * Makefile.in: Update dependencies
2904 * interp.c: Do not include.
2906 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2908 * interp.c (address_translation, load_memory, store_memory,
2909 cache_op): Rename to from AddressTranslation et.al., make global,
2912 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2915 * interp.c (SignalException): Rename to signal_exception, make
2918 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2920 * sim-main.h (SignalException, SignalExceptionInterrupt,
2921 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2922 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2923 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2926 * interp.c, support.h: Use.
2928 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2930 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2931 to value_fpr / store_fpr. Add SD argument.
2932 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2933 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2935 * sim-main.h (ValueFPR, StoreFPR): Define.
2937 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2939 * interp.c (sim_engine_run): Check consistency between configure
2940 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2943 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2944 (mips_fpu): Configure WITH_FLOATING_POINT.
2945 (mips_endian): Configure WITH_TARGET_ENDIAN.
2946 * configure: Update.
2948 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2950 * configure: Regenerated to track ../common/aclocal.m4 changes.
2952 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2954 * configure: Regenerated.
2956 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2958 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2960 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2962 * gencode.c (print_igen_insn_models): Assume certain architectures
2963 include all mips* instructions.
2964 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2967 * Makefile.in (tmp.igen): Add target. Generate igen input from
2970 * gencode.c (FEATURE_IGEN): Define.
2971 (main): Add --igen option. Generate output in igen format.
2972 (process_instructions): Format output according to igen option.
2973 (print_igen_insn_format): New function.
2974 (print_igen_insn_models): New function.
2975 (process_instructions): Only issue warnings and ignore
2976 instructions when no FEATURE_IGEN.
2978 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2980 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2983 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2985 * configure: Regenerated to track ../common/aclocal.m4 changes.
2987 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2989 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2990 SIM_RESERVED_BITS): Delete, moved to common.
2991 (SIM_EXTRA_CFLAGS): Update.
2993 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2995 * configure.in: Configure non-strict memory alignment.
2996 * configure: Regenerated to track ../common/aclocal.m4 changes.
2998 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3000 * configure: Regenerated to track ../common/aclocal.m4 changes.
3002 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3004 * gencode.c (SDBBP,DERET): Added (3900) insns.
3005 (RFE): Turn on for 3900.
3006 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3007 (dsstate): Made global.
3008 (SUBTARGET_R3900): Added.
3009 (CANCELDELAYSLOT): New.
3010 (SignalException): Ignore SystemCall rather than ignore and
3011 terminate. Add DebugBreakPoint handling.
3012 (decode_coproc): New insns RFE, DERET; and new registers Debug
3013 and DEPC protected by SUBTARGET_R3900.
3014 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3016 * Makefile.in,configure.in: Add mips subtarget option.
3017 * configure: Update.
3019 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3021 * gencode.c: Add r3900 (tx39).
3024 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3026 * gencode.c (build_instruction): Don't need to subtract 4 for
3029 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3031 * interp.c: Correct some HASFPU problems.
3033 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3035 * configure: Regenerated to track ../common/aclocal.m4 changes.
3037 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3039 * interp.c (mips_options): Fix samples option short form, should
3042 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3044 * interp.c (sim_info): Enable info code. Was just returning.
3046 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3048 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3051 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3053 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3055 (build_instruction): Ditto for LL.
3057 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3059 * configure: Regenerated to track ../common/aclocal.m4 changes.
3061 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3063 * configure: Regenerated to track ../common/aclocal.m4 changes.
3066 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3068 * interp.c (sim_open): Add call to sim_analyze_program, update
3071 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3073 * interp.c (sim_kill): Delete.
3074 (sim_create_inferior): Add ABFD argument. Set PC from same.
3075 (sim_load): Move code initializing trap handlers from here.
3076 (sim_open): To here.
3077 (sim_load): Delete, use sim-hload.c.
3079 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3081 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3083 * configure: Regenerated to track ../common/aclocal.m4 changes.
3086 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3088 * interp.c (sim_open): Add ABFD argument.
3089 (sim_load): Move call to sim_config from here.
3090 (sim_open): To here. Check return status.
3092 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3094 * gencode.c (build_instruction): Two arg MADD should
3095 not assign result to $0.
3097 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3099 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3100 * sim/mips/configure.in: Regenerate.
3102 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3104 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3105 signed8, unsigned8 et.al. types.
3107 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3108 hosts when selecting subreg.
3110 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3112 * interp.c (sim_engine_run): Reset the ZERO register to zero
3113 regardless of FEATURE_WARN_ZERO.
3114 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3116 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3118 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3119 (SignalException): For BreakPoints ignore any mode bits and just
3121 (SignalException): Always set the CAUSE register.
3123 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3125 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3126 exception has been taken.
3128 * interp.c: Implement the ERET and mt/f sr instructions.
3130 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3132 * interp.c (SignalException): Don't bother restarting an
3135 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3137 * interp.c (SignalException): Really take an interrupt.
3138 (interrupt_event): Only deliver interrupts when enabled.
3140 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3142 * interp.c (sim_info): Only print info when verbose.
3143 (sim_info) Use sim_io_printf for output.
3145 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3147 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3150 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3152 * interp.c (sim_do_command): Check for common commands if a
3153 simulator specific command fails.
3155 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3157 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3158 and simBE when DEBUG is defined.
3160 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3162 * interp.c (interrupt_event): New function. Pass exception event
3163 onto exception handler.
3165 * configure.in: Check for stdlib.h.
3166 * configure: Regenerate.
3168 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3169 variable declaration.
3170 (build_instruction): Initialize memval1.
3171 (build_instruction): Add UNUSED attribute to byte, bigend,
3173 (build_operands): Ditto.
3175 * interp.c: Fix GCC warnings.
3176 (sim_get_quit_code): Delete.
3178 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3179 * Makefile.in: Ditto.
3180 * configure: Re-generate.
3182 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3184 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3186 * interp.c (mips_option_handler): New function parse argumes using
3188 (myname): Replace with STATE_MY_NAME.
3189 (sim_open): Delete check for host endianness - performed by
3191 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3192 (sim_open): Move much of the initialization from here.
3193 (sim_load): To here. After the image has been loaded and
3195 (sim_open): Move ColdReset from here.
3196 (sim_create_inferior): To here.
3197 (sim_open): Make FP check less dependant on host endianness.
3199 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3201 * interp.c (sim_set_callbacks): Delete.
3203 * interp.c (membank, membank_base, membank_size): Replace with
3204 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3205 (sim_open): Remove call to callback->init. gdb/run do this.
3209 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3211 * interp.c (big_endian_p): Delete, replaced by
3212 current_target_byte_order.
3214 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3216 * interp.c (host_read_long, host_read_word, host_swap_word,
3217 host_swap_long): Delete. Using common sim-endian.
3218 (sim_fetch_register, sim_store_register): Use H2T.
3219 (pipeline_ticks): Delete. Handled by sim-events.
3221 (sim_engine_run): Update.
3223 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3225 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3227 (SignalException): To here. Signal using sim_engine_halt.
3228 (sim_stop_reason): Delete, moved to common.
3230 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3232 * interp.c (sim_open): Add callback argument.
3233 (sim_set_callbacks): Delete SIM_DESC argument.
3236 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3238 * Makefile.in (SIM_OBJS): Add common modules.
3240 * interp.c (sim_set_callbacks): Also set SD callback.
3241 (set_endianness, xfer_*, swap_*): Delete.
3242 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3243 Change to functions using sim-endian macros.
3244 (control_c, sim_stop): Delete, use common version.
3245 (simulate): Convert into.
3246 (sim_engine_run): This function.
3247 (sim_resume): Delete.
3249 * interp.c (simulation): New variable - the simulator object.
3250 (sim_kind): Delete global - merged into simulation.
3251 (sim_load): Cleanup. Move PC assignment from here.
3252 (sim_create_inferior): To here.
3254 * sim-main.h: New file.
3255 * interp.c (sim-main.h): Include.
3257 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3259 * configure: Regenerated to track ../common/aclocal.m4 changes.
3261 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3263 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3265 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3267 * gencode.c (build_instruction): DIV instructions: check
3268 for division by zero and integer overflow before using
3269 host's division operation.
3271 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3273 * Makefile.in (SIM_OBJS): Add sim-load.o.
3274 * interp.c: #include bfd.h.
3275 (target_byte_order): Delete.
3276 (sim_kind, myname, big_endian_p): New static locals.
3277 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3278 after argument parsing. Recognize -E arg, set endianness accordingly.
3279 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3280 load file into simulator. Set PC from bfd.
3281 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3282 (set_endianness): Use big_endian_p instead of target_byte_order.
3284 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3286 * interp.c (sim_size): Delete prototype - conflicts with
3287 definition in remote-sim.h. Correct definition.
3289 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3291 * configure: Regenerated to track ../common/aclocal.m4 changes.
3294 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3296 * interp.c (sim_open): New arg `kind'.
3298 * configure: Regenerated to track ../common/aclocal.m4 changes.
3300 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3302 * configure: Regenerated to track ../common/aclocal.m4 changes.
3304 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3306 * interp.c (sim_open): Set optind to 0 before calling getopt.
3308 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3310 * configure: Regenerated to track ../common/aclocal.m4 changes.
3312 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3314 * interp.c : Replace uses of pr_addr with pr_uword64
3315 where the bit length is always 64 independent of SIM_ADDR.
3316 (pr_uword64) : added.
3318 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3320 * configure: Re-generate.
3322 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3324 * configure: Regenerate to track ../common/aclocal.m4 changes.
3326 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3328 * interp.c (sim_open): New SIM_DESC result. Argument is now
3330 (other sim_*): New SIM_DESC argument.
3332 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3334 * interp.c: Fix printing of addresses for non-64-bit targets.
3335 (pr_addr): Add function to print address based on size.
3337 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3339 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3341 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3343 * gencode.c (build_mips16_operands): Correct computation of base
3344 address for extended PC relative instruction.
3346 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3348 * interp.c (mips16_entry): Add support for floating point cases.
3349 (SignalException): Pass floating point cases to mips16_entry.
3350 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3352 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3354 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3355 and then set the state to fmt_uninterpreted.
3356 (COP_SW): Temporarily set the state to fmt_word while calling
3359 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3361 * gencode.c (build_instruction): The high order may be set in the
3362 comparison flags at any ISA level, not just ISA 4.
3364 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3366 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3367 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3368 * configure.in: sinclude ../common/aclocal.m4.
3369 * configure: Regenerated.
3371 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3373 * configure: Rebuild after change to aclocal.m4.
3375 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3377 * configure configure.in Makefile.in: Update to new configure
3378 scheme which is more compatible with WinGDB builds.
3379 * configure.in: Improve comment on how to run autoconf.
3380 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3381 * Makefile.in: Use autoconf substitution to install common
3384 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3386 * gencode.c (build_instruction): Use BigEndianCPU instead of
3389 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3391 * interp.c (sim_monitor): Make output to stdout visible in
3392 wingdb's I/O log window.
3394 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3396 * support.h: Undo previous change to SIGTRAP
3399 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3401 * interp.c (store_word, load_word): New static functions.
3402 (mips16_entry): New static function.
3403 (SignalException): Look for mips16 entry and exit instructions.
3404 (simulate): Use the correct index when setting fpr_state after
3405 doing a pending move.
3407 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3409 * interp.c: Fix byte-swapping code throughout to work on
3410 both little- and big-endian hosts.
3412 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3414 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3415 with gdb/config/i386/xm-windows.h.
3417 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3419 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3420 that messes up arithmetic shifts.
3422 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3424 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3425 SIGTRAP and SIGQUIT for _WIN32.
3427 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3429 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3430 force a 64 bit multiplication.
3431 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3432 destination register is 0, since that is the default mips16 nop
3435 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3437 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3438 (build_endian_shift): Don't check proc64.
3439 (build_instruction): Always set memval to uword64. Cast op2 to
3440 uword64 when shifting it left in memory instructions. Always use
3441 the same code for stores--don't special case proc64.
3443 * gencode.c (build_mips16_operands): Fix base PC value for PC
3445 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3447 * interp.c (simJALDELAYSLOT): Define.
3448 (JALDELAYSLOT): Define.
3449 (INDELAYSLOT, INJALDELAYSLOT): Define.
3450 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3452 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3454 * interp.c (sim_open): add flush_cache as a PMON routine
3455 (sim_monitor): handle flush_cache by ignoring it
3457 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3459 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3461 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3462 (BigEndianMem): Rename to ByteSwapMem and change sense.
3463 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3464 BigEndianMem references to !ByteSwapMem.
3465 (set_endianness): New function, with prototype.
3466 (sim_open): Call set_endianness.
3467 (sim_info): Use simBE instead of BigEndianMem.
3468 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3469 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3470 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3471 ifdefs, keeping the prototype declaration.
3472 (swap_word): Rewrite correctly.
3473 (ColdReset): Delete references to CONFIG. Delete endianness related
3474 code; moved to set_endianness.
3476 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3478 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3479 * interp.c (CHECKHILO): Define away.
3480 (simSIGINT): New macro.
3481 (membank_size): Increase from 1MB to 2MB.
3482 (control_c): New function.
3483 (sim_resume): Rename parameter signal to signal_number. Add local
3484 variable prev. Call signal before and after simulate.
3485 (sim_stop_reason): Add simSIGINT support.
3486 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3488 (sim_warning): Delete call to SignalException. Do call printf_filtered
3490 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3491 a call to sim_warning.
3493 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3495 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3496 16 bit instructions.
3498 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3500 Add support for mips16 (16 bit MIPS implementation):
3501 * gencode.c (inst_type): Add mips16 instruction encoding types.
3502 (GETDATASIZEINSN): Define.
3503 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3504 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3506 (MIPS16_DECODE): New table, for mips16 instructions.
3507 (bitmap_val): New static function.
3508 (struct mips16_op): Define.
3509 (mips16_op_table): New table, for mips16 operands.
3510 (build_mips16_operands): New static function.
3511 (process_instructions): If PC is odd, decode a mips16
3512 instruction. Break out instruction handling into new
3513 build_instruction function.
3514 (build_instruction): New static function, broken out of
3515 process_instructions. Check modifiers rather than flags for SHIFT
3516 bit count and m[ft]{hi,lo} direction.
3517 (usage): Pass program name to fprintf.
3518 (main): Remove unused variable this_option_optind. Change
3519 ``*loptarg++'' to ``loptarg++''.
3520 (my_strtoul): Parenthesize && within ||.
3521 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3522 (simulate): If PC is odd, fetch a 16 bit instruction, and
3523 increment PC by 2 rather than 4.
3524 * configure.in: Add case for mips16*-*-*.
3525 * configure: Rebuild.
3527 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3529 * interp.c: Allow -t to enable tracing in standalone simulator.
3530 Fix garbage output in trace file and error messages.
3532 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3534 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3535 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3536 * configure.in: Simplify using macros in ../common/aclocal.m4.
3537 * configure: Regenerated.
3538 * tconfig.in: New file.
3540 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3542 * interp.c: Fix bugs in 64-bit port.
3543 Use ansi function declarations for msvc compiler.
3544 Initialize and test file pointer in trace code.
3545 Prevent duplicate definition of LAST_EMED_REGNUM.
3547 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3549 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3551 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3553 * interp.c (SignalException): Check for explicit terminating
3555 * gencode.c: Pass instruction value through SignalException()
3556 calls for Trap, Breakpoint and Syscall.
3558 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3560 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3561 only used on those hosts that provide it.
3562 * configure.in: Add sqrt() to list of functions to be checked for.
3563 * config.in: Re-generated.
3564 * configure: Re-generated.
3566 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3568 * gencode.c (process_instructions): Call build_endian_shift when
3569 expanding STORE RIGHT, to fix swr.
3570 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3571 clear the high bits.
3572 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3573 Fix float to int conversions to produce signed values.
3575 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3577 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3578 (process_instructions): Correct handling of nor instruction.
3579 Correct shift count for 32 bit shift instructions. Correct sign
3580 extension for arithmetic shifts to not shift the number of bits in
3581 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3582 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3584 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3585 It's OK to have a mult follow a mult. What's not OK is to have a
3586 mult follow an mfhi.
3587 (Convert): Comment out incorrect rounding code.
3589 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3591 * interp.c (sim_monitor): Improved monitor printf
3592 simulation. Tidied up simulator warnings, and added "--log" option
3593 for directing warning message output.
3594 * gencode.c: Use sim_warning() rather than WARNING macro.
3596 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3598 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3599 getopt1.o, rather than on gencode.c. Link objects together.
3600 Don't link against -liberty.
3601 (gencode.o, getopt.o, getopt1.o): New targets.
3602 * gencode.c: Include <ctype.h> and "ansidecl.h".
3603 (AND): Undefine after including "ansidecl.h".
3604 (ULONG_MAX): Define if not defined.
3605 (OP_*): Don't define macros; now defined in opcode/mips.h.
3606 (main): Call my_strtoul rather than strtoul.
3607 (my_strtoul): New static function.
3609 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3611 * gencode.c (process_instructions): Generate word64 and uword64
3612 instead of `long long' and `unsigned long long' data types.
3613 * interp.c: #include sysdep.h to get signals, and define default
3615 * (Convert): Work around for Visual-C++ compiler bug with type
3617 * support.h: Make things compile under Visual-C++ by using
3618 __int64 instead of `long long'. Change many refs to long long
3619 into word64/uword64 typedefs.
3621 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3623 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3624 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3626 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3627 (AC_PROG_INSTALL): Added.
3628 (AC_PROG_CC): Moved to before configure.host call.
3629 * configure: Rebuilt.
3631 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3633 * configure.in: Define @SIMCONF@ depending on mips target.
3634 * configure: Rebuild.
3635 * Makefile.in (run): Add @SIMCONF@ to control simulator
3637 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3638 * interp.c: Remove some debugging, provide more detailed error
3639 messages, update memory accesses to use LOADDRMASK.
3641 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3643 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3644 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3646 * configure: Rebuild.
3647 * config.in: New file, generated by autoheader.
3648 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3649 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3650 HAVE_ANINT and HAVE_AINT, as appropriate.
3651 * Makefile.in (run): Use @LIBS@ rather than -lm.
3652 (interp.o): Depend upon config.h.
3653 (Makefile): Just rebuild Makefile.
3654 (clean): Remove stamp-h.
3655 (mostlyclean): Make the same as clean, not as distclean.
3656 (config.h, stamp-h): New targets.
3658 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3660 * interp.c (ColdReset): Fix boolean test. Make all simulator
3663 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3665 * interp.c (xfer_direct_word, xfer_direct_long,
3666 swap_direct_word, swap_direct_long, xfer_big_word,
3667 xfer_big_long, xfer_little_word, xfer_little_long,
3668 swap_word,swap_long): Added.
3669 * interp.c (ColdReset): Provide function indirection to
3670 host<->simulated_target transfer routines.
3671 * interp.c (sim_store_register, sim_fetch_register): Updated to
3672 make use of indirected transfer routines.
3674 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3676 * gencode.c (process_instructions): Ensure FP ABS instruction
3678 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3679 system call support.
3681 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3683 * interp.c (sim_do_command): Complain if callback structure not
3686 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3688 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3689 support for Sun hosts.
3690 * Makefile.in (gencode): Ensure the host compiler and libraries
3691 used for cross-hosted build.
3693 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3695 * interp.c, gencode.c: Some more (TODO) tidying.
3697 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3699 * gencode.c, interp.c: Replaced explicit long long references with
3700 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3701 * support.h (SET64LO, SET64HI): Macros added.
3703 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3705 * configure: Regenerate with autoconf 2.7.
3707 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3709 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3710 * support.h: Remove superfluous "1" from #if.
3711 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3713 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3715 * interp.c (StoreFPR): Control UndefinedResult() call on
3716 WARN_RESULT manifest.
3718 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3720 * gencode.c: Tidied instruction decoding, and added FP instruction
3723 * interp.c: Added dineroIII, and BSD profiling support. Also
3724 run-time FP handling.
3726 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3728 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3729 gencode.c, interp.c, support.h: created.