1 2016-01-10 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
4 * configure: Regenerate.
6 2016-01-10 Mike Frysinger <vapier@gentoo.org>
8 * configure: Regenerate.
10 2016-01-10 Mike Frysinger <vapier@gentoo.org>
12 * configure: Regenerate.
14 2016-01-09 Mike Frysinger <vapier@gentoo.org>
16 * config.in, configure: Regenerate.
18 2016-01-06 Mike Frysinger <vapier@gentoo.org>
20 * interp.c (sim_open): Mark argv const.
21 (sim_create_inferior): Mark argv and env const.
23 2016-01-04 Mike Frysinger <vapier@gentoo.org>
25 * configure: Regenerate.
27 2016-01-03 Mike Frysinger <vapier@gentoo.org>
29 * interp.c (sim_open): Update sim_parse_args comment.
31 2016-01-03 Mike Frysinger <vapier@gentoo.org>
33 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
34 * configure: Regenerate.
36 2016-01-02 Mike Frysinger <vapier@gentoo.org>
38 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
39 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
40 * configure: Regenerate.
41 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
43 2016-01-02 Mike Frysinger <vapier@gentoo.org>
45 * dv-tx3904cpu.c (CPU, SD): Delete.
47 2015-12-30 Mike Frysinger <vapier@gentoo.org>
49 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
50 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
51 (sim_store_register): Rename to ...
52 (mips_reg_store): ... this. Delete local cpu var.
53 Update sim_io_eprintf calls.
54 (sim_fetch_register): Rename to ...
55 (mips_reg_fetch): ... this. Delete local cpu var.
56 Update sim_io_eprintf calls.
58 2015-12-27 Mike Frysinger <vapier@gentoo.org>
60 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
62 2015-12-26 Mike Frysinger <vapier@gentoo.org>
64 * config.in, configure: Regenerate.
66 2015-12-26 Mike Frysinger <vapier@gentoo.org>
68 * interp.c (sim_write, sim_read): Delete.
69 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
70 (load_word): Likewise.
71 * micromips.igen (cache): Likewise.
72 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
73 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
74 do_store_left, do_store_right, do_load_double, do_store_double):
76 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
78 * sim-main.c (address_translation, prefetch): Delete.
79 (ifetch32, ifetch16): Delete call to AddressTranslation and set
81 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
82 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
83 (LoadMemory, StoreMemory): Delete CCA arg.
85 2015-12-24 Mike Frysinger <vapier@gentoo.org>
87 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
88 * configure: Regenerated.
90 2015-12-24 Mike Frysinger <vapier@gentoo.org>
92 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
95 2015-12-24 Mike Frysinger <vapier@gentoo.org>
97 * tconfig.h (SIM_HANDLES_LMA): Delete.
99 2015-12-24 Mike Frysinger <vapier@gentoo.org>
101 * sim-main.h (WITH_WATCHPOINTS): Delete.
103 2015-12-24 Mike Frysinger <vapier@gentoo.org>
105 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
107 2015-12-24 Mike Frysinger <vapier@gentoo.org>
109 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
111 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
113 * micromips.igen (process_isa_mode): Fix left shift of negative
116 2015-11-17 Mike Frysinger <vapier@gentoo.org>
118 * sim-main.h (WITH_MODULO_MEMORY): Delete.
120 2015-11-15 Mike Frysinger <vapier@gentoo.org>
122 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
124 2015-11-14 Mike Frysinger <vapier@gentoo.org>
126 * interp.c (sim_close): Rename to ...
127 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
129 * sim-main.h (mips_sim_close): Declare.
130 (SIM_CLOSE_HOOK): Define.
132 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
133 Ali Lown <ali.lown@imgtec.com>
135 * Makefile.in (tmp-micromips): New rule.
136 (tmp-mach-multi): Add support for micromips.
137 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
138 that works for both mips64 and micromips64.
139 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
141 Add build support for micromips.
142 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
143 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
144 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
145 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
146 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
147 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
148 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
149 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
150 Refactored instruction code to use these functions.
151 * dsp2.igen: Refactored instruction code to use the new functions.
152 * interp.c (decode_coproc): Refactored to work with any instruction
154 (isa_mode): New variable
155 (RSVD_INSTRUCTION): Changed to 0x00000039.
156 * m16.igen (BREAK16): Refactored instruction to use do_break16.
157 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
158 * micromips.dc: New file.
159 * micromips.igen: New file.
160 * micromips16.dc: New file.
161 * micromipsdsp.igen: New file.
162 * micromipsrun.c: New file.
163 * mips.igen (do_swc1): Changed to work with any instruction encoding.
164 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
165 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
166 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
167 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
168 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
169 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
170 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
171 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
172 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
173 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
174 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
175 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
176 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
177 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
178 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
179 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
180 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
181 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
183 Refactored instruction code to use these functions.
184 (RSVD): Changed to use new reserved instruction.
185 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
186 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
187 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
188 do_store_double): Added micromips32 and micromips64 models.
189 Added include for micromips.igen and micromipsdsp.igen
190 Add micromips32 and micromips64 models.
191 (DecodeCoproc): Updated to use new macro definition.
192 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
193 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
194 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
195 Refactored instruction code to use these functions.
196 * sim-main.h (CP0_operation): New enum.
197 (DecodeCoproc): Updated macro.
198 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
199 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
200 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
201 ISA_MODE_MICROMIPS): New defines.
202 (sim_state): Add isa_mode field.
204 2015-06-23 Mike Frysinger <vapier@gentoo.org>
206 * configure: Regenerate.
208 2015-06-12 Mike Frysinger <vapier@gentoo.org>
210 * configure.ac: Change configure.in to configure.ac.
211 * configure: Regenerate.
213 2015-06-12 Mike Frysinger <vapier@gentoo.org>
215 * configure: Regenerate.
217 2015-06-12 Mike Frysinger <vapier@gentoo.org>
219 * interp.c [TRACE]: Delete.
220 (TRACE): Change to WITH_TRACE_ANY_P.
221 [!WITH_TRACE_ANY_P] (open_trace): Define.
222 (mips_option_handler, open_trace, sim_close, dotrace):
223 Change defined(TRACE) to WITH_TRACE_ANY_P.
224 (sim_open): Delete TRACE ifdef check.
225 * sim-main.c (load_memory): Delete TRACE ifdef check.
226 (store_memory): Likewise.
227 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
228 [!WITH_TRACE_ANY_P] (dotrace): Define.
230 2015-04-18 Mike Frysinger <vapier@gentoo.org>
232 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
235 2015-04-18 Mike Frysinger <vapier@gentoo.org>
237 * sim-main.h (SIM_CPU): Delete.
239 2015-04-18 Mike Frysinger <vapier@gentoo.org>
241 * sim-main.h (sim_cia): Delete.
243 2015-04-17 Mike Frysinger <vapier@gentoo.org>
245 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
247 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
248 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
249 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
250 CIA_SET to CPU_PC_SET.
251 * sim-main.h (CIA_GET, CIA_SET): Delete.
253 2015-04-15 Mike Frysinger <vapier@gentoo.org>
255 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
256 * sim-main.h (STATE_CPU): Delete.
258 2015-04-13 Mike Frysinger <vapier@gentoo.org>
260 * configure: Regenerate.
262 2015-04-13 Mike Frysinger <vapier@gentoo.org>
264 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
265 * interp.c (mips_pc_get, mips_pc_set): New functions.
266 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
267 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
268 (sim_pc_get): Delete.
269 * sim-main.h (SIM_CPU): Define.
270 (struct sim_state): Change cpu to an array of pointers.
273 2015-04-13 Mike Frysinger <vapier@gentoo.org>
275 * interp.c (mips_option_handler, open_trace, sim_close,
276 sim_write, sim_read, sim_store_register, sim_fetch_register,
277 sim_create_inferior, pr_addr, pr_uword64): Convert old style
279 (sim_open): Convert old style prototype. Change casts with
280 sim_write to unsigned char *.
281 (fetch_str): Change null to unsigned char, and change cast to
283 (sim_monitor): Change c & ch to unsigned char. Change cast to
286 2015-04-12 Mike Frysinger <vapier@gentoo.org>
288 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
290 2015-04-06 Mike Frysinger <vapier@gentoo.org>
292 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
294 2015-04-01 Mike Frysinger <vapier@gentoo.org>
296 * tconfig.h (SIM_HAVE_PROFILE): Delete.
298 2015-03-31 Mike Frysinger <vapier@gentoo.org>
300 * config.in, configure: Regenerate.
302 2015-03-24 Mike Frysinger <vapier@gentoo.org>
304 * interp.c (sim_pc_get): New function.
306 2015-03-24 Mike Frysinger <vapier@gentoo.org>
308 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
309 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
311 2015-03-24 Mike Frysinger <vapier@gentoo.org>
313 * configure: Regenerate.
315 2015-03-23 Mike Frysinger <vapier@gentoo.org>
317 * configure: Regenerate.
319 2015-03-23 Mike Frysinger <vapier@gentoo.org>
321 * configure: Regenerate.
322 * configure.ac (mips_extra_objs): Delete.
323 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
324 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
326 2015-03-23 Mike Frysinger <vapier@gentoo.org>
328 * configure: Regenerate.
329 * configure.ac: Delete sim_hw checks for dv-sockser.
331 2015-03-16 Mike Frysinger <vapier@gentoo.org>
333 * config.in, configure: Regenerate.
334 * tconfig.in: Rename file ...
335 * tconfig.h: ... here.
337 2015-03-15 Mike Frysinger <vapier@gentoo.org>
339 * tconfig.in: Delete includes.
340 [HAVE_DV_SOCKSER]: Delete.
342 2015-03-14 Mike Frysinger <vapier@gentoo.org>
344 * Makefile.in (SIM_RUN_OBJS): Delete.
346 2015-03-14 Mike Frysinger <vapier@gentoo.org>
348 * configure.ac (AC_CHECK_HEADERS): Delete.
349 * aclocal.m4, configure: Regenerate.
351 2014-08-19 Alan Modra <amodra@gmail.com>
353 * configure: Regenerate.
355 2014-08-15 Roland McGrath <mcgrathr@google.com>
357 * configure: Regenerate.
358 * config.in: Regenerate.
360 2014-03-04 Mike Frysinger <vapier@gentoo.org>
362 * configure: Regenerate.
364 2013-09-23 Alan Modra <amodra@gmail.com>
366 * configure: Regenerate.
368 2013-06-03 Mike Frysinger <vapier@gentoo.org>
370 * aclocal.m4, configure: Regenerate.
372 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
374 * configure: Rebuild.
376 2013-03-26 Mike Frysinger <vapier@gentoo.org>
378 * configure: Regenerate.
380 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
382 * configure.ac: Address use of dv-sockser.o.
383 * tconfig.in: Conditionalize use of dv_sockser_install.
384 * configure: Regenerated.
385 * config.in: Regenerated.
387 2012-10-04 Chao-ying Fu <fu@mips.com>
388 Steve Ellcey <sellcey@mips.com>
390 * mips/mips3264r2.igen (rdhwr): New.
392 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
394 * configure.ac: Always link against dv-sockser.o.
395 * configure: Regenerate.
397 2012-06-15 Joel Brobecker <brobecker@adacore.com>
399 * config.in, configure: Regenerate.
401 2012-05-18 Nick Clifton <nickc@redhat.com>
404 * interp.c: Include config.h before system header files.
406 2012-03-24 Mike Frysinger <vapier@gentoo.org>
408 * aclocal.m4, config.in, configure: Regenerate.
410 2011-12-03 Mike Frysinger <vapier@gentoo.org>
412 * aclocal.m4: New file.
413 * configure: Regenerate.
415 2011-10-19 Mike Frysinger <vapier@gentoo.org>
417 * configure: Regenerate after common/acinclude.m4 update.
419 2011-10-17 Mike Frysinger <vapier@gentoo.org>
421 * configure.ac: Change include to common/acinclude.m4.
423 2011-10-17 Mike Frysinger <vapier@gentoo.org>
425 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
426 call. Replace common.m4 include with SIM_AC_COMMON.
427 * configure: Regenerate.
429 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
431 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
433 (tmp-mach-multi): Exit early when igen fails.
435 2011-07-05 Mike Frysinger <vapier@gentoo.org>
437 * interp.c (sim_do_command): Delete.
439 2011-02-14 Mike Frysinger <vapier@gentoo.org>
441 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
442 (tx3904sio_fifo_reset): Likewise.
443 * interp.c (sim_monitor): Likewise.
445 2010-04-14 Mike Frysinger <vapier@gentoo.org>
447 * interp.c (sim_write): Add const to buffer arg.
449 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
451 * interp.c: Don't include sysdep.h
453 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
455 * configure: Regenerate.
457 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
459 * config.in: Regenerate.
460 * configure: Likewise.
462 * configure: Regenerate.
464 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
466 * configure: Regenerate to track ../common/common.m4 changes.
469 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
470 Daniel Jacobowitz <dan@codesourcery.com>
471 Joseph Myers <joseph@codesourcery.com>
473 * configure: Regenerate.
475 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
477 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
478 that unconditionally allows fmt_ps.
479 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
480 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
481 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
482 filter from 64,f to 32,f.
483 (PREFX): Change filter from 64 to 32.
484 (LDXC1, LUXC1): Provide separate mips32r2 implementations
485 that use do_load_double instead of do_load. Make both LUXC1
486 versions unpredictable if SizeFGR () != 64.
487 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
488 instead of do_store. Remove unused variable. Make both SUXC1
489 versions unpredictable if SizeFGR () != 64.
491 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
493 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
494 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
495 shifts for that case.
497 2007-09-04 Nick Clifton <nickc@redhat.com>
499 * interp.c (options enum): Add OPTION_INFO_MEMORY.
500 (display_mem_info): New static variable.
501 (mips_option_handler): Handle OPTION_INFO_MEMORY.
502 (mips_options): Add info-memory and memory-info.
503 (sim_open): After processing the command line and board
504 specification, check display_mem_info. If it is set then
505 call the real handler for the --memory-info command line
508 2007-08-24 Joel Brobecker <brobecker@adacore.com>
510 * configure.ac: Change license of multi-run.c to GPL version 3.
511 * configure: Regenerate.
513 2007-06-28 Richard Sandiford <richard@codesourcery.com>
515 * configure.ac, configure: Revert last patch.
517 2007-06-26 Richard Sandiford <richard@codesourcery.com>
519 * configure.ac (sim_mipsisa3264_configs): New variable.
520 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
521 every configuration support all four targets, using the triplet to
522 determine the default.
523 * configure: Regenerate.
525 2007-06-25 Richard Sandiford <richard@codesourcery.com>
527 * Makefile.in (m16run.o): New rule.
529 2007-05-15 Thiemo Seufer <ths@mips.com>
531 * mips3264r2.igen (DSHD): Fix compile warning.
533 2007-05-14 Thiemo Seufer <ths@mips.com>
535 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
536 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
537 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
538 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
541 2007-03-01 Thiemo Seufer <ths@mips.com>
543 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
546 2007-02-20 Thiemo Seufer <ths@mips.com>
548 * dsp.igen: Update copyright notice.
549 * dsp2.igen: Fix copyright notice.
551 2007-02-20 Thiemo Seufer <ths@mips.com>
552 Chao-Ying Fu <fu@mips.com>
554 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
555 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
556 Add dsp2 to sim_igen_machine.
557 * configure: Regenerate.
558 * dsp.igen (do_ph_op): Add MUL support when op = 2.
559 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
560 (mulq_rs.ph): Use do_ph_mulq.
561 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
562 * mips.igen: Add dsp2 model and include dsp2.igen.
563 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
564 for *mips32r2, *mips64r2, *dsp.
565 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
566 for *mips32r2, *mips64r2, *dsp2.
567 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
569 2007-02-19 Thiemo Seufer <ths@mips.com>
570 Nigel Stephens <nigel@mips.com>
572 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
573 jumps with hazard barrier.
575 2007-02-19 Thiemo Seufer <ths@mips.com>
576 Nigel Stephens <nigel@mips.com>
578 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
579 after each call to sim_io_write.
581 2007-02-19 Thiemo Seufer <ths@mips.com>
582 Nigel Stephens <nigel@mips.com>
584 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
585 supported by this simulator.
586 (decode_coproc): Recognise additional CP0 Config registers
589 2007-02-19 Thiemo Seufer <ths@mips.com>
590 Nigel Stephens <nigel@mips.com>
591 David Ung <davidu@mips.com>
593 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
594 uninterpreted formats. If fmt is one of the uninterpreted types
595 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
596 fmt_word, and fmt_uninterpreted_64 like fmt_long.
597 (store_fpr): When writing an invalid odd register, set the
598 matching even register to fmt_unknown, not the following register.
599 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
600 the the memory window at offset 0 set by --memory-size command
602 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
604 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
606 (sim_monitor): When returning the memory size to the MIPS
607 application, use the value in STATE_MEM_SIZE, not an arbitrary
609 (cop_lw): Don' mess around with FPR_STATE, just pass
610 fmt_uninterpreted_32 to StoreFPR.
612 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
614 * mips.igen (not_word_value): Single version for mips32, mips64
617 2007-02-19 Thiemo Seufer <ths@mips.com>
618 Nigel Stephens <nigel@mips.com>
620 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
623 2007-02-17 Thiemo Seufer <ths@mips.com>
625 * configure.ac (mips*-sde-elf*): Move in front of generic machine
627 * configure: Regenerate.
629 2007-02-17 Thiemo Seufer <ths@mips.com>
631 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
632 Add mdmx to sim_igen_machine.
633 (mipsisa64*-*-*): Likewise. Remove dsp.
634 (mipsisa32*-*-*): Remove dsp.
635 * configure: Regenerate.
637 2007-02-13 Thiemo Seufer <ths@mips.com>
639 * configure.ac: Add mips*-sde-elf* target.
640 * configure: Regenerate.
642 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
644 * acconfig.h: Remove.
645 * config.in, configure: Regenerate.
647 2006-11-07 Thiemo Seufer <ths@mips.com>
649 * dsp.igen (do_w_op): Fix compiler warning.
651 2006-08-29 Thiemo Seufer <ths@mips.com>
652 David Ung <davidu@mips.com>
654 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
656 * configure: Regenerate.
657 * mips.igen (model): Add smartmips.
658 (MADDU): Increment ACX if carry.
659 (do_mult): Clear ACX.
660 (ROR,RORV): Add smartmips.
661 (include): Include smartmips.igen.
662 * sim-main.h (ACX): Set to REGISTERS[89].
663 * smartmips.igen: New file.
665 2006-08-29 Thiemo Seufer <ths@mips.com>
666 David Ung <davidu@mips.com>
668 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
669 mips3264r2.igen. Add missing dependency rules.
670 * m16e.igen: Support for mips16e save/restore instructions.
672 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
674 * configure: Regenerated.
676 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
678 * configure: Regenerated.
680 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
682 * configure: Regenerated.
684 2006-05-15 Chao-ying Fu <fu@mips.com>
686 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
688 2006-04-18 Nick Clifton <nickc@redhat.com>
690 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
693 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
695 * configure: Regenerate.
697 2005-12-14 Chao-ying Fu <fu@mips.com>
699 * Makefile.in (SIM_OBJS): Add dsp.o.
700 (dsp.o): New dependency.
701 (IGEN_INCLUDE): Add dsp.igen.
702 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
703 mipsisa64*-*-*): Add dsp to sim_igen_machine.
704 * configure: Regenerate.
705 * mips.igen: Add dsp model and include dsp.igen.
706 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
707 because these instructions are extended in DSP ASE.
708 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
709 adding 6 DSP accumulator registers and 1 DSP control register.
710 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
711 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
712 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
713 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
714 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
715 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
716 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
717 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
718 DSPCR_CCOND_SMASK): New define.
719 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
720 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
722 2005-07-08 Ian Lance Taylor <ian@airs.com>
724 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
726 2005-06-16 David Ung <davidu@mips.com>
727 Nigel Stephens <nigel@mips.com>
729 * mips.igen: New mips16e model and include m16e.igen.
730 (check_u64): Add mips16e tag.
731 * m16e.igen: New file for MIPS16e instructions.
732 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
733 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
735 * configure: Regenerate.
737 2005-05-26 David Ung <davidu@mips.com>
739 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
740 tags to all instructions which are applicable to the new ISAs.
741 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
743 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
745 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
747 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
748 * configure: Regenerate.
750 2005-03-23 Mark Kettenis <kettenis@gnu.org>
752 * configure: Regenerate.
754 2005-01-14 Andrew Cagney <cagney@gnu.org>
756 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
757 explicit call to AC_CONFIG_HEADER.
758 * configure: Regenerate.
760 2005-01-12 Andrew Cagney <cagney@gnu.org>
762 * configure.ac: Update to use ../common/common.m4.
763 * configure: Re-generate.
765 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
767 * configure: Regenerated to track ../common/aclocal.m4 changes.
769 2005-01-07 Andrew Cagney <cagney@gnu.org>
771 * configure.ac: Rename configure.in, require autoconf 2.59.
772 * configure: Re-generate.
774 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
776 * configure: Regenerate for ../common/aclocal.m4 update.
778 2004-09-24 Monika Chaddha <monika@acmet.com>
780 Committed by Andrew Cagney.
781 * m16.igen (CMP, CMPI): Fix assembler.
783 2004-08-18 Chris Demetriou <cgd@broadcom.com>
785 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
786 * configure: Regenerate.
788 2004-06-25 Chris Demetriou <cgd@broadcom.com>
790 * configure.in (sim_m16_machine): Include mipsIII.
791 * configure: Regenerate.
793 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
795 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
797 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
799 2004-04-10 Chris Demetriou <cgd@broadcom.com>
801 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
803 2004-04-09 Chris Demetriou <cgd@broadcom.com>
805 * mips.igen (check_fmt): Remove.
806 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
807 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
808 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
809 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
810 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
811 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
812 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
813 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
814 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
815 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
817 2004-04-09 Chris Demetriou <cgd@broadcom.com>
819 * sb1.igen (check_sbx): New function.
820 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
822 2004-03-29 Chris Demetriou <cgd@broadcom.com>
823 Richard Sandiford <rsandifo@redhat.com>
825 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
826 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
827 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
828 separate implementations for mipsIV and mipsV. Use new macros to
829 determine whether the restrictions apply.
831 2004-01-19 Chris Demetriou <cgd@broadcom.com>
833 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
834 (check_mult_hilo): Improve comments.
835 (check_div_hilo): Likewise. Also, fork off a new version
836 to handle mips32/mips64 (since there are no hazards to check
839 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
841 * mips.igen (do_dmultx): Fix check for negative operands.
843 2003-05-16 Ian Lance Taylor <ian@airs.com>
845 * Makefile.in (SHELL): Make sure this is defined.
846 (various): Use $(SHELL) whenever we invoke move-if-change.
848 2003-05-03 Chris Demetriou <cgd@broadcom.com>
850 * cp1.c: Tweak attribution slightly.
853 * mdmx.igen: Likewise.
854 * mips3d.igen: Likewise.
855 * sb1.igen: Likewise.
857 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
859 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
862 2003-02-27 Andrew Cagney <cagney@redhat.com>
864 * interp.c (sim_open): Rename _bfd to bfd.
865 (sim_create_inferior): Ditto.
867 2003-01-14 Chris Demetriou <cgd@broadcom.com>
869 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
871 2003-01-14 Chris Demetriou <cgd@broadcom.com>
873 * mips.igen (EI, DI): Remove.
875 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
877 * Makefile.in (tmp-run-multi): Fix mips16 filter.
879 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
880 Andrew Cagney <ac131313@redhat.com>
881 Gavin Romig-Koch <gavin@redhat.com>
882 Graydon Hoare <graydon@redhat.com>
883 Aldy Hernandez <aldyh@redhat.com>
884 Dave Brolley <brolley@redhat.com>
885 Chris Demetriou <cgd@broadcom.com>
887 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
888 (sim_mach_default): New variable.
889 (mips64vr-*-*, mips64vrel-*-*): New configurations.
890 Add a new simulator generator, MULTI.
891 * configure: Regenerate.
892 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
893 (multi-run.o): New dependency.
894 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
895 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
896 (tmp-multi): Combine them.
897 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
898 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
899 (distclean-extra): New rule.
900 * sim-main.h: Include bfd.h.
901 (MIPS_MACH): New macro.
902 * mips.igen (vr4120, vr5400, vr5500): New models.
903 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
904 * vr.igen: Replace with new version.
906 2003-01-04 Chris Demetriou <cgd@broadcom.com>
908 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
909 * configure: Regenerate.
911 2002-12-31 Chris Demetriou <cgd@broadcom.com>
913 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
914 * mips.igen: Remove all invocations of check_branch_bug and
917 2002-12-16 Chris Demetriou <cgd@broadcom.com>
919 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
921 2002-07-30 Chris Demetriou <cgd@broadcom.com>
923 * mips.igen (do_load_double, do_store_double): New functions.
924 (LDC1, SDC1): Rename to...
925 (LDC1b, SDC1b): respectively.
926 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
928 2002-07-29 Michael Snyder <msnyder@redhat.com>
930 * cp1.c (fp_recip2): Modify initialization expression so that
931 GCC will recognize it as constant.
933 2002-06-18 Chris Demetriou <cgd@broadcom.com>
935 * mdmx.c (SD_): Delete.
936 (Unpredictable): Re-define, for now, to directly invoke
937 unpredictable_action().
938 (mdmx_acc_op): Fix error in .ob immediate handling.
940 2002-06-18 Andrew Cagney <cagney@redhat.com>
942 * interp.c (sim_firmware_command): Initialize `address'.
944 2002-06-16 Andrew Cagney <ac131313@redhat.com>
946 * configure: Regenerated to track ../common/aclocal.m4 changes.
948 2002-06-14 Chris Demetriou <cgd@broadcom.com>
949 Ed Satterthwaite <ehs@broadcom.com>
951 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
952 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
953 * mips.igen: Include mips3d.igen.
954 (mips3d): New model name for MIPS-3D ASE instructions.
955 (CVT.W.fmt): Don't use this instruction for word (source) format
957 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
958 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
959 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
960 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
961 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
962 (RSquareRoot1, RSquareRoot2): New macros.
963 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
964 (fp_rsqrt2): New functions.
965 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
966 * configure: Regenerate.
968 2002-06-13 Chris Demetriou <cgd@broadcom.com>
969 Ed Satterthwaite <ehs@broadcom.com>
971 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
972 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
973 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
974 (convert): Note that this function is not used for paired-single
976 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
977 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
978 (check_fmt_p): Enable paired-single support.
979 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
980 (PUU.PS): New instructions.
981 (CVT.S.fmt): Don't use this instruction for paired-single format
983 * sim-main.h (FP_formats): New value 'fmt_ps.'
984 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
985 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
987 2002-06-12 Chris Demetriou <cgd@broadcom.com>
989 * mips.igen: Fix formatting of function calls in
992 2002-06-12 Chris Demetriou <cgd@broadcom.com>
994 * mips.igen (MOVN, MOVZ): Trace result.
995 (TNEI): Print "tnei" as the opcode name in traces.
996 (CEIL.W): Add disassembly string for traces.
997 (RSQRT.fmt): Make location of disassembly string consistent
998 with other instructions.
1000 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1002 * mips.igen (X): Delete unused function.
1004 2002-06-08 Andrew Cagney <cagney@redhat.com>
1006 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1008 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1009 Ed Satterthwaite <ehs@broadcom.com>
1011 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1012 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1013 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1014 (fp_nmsub): New prototypes.
1015 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1016 (NegMultiplySub): New defines.
1017 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1018 (MADD.D, MADD.S): Replace with...
1019 (MADD.fmt): New instruction.
1020 (MSUB.D, MSUB.S): Replace with...
1021 (MSUB.fmt): New instruction.
1022 (NMADD.D, NMADD.S): Replace with...
1023 (NMADD.fmt): New instruction.
1024 (NMSUB.D, MSUB.S): Replace with...
1025 (NMSUB.fmt): New instruction.
1027 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1028 Ed Satterthwaite <ehs@broadcom.com>
1030 * cp1.c: Fix more comment spelling and formatting.
1031 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1032 (denorm_mode): New function.
1033 (fpu_unary, fpu_binary): Round results after operation, collect
1034 status from rounding operations, and update the FCSR.
1035 (convert): Collect status from integer conversions and rounding
1036 operations, and update the FCSR. Adjust NaN values that result
1037 from conversions. Convert to use sim_io_eprintf rather than
1038 fprintf, and remove some debugging code.
1039 * cp1.h (fenr_FS): New define.
1041 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1043 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1044 rounding mode to sim FP rounding mode flag conversion code into...
1045 (rounding_mode): New function.
1047 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1049 * cp1.c: Clean up formatting of a few comments.
1050 (value_fpr): Reformat switch statement.
1052 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1053 Ed Satterthwaite <ehs@broadcom.com>
1056 * sim-main.h: Include cp1.h.
1057 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1058 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1059 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1060 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1061 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1062 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1063 * cp1.c: Don't include sim-fpu.h; already included by
1064 sim-main.h. Clean up formatting of some comments.
1065 (NaN, Equal, Less): Remove.
1066 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1067 (fp_cmp): New functions.
1068 * mips.igen (do_c_cond_fmt): Remove.
1069 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1070 Compare. Add result tracing.
1071 (CxC1): Remove, replace with...
1072 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1073 (DMxC1): Remove, replace with...
1074 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1075 (MxC1): Remove, replace with...
1076 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1078 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1080 * sim-main.h (FGRIDX): Remove, replace all uses with...
1081 (FGR_BASE): New macro.
1082 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1083 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1084 (NR_FGR, FGR): Likewise.
1085 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1086 * mips.igen: Likewise.
1088 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1090 * cp1.c: Add an FSF Copyright notice to this file.
1092 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1093 Ed Satterthwaite <ehs@broadcom.com>
1095 * cp1.c (Infinity): Remove.
1096 * sim-main.h (Infinity): Likewise.
1098 * cp1.c (fp_unary, fp_binary): New functions.
1099 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1100 (fp_sqrt): New functions, implemented in terms of the above.
1101 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1102 (Recip, SquareRoot): Remove (replaced by functions above).
1103 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1104 (fp_recip, fp_sqrt): New prototypes.
1105 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1106 (Recip, SquareRoot): Replace prototypes with #defines which
1107 invoke the functions above.
1109 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1111 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1112 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1113 file, remove PARAMS from prototypes.
1114 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1115 simulator state arguments.
1116 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1117 pass simulator state arguments.
1118 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1119 (store_fpr, convert): Remove 'sd' argument.
1120 (value_fpr): Likewise. Convert to use 'SD' instead.
1122 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1124 * cp1.c (Min, Max): Remove #if 0'd functions.
1125 * sim-main.h (Min, Max): Remove.
1127 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1129 * cp1.c: fix formatting of switch case and default labels.
1130 * interp.c: Likewise.
1131 * sim-main.c: Likewise.
1133 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1135 * cp1.c: Clean up comments which describe FP formats.
1136 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1138 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1139 Ed Satterthwaite <ehs@broadcom.com>
1141 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1142 Broadcom SiByte SB-1 processor configurations.
1143 * configure: Regenerate.
1144 * sb1.igen: New file.
1145 * mips.igen: Include sb1.igen.
1147 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1148 * mdmx.igen: Add "sb1" model to all appropriate functions and
1150 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1151 (ob_func, ob_acc): Reference the above.
1152 (qh_acc): Adjust to keep the same size as ob_acc.
1153 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1154 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1156 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1158 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1160 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1161 Ed Satterthwaite <ehs@broadcom.com>
1163 * mips.igen (mdmx): New (pseudo-)model.
1164 * mdmx.c, mdmx.igen: New files.
1165 * Makefile.in (SIM_OBJS): Add mdmx.o.
1166 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1168 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1169 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1170 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1171 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1172 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1173 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1174 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1175 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1176 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1177 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1178 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1179 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1180 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1181 (qh_fmtsel): New macros.
1182 (_sim_cpu): New member "acc".
1183 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1184 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1186 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1188 * interp.c: Use 'deprecated' rather than 'depreciated.'
1189 * sim-main.h: Likewise.
1191 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1193 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1194 which wouldn't compile anyway.
1195 * sim-main.h (unpredictable_action): New function prototype.
1196 (Unpredictable): Define to call igen function unpredictable().
1197 (NotWordValue): New macro to call igen function not_word_value().
1198 (UndefinedResult): Remove.
1199 * interp.c (undefined_result): Remove.
1200 (unpredictable_action): New function.
1201 * mips.igen (not_word_value, unpredictable): New functions.
1202 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1203 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1204 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1205 NotWordValue() to check for unpredictable inputs, then
1206 Unpredictable() to handle them.
1208 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1210 * mips.igen: Fix formatting of calls to Unpredictable().
1212 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1214 * interp.c (sim_open): Revert previous change.
1216 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1218 * interp.c (sim_open): Disable chunk of code that wrote code in
1219 vector table entries.
1221 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1223 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1224 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1227 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1229 * cp1.c: Fix many formatting issues.
1231 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1233 * cp1.c (fpu_format_name): New function to replace...
1234 (DOFMT): This. Delete, and update all callers.
1235 (fpu_rounding_mode_name): New function to replace...
1236 (RMMODE): This. Delete, and update all callers.
1238 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1240 * interp.c: Move FPU support routines from here to...
1241 * cp1.c: Here. New file.
1242 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1243 (cp1.o): New target.
1245 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1247 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1248 * mips.igen (mips32, mips64): New models, add to all instructions
1249 and functions as appropriate.
1250 (loadstore_ea, check_u64): New variant for model mips64.
1251 (check_fmt_p): New variant for models mipsV and mips64, remove
1252 mipsV model marking fro other variant.
1255 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1256 for mips32 and mips64.
1257 (DCLO, DCLZ): New instructions for mips64.
1259 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1261 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1262 immediate or code as a hex value with the "%#lx" format.
1263 (ANDI): Likewise, and fix printed instruction name.
1265 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1267 * sim-main.h (UndefinedResult, Unpredictable): New macros
1268 which currently do nothing.
1270 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1272 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1273 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1274 (status_CU3): New definitions.
1276 * sim-main.h (ExceptionCause): Add new values for MIPS32
1277 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1278 for DebugBreakPoint and NMIReset to note their status in
1280 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1281 (SignalExceptionCacheErr): New exception macros.
1283 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1285 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1286 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1288 (SignalExceptionCoProcessorUnusable): Take as argument the
1289 unusable coprocessor number.
1291 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1293 * mips.igen: Fix formatting of all SignalException calls.
1295 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1297 * sim-main.h (SIGNEXTEND): Remove.
1299 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1301 * mips.igen: Remove gencode comment from top of file, fix
1302 spelling in another comment.
1304 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1306 * mips.igen (check_fmt, check_fmt_p): New functions to check
1307 whether specific floating point formats are usable.
1308 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1309 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1310 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1311 Use the new functions.
1312 (do_c_cond_fmt): Remove format checks...
1313 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1315 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1317 * mips.igen: Fix formatting of check_fpu calls.
1319 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1321 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1323 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1325 * mips.igen: Remove whitespace at end of lines.
1327 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1329 * mips.igen (loadstore_ea): New function to do effective
1330 address calculations.
1331 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1332 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1333 CACHE): Use loadstore_ea to do effective address computations.
1335 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1337 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1338 * mips.igen (LL, CxC1, MxC1): Likewise.
1340 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1342 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1343 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1344 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1345 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1346 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1347 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1348 Don't split opcode fields by hand, use the opcode field values
1351 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1353 * mips.igen (do_divu): Fix spacing.
1355 * mips.igen (do_dsllv): Move to be right before DSLLV,
1356 to match the rest of the do_<shift> functions.
1358 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1360 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1361 DSRL32, do_dsrlv): Trace inputs and results.
1363 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1365 * mips.igen (CACHE): Provide instruction-printing string.
1367 * interp.c (signal_exception): Comment tokens after #endif.
1369 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1371 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1372 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1373 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1374 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1375 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1376 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1377 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1378 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1380 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1382 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1383 instruction-printing string.
1384 (LWU): Use '64' as the filter flag.
1386 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1388 * mips.igen (SDXC1): Fix instruction-printing string.
1390 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1392 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1393 filter flags "32,f".
1395 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1397 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1400 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1402 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1403 add a comma) so that it more closely match the MIPS ISA
1404 documentation opcode partitioning.
1405 (PREF): Put useful names on opcode fields, and include
1406 instruction-printing string.
1408 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1410 * mips.igen (check_u64): New function which in the future will
1411 check whether 64-bit instructions are usable and signal an
1412 exception if not. Currently a no-op.
1413 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1414 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1415 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1416 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1418 * mips.igen (check_fpu): New function which in the future will
1419 check whether FPU instructions are usable and signal an exception
1420 if not. Currently a no-op.
1421 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1422 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1423 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1424 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1425 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1426 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1427 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1428 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1430 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1432 * mips.igen (do_load_left, do_load_right): Move to be immediately
1434 (do_store_left, do_store_right): Move to be immediately following
1437 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1439 * mips.igen (mipsV): New model name. Also, add it to
1440 all instructions and functions where it is appropriate.
1442 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1444 * mips.igen: For all functions and instructions, list model
1445 names that support that instruction one per line.
1447 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1449 * mips.igen: Add some additional comments about supported
1450 models, and about which instructions go where.
1451 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1452 order as is used in the rest of the file.
1454 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1456 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1457 indicating that ALU32_END or ALU64_END are there to check
1459 (DADD): Likewise, but also remove previous comment about
1462 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1464 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1465 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1466 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1467 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1468 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1469 fields (i.e., add and move commas) so that they more closely
1470 match the MIPS ISA documentation opcode partitioning.
1472 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1474 * mips.igen (ADDI): Print immediate value.
1475 (BREAK): Print code.
1476 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1477 (SLL): Print "nop" specially, and don't run the code
1478 that does the shift for the "nop" case.
1480 2001-11-17 Fred Fish <fnf@redhat.com>
1482 * sim-main.h (float_operation): Move enum declaration outside
1483 of _sim_cpu struct declaration.
1485 2001-04-12 Jim Blandy <jimb@redhat.com>
1487 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1488 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1490 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1491 PENDING_FILL, and you can get the intended effect gracefully by
1492 calling PENDING_SCHED directly.
1494 2001-02-23 Ben Elliston <bje@redhat.com>
1496 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1497 already defined elsewhere.
1499 2001-02-19 Ben Elliston <bje@redhat.com>
1501 * sim-main.h (sim_monitor): Return an int.
1502 * interp.c (sim_monitor): Add return values.
1503 (signal_exception): Handle error conditions from sim_monitor.
1505 2001-02-08 Ben Elliston <bje@redhat.com>
1507 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1508 (store_memory): Likewise, pass cia to sim_core_write*.
1510 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1512 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1513 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1515 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1517 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1518 * Makefile.in: Don't delete *.igen when cleaning directory.
1520 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1522 * m16.igen (break): Call SignalException not sim_engine_halt.
1524 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1526 From Jason Eckhardt:
1527 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1529 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1531 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1533 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1535 * mips.igen (do_dmultx): Fix typo.
1537 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1539 * configure: Regenerated to track ../common/aclocal.m4 changes.
1541 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1543 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1545 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1547 * sim-main.h (GPR_CLEAR): Define macro.
1549 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1551 * interp.c (decode_coproc): Output long using %lx and not %s.
1553 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1555 * interp.c (sim_open): Sort & extend dummy memory regions for
1556 --board=jmr3904 for eCos.
1558 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1560 * configure: Regenerated.
1562 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1564 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1565 calls, conditional on the simulator being in verbose mode.
1567 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1569 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1570 cache don't get ReservedInstruction traps.
1572 1999-11-29 Mark Salter <msalter@cygnus.com>
1574 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1575 to clear status bits in sdisr register. This is how the hardware works.
1577 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1578 being used by cygmon.
1580 1999-11-11 Andrew Haley <aph@cygnus.com>
1582 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1585 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1587 * mips.igen (MULT): Correct previous mis-applied patch.
1589 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1591 * mips.igen (delayslot32): Handle sequence like
1592 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1593 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1594 (MULT): Actually pass the third register...
1596 1999-09-03 Mark Salter <msalter@cygnus.com>
1598 * interp.c (sim_open): Added more memory aliases for additional
1599 hardware being touched by cygmon on jmr3904 board.
1601 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1603 * configure: Regenerated to track ../common/aclocal.m4 changes.
1605 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1607 * interp.c (sim_store_register): Handle case where client - GDB -
1608 specifies that a 4 byte register is 8 bytes in size.
1609 (sim_fetch_register): Ditto.
1611 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1613 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1614 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1615 (idt_monitor_base): Base address for IDT monitor traps.
1616 (pmon_monitor_base): Ditto for PMON.
1617 (lsipmon_monitor_base): Ditto for LSI PMON.
1618 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1619 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1620 (sim_firmware_command): New function.
1621 (mips_option_handler): Call it for OPTION_FIRMWARE.
1622 (sim_open): Allocate memory for idt_monitor region. If "--board"
1623 option was given, add no monitor by default. Add BREAK hooks only if
1624 monitors are also there.
1626 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1628 * interp.c (sim_monitor): Flush output before reading input.
1630 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1632 * tconfig.in (SIM_HANDLES_LMA): Always define.
1634 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1636 From Mark Salter <msalter@cygnus.com>:
1637 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1638 (sim_open): Add setup for BSP board.
1640 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1642 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1643 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1644 them as unimplemented.
1646 1999-05-08 Felix Lee <flee@cygnus.com>
1648 * configure: Regenerated to track ../common/aclocal.m4 changes.
1650 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1652 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1654 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1656 * configure.in: Any mips64vr5*-*-* target should have
1657 -DTARGET_ENABLE_FR=1.
1658 (default_endian): Any mips64vr*el-*-* target should default to
1660 * configure: Re-generate.
1662 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1664 * mips.igen (ldl): Extend from _16_, not 32.
1666 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1668 * interp.c (sim_store_register): Force registers written to by GDB
1669 into an un-interpreted state.
1671 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1673 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1674 CPU, start periodic background I/O polls.
1675 (tx3904sio_poll): New function: periodic I/O poller.
1677 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1679 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1681 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1683 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1686 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1688 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1689 (load_word): Call SIM_CORE_SIGNAL hook on error.
1690 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1691 starting. For exception dispatching, pass PC instead of NULL_CIA.
1692 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1693 * sim-main.h (COP0_BADVADDR): Define.
1694 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1695 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1696 (_sim_cpu): Add exc_* fields to store register value snapshots.
1697 * mips.igen (*): Replace memory-related SignalException* calls
1698 with references to SIM_CORE_SIGNAL hook.
1700 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1702 * sim-main.c (*): Minor warning cleanups.
1704 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1706 * m16.igen (DADDIU5): Correct type-o.
1708 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1710 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1713 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1715 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1717 (interp.o): Add dependency on itable.h
1718 (oengine.c, gencode): Delete remaining references.
1719 (BUILT_SRC_FROM_GEN): Clean up.
1721 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1724 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1725 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1726 tmp-run-hack) : New.
1727 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1728 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1729 Drop the "64" qualifier to get the HACK generator working.
1730 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1731 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1732 qualifier to get the hack generator working.
1733 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1734 (DSLL): Use do_dsll.
1735 (DSLLV): Use do_dsllv.
1736 (DSRA): Use do_dsra.
1737 (DSRL): Use do_dsrl.
1738 (DSRLV): Use do_dsrlv.
1739 (BC1): Move *vr4100 to get the HACK generator working.
1740 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1741 get the HACK generator working.
1742 (MACC) Rename to get the HACK generator working.
1743 (DMACC,MACCS,DMACCS): Add the 64.
1745 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1747 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1748 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1750 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1752 * mips/interp.c (DEBUG): Cleanups.
1754 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1756 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1757 (tx3904sio_tickle): fflush after a stdout character output.
1759 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1761 * interp.c (sim_close): Uninstall modules.
1763 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1765 * sim-main.h, interp.c (sim_monitor): Change to global
1768 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1770 * configure.in (vr4100): Only include vr4100 instructions in
1772 * configure: Re-generate.
1773 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1775 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1777 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1778 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1781 * configure.in (sim_default_gen, sim_use_gen): Replace with
1783 (--enable-sim-igen): Delete config option. Always using IGEN.
1784 * configure: Re-generate.
1786 * Makefile.in (gencode): Kill, kill, kill.
1789 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1791 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1792 bit mips16 igen simulator.
1793 * configure: Re-generate.
1795 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1796 as part of vr4100 ISA.
1797 * vr.igen: Mark all instructions as 64 bit only.
1799 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1801 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1804 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1806 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1807 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1808 * configure: Re-generate.
1810 * m16.igen (BREAK): Define breakpoint instruction.
1811 (JALX32): Mark instruction as mips16 and not r3900.
1812 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1814 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1816 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1818 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1819 insn as a debug breakpoint.
1821 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1823 (PENDING_SCHED): Clean up trace statement.
1824 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1825 (PENDING_FILL): Delay write by only one cycle.
1826 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1828 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1830 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1832 (pending_tick): Move incrementing of index to FOR statement.
1833 (pending_tick): Only update PENDING_OUT after a write has occured.
1835 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1837 * configure: Re-generate.
1839 * interp.c (sim_engine_run OLD): Delete explicit call to
1840 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1842 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1844 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1845 interrupt level number to match changed SignalExceptionInterrupt
1848 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1850 * interp.c: #include "itable.h" if WITH_IGEN.
1851 (get_insn_name): New function.
1852 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1853 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1855 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1857 * configure: Rebuilt to inhale new common/aclocal.m4.
1859 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1861 * dv-tx3904sio.c: Include sim-assert.h.
1863 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1865 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1866 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1867 Reorganize target-specific sim-hardware checks.
1868 * configure: rebuilt.
1869 * interp.c (sim_open): For tx39 target boards, set
1870 OPERATING_ENVIRONMENT, add tx3904sio devices.
1871 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1872 ROM executables. Install dv-sockser into sim-modules list.
1874 * dv-tx3904irc.c: Compiler warning clean-up.
1875 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1876 frequent hw-trace messages.
1878 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1880 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1882 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1884 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1886 * vr.igen: New file.
1887 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1888 * mips.igen: Define vr4100 model. Include vr.igen.
1889 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1891 * mips.igen (check_mf_hilo): Correct check.
1893 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1895 * sim-main.h (interrupt_event): Add prototype.
1897 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1898 register_ptr, register_value.
1899 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1901 * sim-main.h (tracefh): Make extern.
1903 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1905 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1906 Reduce unnecessarily high timer event frequency.
1907 * dv-tx3904cpu.c: Ditto for interrupt event.
1909 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1911 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1913 (interrupt_event): Made non-static.
1915 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1916 interchange of configuration values for external vs. internal
1919 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1921 * mips.igen (BREAK): Moved code to here for
1922 simulator-reserved break instructions.
1923 * gencode.c (build_instruction): Ditto.
1924 * interp.c (signal_exception): Code moved from here. Non-
1925 reserved instructions now use exception vector, rather
1927 * sim-main.h: Moved magic constants to here.
1929 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1931 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1932 register upon non-zero interrupt event level, clear upon zero
1934 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1935 by passing zero event value.
1936 (*_io_{read,write}_buffer): Endianness fixes.
1937 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1938 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1940 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1941 serial I/O and timer module at base address 0xFFFF0000.
1943 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1945 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1948 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1950 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1952 * configure: Update.
1954 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1956 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1957 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1958 * configure.in: Include tx3904tmr in hw_device list.
1959 * configure: Rebuilt.
1960 * interp.c (sim_open): Instantiate three timer instances.
1961 Fix address typo of tx3904irc instance.
1963 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1965 * interp.c (signal_exception): SystemCall exception now uses
1966 the exception vector.
1968 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1970 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1973 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1977 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1979 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1981 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1982 sim-main.h. Declare a struct hw_descriptor instead of struct
1983 hw_device_descriptor.
1985 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1987 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1988 right bits and then re-align left hand bytes to correct byte
1989 lanes. Fix incorrect computation in do_store_left when loading
1990 bytes from second word.
1992 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1994 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1995 * interp.c (sim_open): Only create a device tree when HW is
1998 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1999 * interp.c (signal_exception): Ditto.
2001 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2003 * gencode.c: Mark BEGEZALL as LIKELY.
2005 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2007 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2008 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2010 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2012 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2013 modules. Recognize TX39 target with "mips*tx39" pattern.
2014 * configure: Rebuilt.
2015 * sim-main.h (*): Added many macros defining bits in
2016 TX39 control registers.
2017 (SignalInterrupt): Send actual PC instead of NULL.
2018 (SignalNMIReset): New exception type.
2019 * interp.c (board): New variable for future use to identify
2020 a particular board being simulated.
2021 (mips_option_handler,mips_options): Added "--board" option.
2022 (interrupt_event): Send actual PC.
2023 (sim_open): Make memory layout conditional on board setting.
2024 (signal_exception): Initial implementation of hardware interrupt
2025 handling. Accept another break instruction variant for simulator
2027 (decode_coproc): Implement RFE instruction for TX39.
2028 (mips.igen): Decode RFE instruction as such.
2029 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2030 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2031 bbegin to implement memory map.
2032 * dv-tx3904cpu.c: New file.
2033 * dv-tx3904irc.c: New file.
2035 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2037 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2039 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2041 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2042 with calls to check_div_hilo.
2044 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2046 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2047 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2048 Add special r3900 version of do_mult_hilo.
2049 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2050 with calls to check_mult_hilo.
2051 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2052 with calls to check_div_hilo.
2054 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2056 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2057 Document a replacement.
2059 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2061 * interp.c (sim_monitor): Make mon_printf work.
2063 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2065 * sim-main.h (INSN_NAME): New arg `cpu'.
2067 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2069 * configure: Regenerated to track ../common/aclocal.m4 changes.
2071 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2073 * configure: Regenerated to track ../common/aclocal.m4 changes.
2076 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2078 * acconfig.h: New file.
2079 * configure.in: Reverted change of Apr 24; use sinclude again.
2081 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2083 * configure: Regenerated to track ../common/aclocal.m4 changes.
2086 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2088 * configure.in: Don't call sinclude.
2090 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2092 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2094 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2096 * mips.igen (ERET): Implement.
2098 * interp.c (decode_coproc): Return sign-extended EPC.
2100 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2102 * interp.c (signal_exception): Do not ignore Trap.
2103 (signal_exception): On TRAP, restart at exception address.
2104 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2105 (signal_exception): Update.
2106 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2107 so that TRAP instructions are caught.
2109 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2111 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2112 contains HI/LO access history.
2113 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2114 (HIACCESS, LOACCESS): Delete, replace with
2115 (HIHISTORY, LOHISTORY): New macros.
2116 (CHECKHILO): Delete all, moved to mips.igen
2118 * gencode.c (build_instruction): Do not generate checks for
2119 correct HI/LO register usage.
2121 * interp.c (old_engine_run): Delete checks for correct HI/LO
2124 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2125 check_mf_cycles): New functions.
2126 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2127 do_divu, domultx, do_mult, do_multu): Use.
2129 * tx.igen ("madd", "maddu"): Use.
2131 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2133 * mips.igen (DSRAV): Use function do_dsrav.
2134 (SRAV): Use new function do_srav.
2136 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2137 (B): Sign extend 11 bit immediate.
2138 (EXT-B*): Shift 16 bit immediate left by 1.
2139 (ADDIU*): Don't sign extend immediate value.
2141 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2143 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2145 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2148 * mips.igen (delayslot32, nullify_next_insn): New functions.
2149 (m16.igen): Always include.
2150 (do_*): Add more tracing.
2152 * m16.igen (delayslot16): Add NIA argument, could be called by a
2153 32 bit MIPS16 instruction.
2155 * interp.c (ifetch16): Move function from here.
2156 * sim-main.c (ifetch16): To here.
2158 * sim-main.c (ifetch16, ifetch32): Update to match current
2159 implementations of LH, LW.
2160 (signal_exception): Don't print out incorrect hex value of illegal
2163 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2165 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2168 * m16.igen: Implement MIPS16 instructions.
2170 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2171 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2172 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2173 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2174 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2175 bodies of corresponding code from 32 bit insn to these. Also used
2176 by MIPS16 versions of functions.
2178 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2179 (IMEM16): Drop NR argument from macro.
2181 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2183 * Makefile.in (SIM_OBJS): Add sim-main.o.
2185 * sim-main.h (address_translation, load_memory, store_memory,
2186 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2188 (pr_addr, pr_uword64): Declare.
2189 (sim-main.c): Include when H_REVEALS_MODULE_P.
2191 * interp.c (address_translation, load_memory, store_memory,
2192 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2194 * sim-main.c: To here. Fix compilation problems.
2196 * configure.in: Enable inlining.
2197 * configure: Re-config.
2199 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2201 * configure: Regenerated to track ../common/aclocal.m4 changes.
2203 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2205 * mips.igen: Include tx.igen.
2206 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2207 * tx.igen: New file, contains MADD and MADDU.
2209 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2210 the hardwired constant `7'.
2211 (store_memory): Ditto.
2212 (LOADDRMASK): Move definition to sim-main.h.
2214 mips.igen (MTC0): Enable for r3900.
2217 mips.igen (do_load_byte): Delete.
2218 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2219 do_store_right): New functions.
2220 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2222 configure.in: Let the tx39 use igen again.
2225 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2227 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2228 not an address sized quantity. Return zero for cache sizes.
2230 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2232 * mips.igen (r3900): r3900 does not support 64 bit integer
2235 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2237 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2239 * configure : Rebuild.
2241 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2243 * configure: Regenerated to track ../common/aclocal.m4 changes.
2245 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2249 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2251 * configure: Regenerated to track ../common/aclocal.m4 changes.
2252 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2254 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2256 * configure: Regenerated to track ../common/aclocal.m4 changes.
2258 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2260 * interp.c (Max, Min): Comment out functions. Not yet used.
2262 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2264 * configure: Regenerated to track ../common/aclocal.m4 changes.
2266 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2268 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2269 configurable settings for stand-alone simulator.
2271 * configure.in: Added X11 search, just in case.
2273 * configure: Regenerated.
2275 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2277 * interp.c (sim_write, sim_read, load_memory, store_memory):
2278 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2280 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2282 * sim-main.h (GETFCC): Return an unsigned value.
2284 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2286 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2287 (DADD): Result destination is RD not RT.
2289 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2291 * sim-main.h (HIACCESS, LOACCESS): Always define.
2293 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2295 * interp.c (sim_info): Delete.
2297 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2299 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2300 (mips_option_handler): New argument `cpu'.
2301 (sim_open): Update call to sim_add_option_table.
2303 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2305 * mips.igen (CxC1): Add tracing.
2307 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2309 * sim-main.h (Max, Min): Declare.
2311 * interp.c (Max, Min): New functions.
2313 * mips.igen (BC1): Add tracing.
2315 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2317 * interp.c Added memory map for stack in vr4100
2319 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2321 * interp.c (load_memory): Add missing "break"'s.
2323 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2325 * interp.c (sim_store_register, sim_fetch_register): Pass in
2326 length parameter. Return -1.
2328 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2330 * interp.c: Added hardware init hook, fixed warnings.
2332 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2334 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2336 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2338 * interp.c (ifetch16): New function.
2340 * sim-main.h (IMEM32): Rename IMEM.
2341 (IMEM16_IMMED): Define.
2343 (DELAY_SLOT): Update.
2345 * m16run.c (sim_engine_run): New file.
2347 * m16.igen: All instructions except LB.
2348 (LB): Call do_load_byte.
2349 * mips.igen (do_load_byte): New function.
2350 (LB): Call do_load_byte.
2352 * mips.igen: Move spec for insn bit size and high bit from here.
2353 * Makefile.in (tmp-igen, tmp-m16): To here.
2355 * m16.dc: New file, decode mips16 instructions.
2357 * Makefile.in (SIM_NO_ALL): Define.
2358 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2360 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2362 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2363 point unit to 32 bit registers.
2364 * configure: Re-generate.
2366 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2368 * configure.in (sim_use_gen): Make IGEN the default simulator
2369 generator for generic 32 and 64 bit mips targets.
2370 * configure: Re-generate.
2372 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2374 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2377 * interp.c (sim_fetch_register, sim_store_register): Read/write
2378 FGR from correct location.
2379 (sim_open): Set size of FGR's according to
2380 WITH_TARGET_FLOATING_POINT_BITSIZE.
2382 * sim-main.h (FGR): Store floating point registers in a separate
2385 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2387 * configure: Regenerated to track ../common/aclocal.m4 changes.
2389 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2391 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2393 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2395 * interp.c (pending_tick): New function. Deliver pending writes.
2397 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2398 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2399 it can handle mixed sized quantites and single bits.
2401 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2403 * interp.c (oengine.h): Do not include when building with IGEN.
2404 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2405 (sim_info): Ditto for PROCESSOR_64BIT.
2406 (sim_monitor): Replace ut_reg with unsigned_word.
2407 (*): Ditto for t_reg.
2408 (LOADDRMASK): Define.
2409 (sim_open): Remove defunct check that host FP is IEEE compliant,
2410 using software to emulate floating point.
2411 (value_fpr, ...): Always compile, was conditional on HASFPU.
2413 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2415 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2418 * interp.c (SD, CPU): Define.
2419 (mips_option_handler): Set flags in each CPU.
2420 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2421 (sim_close): Do not clear STATE, deleted anyway.
2422 (sim_write, sim_read): Assume CPU zero's vm should be used for
2424 (sim_create_inferior): Set the PC for all processors.
2425 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2427 (mips16_entry): Pass correct nr of args to store_word, load_word.
2428 (ColdReset): Cold reset all cpu's.
2429 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2430 (sim_monitor, load_memory, store_memory, signal_exception): Use
2431 `CPU' instead of STATE_CPU.
2434 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2437 * sim-main.h (signal_exception): Add sim_cpu arg.
2438 (SignalException*): Pass both SD and CPU to signal_exception.
2439 * interp.c (signal_exception): Update.
2441 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2443 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2444 address_translation): Ditto
2445 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2447 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2449 * configure: Regenerated to track ../common/aclocal.m4 changes.
2451 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2453 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2455 * mips.igen (model): Map processor names onto BFD name.
2457 * sim-main.h (CPU_CIA): Delete.
2458 (SET_CIA, GET_CIA): Define
2460 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2462 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2465 * configure.in (default_endian): Configure a big-endian simulator
2467 * configure: Re-generate.
2469 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2471 * configure: Regenerated to track ../common/aclocal.m4 changes.
2473 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2475 * interp.c (sim_monitor): Handle Densan monitor outbyte
2476 and inbyte functions.
2478 1997-12-29 Felix Lee <flee@cygnus.com>
2480 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2482 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2484 * Makefile.in (tmp-igen): Arrange for $zero to always be
2485 reset to zero after every instruction.
2487 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2489 * configure: Regenerated to track ../common/aclocal.m4 changes.
2492 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2494 * mips.igen (MSUB): Fix to work like MADD.
2495 * gencode.c (MSUB): Similarly.
2497 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2499 * configure: Regenerated to track ../common/aclocal.m4 changes.
2501 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2503 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2505 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2507 * sim-main.h (sim-fpu.h): Include.
2509 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2510 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2511 using host independant sim_fpu module.
2513 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2515 * interp.c (signal_exception): Report internal errors with SIGABRT
2518 * sim-main.h (C0_CONFIG): New register.
2519 (signal.h): No longer include.
2521 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2523 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2525 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2527 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2529 * mips.igen: Tag vr5000 instructions.
2530 (ANDI): Was missing mipsIV model, fix assembler syntax.
2531 (do_c_cond_fmt): New function.
2532 (C.cond.fmt): Handle mips I-III which do not support CC field
2534 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2535 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2537 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2538 vr5000 which saves LO in a GPR separatly.
2540 * configure.in (enable-sim-igen): For vr5000, select vr5000
2541 specific instructions.
2542 * configure: Re-generate.
2544 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2546 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2548 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2549 fmt_uninterpreted_64 bit cases to switch. Convert to
2552 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2554 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2555 as specified in IV3.2 spec.
2556 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2558 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2560 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2561 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2562 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2563 PENDING_FILL versions of instructions. Simplify.
2565 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2567 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2569 (MTHI, MFHI): Disable code checking HI-LO.
2571 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2573 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2575 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2577 * gencode.c (build_mips16_operands): Replace IPC with cia.
2579 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2580 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2582 (UndefinedResult): Replace function with macro/function
2584 (sim_engine_run): Don't save PC in IPC.
2586 * sim-main.h (IPC): Delete.
2589 * interp.c (signal_exception, store_word, load_word,
2590 address_translation, load_memory, store_memory, cache_op,
2591 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2592 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2593 current instruction address - cia - argument.
2594 (sim_read, sim_write): Call address_translation directly.
2595 (sim_engine_run): Rename variable vaddr to cia.
2596 (signal_exception): Pass cia to sim_monitor
2598 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2599 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2600 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2602 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2603 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2606 * interp.c (signal_exception): Pass restart address to
2609 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2610 idecode.o): Add dependency.
2612 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2614 (DELAY_SLOT): Update NIA not PC with branch address.
2615 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2617 * mips.igen: Use CIA not PC in branch calculations.
2618 (illegal): Call SignalException.
2619 (BEQ, ADDIU): Fix assembler.
2621 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2623 * m16.igen (JALX): Was missing.
2625 * configure.in (enable-sim-igen): New configuration option.
2626 * configure: Re-generate.
2628 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2630 * interp.c (load_memory, store_memory): Delete parameter RAW.
2631 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2632 bypassing {load,store}_memory.
2634 * sim-main.h (ByteSwapMem): Delete definition.
2636 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2638 * interp.c (sim_do_command, sim_commands): Delete mips specific
2639 commands. Handled by module sim-options.
2641 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2642 (WITH_MODULO_MEMORY): Define.
2644 * interp.c (sim_info): Delete code printing memory size.
2646 * interp.c (mips_size): Nee sim_size, delete function.
2648 (monitor, monitor_base, monitor_size): Delete global variables.
2649 (sim_open, sim_close): Delete code creating monitor and other
2650 memory regions. Use sim-memopts module, via sim_do_commandf, to
2651 manage memory regions.
2652 (load_memory, store_memory): Use sim-core for memory model.
2654 * interp.c (address_translation): Delete all memory map code
2655 except line forcing 32 bit addresses.
2657 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2659 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2662 * interp.c (logfh, logfile): Delete globals.
2663 (sim_open, sim_close): Delete code opening & closing log file.
2664 (mips_option_handler): Delete -l and -n options.
2665 (OPTION mips_options): Ditto.
2667 * interp.c (OPTION mips_options): Rename option trace to dinero.
2668 (mips_option_handler): Update.
2670 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2672 * interp.c (fetch_str): New function.
2673 (sim_monitor): Rewrite using sim_read & sim_write.
2674 (sim_open): Check magic number.
2675 (sim_open): Write monitor vectors into memory using sim_write.
2676 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2677 (sim_read, sim_write): Simplify - transfer data one byte at a
2679 (load_memory, store_memory): Clarify meaning of parameter RAW.
2681 * sim-main.h (isHOST): Defete definition.
2682 (isTARGET): Mark as depreciated.
2683 (address_translation): Delete parameter HOST.
2685 * interp.c (address_translation): Delete parameter HOST.
2687 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2691 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2692 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2694 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2696 * mips.igen: Add model filter field to records.
2698 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2700 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2702 interp.c (sim_engine_run): Do not compile function sim_engine_run
2703 when WITH_IGEN == 1.
2705 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2706 target architecture.
2708 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2709 igen. Replace with configuration variables sim_igen_flags /
2712 * m16.igen: New file. Copy mips16 insns here.
2713 * mips.igen: From here.
2715 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2717 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2719 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2721 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2723 * gencode.c (build_instruction): Follow sim_write's lead in using
2724 BigEndianMem instead of !ByteSwapMem.
2726 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2728 * configure.in (sim_gen): Dependent on target, select type of
2729 generator. Always select old style generator.
2731 configure: Re-generate.
2733 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2735 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2736 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2737 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2738 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2739 SIM_@sim_gen@_*, set by autoconf.
2741 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2743 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2745 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2746 CURRENT_FLOATING_POINT instead.
2748 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2749 (address_translation): Raise exception InstructionFetch when
2750 translation fails and isINSTRUCTION.
2752 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2753 sim_engine_run): Change type of of vaddr and paddr to
2755 (address_translation, prefetch, load_memory, store_memory,
2756 cache_op): Change type of vAddr and pAddr to address_word.
2758 * gencode.c (build_instruction): Change type of vaddr and paddr to
2761 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2763 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2764 macro to obtain result of ALU op.
2766 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2768 * interp.c (sim_info): Call profile_print.
2770 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2772 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2774 * sim-main.h (WITH_PROFILE): Do not define, defined in
2775 common/sim-config.h. Use sim-profile module.
2776 (simPROFILE): Delete defintion.
2778 * interp.c (PROFILE): Delete definition.
2779 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2780 (sim_close): Delete code writing profile histogram.
2781 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2783 (sim_engine_run): Delete code profiling the PC.
2785 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2787 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2789 * interp.c (sim_monitor): Make register pointers of type
2792 * sim-main.h: Make registers of type unsigned_word not
2795 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2797 * interp.c (sync_operation): Rename from SyncOperation, make
2798 global, add SD argument.
2799 (prefetch): Rename from Prefetch, make global, add SD argument.
2800 (decode_coproc): Make global.
2802 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2804 * gencode.c (build_instruction): Generate DecodeCoproc not
2805 decode_coproc calls.
2807 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2808 (SizeFGR): Move to sim-main.h
2809 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2810 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2811 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2813 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2814 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2815 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2816 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2817 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2818 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2820 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2822 (sim-alu.h): Include.
2823 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2824 (sim_cia): Typedef to instruction_address.
2826 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2828 * Makefile.in (interp.o): Rename generated file engine.c to
2833 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2835 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2837 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2839 * gencode.c (build_instruction): For "FPSQRT", output correct
2840 number of arguments to Recip.
2842 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2844 * Makefile.in (interp.o): Depends on sim-main.h
2846 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2848 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2849 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2850 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2851 STATE, DSSTATE): Define
2852 (GPR, FGRIDX, ..): Define.
2854 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2855 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2856 (GPR, FGRIDX, ...): Delete macros.
2858 * interp.c: Update names to match defines from sim-main.h
2860 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2862 * interp.c (sim_monitor): Add SD argument.
2863 (sim_warning): Delete. Replace calls with calls to
2865 (sim_error): Delete. Replace calls with sim_io_error.
2866 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2867 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2868 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2870 (mips_size): Rename from sim_size. Add SD argument.
2872 * interp.c (simulator): Delete global variable.
2873 (callback): Delete global variable.
2874 (mips_option_handler, sim_open, sim_write, sim_read,
2875 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2876 sim_size,sim_monitor): Use sim_io_* not callback->*.
2877 (sim_open): ZALLOC simulator struct.
2878 (PROFILE): Do not define.
2880 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2882 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2883 support.h with corresponding code.
2885 * sim-main.h (word64, uword64), support.h: Move definition to
2887 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2890 * Makefile.in: Update dependencies
2891 * interp.c: Do not include.
2893 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2895 * interp.c (address_translation, load_memory, store_memory,
2896 cache_op): Rename to from AddressTranslation et.al., make global,
2899 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2902 * interp.c (SignalException): Rename to signal_exception, make
2905 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2907 * sim-main.h (SignalException, SignalExceptionInterrupt,
2908 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2909 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2910 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2913 * interp.c, support.h: Use.
2915 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2917 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2918 to value_fpr / store_fpr. Add SD argument.
2919 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2920 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2922 * sim-main.h (ValueFPR, StoreFPR): Define.
2924 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2926 * interp.c (sim_engine_run): Check consistency between configure
2927 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2930 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2931 (mips_fpu): Configure WITH_FLOATING_POINT.
2932 (mips_endian): Configure WITH_TARGET_ENDIAN.
2933 * configure: Update.
2935 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2937 * configure: Regenerated to track ../common/aclocal.m4 changes.
2939 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2941 * configure: Regenerated.
2943 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2945 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2947 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2949 * gencode.c (print_igen_insn_models): Assume certain architectures
2950 include all mips* instructions.
2951 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2954 * Makefile.in (tmp.igen): Add target. Generate igen input from
2957 * gencode.c (FEATURE_IGEN): Define.
2958 (main): Add --igen option. Generate output in igen format.
2959 (process_instructions): Format output according to igen option.
2960 (print_igen_insn_format): New function.
2961 (print_igen_insn_models): New function.
2962 (process_instructions): Only issue warnings and ignore
2963 instructions when no FEATURE_IGEN.
2965 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2967 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2970 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2972 * configure: Regenerated to track ../common/aclocal.m4 changes.
2974 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2976 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2977 SIM_RESERVED_BITS): Delete, moved to common.
2978 (SIM_EXTRA_CFLAGS): Update.
2980 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2982 * configure.in: Configure non-strict memory alignment.
2983 * configure: Regenerated to track ../common/aclocal.m4 changes.
2985 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2987 * configure: Regenerated to track ../common/aclocal.m4 changes.
2989 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2991 * gencode.c (SDBBP,DERET): Added (3900) insns.
2992 (RFE): Turn on for 3900.
2993 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2994 (dsstate): Made global.
2995 (SUBTARGET_R3900): Added.
2996 (CANCELDELAYSLOT): New.
2997 (SignalException): Ignore SystemCall rather than ignore and
2998 terminate. Add DebugBreakPoint handling.
2999 (decode_coproc): New insns RFE, DERET; and new registers Debug
3000 and DEPC protected by SUBTARGET_R3900.
3001 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3003 * Makefile.in,configure.in: Add mips subtarget option.
3004 * configure: Update.
3006 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3008 * gencode.c: Add r3900 (tx39).
3011 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3013 * gencode.c (build_instruction): Don't need to subtract 4 for
3016 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3018 * interp.c: Correct some HASFPU problems.
3020 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3022 * configure: Regenerated to track ../common/aclocal.m4 changes.
3024 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3026 * interp.c (mips_options): Fix samples option short form, should
3029 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3031 * interp.c (sim_info): Enable info code. Was just returning.
3033 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3035 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3038 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3040 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3042 (build_instruction): Ditto for LL.
3044 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3046 * configure: Regenerated to track ../common/aclocal.m4 changes.
3048 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3050 * configure: Regenerated to track ../common/aclocal.m4 changes.
3053 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3055 * interp.c (sim_open): Add call to sim_analyze_program, update
3058 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3060 * interp.c (sim_kill): Delete.
3061 (sim_create_inferior): Add ABFD argument. Set PC from same.
3062 (sim_load): Move code initializing trap handlers from here.
3063 (sim_open): To here.
3064 (sim_load): Delete, use sim-hload.c.
3066 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3068 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3070 * configure: Regenerated to track ../common/aclocal.m4 changes.
3073 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3075 * interp.c (sim_open): Add ABFD argument.
3076 (sim_load): Move call to sim_config from here.
3077 (sim_open): To here. Check return status.
3079 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3081 * gencode.c (build_instruction): Two arg MADD should
3082 not assign result to $0.
3084 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3086 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3087 * sim/mips/configure.in: Regenerate.
3089 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3091 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3092 signed8, unsigned8 et.al. types.
3094 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3095 hosts when selecting subreg.
3097 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3099 * interp.c (sim_engine_run): Reset the ZERO register to zero
3100 regardless of FEATURE_WARN_ZERO.
3101 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3103 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3105 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3106 (SignalException): For BreakPoints ignore any mode bits and just
3108 (SignalException): Always set the CAUSE register.
3110 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3112 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3113 exception has been taken.
3115 * interp.c: Implement the ERET and mt/f sr instructions.
3117 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3119 * interp.c (SignalException): Don't bother restarting an
3122 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3124 * interp.c (SignalException): Really take an interrupt.
3125 (interrupt_event): Only deliver interrupts when enabled.
3127 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3129 * interp.c (sim_info): Only print info when verbose.
3130 (sim_info) Use sim_io_printf for output.
3132 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3134 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3137 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3139 * interp.c (sim_do_command): Check for common commands if a
3140 simulator specific command fails.
3142 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3144 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3145 and simBE when DEBUG is defined.
3147 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3149 * interp.c (interrupt_event): New function. Pass exception event
3150 onto exception handler.
3152 * configure.in: Check for stdlib.h.
3153 * configure: Regenerate.
3155 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3156 variable declaration.
3157 (build_instruction): Initialize memval1.
3158 (build_instruction): Add UNUSED attribute to byte, bigend,
3160 (build_operands): Ditto.
3162 * interp.c: Fix GCC warnings.
3163 (sim_get_quit_code): Delete.
3165 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3166 * Makefile.in: Ditto.
3167 * configure: Re-generate.
3169 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3171 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3173 * interp.c (mips_option_handler): New function parse argumes using
3175 (myname): Replace with STATE_MY_NAME.
3176 (sim_open): Delete check for host endianness - performed by
3178 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3179 (sim_open): Move much of the initialization from here.
3180 (sim_load): To here. After the image has been loaded and
3182 (sim_open): Move ColdReset from here.
3183 (sim_create_inferior): To here.
3184 (sim_open): Make FP check less dependant on host endianness.
3186 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3188 * interp.c (sim_set_callbacks): Delete.
3190 * interp.c (membank, membank_base, membank_size): Replace with
3191 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3192 (sim_open): Remove call to callback->init. gdb/run do this.
3196 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3198 * interp.c (big_endian_p): Delete, replaced by
3199 current_target_byte_order.
3201 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3203 * interp.c (host_read_long, host_read_word, host_swap_word,
3204 host_swap_long): Delete. Using common sim-endian.
3205 (sim_fetch_register, sim_store_register): Use H2T.
3206 (pipeline_ticks): Delete. Handled by sim-events.
3208 (sim_engine_run): Update.
3210 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3212 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3214 (SignalException): To here. Signal using sim_engine_halt.
3215 (sim_stop_reason): Delete, moved to common.
3217 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3219 * interp.c (sim_open): Add callback argument.
3220 (sim_set_callbacks): Delete SIM_DESC argument.
3223 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3225 * Makefile.in (SIM_OBJS): Add common modules.
3227 * interp.c (sim_set_callbacks): Also set SD callback.
3228 (set_endianness, xfer_*, swap_*): Delete.
3229 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3230 Change to functions using sim-endian macros.
3231 (control_c, sim_stop): Delete, use common version.
3232 (simulate): Convert into.
3233 (sim_engine_run): This function.
3234 (sim_resume): Delete.
3236 * interp.c (simulation): New variable - the simulator object.
3237 (sim_kind): Delete global - merged into simulation.
3238 (sim_load): Cleanup. Move PC assignment from here.
3239 (sim_create_inferior): To here.
3241 * sim-main.h: New file.
3242 * interp.c (sim-main.h): Include.
3244 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3246 * configure: Regenerated to track ../common/aclocal.m4 changes.
3248 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3250 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3252 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3254 * gencode.c (build_instruction): DIV instructions: check
3255 for division by zero and integer overflow before using
3256 host's division operation.
3258 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3260 * Makefile.in (SIM_OBJS): Add sim-load.o.
3261 * interp.c: #include bfd.h.
3262 (target_byte_order): Delete.
3263 (sim_kind, myname, big_endian_p): New static locals.
3264 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3265 after argument parsing. Recognize -E arg, set endianness accordingly.
3266 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3267 load file into simulator. Set PC from bfd.
3268 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3269 (set_endianness): Use big_endian_p instead of target_byte_order.
3271 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3273 * interp.c (sim_size): Delete prototype - conflicts with
3274 definition in remote-sim.h. Correct definition.
3276 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3278 * configure: Regenerated to track ../common/aclocal.m4 changes.
3281 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3283 * interp.c (sim_open): New arg `kind'.
3285 * configure: Regenerated to track ../common/aclocal.m4 changes.
3287 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3289 * configure: Regenerated to track ../common/aclocal.m4 changes.
3291 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3293 * interp.c (sim_open): Set optind to 0 before calling getopt.
3295 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3297 * configure: Regenerated to track ../common/aclocal.m4 changes.
3299 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3301 * interp.c : Replace uses of pr_addr with pr_uword64
3302 where the bit length is always 64 independent of SIM_ADDR.
3303 (pr_uword64) : added.
3305 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3307 * configure: Re-generate.
3309 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3311 * configure: Regenerate to track ../common/aclocal.m4 changes.
3313 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3315 * interp.c (sim_open): New SIM_DESC result. Argument is now
3317 (other sim_*): New SIM_DESC argument.
3319 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3321 * interp.c: Fix printing of addresses for non-64-bit targets.
3322 (pr_addr): Add function to print address based on size.
3324 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3326 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3328 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3330 * gencode.c (build_mips16_operands): Correct computation of base
3331 address for extended PC relative instruction.
3333 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3335 * interp.c (mips16_entry): Add support for floating point cases.
3336 (SignalException): Pass floating point cases to mips16_entry.
3337 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3339 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3341 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3342 and then set the state to fmt_uninterpreted.
3343 (COP_SW): Temporarily set the state to fmt_word while calling
3346 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3348 * gencode.c (build_instruction): The high order may be set in the
3349 comparison flags at any ISA level, not just ISA 4.
3351 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3353 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3354 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3355 * configure.in: sinclude ../common/aclocal.m4.
3356 * configure: Regenerated.
3358 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3360 * configure: Rebuild after change to aclocal.m4.
3362 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3364 * configure configure.in Makefile.in: Update to new configure
3365 scheme which is more compatible with WinGDB builds.
3366 * configure.in: Improve comment on how to run autoconf.
3367 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3368 * Makefile.in: Use autoconf substitution to install common
3371 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3373 * gencode.c (build_instruction): Use BigEndianCPU instead of
3376 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3378 * interp.c (sim_monitor): Make output to stdout visible in
3379 wingdb's I/O log window.
3381 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3383 * support.h: Undo previous change to SIGTRAP
3386 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3388 * interp.c (store_word, load_word): New static functions.
3389 (mips16_entry): New static function.
3390 (SignalException): Look for mips16 entry and exit instructions.
3391 (simulate): Use the correct index when setting fpr_state after
3392 doing a pending move.
3394 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3396 * interp.c: Fix byte-swapping code throughout to work on
3397 both little- and big-endian hosts.
3399 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3401 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3402 with gdb/config/i386/xm-windows.h.
3404 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3406 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3407 that messes up arithmetic shifts.
3409 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3411 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3412 SIGTRAP and SIGQUIT for _WIN32.
3414 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3416 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3417 force a 64 bit multiplication.
3418 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3419 destination register is 0, since that is the default mips16 nop
3422 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3424 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3425 (build_endian_shift): Don't check proc64.
3426 (build_instruction): Always set memval to uword64. Cast op2 to
3427 uword64 when shifting it left in memory instructions. Always use
3428 the same code for stores--don't special case proc64.
3430 * gencode.c (build_mips16_operands): Fix base PC value for PC
3432 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3434 * interp.c (simJALDELAYSLOT): Define.
3435 (JALDELAYSLOT): Define.
3436 (INDELAYSLOT, INJALDELAYSLOT): Define.
3437 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3439 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3441 * interp.c (sim_open): add flush_cache as a PMON routine
3442 (sim_monitor): handle flush_cache by ignoring it
3444 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3446 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3448 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3449 (BigEndianMem): Rename to ByteSwapMem and change sense.
3450 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3451 BigEndianMem references to !ByteSwapMem.
3452 (set_endianness): New function, with prototype.
3453 (sim_open): Call set_endianness.
3454 (sim_info): Use simBE instead of BigEndianMem.
3455 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3456 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3457 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3458 ifdefs, keeping the prototype declaration.
3459 (swap_word): Rewrite correctly.
3460 (ColdReset): Delete references to CONFIG. Delete endianness related
3461 code; moved to set_endianness.
3463 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3465 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3466 * interp.c (CHECKHILO): Define away.
3467 (simSIGINT): New macro.
3468 (membank_size): Increase from 1MB to 2MB.
3469 (control_c): New function.
3470 (sim_resume): Rename parameter signal to signal_number. Add local
3471 variable prev. Call signal before and after simulate.
3472 (sim_stop_reason): Add simSIGINT support.
3473 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3475 (sim_warning): Delete call to SignalException. Do call printf_filtered
3477 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3478 a call to sim_warning.
3480 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3482 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3483 16 bit instructions.
3485 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3487 Add support for mips16 (16 bit MIPS implementation):
3488 * gencode.c (inst_type): Add mips16 instruction encoding types.
3489 (GETDATASIZEINSN): Define.
3490 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3491 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3493 (MIPS16_DECODE): New table, for mips16 instructions.
3494 (bitmap_val): New static function.
3495 (struct mips16_op): Define.
3496 (mips16_op_table): New table, for mips16 operands.
3497 (build_mips16_operands): New static function.
3498 (process_instructions): If PC is odd, decode a mips16
3499 instruction. Break out instruction handling into new
3500 build_instruction function.
3501 (build_instruction): New static function, broken out of
3502 process_instructions. Check modifiers rather than flags for SHIFT
3503 bit count and m[ft]{hi,lo} direction.
3504 (usage): Pass program name to fprintf.
3505 (main): Remove unused variable this_option_optind. Change
3506 ``*loptarg++'' to ``loptarg++''.
3507 (my_strtoul): Parenthesize && within ||.
3508 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3509 (simulate): If PC is odd, fetch a 16 bit instruction, and
3510 increment PC by 2 rather than 4.
3511 * configure.in: Add case for mips16*-*-*.
3512 * configure: Rebuild.
3514 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3516 * interp.c: Allow -t to enable tracing in standalone simulator.
3517 Fix garbage output in trace file and error messages.
3519 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3521 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3522 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3523 * configure.in: Simplify using macros in ../common/aclocal.m4.
3524 * configure: Regenerated.
3525 * tconfig.in: New file.
3527 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3529 * interp.c: Fix bugs in 64-bit port.
3530 Use ansi function declarations for msvc compiler.
3531 Initialize and test file pointer in trace code.
3532 Prevent duplicate definition of LAST_EMED_REGNUM.
3534 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3536 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3538 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3540 * interp.c (SignalException): Check for explicit terminating
3542 * gencode.c: Pass instruction value through SignalException()
3543 calls for Trap, Breakpoint and Syscall.
3545 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3547 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3548 only used on those hosts that provide it.
3549 * configure.in: Add sqrt() to list of functions to be checked for.
3550 * config.in: Re-generated.
3551 * configure: Re-generated.
3553 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3555 * gencode.c (process_instructions): Call build_endian_shift when
3556 expanding STORE RIGHT, to fix swr.
3557 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3558 clear the high bits.
3559 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3560 Fix float to int conversions to produce signed values.
3562 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3564 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3565 (process_instructions): Correct handling of nor instruction.
3566 Correct shift count for 32 bit shift instructions. Correct sign
3567 extension for arithmetic shifts to not shift the number of bits in
3568 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3569 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3571 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3572 It's OK to have a mult follow a mult. What's not OK is to have a
3573 mult follow an mfhi.
3574 (Convert): Comment out incorrect rounding code.
3576 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3578 * interp.c (sim_monitor): Improved monitor printf
3579 simulation. Tidied up simulator warnings, and added "--log" option
3580 for directing warning message output.
3581 * gencode.c: Use sim_warning() rather than WARNING macro.
3583 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3585 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3586 getopt1.o, rather than on gencode.c. Link objects together.
3587 Don't link against -liberty.
3588 (gencode.o, getopt.o, getopt1.o): New targets.
3589 * gencode.c: Include <ctype.h> and "ansidecl.h".
3590 (AND): Undefine after including "ansidecl.h".
3591 (ULONG_MAX): Define if not defined.
3592 (OP_*): Don't define macros; now defined in opcode/mips.h.
3593 (main): Call my_strtoul rather than strtoul.
3594 (my_strtoul): New static function.
3596 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3598 * gencode.c (process_instructions): Generate word64 and uword64
3599 instead of `long long' and `unsigned long long' data types.
3600 * interp.c: #include sysdep.h to get signals, and define default
3602 * (Convert): Work around for Visual-C++ compiler bug with type
3604 * support.h: Make things compile under Visual-C++ by using
3605 __int64 instead of `long long'. Change many refs to long long
3606 into word64/uword64 typedefs.
3608 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3610 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3611 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3613 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3614 (AC_PROG_INSTALL): Added.
3615 (AC_PROG_CC): Moved to before configure.host call.
3616 * configure: Rebuilt.
3618 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3620 * configure.in: Define @SIMCONF@ depending on mips target.
3621 * configure: Rebuild.
3622 * Makefile.in (run): Add @SIMCONF@ to control simulator
3624 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3625 * interp.c: Remove some debugging, provide more detailed error
3626 messages, update memory accesses to use LOADDRMASK.
3628 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3630 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3631 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3633 * configure: Rebuild.
3634 * config.in: New file, generated by autoheader.
3635 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3636 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3637 HAVE_ANINT and HAVE_AINT, as appropriate.
3638 * Makefile.in (run): Use @LIBS@ rather than -lm.
3639 (interp.o): Depend upon config.h.
3640 (Makefile): Just rebuild Makefile.
3641 (clean): Remove stamp-h.
3642 (mostlyclean): Make the same as clean, not as distclean.
3643 (config.h, stamp-h): New targets.
3645 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3647 * interp.c (ColdReset): Fix boolean test. Make all simulator
3650 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3652 * interp.c (xfer_direct_word, xfer_direct_long,
3653 swap_direct_word, swap_direct_long, xfer_big_word,
3654 xfer_big_long, xfer_little_word, xfer_little_long,
3655 swap_word,swap_long): Added.
3656 * interp.c (ColdReset): Provide function indirection to
3657 host<->simulated_target transfer routines.
3658 * interp.c (sim_store_register, sim_fetch_register): Updated to
3659 make use of indirected transfer routines.
3661 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3663 * gencode.c (process_instructions): Ensure FP ABS instruction
3665 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3666 system call support.
3668 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3670 * interp.c (sim_do_command): Complain if callback structure not
3673 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3675 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3676 support for Sun hosts.
3677 * Makefile.in (gencode): Ensure the host compiler and libraries
3678 used for cross-hosted build.
3680 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3682 * interp.c, gencode.c: Some more (TODO) tidying.
3684 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3686 * gencode.c, interp.c: Replaced explicit long long references with
3687 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3688 * support.h (SET64LO, SET64HI): Macros added.
3690 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3692 * configure: Regenerate with autoconf 2.7.
3694 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3696 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3697 * support.h: Remove superfluous "1" from #if.
3698 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3700 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3702 * interp.c (StoreFPR): Control UndefinedResult() call on
3703 WARN_RESULT manifest.
3705 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3707 * gencode.c: Tidied instruction decoding, and added FP instruction
3710 * interp.c: Added dineroIII, and BSD profiling support. Also
3711 run-time FP handling.
3713 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3715 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3716 gencode.c, interp.c, support.h: created.