1 2016-01-06 Mike Frysinger <vapier@gentoo.org>
3 * interp.c (sim_open): Mark argv const.
4 (sim_create_inferior): Mark argv and env const.
6 2016-01-04 Mike Frysinger <vapier@gentoo.org>
8 * configure: Regenerate.
10 2016-01-03 Mike Frysinger <vapier@gentoo.org>
12 * interp.c (sim_open): Update sim_parse_args comment.
14 2016-01-03 Mike Frysinger <vapier@gentoo.org>
16 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
17 * configure: Regenerate.
19 2016-01-02 Mike Frysinger <vapier@gentoo.org>
21 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
22 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
23 * configure: Regenerate.
24 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
26 2016-01-02 Mike Frysinger <vapier@gentoo.org>
28 * dv-tx3904cpu.c (CPU, SD): Delete.
30 2015-12-30 Mike Frysinger <vapier@gentoo.org>
32 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
33 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
34 (sim_store_register): Rename to ...
35 (mips_reg_store): ... this. Delete local cpu var.
36 Update sim_io_eprintf calls.
37 (sim_fetch_register): Rename to ...
38 (mips_reg_fetch): ... this. Delete local cpu var.
39 Update sim_io_eprintf calls.
41 2015-12-27 Mike Frysinger <vapier@gentoo.org>
43 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
45 2015-12-26 Mike Frysinger <vapier@gentoo.org>
47 * config.in, configure: Regenerate.
49 2015-12-26 Mike Frysinger <vapier@gentoo.org>
51 * interp.c (sim_write, sim_read): Delete.
52 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
53 (load_word): Likewise.
54 * micromips.igen (cache): Likewise.
55 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
56 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
57 do_store_left, do_store_right, do_load_double, do_store_double):
59 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
61 * sim-main.c (address_translation, prefetch): Delete.
62 (ifetch32, ifetch16): Delete call to AddressTranslation and set
64 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
65 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
66 (LoadMemory, StoreMemory): Delete CCA arg.
68 2015-12-24 Mike Frysinger <vapier@gentoo.org>
70 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
71 * configure: Regenerated.
73 2015-12-24 Mike Frysinger <vapier@gentoo.org>
75 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
78 2015-12-24 Mike Frysinger <vapier@gentoo.org>
80 * tconfig.h (SIM_HANDLES_LMA): Delete.
82 2015-12-24 Mike Frysinger <vapier@gentoo.org>
84 * sim-main.h (WITH_WATCHPOINTS): Delete.
86 2015-12-24 Mike Frysinger <vapier@gentoo.org>
88 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
90 2015-12-24 Mike Frysinger <vapier@gentoo.org>
92 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
94 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
96 * micromips.igen (process_isa_mode): Fix left shift of negative
99 2015-11-17 Mike Frysinger <vapier@gentoo.org>
101 * sim-main.h (WITH_MODULO_MEMORY): Delete.
103 2015-11-15 Mike Frysinger <vapier@gentoo.org>
105 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
107 2015-11-14 Mike Frysinger <vapier@gentoo.org>
109 * interp.c (sim_close): Rename to ...
110 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
112 * sim-main.h (mips_sim_close): Declare.
113 (SIM_CLOSE_HOOK): Define.
115 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
116 Ali Lown <ali.lown@imgtec.com>
118 * Makefile.in (tmp-micromips): New rule.
119 (tmp-mach-multi): Add support for micromips.
120 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
121 that works for both mips64 and micromips64.
122 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
124 Add build support for micromips.
125 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
126 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
127 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
128 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
129 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
130 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
131 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
132 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
133 Refactored instruction code to use these functions.
134 * dsp2.igen: Refactored instruction code to use the new functions.
135 * interp.c (decode_coproc): Refactored to work with any instruction
137 (isa_mode): New variable
138 (RSVD_INSTRUCTION): Changed to 0x00000039.
139 * m16.igen (BREAK16): Refactored instruction to use do_break16.
140 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
141 * micromips.dc: New file.
142 * micromips.igen: New file.
143 * micromips16.dc: New file.
144 * micromipsdsp.igen: New file.
145 * micromipsrun.c: New file.
146 * mips.igen (do_swc1): Changed to work with any instruction encoding.
147 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
148 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
149 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
150 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
151 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
152 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
153 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
154 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
155 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
156 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
157 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
158 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
159 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
160 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
161 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
162 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
163 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
164 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
166 Refactored instruction code to use these functions.
167 (RSVD): Changed to use new reserved instruction.
168 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
169 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
170 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
171 do_store_double): Added micromips32 and micromips64 models.
172 Added include for micromips.igen and micromipsdsp.igen
173 Add micromips32 and micromips64 models.
174 (DecodeCoproc): Updated to use new macro definition.
175 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
176 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
177 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
178 Refactored instruction code to use these functions.
179 * sim-main.h (CP0_operation): New enum.
180 (DecodeCoproc): Updated macro.
181 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
182 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
183 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
184 ISA_MODE_MICROMIPS): New defines.
185 (sim_state): Add isa_mode field.
187 2015-06-23 Mike Frysinger <vapier@gentoo.org>
189 * configure: Regenerate.
191 2015-06-12 Mike Frysinger <vapier@gentoo.org>
193 * configure.ac: Change configure.in to configure.ac.
194 * configure: Regenerate.
196 2015-06-12 Mike Frysinger <vapier@gentoo.org>
198 * configure: Regenerate.
200 2015-06-12 Mike Frysinger <vapier@gentoo.org>
202 * interp.c [TRACE]: Delete.
203 (TRACE): Change to WITH_TRACE_ANY_P.
204 [!WITH_TRACE_ANY_P] (open_trace): Define.
205 (mips_option_handler, open_trace, sim_close, dotrace):
206 Change defined(TRACE) to WITH_TRACE_ANY_P.
207 (sim_open): Delete TRACE ifdef check.
208 * sim-main.c (load_memory): Delete TRACE ifdef check.
209 (store_memory): Likewise.
210 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
211 [!WITH_TRACE_ANY_P] (dotrace): Define.
213 2015-04-18 Mike Frysinger <vapier@gentoo.org>
215 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
218 2015-04-18 Mike Frysinger <vapier@gentoo.org>
220 * sim-main.h (SIM_CPU): Delete.
222 2015-04-18 Mike Frysinger <vapier@gentoo.org>
224 * sim-main.h (sim_cia): Delete.
226 2015-04-17 Mike Frysinger <vapier@gentoo.org>
228 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
230 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
231 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
232 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
233 CIA_SET to CPU_PC_SET.
234 * sim-main.h (CIA_GET, CIA_SET): Delete.
236 2015-04-15 Mike Frysinger <vapier@gentoo.org>
238 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
239 * sim-main.h (STATE_CPU): Delete.
241 2015-04-13 Mike Frysinger <vapier@gentoo.org>
243 * configure: Regenerate.
245 2015-04-13 Mike Frysinger <vapier@gentoo.org>
247 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
248 * interp.c (mips_pc_get, mips_pc_set): New functions.
249 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
250 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
251 (sim_pc_get): Delete.
252 * sim-main.h (SIM_CPU): Define.
253 (struct sim_state): Change cpu to an array of pointers.
256 2015-04-13 Mike Frysinger <vapier@gentoo.org>
258 * interp.c (mips_option_handler, open_trace, sim_close,
259 sim_write, sim_read, sim_store_register, sim_fetch_register,
260 sim_create_inferior, pr_addr, pr_uword64): Convert old style
262 (sim_open): Convert old style prototype. Change casts with
263 sim_write to unsigned char *.
264 (fetch_str): Change null to unsigned char, and change cast to
266 (sim_monitor): Change c & ch to unsigned char. Change cast to
269 2015-04-12 Mike Frysinger <vapier@gentoo.org>
271 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
273 2015-04-06 Mike Frysinger <vapier@gentoo.org>
275 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
277 2015-04-01 Mike Frysinger <vapier@gentoo.org>
279 * tconfig.h (SIM_HAVE_PROFILE): Delete.
281 2015-03-31 Mike Frysinger <vapier@gentoo.org>
283 * config.in, configure: Regenerate.
285 2015-03-24 Mike Frysinger <vapier@gentoo.org>
287 * interp.c (sim_pc_get): New function.
289 2015-03-24 Mike Frysinger <vapier@gentoo.org>
291 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
292 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
294 2015-03-24 Mike Frysinger <vapier@gentoo.org>
296 * configure: Regenerate.
298 2015-03-23 Mike Frysinger <vapier@gentoo.org>
300 * configure: Regenerate.
302 2015-03-23 Mike Frysinger <vapier@gentoo.org>
304 * configure: Regenerate.
305 * configure.ac (mips_extra_objs): Delete.
306 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
307 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
309 2015-03-23 Mike Frysinger <vapier@gentoo.org>
311 * configure: Regenerate.
312 * configure.ac: Delete sim_hw checks for dv-sockser.
314 2015-03-16 Mike Frysinger <vapier@gentoo.org>
316 * config.in, configure: Regenerate.
317 * tconfig.in: Rename file ...
318 * tconfig.h: ... here.
320 2015-03-15 Mike Frysinger <vapier@gentoo.org>
322 * tconfig.in: Delete includes.
323 [HAVE_DV_SOCKSER]: Delete.
325 2015-03-14 Mike Frysinger <vapier@gentoo.org>
327 * Makefile.in (SIM_RUN_OBJS): Delete.
329 2015-03-14 Mike Frysinger <vapier@gentoo.org>
331 * configure.ac (AC_CHECK_HEADERS): Delete.
332 * aclocal.m4, configure: Regenerate.
334 2014-08-19 Alan Modra <amodra@gmail.com>
336 * configure: Regenerate.
338 2014-08-15 Roland McGrath <mcgrathr@google.com>
340 * configure: Regenerate.
341 * config.in: Regenerate.
343 2014-03-04 Mike Frysinger <vapier@gentoo.org>
345 * configure: Regenerate.
347 2013-09-23 Alan Modra <amodra@gmail.com>
349 * configure: Regenerate.
351 2013-06-03 Mike Frysinger <vapier@gentoo.org>
353 * aclocal.m4, configure: Regenerate.
355 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
357 * configure: Rebuild.
359 2013-03-26 Mike Frysinger <vapier@gentoo.org>
361 * configure: Regenerate.
363 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
365 * configure.ac: Address use of dv-sockser.o.
366 * tconfig.in: Conditionalize use of dv_sockser_install.
367 * configure: Regenerated.
368 * config.in: Regenerated.
370 2012-10-04 Chao-ying Fu <fu@mips.com>
371 Steve Ellcey <sellcey@mips.com>
373 * mips/mips3264r2.igen (rdhwr): New.
375 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
377 * configure.ac: Always link against dv-sockser.o.
378 * configure: Regenerate.
380 2012-06-15 Joel Brobecker <brobecker@adacore.com>
382 * config.in, configure: Regenerate.
384 2012-05-18 Nick Clifton <nickc@redhat.com>
387 * interp.c: Include config.h before system header files.
389 2012-03-24 Mike Frysinger <vapier@gentoo.org>
391 * aclocal.m4, config.in, configure: Regenerate.
393 2011-12-03 Mike Frysinger <vapier@gentoo.org>
395 * aclocal.m4: New file.
396 * configure: Regenerate.
398 2011-10-19 Mike Frysinger <vapier@gentoo.org>
400 * configure: Regenerate after common/acinclude.m4 update.
402 2011-10-17 Mike Frysinger <vapier@gentoo.org>
404 * configure.ac: Change include to common/acinclude.m4.
406 2011-10-17 Mike Frysinger <vapier@gentoo.org>
408 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
409 call. Replace common.m4 include with SIM_AC_COMMON.
410 * configure: Regenerate.
412 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
414 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
416 (tmp-mach-multi): Exit early when igen fails.
418 2011-07-05 Mike Frysinger <vapier@gentoo.org>
420 * interp.c (sim_do_command): Delete.
422 2011-02-14 Mike Frysinger <vapier@gentoo.org>
424 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
425 (tx3904sio_fifo_reset): Likewise.
426 * interp.c (sim_monitor): Likewise.
428 2010-04-14 Mike Frysinger <vapier@gentoo.org>
430 * interp.c (sim_write): Add const to buffer arg.
432 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
434 * interp.c: Don't include sysdep.h
436 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
438 * configure: Regenerate.
440 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
442 * config.in: Regenerate.
443 * configure: Likewise.
445 * configure: Regenerate.
447 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
449 * configure: Regenerate to track ../common/common.m4 changes.
452 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
453 Daniel Jacobowitz <dan@codesourcery.com>
454 Joseph Myers <joseph@codesourcery.com>
456 * configure: Regenerate.
458 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
460 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
461 that unconditionally allows fmt_ps.
462 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
463 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
464 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
465 filter from 64,f to 32,f.
466 (PREFX): Change filter from 64 to 32.
467 (LDXC1, LUXC1): Provide separate mips32r2 implementations
468 that use do_load_double instead of do_load. Make both LUXC1
469 versions unpredictable if SizeFGR () != 64.
470 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
471 instead of do_store. Remove unused variable. Make both SUXC1
472 versions unpredictable if SizeFGR () != 64.
474 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
476 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
477 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
478 shifts for that case.
480 2007-09-04 Nick Clifton <nickc@redhat.com>
482 * interp.c (options enum): Add OPTION_INFO_MEMORY.
483 (display_mem_info): New static variable.
484 (mips_option_handler): Handle OPTION_INFO_MEMORY.
485 (mips_options): Add info-memory and memory-info.
486 (sim_open): After processing the command line and board
487 specification, check display_mem_info. If it is set then
488 call the real handler for the --memory-info command line
491 2007-08-24 Joel Brobecker <brobecker@adacore.com>
493 * configure.ac: Change license of multi-run.c to GPL version 3.
494 * configure: Regenerate.
496 2007-06-28 Richard Sandiford <richard@codesourcery.com>
498 * configure.ac, configure: Revert last patch.
500 2007-06-26 Richard Sandiford <richard@codesourcery.com>
502 * configure.ac (sim_mipsisa3264_configs): New variable.
503 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
504 every configuration support all four targets, using the triplet to
505 determine the default.
506 * configure: Regenerate.
508 2007-06-25 Richard Sandiford <richard@codesourcery.com>
510 * Makefile.in (m16run.o): New rule.
512 2007-05-15 Thiemo Seufer <ths@mips.com>
514 * mips3264r2.igen (DSHD): Fix compile warning.
516 2007-05-14 Thiemo Seufer <ths@mips.com>
518 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
519 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
520 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
521 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
524 2007-03-01 Thiemo Seufer <ths@mips.com>
526 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
529 2007-02-20 Thiemo Seufer <ths@mips.com>
531 * dsp.igen: Update copyright notice.
532 * dsp2.igen: Fix copyright notice.
534 2007-02-20 Thiemo Seufer <ths@mips.com>
535 Chao-Ying Fu <fu@mips.com>
537 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
538 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
539 Add dsp2 to sim_igen_machine.
540 * configure: Regenerate.
541 * dsp.igen (do_ph_op): Add MUL support when op = 2.
542 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
543 (mulq_rs.ph): Use do_ph_mulq.
544 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
545 * mips.igen: Add dsp2 model and include dsp2.igen.
546 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
547 for *mips32r2, *mips64r2, *dsp.
548 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
549 for *mips32r2, *mips64r2, *dsp2.
550 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
552 2007-02-19 Thiemo Seufer <ths@mips.com>
553 Nigel Stephens <nigel@mips.com>
555 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
556 jumps with hazard barrier.
558 2007-02-19 Thiemo Seufer <ths@mips.com>
559 Nigel Stephens <nigel@mips.com>
561 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
562 after each call to sim_io_write.
564 2007-02-19 Thiemo Seufer <ths@mips.com>
565 Nigel Stephens <nigel@mips.com>
567 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
568 supported by this simulator.
569 (decode_coproc): Recognise additional CP0 Config registers
572 2007-02-19 Thiemo Seufer <ths@mips.com>
573 Nigel Stephens <nigel@mips.com>
574 David Ung <davidu@mips.com>
576 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
577 uninterpreted formats. If fmt is one of the uninterpreted types
578 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
579 fmt_word, and fmt_uninterpreted_64 like fmt_long.
580 (store_fpr): When writing an invalid odd register, set the
581 matching even register to fmt_unknown, not the following register.
582 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
583 the the memory window at offset 0 set by --memory-size command
585 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
587 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
589 (sim_monitor): When returning the memory size to the MIPS
590 application, use the value in STATE_MEM_SIZE, not an arbitrary
592 (cop_lw): Don' mess around with FPR_STATE, just pass
593 fmt_uninterpreted_32 to StoreFPR.
595 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
597 * mips.igen (not_word_value): Single version for mips32, mips64
600 2007-02-19 Thiemo Seufer <ths@mips.com>
601 Nigel Stephens <nigel@mips.com>
603 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
606 2007-02-17 Thiemo Seufer <ths@mips.com>
608 * configure.ac (mips*-sde-elf*): Move in front of generic machine
610 * configure: Regenerate.
612 2007-02-17 Thiemo Seufer <ths@mips.com>
614 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
615 Add mdmx to sim_igen_machine.
616 (mipsisa64*-*-*): Likewise. Remove dsp.
617 (mipsisa32*-*-*): Remove dsp.
618 * configure: Regenerate.
620 2007-02-13 Thiemo Seufer <ths@mips.com>
622 * configure.ac: Add mips*-sde-elf* target.
623 * configure: Regenerate.
625 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
627 * acconfig.h: Remove.
628 * config.in, configure: Regenerate.
630 2006-11-07 Thiemo Seufer <ths@mips.com>
632 * dsp.igen (do_w_op): Fix compiler warning.
634 2006-08-29 Thiemo Seufer <ths@mips.com>
635 David Ung <davidu@mips.com>
637 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
639 * configure: Regenerate.
640 * mips.igen (model): Add smartmips.
641 (MADDU): Increment ACX if carry.
642 (do_mult): Clear ACX.
643 (ROR,RORV): Add smartmips.
644 (include): Include smartmips.igen.
645 * sim-main.h (ACX): Set to REGISTERS[89].
646 * smartmips.igen: New file.
648 2006-08-29 Thiemo Seufer <ths@mips.com>
649 David Ung <davidu@mips.com>
651 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
652 mips3264r2.igen. Add missing dependency rules.
653 * m16e.igen: Support for mips16e save/restore instructions.
655 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
657 * configure: Regenerated.
659 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
661 * configure: Regenerated.
663 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
665 * configure: Regenerated.
667 2006-05-15 Chao-ying Fu <fu@mips.com>
669 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
671 2006-04-18 Nick Clifton <nickc@redhat.com>
673 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
676 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
678 * configure: Regenerate.
680 2005-12-14 Chao-ying Fu <fu@mips.com>
682 * Makefile.in (SIM_OBJS): Add dsp.o.
683 (dsp.o): New dependency.
684 (IGEN_INCLUDE): Add dsp.igen.
685 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
686 mipsisa64*-*-*): Add dsp to sim_igen_machine.
687 * configure: Regenerate.
688 * mips.igen: Add dsp model and include dsp.igen.
689 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
690 because these instructions are extended in DSP ASE.
691 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
692 adding 6 DSP accumulator registers and 1 DSP control register.
693 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
694 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
695 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
696 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
697 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
698 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
699 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
700 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
701 DSPCR_CCOND_SMASK): New define.
702 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
703 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
705 2005-07-08 Ian Lance Taylor <ian@airs.com>
707 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
709 2005-06-16 David Ung <davidu@mips.com>
710 Nigel Stephens <nigel@mips.com>
712 * mips.igen: New mips16e model and include m16e.igen.
713 (check_u64): Add mips16e tag.
714 * m16e.igen: New file for MIPS16e instructions.
715 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
716 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
718 * configure: Regenerate.
720 2005-05-26 David Ung <davidu@mips.com>
722 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
723 tags to all instructions which are applicable to the new ISAs.
724 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
726 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
728 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
730 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
731 * configure: Regenerate.
733 2005-03-23 Mark Kettenis <kettenis@gnu.org>
735 * configure: Regenerate.
737 2005-01-14 Andrew Cagney <cagney@gnu.org>
739 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
740 explicit call to AC_CONFIG_HEADER.
741 * configure: Regenerate.
743 2005-01-12 Andrew Cagney <cagney@gnu.org>
745 * configure.ac: Update to use ../common/common.m4.
746 * configure: Re-generate.
748 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
750 * configure: Regenerated to track ../common/aclocal.m4 changes.
752 2005-01-07 Andrew Cagney <cagney@gnu.org>
754 * configure.ac: Rename configure.in, require autoconf 2.59.
755 * configure: Re-generate.
757 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
759 * configure: Regenerate for ../common/aclocal.m4 update.
761 2004-09-24 Monika Chaddha <monika@acmet.com>
763 Committed by Andrew Cagney.
764 * m16.igen (CMP, CMPI): Fix assembler.
766 2004-08-18 Chris Demetriou <cgd@broadcom.com>
768 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
769 * configure: Regenerate.
771 2004-06-25 Chris Demetriou <cgd@broadcom.com>
773 * configure.in (sim_m16_machine): Include mipsIII.
774 * configure: Regenerate.
776 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
778 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
780 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
782 2004-04-10 Chris Demetriou <cgd@broadcom.com>
784 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
786 2004-04-09 Chris Demetriou <cgd@broadcom.com>
788 * mips.igen (check_fmt): Remove.
789 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
790 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
791 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
792 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
793 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
794 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
795 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
796 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
797 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
798 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
800 2004-04-09 Chris Demetriou <cgd@broadcom.com>
802 * sb1.igen (check_sbx): New function.
803 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
805 2004-03-29 Chris Demetriou <cgd@broadcom.com>
806 Richard Sandiford <rsandifo@redhat.com>
808 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
809 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
810 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
811 separate implementations for mipsIV and mipsV. Use new macros to
812 determine whether the restrictions apply.
814 2004-01-19 Chris Demetriou <cgd@broadcom.com>
816 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
817 (check_mult_hilo): Improve comments.
818 (check_div_hilo): Likewise. Also, fork off a new version
819 to handle mips32/mips64 (since there are no hazards to check
822 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
824 * mips.igen (do_dmultx): Fix check for negative operands.
826 2003-05-16 Ian Lance Taylor <ian@airs.com>
828 * Makefile.in (SHELL): Make sure this is defined.
829 (various): Use $(SHELL) whenever we invoke move-if-change.
831 2003-05-03 Chris Demetriou <cgd@broadcom.com>
833 * cp1.c: Tweak attribution slightly.
836 * mdmx.igen: Likewise.
837 * mips3d.igen: Likewise.
838 * sb1.igen: Likewise.
840 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
842 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
845 2003-02-27 Andrew Cagney <cagney@redhat.com>
847 * interp.c (sim_open): Rename _bfd to bfd.
848 (sim_create_inferior): Ditto.
850 2003-01-14 Chris Demetriou <cgd@broadcom.com>
852 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
854 2003-01-14 Chris Demetriou <cgd@broadcom.com>
856 * mips.igen (EI, DI): Remove.
858 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
860 * Makefile.in (tmp-run-multi): Fix mips16 filter.
862 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
863 Andrew Cagney <ac131313@redhat.com>
864 Gavin Romig-Koch <gavin@redhat.com>
865 Graydon Hoare <graydon@redhat.com>
866 Aldy Hernandez <aldyh@redhat.com>
867 Dave Brolley <brolley@redhat.com>
868 Chris Demetriou <cgd@broadcom.com>
870 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
871 (sim_mach_default): New variable.
872 (mips64vr-*-*, mips64vrel-*-*): New configurations.
873 Add a new simulator generator, MULTI.
874 * configure: Regenerate.
875 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
876 (multi-run.o): New dependency.
877 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
878 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
879 (tmp-multi): Combine them.
880 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
881 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
882 (distclean-extra): New rule.
883 * sim-main.h: Include bfd.h.
884 (MIPS_MACH): New macro.
885 * mips.igen (vr4120, vr5400, vr5500): New models.
886 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
887 * vr.igen: Replace with new version.
889 2003-01-04 Chris Demetriou <cgd@broadcom.com>
891 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
892 * configure: Regenerate.
894 2002-12-31 Chris Demetriou <cgd@broadcom.com>
896 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
897 * mips.igen: Remove all invocations of check_branch_bug and
900 2002-12-16 Chris Demetriou <cgd@broadcom.com>
902 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
904 2002-07-30 Chris Demetriou <cgd@broadcom.com>
906 * mips.igen (do_load_double, do_store_double): New functions.
907 (LDC1, SDC1): Rename to...
908 (LDC1b, SDC1b): respectively.
909 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
911 2002-07-29 Michael Snyder <msnyder@redhat.com>
913 * cp1.c (fp_recip2): Modify initialization expression so that
914 GCC will recognize it as constant.
916 2002-06-18 Chris Demetriou <cgd@broadcom.com>
918 * mdmx.c (SD_): Delete.
919 (Unpredictable): Re-define, for now, to directly invoke
920 unpredictable_action().
921 (mdmx_acc_op): Fix error in .ob immediate handling.
923 2002-06-18 Andrew Cagney <cagney@redhat.com>
925 * interp.c (sim_firmware_command): Initialize `address'.
927 2002-06-16 Andrew Cagney <ac131313@redhat.com>
929 * configure: Regenerated to track ../common/aclocal.m4 changes.
931 2002-06-14 Chris Demetriou <cgd@broadcom.com>
932 Ed Satterthwaite <ehs@broadcom.com>
934 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
935 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
936 * mips.igen: Include mips3d.igen.
937 (mips3d): New model name for MIPS-3D ASE instructions.
938 (CVT.W.fmt): Don't use this instruction for word (source) format
940 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
941 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
942 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
943 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
944 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
945 (RSquareRoot1, RSquareRoot2): New macros.
946 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
947 (fp_rsqrt2): New functions.
948 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
949 * configure: Regenerate.
951 2002-06-13 Chris Demetriou <cgd@broadcom.com>
952 Ed Satterthwaite <ehs@broadcom.com>
954 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
955 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
956 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
957 (convert): Note that this function is not used for paired-single
959 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
960 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
961 (check_fmt_p): Enable paired-single support.
962 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
963 (PUU.PS): New instructions.
964 (CVT.S.fmt): Don't use this instruction for paired-single format
966 * sim-main.h (FP_formats): New value 'fmt_ps.'
967 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
968 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
970 2002-06-12 Chris Demetriou <cgd@broadcom.com>
972 * mips.igen: Fix formatting of function calls in
975 2002-06-12 Chris Demetriou <cgd@broadcom.com>
977 * mips.igen (MOVN, MOVZ): Trace result.
978 (TNEI): Print "tnei" as the opcode name in traces.
979 (CEIL.W): Add disassembly string for traces.
980 (RSQRT.fmt): Make location of disassembly string consistent
981 with other instructions.
983 2002-06-12 Chris Demetriou <cgd@broadcom.com>
985 * mips.igen (X): Delete unused function.
987 2002-06-08 Andrew Cagney <cagney@redhat.com>
989 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
991 2002-06-07 Chris Demetriou <cgd@broadcom.com>
992 Ed Satterthwaite <ehs@broadcom.com>
994 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
995 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
996 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
997 (fp_nmsub): New prototypes.
998 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
999 (NegMultiplySub): New defines.
1000 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1001 (MADD.D, MADD.S): Replace with...
1002 (MADD.fmt): New instruction.
1003 (MSUB.D, MSUB.S): Replace with...
1004 (MSUB.fmt): New instruction.
1005 (NMADD.D, NMADD.S): Replace with...
1006 (NMADD.fmt): New instruction.
1007 (NMSUB.D, MSUB.S): Replace with...
1008 (NMSUB.fmt): New instruction.
1010 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1011 Ed Satterthwaite <ehs@broadcom.com>
1013 * cp1.c: Fix more comment spelling and formatting.
1014 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1015 (denorm_mode): New function.
1016 (fpu_unary, fpu_binary): Round results after operation, collect
1017 status from rounding operations, and update the FCSR.
1018 (convert): Collect status from integer conversions and rounding
1019 operations, and update the FCSR. Adjust NaN values that result
1020 from conversions. Convert to use sim_io_eprintf rather than
1021 fprintf, and remove some debugging code.
1022 * cp1.h (fenr_FS): New define.
1024 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1026 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1027 rounding mode to sim FP rounding mode flag conversion code into...
1028 (rounding_mode): New function.
1030 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1032 * cp1.c: Clean up formatting of a few comments.
1033 (value_fpr): Reformat switch statement.
1035 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1036 Ed Satterthwaite <ehs@broadcom.com>
1039 * sim-main.h: Include cp1.h.
1040 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1041 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1042 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1043 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1044 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1045 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1046 * cp1.c: Don't include sim-fpu.h; already included by
1047 sim-main.h. Clean up formatting of some comments.
1048 (NaN, Equal, Less): Remove.
1049 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1050 (fp_cmp): New functions.
1051 * mips.igen (do_c_cond_fmt): Remove.
1052 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1053 Compare. Add result tracing.
1054 (CxC1): Remove, replace with...
1055 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1056 (DMxC1): Remove, replace with...
1057 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1058 (MxC1): Remove, replace with...
1059 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1061 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1063 * sim-main.h (FGRIDX): Remove, replace all uses with...
1064 (FGR_BASE): New macro.
1065 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1066 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1067 (NR_FGR, FGR): Likewise.
1068 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1069 * mips.igen: Likewise.
1071 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1073 * cp1.c: Add an FSF Copyright notice to this file.
1075 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1076 Ed Satterthwaite <ehs@broadcom.com>
1078 * cp1.c (Infinity): Remove.
1079 * sim-main.h (Infinity): Likewise.
1081 * cp1.c (fp_unary, fp_binary): New functions.
1082 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1083 (fp_sqrt): New functions, implemented in terms of the above.
1084 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1085 (Recip, SquareRoot): Remove (replaced by functions above).
1086 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1087 (fp_recip, fp_sqrt): New prototypes.
1088 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1089 (Recip, SquareRoot): Replace prototypes with #defines which
1090 invoke the functions above.
1092 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1094 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1095 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1096 file, remove PARAMS from prototypes.
1097 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1098 simulator state arguments.
1099 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1100 pass simulator state arguments.
1101 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1102 (store_fpr, convert): Remove 'sd' argument.
1103 (value_fpr): Likewise. Convert to use 'SD' instead.
1105 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1107 * cp1.c (Min, Max): Remove #if 0'd functions.
1108 * sim-main.h (Min, Max): Remove.
1110 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1112 * cp1.c: fix formatting of switch case and default labels.
1113 * interp.c: Likewise.
1114 * sim-main.c: Likewise.
1116 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1118 * cp1.c: Clean up comments which describe FP formats.
1119 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1121 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1122 Ed Satterthwaite <ehs@broadcom.com>
1124 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1125 Broadcom SiByte SB-1 processor configurations.
1126 * configure: Regenerate.
1127 * sb1.igen: New file.
1128 * mips.igen: Include sb1.igen.
1130 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1131 * mdmx.igen: Add "sb1" model to all appropriate functions and
1133 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1134 (ob_func, ob_acc): Reference the above.
1135 (qh_acc): Adjust to keep the same size as ob_acc.
1136 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1137 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1139 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1141 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1143 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1144 Ed Satterthwaite <ehs@broadcom.com>
1146 * mips.igen (mdmx): New (pseudo-)model.
1147 * mdmx.c, mdmx.igen: New files.
1148 * Makefile.in (SIM_OBJS): Add mdmx.o.
1149 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1151 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1152 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1153 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1154 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1155 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1156 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1157 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1158 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1159 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1160 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1161 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1162 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1163 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1164 (qh_fmtsel): New macros.
1165 (_sim_cpu): New member "acc".
1166 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1167 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1169 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1171 * interp.c: Use 'deprecated' rather than 'depreciated.'
1172 * sim-main.h: Likewise.
1174 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1176 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1177 which wouldn't compile anyway.
1178 * sim-main.h (unpredictable_action): New function prototype.
1179 (Unpredictable): Define to call igen function unpredictable().
1180 (NotWordValue): New macro to call igen function not_word_value().
1181 (UndefinedResult): Remove.
1182 * interp.c (undefined_result): Remove.
1183 (unpredictable_action): New function.
1184 * mips.igen (not_word_value, unpredictable): New functions.
1185 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1186 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1187 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1188 NotWordValue() to check for unpredictable inputs, then
1189 Unpredictable() to handle them.
1191 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1193 * mips.igen: Fix formatting of calls to Unpredictable().
1195 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1197 * interp.c (sim_open): Revert previous change.
1199 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1201 * interp.c (sim_open): Disable chunk of code that wrote code in
1202 vector table entries.
1204 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1206 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1207 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1210 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1212 * cp1.c: Fix many formatting issues.
1214 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1216 * cp1.c (fpu_format_name): New function to replace...
1217 (DOFMT): This. Delete, and update all callers.
1218 (fpu_rounding_mode_name): New function to replace...
1219 (RMMODE): This. Delete, and update all callers.
1221 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1223 * interp.c: Move FPU support routines from here to...
1224 * cp1.c: Here. New file.
1225 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1226 (cp1.o): New target.
1228 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1230 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1231 * mips.igen (mips32, mips64): New models, add to all instructions
1232 and functions as appropriate.
1233 (loadstore_ea, check_u64): New variant for model mips64.
1234 (check_fmt_p): New variant for models mipsV and mips64, remove
1235 mipsV model marking fro other variant.
1238 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1239 for mips32 and mips64.
1240 (DCLO, DCLZ): New instructions for mips64.
1242 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1244 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1245 immediate or code as a hex value with the "%#lx" format.
1246 (ANDI): Likewise, and fix printed instruction name.
1248 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1250 * sim-main.h (UndefinedResult, Unpredictable): New macros
1251 which currently do nothing.
1253 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1255 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1256 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1257 (status_CU3): New definitions.
1259 * sim-main.h (ExceptionCause): Add new values for MIPS32
1260 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1261 for DebugBreakPoint and NMIReset to note their status in
1263 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1264 (SignalExceptionCacheErr): New exception macros.
1266 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1268 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1269 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1271 (SignalExceptionCoProcessorUnusable): Take as argument the
1272 unusable coprocessor number.
1274 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1276 * mips.igen: Fix formatting of all SignalException calls.
1278 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1280 * sim-main.h (SIGNEXTEND): Remove.
1282 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1284 * mips.igen: Remove gencode comment from top of file, fix
1285 spelling in another comment.
1287 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1289 * mips.igen (check_fmt, check_fmt_p): New functions to check
1290 whether specific floating point formats are usable.
1291 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1292 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1293 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1294 Use the new functions.
1295 (do_c_cond_fmt): Remove format checks...
1296 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1298 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1300 * mips.igen: Fix formatting of check_fpu calls.
1302 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1304 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1306 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1308 * mips.igen: Remove whitespace at end of lines.
1310 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1312 * mips.igen (loadstore_ea): New function to do effective
1313 address calculations.
1314 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1315 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1316 CACHE): Use loadstore_ea to do effective address computations.
1318 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1320 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1321 * mips.igen (LL, CxC1, MxC1): Likewise.
1323 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1325 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1326 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1327 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1328 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1329 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1330 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1331 Don't split opcode fields by hand, use the opcode field values
1334 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1336 * mips.igen (do_divu): Fix spacing.
1338 * mips.igen (do_dsllv): Move to be right before DSLLV,
1339 to match the rest of the do_<shift> functions.
1341 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1343 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1344 DSRL32, do_dsrlv): Trace inputs and results.
1346 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1348 * mips.igen (CACHE): Provide instruction-printing string.
1350 * interp.c (signal_exception): Comment tokens after #endif.
1352 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1354 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1355 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1356 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1357 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1358 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1359 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1360 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1361 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1363 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1365 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1366 instruction-printing string.
1367 (LWU): Use '64' as the filter flag.
1369 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1371 * mips.igen (SDXC1): Fix instruction-printing string.
1373 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1375 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1376 filter flags "32,f".
1378 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1380 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1383 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1385 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1386 add a comma) so that it more closely match the MIPS ISA
1387 documentation opcode partitioning.
1388 (PREF): Put useful names on opcode fields, and include
1389 instruction-printing string.
1391 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1393 * mips.igen (check_u64): New function which in the future will
1394 check whether 64-bit instructions are usable and signal an
1395 exception if not. Currently a no-op.
1396 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1397 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1398 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1399 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1401 * mips.igen (check_fpu): New function which in the future will
1402 check whether FPU instructions are usable and signal an exception
1403 if not. Currently a no-op.
1404 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1405 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1406 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1407 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1408 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1409 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1410 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1411 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1413 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1415 * mips.igen (do_load_left, do_load_right): Move to be immediately
1417 (do_store_left, do_store_right): Move to be immediately following
1420 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1422 * mips.igen (mipsV): New model name. Also, add it to
1423 all instructions and functions where it is appropriate.
1425 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1427 * mips.igen: For all functions and instructions, list model
1428 names that support that instruction one per line.
1430 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1432 * mips.igen: Add some additional comments about supported
1433 models, and about which instructions go where.
1434 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1435 order as is used in the rest of the file.
1437 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1439 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1440 indicating that ALU32_END or ALU64_END are there to check
1442 (DADD): Likewise, but also remove previous comment about
1445 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1447 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1448 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1449 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1450 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1451 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1452 fields (i.e., add and move commas) so that they more closely
1453 match the MIPS ISA documentation opcode partitioning.
1455 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1457 * mips.igen (ADDI): Print immediate value.
1458 (BREAK): Print code.
1459 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1460 (SLL): Print "nop" specially, and don't run the code
1461 that does the shift for the "nop" case.
1463 2001-11-17 Fred Fish <fnf@redhat.com>
1465 * sim-main.h (float_operation): Move enum declaration outside
1466 of _sim_cpu struct declaration.
1468 2001-04-12 Jim Blandy <jimb@redhat.com>
1470 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1471 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1473 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1474 PENDING_FILL, and you can get the intended effect gracefully by
1475 calling PENDING_SCHED directly.
1477 2001-02-23 Ben Elliston <bje@redhat.com>
1479 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1480 already defined elsewhere.
1482 2001-02-19 Ben Elliston <bje@redhat.com>
1484 * sim-main.h (sim_monitor): Return an int.
1485 * interp.c (sim_monitor): Add return values.
1486 (signal_exception): Handle error conditions from sim_monitor.
1488 2001-02-08 Ben Elliston <bje@redhat.com>
1490 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1491 (store_memory): Likewise, pass cia to sim_core_write*.
1493 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1495 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1496 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1498 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1500 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1501 * Makefile.in: Don't delete *.igen when cleaning directory.
1503 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1505 * m16.igen (break): Call SignalException not sim_engine_halt.
1507 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1509 From Jason Eckhardt:
1510 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1512 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1514 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1516 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1518 * mips.igen (do_dmultx): Fix typo.
1520 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1522 * configure: Regenerated to track ../common/aclocal.m4 changes.
1524 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1526 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1528 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1530 * sim-main.h (GPR_CLEAR): Define macro.
1532 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1534 * interp.c (decode_coproc): Output long using %lx and not %s.
1536 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1538 * interp.c (sim_open): Sort & extend dummy memory regions for
1539 --board=jmr3904 for eCos.
1541 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1543 * configure: Regenerated.
1545 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1547 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1548 calls, conditional on the simulator being in verbose mode.
1550 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1552 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1553 cache don't get ReservedInstruction traps.
1555 1999-11-29 Mark Salter <msalter@cygnus.com>
1557 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1558 to clear status bits in sdisr register. This is how the hardware works.
1560 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1561 being used by cygmon.
1563 1999-11-11 Andrew Haley <aph@cygnus.com>
1565 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1568 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1570 * mips.igen (MULT): Correct previous mis-applied patch.
1572 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1574 * mips.igen (delayslot32): Handle sequence like
1575 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1576 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1577 (MULT): Actually pass the third register...
1579 1999-09-03 Mark Salter <msalter@cygnus.com>
1581 * interp.c (sim_open): Added more memory aliases for additional
1582 hardware being touched by cygmon on jmr3904 board.
1584 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1586 * configure: Regenerated to track ../common/aclocal.m4 changes.
1588 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1590 * interp.c (sim_store_register): Handle case where client - GDB -
1591 specifies that a 4 byte register is 8 bytes in size.
1592 (sim_fetch_register): Ditto.
1594 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1596 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1597 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1598 (idt_monitor_base): Base address for IDT monitor traps.
1599 (pmon_monitor_base): Ditto for PMON.
1600 (lsipmon_monitor_base): Ditto for LSI PMON.
1601 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1602 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1603 (sim_firmware_command): New function.
1604 (mips_option_handler): Call it for OPTION_FIRMWARE.
1605 (sim_open): Allocate memory for idt_monitor region. If "--board"
1606 option was given, add no monitor by default. Add BREAK hooks only if
1607 monitors are also there.
1609 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1611 * interp.c (sim_monitor): Flush output before reading input.
1613 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1615 * tconfig.in (SIM_HANDLES_LMA): Always define.
1617 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1619 From Mark Salter <msalter@cygnus.com>:
1620 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1621 (sim_open): Add setup for BSP board.
1623 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1625 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1626 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1627 them as unimplemented.
1629 1999-05-08 Felix Lee <flee@cygnus.com>
1631 * configure: Regenerated to track ../common/aclocal.m4 changes.
1633 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1635 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1637 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1639 * configure.in: Any mips64vr5*-*-* target should have
1640 -DTARGET_ENABLE_FR=1.
1641 (default_endian): Any mips64vr*el-*-* target should default to
1643 * configure: Re-generate.
1645 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1647 * mips.igen (ldl): Extend from _16_, not 32.
1649 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1651 * interp.c (sim_store_register): Force registers written to by GDB
1652 into an un-interpreted state.
1654 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1656 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1657 CPU, start periodic background I/O polls.
1658 (tx3904sio_poll): New function: periodic I/O poller.
1660 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1662 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1664 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1666 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1669 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1671 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1672 (load_word): Call SIM_CORE_SIGNAL hook on error.
1673 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1674 starting. For exception dispatching, pass PC instead of NULL_CIA.
1675 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1676 * sim-main.h (COP0_BADVADDR): Define.
1677 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1678 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1679 (_sim_cpu): Add exc_* fields to store register value snapshots.
1680 * mips.igen (*): Replace memory-related SignalException* calls
1681 with references to SIM_CORE_SIGNAL hook.
1683 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1685 * sim-main.c (*): Minor warning cleanups.
1687 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1689 * m16.igen (DADDIU5): Correct type-o.
1691 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1693 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1696 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1698 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1700 (interp.o): Add dependency on itable.h
1701 (oengine.c, gencode): Delete remaining references.
1702 (BUILT_SRC_FROM_GEN): Clean up.
1704 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1707 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1708 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1709 tmp-run-hack) : New.
1710 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1711 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1712 Drop the "64" qualifier to get the HACK generator working.
1713 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1714 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1715 qualifier to get the hack generator working.
1716 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1717 (DSLL): Use do_dsll.
1718 (DSLLV): Use do_dsllv.
1719 (DSRA): Use do_dsra.
1720 (DSRL): Use do_dsrl.
1721 (DSRLV): Use do_dsrlv.
1722 (BC1): Move *vr4100 to get the HACK generator working.
1723 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1724 get the HACK generator working.
1725 (MACC) Rename to get the HACK generator working.
1726 (DMACC,MACCS,DMACCS): Add the 64.
1728 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1730 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1731 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1733 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1735 * mips/interp.c (DEBUG): Cleanups.
1737 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1739 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1740 (tx3904sio_tickle): fflush after a stdout character output.
1742 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1744 * interp.c (sim_close): Uninstall modules.
1746 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1748 * sim-main.h, interp.c (sim_monitor): Change to global
1751 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1753 * configure.in (vr4100): Only include vr4100 instructions in
1755 * configure: Re-generate.
1756 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1758 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1760 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1761 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1764 * configure.in (sim_default_gen, sim_use_gen): Replace with
1766 (--enable-sim-igen): Delete config option. Always using IGEN.
1767 * configure: Re-generate.
1769 * Makefile.in (gencode): Kill, kill, kill.
1772 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1774 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1775 bit mips16 igen simulator.
1776 * configure: Re-generate.
1778 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1779 as part of vr4100 ISA.
1780 * vr.igen: Mark all instructions as 64 bit only.
1782 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1784 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1787 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1789 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1790 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1791 * configure: Re-generate.
1793 * m16.igen (BREAK): Define breakpoint instruction.
1794 (JALX32): Mark instruction as mips16 and not r3900.
1795 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1797 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1799 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1801 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1802 insn as a debug breakpoint.
1804 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1806 (PENDING_SCHED): Clean up trace statement.
1807 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1808 (PENDING_FILL): Delay write by only one cycle.
1809 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1811 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1813 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1815 (pending_tick): Move incrementing of index to FOR statement.
1816 (pending_tick): Only update PENDING_OUT after a write has occured.
1818 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1820 * configure: Re-generate.
1822 * interp.c (sim_engine_run OLD): Delete explicit call to
1823 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1825 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1827 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1828 interrupt level number to match changed SignalExceptionInterrupt
1831 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1833 * interp.c: #include "itable.h" if WITH_IGEN.
1834 (get_insn_name): New function.
1835 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1836 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1838 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1840 * configure: Rebuilt to inhale new common/aclocal.m4.
1842 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1844 * dv-tx3904sio.c: Include sim-assert.h.
1846 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1848 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1849 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1850 Reorganize target-specific sim-hardware checks.
1851 * configure: rebuilt.
1852 * interp.c (sim_open): For tx39 target boards, set
1853 OPERATING_ENVIRONMENT, add tx3904sio devices.
1854 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1855 ROM executables. Install dv-sockser into sim-modules list.
1857 * dv-tx3904irc.c: Compiler warning clean-up.
1858 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1859 frequent hw-trace messages.
1861 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1863 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1865 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1867 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1869 * vr.igen: New file.
1870 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1871 * mips.igen: Define vr4100 model. Include vr.igen.
1872 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1874 * mips.igen (check_mf_hilo): Correct check.
1876 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1878 * sim-main.h (interrupt_event): Add prototype.
1880 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1881 register_ptr, register_value.
1882 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1884 * sim-main.h (tracefh): Make extern.
1886 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1888 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1889 Reduce unnecessarily high timer event frequency.
1890 * dv-tx3904cpu.c: Ditto for interrupt event.
1892 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1894 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1896 (interrupt_event): Made non-static.
1898 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1899 interchange of configuration values for external vs. internal
1902 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1904 * mips.igen (BREAK): Moved code to here for
1905 simulator-reserved break instructions.
1906 * gencode.c (build_instruction): Ditto.
1907 * interp.c (signal_exception): Code moved from here. Non-
1908 reserved instructions now use exception vector, rather
1910 * sim-main.h: Moved magic constants to here.
1912 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1914 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1915 register upon non-zero interrupt event level, clear upon zero
1917 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1918 by passing zero event value.
1919 (*_io_{read,write}_buffer): Endianness fixes.
1920 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1921 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1923 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1924 serial I/O and timer module at base address 0xFFFF0000.
1926 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1928 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1931 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1933 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1935 * configure: Update.
1937 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1939 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1940 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1941 * configure.in: Include tx3904tmr in hw_device list.
1942 * configure: Rebuilt.
1943 * interp.c (sim_open): Instantiate three timer instances.
1944 Fix address typo of tx3904irc instance.
1946 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1948 * interp.c (signal_exception): SystemCall exception now uses
1949 the exception vector.
1951 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1953 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1956 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1958 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1960 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1962 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1964 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1965 sim-main.h. Declare a struct hw_descriptor instead of struct
1966 hw_device_descriptor.
1968 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1970 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1971 right bits and then re-align left hand bytes to correct byte
1972 lanes. Fix incorrect computation in do_store_left when loading
1973 bytes from second word.
1975 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1977 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1978 * interp.c (sim_open): Only create a device tree when HW is
1981 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1982 * interp.c (signal_exception): Ditto.
1984 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1986 * gencode.c: Mark BEGEZALL as LIKELY.
1988 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1990 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1991 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1993 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1995 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1996 modules. Recognize TX39 target with "mips*tx39" pattern.
1997 * configure: Rebuilt.
1998 * sim-main.h (*): Added many macros defining bits in
1999 TX39 control registers.
2000 (SignalInterrupt): Send actual PC instead of NULL.
2001 (SignalNMIReset): New exception type.
2002 * interp.c (board): New variable for future use to identify
2003 a particular board being simulated.
2004 (mips_option_handler,mips_options): Added "--board" option.
2005 (interrupt_event): Send actual PC.
2006 (sim_open): Make memory layout conditional on board setting.
2007 (signal_exception): Initial implementation of hardware interrupt
2008 handling. Accept another break instruction variant for simulator
2010 (decode_coproc): Implement RFE instruction for TX39.
2011 (mips.igen): Decode RFE instruction as such.
2012 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2013 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2014 bbegin to implement memory map.
2015 * dv-tx3904cpu.c: New file.
2016 * dv-tx3904irc.c: New file.
2018 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2020 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2022 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2024 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2025 with calls to check_div_hilo.
2027 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2029 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2030 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2031 Add special r3900 version of do_mult_hilo.
2032 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2033 with calls to check_mult_hilo.
2034 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2035 with calls to check_div_hilo.
2037 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2039 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2040 Document a replacement.
2042 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2044 * interp.c (sim_monitor): Make mon_printf work.
2046 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2048 * sim-main.h (INSN_NAME): New arg `cpu'.
2050 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2052 * configure: Regenerated to track ../common/aclocal.m4 changes.
2054 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2056 * configure: Regenerated to track ../common/aclocal.m4 changes.
2059 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2061 * acconfig.h: New file.
2062 * configure.in: Reverted change of Apr 24; use sinclude again.
2064 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2066 * configure: Regenerated to track ../common/aclocal.m4 changes.
2069 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2071 * configure.in: Don't call sinclude.
2073 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2075 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2077 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2079 * mips.igen (ERET): Implement.
2081 * interp.c (decode_coproc): Return sign-extended EPC.
2083 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2085 * interp.c (signal_exception): Do not ignore Trap.
2086 (signal_exception): On TRAP, restart at exception address.
2087 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2088 (signal_exception): Update.
2089 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2090 so that TRAP instructions are caught.
2092 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2094 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2095 contains HI/LO access history.
2096 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2097 (HIACCESS, LOACCESS): Delete, replace with
2098 (HIHISTORY, LOHISTORY): New macros.
2099 (CHECKHILO): Delete all, moved to mips.igen
2101 * gencode.c (build_instruction): Do not generate checks for
2102 correct HI/LO register usage.
2104 * interp.c (old_engine_run): Delete checks for correct HI/LO
2107 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2108 check_mf_cycles): New functions.
2109 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2110 do_divu, domultx, do_mult, do_multu): Use.
2112 * tx.igen ("madd", "maddu"): Use.
2114 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2116 * mips.igen (DSRAV): Use function do_dsrav.
2117 (SRAV): Use new function do_srav.
2119 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2120 (B): Sign extend 11 bit immediate.
2121 (EXT-B*): Shift 16 bit immediate left by 1.
2122 (ADDIU*): Don't sign extend immediate value.
2124 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2126 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2128 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2131 * mips.igen (delayslot32, nullify_next_insn): New functions.
2132 (m16.igen): Always include.
2133 (do_*): Add more tracing.
2135 * m16.igen (delayslot16): Add NIA argument, could be called by a
2136 32 bit MIPS16 instruction.
2138 * interp.c (ifetch16): Move function from here.
2139 * sim-main.c (ifetch16): To here.
2141 * sim-main.c (ifetch16, ifetch32): Update to match current
2142 implementations of LH, LW.
2143 (signal_exception): Don't print out incorrect hex value of illegal
2146 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2151 * m16.igen: Implement MIPS16 instructions.
2153 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2154 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2155 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2156 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2157 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2158 bodies of corresponding code from 32 bit insn to these. Also used
2159 by MIPS16 versions of functions.
2161 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2162 (IMEM16): Drop NR argument from macro.
2164 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2166 * Makefile.in (SIM_OBJS): Add sim-main.o.
2168 * sim-main.h (address_translation, load_memory, store_memory,
2169 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2171 (pr_addr, pr_uword64): Declare.
2172 (sim-main.c): Include when H_REVEALS_MODULE_P.
2174 * interp.c (address_translation, load_memory, store_memory,
2175 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2177 * sim-main.c: To here. Fix compilation problems.
2179 * configure.in: Enable inlining.
2180 * configure: Re-config.
2182 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2184 * configure: Regenerated to track ../common/aclocal.m4 changes.
2186 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2188 * mips.igen: Include tx.igen.
2189 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2190 * tx.igen: New file, contains MADD and MADDU.
2192 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2193 the hardwired constant `7'.
2194 (store_memory): Ditto.
2195 (LOADDRMASK): Move definition to sim-main.h.
2197 mips.igen (MTC0): Enable for r3900.
2200 mips.igen (do_load_byte): Delete.
2201 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2202 do_store_right): New functions.
2203 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2205 configure.in: Let the tx39 use igen again.
2208 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2210 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2211 not an address sized quantity. Return zero for cache sizes.
2213 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2215 * mips.igen (r3900): r3900 does not support 64 bit integer
2218 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2220 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2222 * configure : Rebuild.
2224 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2226 * configure: Regenerated to track ../common/aclocal.m4 changes.
2228 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2230 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2232 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2234 * configure: Regenerated to track ../common/aclocal.m4 changes.
2235 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2237 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2239 * configure: Regenerated to track ../common/aclocal.m4 changes.
2241 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2243 * interp.c (Max, Min): Comment out functions. Not yet used.
2245 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * configure: Regenerated to track ../common/aclocal.m4 changes.
2249 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2251 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2252 configurable settings for stand-alone simulator.
2254 * configure.in: Added X11 search, just in case.
2256 * configure: Regenerated.
2258 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2260 * interp.c (sim_write, sim_read, load_memory, store_memory):
2261 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2263 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2265 * sim-main.h (GETFCC): Return an unsigned value.
2267 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2269 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2270 (DADD): Result destination is RD not RT.
2272 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2274 * sim-main.h (HIACCESS, LOACCESS): Always define.
2276 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2278 * interp.c (sim_info): Delete.
2280 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2282 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2283 (mips_option_handler): New argument `cpu'.
2284 (sim_open): Update call to sim_add_option_table.
2286 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2288 * mips.igen (CxC1): Add tracing.
2290 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2292 * sim-main.h (Max, Min): Declare.
2294 * interp.c (Max, Min): New functions.
2296 * mips.igen (BC1): Add tracing.
2298 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2300 * interp.c Added memory map for stack in vr4100
2302 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2304 * interp.c (load_memory): Add missing "break"'s.
2306 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2308 * interp.c (sim_store_register, sim_fetch_register): Pass in
2309 length parameter. Return -1.
2311 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2313 * interp.c: Added hardware init hook, fixed warnings.
2315 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2317 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2319 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2321 * interp.c (ifetch16): New function.
2323 * sim-main.h (IMEM32): Rename IMEM.
2324 (IMEM16_IMMED): Define.
2326 (DELAY_SLOT): Update.
2328 * m16run.c (sim_engine_run): New file.
2330 * m16.igen: All instructions except LB.
2331 (LB): Call do_load_byte.
2332 * mips.igen (do_load_byte): New function.
2333 (LB): Call do_load_byte.
2335 * mips.igen: Move spec for insn bit size and high bit from here.
2336 * Makefile.in (tmp-igen, tmp-m16): To here.
2338 * m16.dc: New file, decode mips16 instructions.
2340 * Makefile.in (SIM_NO_ALL): Define.
2341 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2343 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2345 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2346 point unit to 32 bit registers.
2347 * configure: Re-generate.
2349 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2351 * configure.in (sim_use_gen): Make IGEN the default simulator
2352 generator for generic 32 and 64 bit mips targets.
2353 * configure: Re-generate.
2355 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2357 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2360 * interp.c (sim_fetch_register, sim_store_register): Read/write
2361 FGR from correct location.
2362 (sim_open): Set size of FGR's according to
2363 WITH_TARGET_FLOATING_POINT_BITSIZE.
2365 * sim-main.h (FGR): Store floating point registers in a separate
2368 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2370 * configure: Regenerated to track ../common/aclocal.m4 changes.
2372 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2374 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2376 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2378 * interp.c (pending_tick): New function. Deliver pending writes.
2380 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2381 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2382 it can handle mixed sized quantites and single bits.
2384 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2386 * interp.c (oengine.h): Do not include when building with IGEN.
2387 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2388 (sim_info): Ditto for PROCESSOR_64BIT.
2389 (sim_monitor): Replace ut_reg with unsigned_word.
2390 (*): Ditto for t_reg.
2391 (LOADDRMASK): Define.
2392 (sim_open): Remove defunct check that host FP is IEEE compliant,
2393 using software to emulate floating point.
2394 (value_fpr, ...): Always compile, was conditional on HASFPU.
2396 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2398 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2401 * interp.c (SD, CPU): Define.
2402 (mips_option_handler): Set flags in each CPU.
2403 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2404 (sim_close): Do not clear STATE, deleted anyway.
2405 (sim_write, sim_read): Assume CPU zero's vm should be used for
2407 (sim_create_inferior): Set the PC for all processors.
2408 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2410 (mips16_entry): Pass correct nr of args to store_word, load_word.
2411 (ColdReset): Cold reset all cpu's.
2412 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2413 (sim_monitor, load_memory, store_memory, signal_exception): Use
2414 `CPU' instead of STATE_CPU.
2417 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2420 * sim-main.h (signal_exception): Add sim_cpu arg.
2421 (SignalException*): Pass both SD and CPU to signal_exception.
2422 * interp.c (signal_exception): Update.
2424 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2426 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2427 address_translation): Ditto
2428 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2430 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2432 * configure: Regenerated to track ../common/aclocal.m4 changes.
2434 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2436 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2438 * mips.igen (model): Map processor names onto BFD name.
2440 * sim-main.h (CPU_CIA): Delete.
2441 (SET_CIA, GET_CIA): Define
2443 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2445 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2448 * configure.in (default_endian): Configure a big-endian simulator
2450 * configure: Re-generate.
2452 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2454 * configure: Regenerated to track ../common/aclocal.m4 changes.
2456 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2458 * interp.c (sim_monitor): Handle Densan monitor outbyte
2459 and inbyte functions.
2461 1997-12-29 Felix Lee <flee@cygnus.com>
2463 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2465 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2467 * Makefile.in (tmp-igen): Arrange for $zero to always be
2468 reset to zero after every instruction.
2470 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2472 * configure: Regenerated to track ../common/aclocal.m4 changes.
2475 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2477 * mips.igen (MSUB): Fix to work like MADD.
2478 * gencode.c (MSUB): Similarly.
2480 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2482 * configure: Regenerated to track ../common/aclocal.m4 changes.
2484 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2486 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2488 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2490 * sim-main.h (sim-fpu.h): Include.
2492 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2493 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2494 using host independant sim_fpu module.
2496 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2498 * interp.c (signal_exception): Report internal errors with SIGABRT
2501 * sim-main.h (C0_CONFIG): New register.
2502 (signal.h): No longer include.
2504 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2506 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2508 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2510 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2512 * mips.igen: Tag vr5000 instructions.
2513 (ANDI): Was missing mipsIV model, fix assembler syntax.
2514 (do_c_cond_fmt): New function.
2515 (C.cond.fmt): Handle mips I-III which do not support CC field
2517 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2518 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2520 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2521 vr5000 which saves LO in a GPR separatly.
2523 * configure.in (enable-sim-igen): For vr5000, select vr5000
2524 specific instructions.
2525 * configure: Re-generate.
2527 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2529 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2531 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2532 fmt_uninterpreted_64 bit cases to switch. Convert to
2535 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2537 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2538 as specified in IV3.2 spec.
2539 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2541 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2543 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2544 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2545 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2546 PENDING_FILL versions of instructions. Simplify.
2548 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2550 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2552 (MTHI, MFHI): Disable code checking HI-LO.
2554 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2556 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2558 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2560 * gencode.c (build_mips16_operands): Replace IPC with cia.
2562 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2563 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2565 (UndefinedResult): Replace function with macro/function
2567 (sim_engine_run): Don't save PC in IPC.
2569 * sim-main.h (IPC): Delete.
2572 * interp.c (signal_exception, store_word, load_word,
2573 address_translation, load_memory, store_memory, cache_op,
2574 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2575 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2576 current instruction address - cia - argument.
2577 (sim_read, sim_write): Call address_translation directly.
2578 (sim_engine_run): Rename variable vaddr to cia.
2579 (signal_exception): Pass cia to sim_monitor
2581 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2582 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2583 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2585 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2586 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2589 * interp.c (signal_exception): Pass restart address to
2592 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2593 idecode.o): Add dependency.
2595 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2597 (DELAY_SLOT): Update NIA not PC with branch address.
2598 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2600 * mips.igen: Use CIA not PC in branch calculations.
2601 (illegal): Call SignalException.
2602 (BEQ, ADDIU): Fix assembler.
2604 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2606 * m16.igen (JALX): Was missing.
2608 * configure.in (enable-sim-igen): New configuration option.
2609 * configure: Re-generate.
2611 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2613 * interp.c (load_memory, store_memory): Delete parameter RAW.
2614 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2615 bypassing {load,store}_memory.
2617 * sim-main.h (ByteSwapMem): Delete definition.
2619 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2621 * interp.c (sim_do_command, sim_commands): Delete mips specific
2622 commands. Handled by module sim-options.
2624 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2625 (WITH_MODULO_MEMORY): Define.
2627 * interp.c (sim_info): Delete code printing memory size.
2629 * interp.c (mips_size): Nee sim_size, delete function.
2631 (monitor, monitor_base, monitor_size): Delete global variables.
2632 (sim_open, sim_close): Delete code creating monitor and other
2633 memory regions. Use sim-memopts module, via sim_do_commandf, to
2634 manage memory regions.
2635 (load_memory, store_memory): Use sim-core for memory model.
2637 * interp.c (address_translation): Delete all memory map code
2638 except line forcing 32 bit addresses.
2640 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2642 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2645 * interp.c (logfh, logfile): Delete globals.
2646 (sim_open, sim_close): Delete code opening & closing log file.
2647 (mips_option_handler): Delete -l and -n options.
2648 (OPTION mips_options): Ditto.
2650 * interp.c (OPTION mips_options): Rename option trace to dinero.
2651 (mips_option_handler): Update.
2653 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2655 * interp.c (fetch_str): New function.
2656 (sim_monitor): Rewrite using sim_read & sim_write.
2657 (sim_open): Check magic number.
2658 (sim_open): Write monitor vectors into memory using sim_write.
2659 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2660 (sim_read, sim_write): Simplify - transfer data one byte at a
2662 (load_memory, store_memory): Clarify meaning of parameter RAW.
2664 * sim-main.h (isHOST): Defete definition.
2665 (isTARGET): Mark as depreciated.
2666 (address_translation): Delete parameter HOST.
2668 * interp.c (address_translation): Delete parameter HOST.
2670 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2674 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2675 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2677 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2679 * mips.igen: Add model filter field to records.
2681 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2683 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2685 interp.c (sim_engine_run): Do not compile function sim_engine_run
2686 when WITH_IGEN == 1.
2688 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2689 target architecture.
2691 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2692 igen. Replace with configuration variables sim_igen_flags /
2695 * m16.igen: New file. Copy mips16 insns here.
2696 * mips.igen: From here.
2698 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2700 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2702 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2704 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2706 * gencode.c (build_instruction): Follow sim_write's lead in using
2707 BigEndianMem instead of !ByteSwapMem.
2709 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2711 * configure.in (sim_gen): Dependent on target, select type of
2712 generator. Always select old style generator.
2714 configure: Re-generate.
2716 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2718 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2719 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2720 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2721 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2722 SIM_@sim_gen@_*, set by autoconf.
2724 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2728 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2729 CURRENT_FLOATING_POINT instead.
2731 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2732 (address_translation): Raise exception InstructionFetch when
2733 translation fails and isINSTRUCTION.
2735 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2736 sim_engine_run): Change type of of vaddr and paddr to
2738 (address_translation, prefetch, load_memory, store_memory,
2739 cache_op): Change type of vAddr and pAddr to address_word.
2741 * gencode.c (build_instruction): Change type of vaddr and paddr to
2744 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2747 macro to obtain result of ALU op.
2749 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2751 * interp.c (sim_info): Call profile_print.
2753 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2755 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2757 * sim-main.h (WITH_PROFILE): Do not define, defined in
2758 common/sim-config.h. Use sim-profile module.
2759 (simPROFILE): Delete defintion.
2761 * interp.c (PROFILE): Delete definition.
2762 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2763 (sim_close): Delete code writing profile histogram.
2764 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2766 (sim_engine_run): Delete code profiling the PC.
2768 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2770 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2772 * interp.c (sim_monitor): Make register pointers of type
2775 * sim-main.h: Make registers of type unsigned_word not
2778 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2780 * interp.c (sync_operation): Rename from SyncOperation, make
2781 global, add SD argument.
2782 (prefetch): Rename from Prefetch, make global, add SD argument.
2783 (decode_coproc): Make global.
2785 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2787 * gencode.c (build_instruction): Generate DecodeCoproc not
2788 decode_coproc calls.
2790 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2791 (SizeFGR): Move to sim-main.h
2792 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2793 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2794 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2796 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2797 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2798 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2799 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2800 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2801 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2803 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2805 (sim-alu.h): Include.
2806 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2807 (sim_cia): Typedef to instruction_address.
2809 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2811 * Makefile.in (interp.o): Rename generated file engine.c to
2816 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2818 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2820 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2822 * gencode.c (build_instruction): For "FPSQRT", output correct
2823 number of arguments to Recip.
2825 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2827 * Makefile.in (interp.o): Depends on sim-main.h
2829 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2831 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2832 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2833 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2834 STATE, DSSTATE): Define
2835 (GPR, FGRIDX, ..): Define.
2837 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2838 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2839 (GPR, FGRIDX, ...): Delete macros.
2841 * interp.c: Update names to match defines from sim-main.h
2843 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2845 * interp.c (sim_monitor): Add SD argument.
2846 (sim_warning): Delete. Replace calls with calls to
2848 (sim_error): Delete. Replace calls with sim_io_error.
2849 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2850 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2851 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2853 (mips_size): Rename from sim_size. Add SD argument.
2855 * interp.c (simulator): Delete global variable.
2856 (callback): Delete global variable.
2857 (mips_option_handler, sim_open, sim_write, sim_read,
2858 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2859 sim_size,sim_monitor): Use sim_io_* not callback->*.
2860 (sim_open): ZALLOC simulator struct.
2861 (PROFILE): Do not define.
2863 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2865 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2866 support.h with corresponding code.
2868 * sim-main.h (word64, uword64), support.h: Move definition to
2870 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2873 * Makefile.in: Update dependencies
2874 * interp.c: Do not include.
2876 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2878 * interp.c (address_translation, load_memory, store_memory,
2879 cache_op): Rename to from AddressTranslation et.al., make global,
2882 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2885 * interp.c (SignalException): Rename to signal_exception, make
2888 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2890 * sim-main.h (SignalException, SignalExceptionInterrupt,
2891 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2892 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2893 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2896 * interp.c, support.h: Use.
2898 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2900 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2901 to value_fpr / store_fpr. Add SD argument.
2902 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2903 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2905 * sim-main.h (ValueFPR, StoreFPR): Define.
2907 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2909 * interp.c (sim_engine_run): Check consistency between configure
2910 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2913 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2914 (mips_fpu): Configure WITH_FLOATING_POINT.
2915 (mips_endian): Configure WITH_TARGET_ENDIAN.
2916 * configure: Update.
2918 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2920 * configure: Regenerated to track ../common/aclocal.m4 changes.
2922 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2924 * configure: Regenerated.
2926 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2928 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2930 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2932 * gencode.c (print_igen_insn_models): Assume certain architectures
2933 include all mips* instructions.
2934 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2937 * Makefile.in (tmp.igen): Add target. Generate igen input from
2940 * gencode.c (FEATURE_IGEN): Define.
2941 (main): Add --igen option. Generate output in igen format.
2942 (process_instructions): Format output according to igen option.
2943 (print_igen_insn_format): New function.
2944 (print_igen_insn_models): New function.
2945 (process_instructions): Only issue warnings and ignore
2946 instructions when no FEATURE_IGEN.
2948 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2950 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2953 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2955 * configure: Regenerated to track ../common/aclocal.m4 changes.
2957 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2959 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2960 SIM_RESERVED_BITS): Delete, moved to common.
2961 (SIM_EXTRA_CFLAGS): Update.
2963 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2965 * configure.in: Configure non-strict memory alignment.
2966 * configure: Regenerated to track ../common/aclocal.m4 changes.
2968 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2970 * configure: Regenerated to track ../common/aclocal.m4 changes.
2972 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2974 * gencode.c (SDBBP,DERET): Added (3900) insns.
2975 (RFE): Turn on for 3900.
2976 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2977 (dsstate): Made global.
2978 (SUBTARGET_R3900): Added.
2979 (CANCELDELAYSLOT): New.
2980 (SignalException): Ignore SystemCall rather than ignore and
2981 terminate. Add DebugBreakPoint handling.
2982 (decode_coproc): New insns RFE, DERET; and new registers Debug
2983 and DEPC protected by SUBTARGET_R3900.
2984 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2986 * Makefile.in,configure.in: Add mips subtarget option.
2987 * configure: Update.
2989 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2991 * gencode.c: Add r3900 (tx39).
2994 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2996 * gencode.c (build_instruction): Don't need to subtract 4 for
2999 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3001 * interp.c: Correct some HASFPU problems.
3003 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3005 * configure: Regenerated to track ../common/aclocal.m4 changes.
3007 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3009 * interp.c (mips_options): Fix samples option short form, should
3012 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3014 * interp.c (sim_info): Enable info code. Was just returning.
3016 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3018 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3021 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3023 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3025 (build_instruction): Ditto for LL.
3027 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3029 * configure: Regenerated to track ../common/aclocal.m4 changes.
3031 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3033 * configure: Regenerated to track ../common/aclocal.m4 changes.
3036 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3038 * interp.c (sim_open): Add call to sim_analyze_program, update
3041 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3043 * interp.c (sim_kill): Delete.
3044 (sim_create_inferior): Add ABFD argument. Set PC from same.
3045 (sim_load): Move code initializing trap handlers from here.
3046 (sim_open): To here.
3047 (sim_load): Delete, use sim-hload.c.
3049 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3051 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3053 * configure: Regenerated to track ../common/aclocal.m4 changes.
3056 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3058 * interp.c (sim_open): Add ABFD argument.
3059 (sim_load): Move call to sim_config from here.
3060 (sim_open): To here. Check return status.
3062 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3064 * gencode.c (build_instruction): Two arg MADD should
3065 not assign result to $0.
3067 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3069 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3070 * sim/mips/configure.in: Regenerate.
3072 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3074 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3075 signed8, unsigned8 et.al. types.
3077 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3078 hosts when selecting subreg.
3080 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3082 * interp.c (sim_engine_run): Reset the ZERO register to zero
3083 regardless of FEATURE_WARN_ZERO.
3084 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3086 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3088 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3089 (SignalException): For BreakPoints ignore any mode bits and just
3091 (SignalException): Always set the CAUSE register.
3093 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3096 exception has been taken.
3098 * interp.c: Implement the ERET and mt/f sr instructions.
3100 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3102 * interp.c (SignalException): Don't bother restarting an
3105 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3107 * interp.c (SignalException): Really take an interrupt.
3108 (interrupt_event): Only deliver interrupts when enabled.
3110 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3112 * interp.c (sim_info): Only print info when verbose.
3113 (sim_info) Use sim_io_printf for output.
3115 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3117 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3120 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3122 * interp.c (sim_do_command): Check for common commands if a
3123 simulator specific command fails.
3125 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3127 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3128 and simBE when DEBUG is defined.
3130 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3132 * interp.c (interrupt_event): New function. Pass exception event
3133 onto exception handler.
3135 * configure.in: Check for stdlib.h.
3136 * configure: Regenerate.
3138 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3139 variable declaration.
3140 (build_instruction): Initialize memval1.
3141 (build_instruction): Add UNUSED attribute to byte, bigend,
3143 (build_operands): Ditto.
3145 * interp.c: Fix GCC warnings.
3146 (sim_get_quit_code): Delete.
3148 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3149 * Makefile.in: Ditto.
3150 * configure: Re-generate.
3152 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3154 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3156 * interp.c (mips_option_handler): New function parse argumes using
3158 (myname): Replace with STATE_MY_NAME.
3159 (sim_open): Delete check for host endianness - performed by
3161 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3162 (sim_open): Move much of the initialization from here.
3163 (sim_load): To here. After the image has been loaded and
3165 (sim_open): Move ColdReset from here.
3166 (sim_create_inferior): To here.
3167 (sim_open): Make FP check less dependant on host endianness.
3169 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3171 * interp.c (sim_set_callbacks): Delete.
3173 * interp.c (membank, membank_base, membank_size): Replace with
3174 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3175 (sim_open): Remove call to callback->init. gdb/run do this.
3179 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3181 * interp.c (big_endian_p): Delete, replaced by
3182 current_target_byte_order.
3184 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3186 * interp.c (host_read_long, host_read_word, host_swap_word,
3187 host_swap_long): Delete. Using common sim-endian.
3188 (sim_fetch_register, sim_store_register): Use H2T.
3189 (pipeline_ticks): Delete. Handled by sim-events.
3191 (sim_engine_run): Update.
3193 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3195 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3197 (SignalException): To here. Signal using sim_engine_halt.
3198 (sim_stop_reason): Delete, moved to common.
3200 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3202 * interp.c (sim_open): Add callback argument.
3203 (sim_set_callbacks): Delete SIM_DESC argument.
3206 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3208 * Makefile.in (SIM_OBJS): Add common modules.
3210 * interp.c (sim_set_callbacks): Also set SD callback.
3211 (set_endianness, xfer_*, swap_*): Delete.
3212 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3213 Change to functions using sim-endian macros.
3214 (control_c, sim_stop): Delete, use common version.
3215 (simulate): Convert into.
3216 (sim_engine_run): This function.
3217 (sim_resume): Delete.
3219 * interp.c (simulation): New variable - the simulator object.
3220 (sim_kind): Delete global - merged into simulation.
3221 (sim_load): Cleanup. Move PC assignment from here.
3222 (sim_create_inferior): To here.
3224 * sim-main.h: New file.
3225 * interp.c (sim-main.h): Include.
3227 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3229 * configure: Regenerated to track ../common/aclocal.m4 changes.
3231 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3233 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3235 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3237 * gencode.c (build_instruction): DIV instructions: check
3238 for division by zero and integer overflow before using
3239 host's division operation.
3241 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3243 * Makefile.in (SIM_OBJS): Add sim-load.o.
3244 * interp.c: #include bfd.h.
3245 (target_byte_order): Delete.
3246 (sim_kind, myname, big_endian_p): New static locals.
3247 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3248 after argument parsing. Recognize -E arg, set endianness accordingly.
3249 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3250 load file into simulator. Set PC from bfd.
3251 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3252 (set_endianness): Use big_endian_p instead of target_byte_order.
3254 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3256 * interp.c (sim_size): Delete prototype - conflicts with
3257 definition in remote-sim.h. Correct definition.
3259 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3261 * configure: Regenerated to track ../common/aclocal.m4 changes.
3264 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3266 * interp.c (sim_open): New arg `kind'.
3268 * configure: Regenerated to track ../common/aclocal.m4 changes.
3270 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3272 * configure: Regenerated to track ../common/aclocal.m4 changes.
3274 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3276 * interp.c (sim_open): Set optind to 0 before calling getopt.
3278 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3280 * configure: Regenerated to track ../common/aclocal.m4 changes.
3282 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3284 * interp.c : Replace uses of pr_addr with pr_uword64
3285 where the bit length is always 64 independent of SIM_ADDR.
3286 (pr_uword64) : added.
3288 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3290 * configure: Re-generate.
3292 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3294 * configure: Regenerate to track ../common/aclocal.m4 changes.
3296 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3298 * interp.c (sim_open): New SIM_DESC result. Argument is now
3300 (other sim_*): New SIM_DESC argument.
3302 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3304 * interp.c: Fix printing of addresses for non-64-bit targets.
3305 (pr_addr): Add function to print address based on size.
3307 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3309 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3311 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3313 * gencode.c (build_mips16_operands): Correct computation of base
3314 address for extended PC relative instruction.
3316 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3318 * interp.c (mips16_entry): Add support for floating point cases.
3319 (SignalException): Pass floating point cases to mips16_entry.
3320 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3322 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3324 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3325 and then set the state to fmt_uninterpreted.
3326 (COP_SW): Temporarily set the state to fmt_word while calling
3329 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3331 * gencode.c (build_instruction): The high order may be set in the
3332 comparison flags at any ISA level, not just ISA 4.
3334 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3336 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3337 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3338 * configure.in: sinclude ../common/aclocal.m4.
3339 * configure: Regenerated.
3341 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3343 * configure: Rebuild after change to aclocal.m4.
3345 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3347 * configure configure.in Makefile.in: Update to new configure
3348 scheme which is more compatible with WinGDB builds.
3349 * configure.in: Improve comment on how to run autoconf.
3350 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3351 * Makefile.in: Use autoconf substitution to install common
3354 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3356 * gencode.c (build_instruction): Use BigEndianCPU instead of
3359 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3361 * interp.c (sim_monitor): Make output to stdout visible in
3362 wingdb's I/O log window.
3364 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3366 * support.h: Undo previous change to SIGTRAP
3369 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3371 * interp.c (store_word, load_word): New static functions.
3372 (mips16_entry): New static function.
3373 (SignalException): Look for mips16 entry and exit instructions.
3374 (simulate): Use the correct index when setting fpr_state after
3375 doing a pending move.
3377 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3379 * interp.c: Fix byte-swapping code throughout to work on
3380 both little- and big-endian hosts.
3382 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3384 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3385 with gdb/config/i386/xm-windows.h.
3387 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3389 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3390 that messes up arithmetic shifts.
3392 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3394 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3395 SIGTRAP and SIGQUIT for _WIN32.
3397 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3399 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3400 force a 64 bit multiplication.
3401 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3402 destination register is 0, since that is the default mips16 nop
3405 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3407 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3408 (build_endian_shift): Don't check proc64.
3409 (build_instruction): Always set memval to uword64. Cast op2 to
3410 uword64 when shifting it left in memory instructions. Always use
3411 the same code for stores--don't special case proc64.
3413 * gencode.c (build_mips16_operands): Fix base PC value for PC
3415 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3417 * interp.c (simJALDELAYSLOT): Define.
3418 (JALDELAYSLOT): Define.
3419 (INDELAYSLOT, INJALDELAYSLOT): Define.
3420 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3422 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3424 * interp.c (sim_open): add flush_cache as a PMON routine
3425 (sim_monitor): handle flush_cache by ignoring it
3427 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3429 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3431 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3432 (BigEndianMem): Rename to ByteSwapMem and change sense.
3433 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3434 BigEndianMem references to !ByteSwapMem.
3435 (set_endianness): New function, with prototype.
3436 (sim_open): Call set_endianness.
3437 (sim_info): Use simBE instead of BigEndianMem.
3438 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3439 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3440 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3441 ifdefs, keeping the prototype declaration.
3442 (swap_word): Rewrite correctly.
3443 (ColdReset): Delete references to CONFIG. Delete endianness related
3444 code; moved to set_endianness.
3446 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3448 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3449 * interp.c (CHECKHILO): Define away.
3450 (simSIGINT): New macro.
3451 (membank_size): Increase from 1MB to 2MB.
3452 (control_c): New function.
3453 (sim_resume): Rename parameter signal to signal_number. Add local
3454 variable prev. Call signal before and after simulate.
3455 (sim_stop_reason): Add simSIGINT support.
3456 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3458 (sim_warning): Delete call to SignalException. Do call printf_filtered
3460 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3461 a call to sim_warning.
3463 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3465 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3466 16 bit instructions.
3468 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3470 Add support for mips16 (16 bit MIPS implementation):
3471 * gencode.c (inst_type): Add mips16 instruction encoding types.
3472 (GETDATASIZEINSN): Define.
3473 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3474 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3476 (MIPS16_DECODE): New table, for mips16 instructions.
3477 (bitmap_val): New static function.
3478 (struct mips16_op): Define.
3479 (mips16_op_table): New table, for mips16 operands.
3480 (build_mips16_operands): New static function.
3481 (process_instructions): If PC is odd, decode a mips16
3482 instruction. Break out instruction handling into new
3483 build_instruction function.
3484 (build_instruction): New static function, broken out of
3485 process_instructions. Check modifiers rather than flags for SHIFT
3486 bit count and m[ft]{hi,lo} direction.
3487 (usage): Pass program name to fprintf.
3488 (main): Remove unused variable this_option_optind. Change
3489 ``*loptarg++'' to ``loptarg++''.
3490 (my_strtoul): Parenthesize && within ||.
3491 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3492 (simulate): If PC is odd, fetch a 16 bit instruction, and
3493 increment PC by 2 rather than 4.
3494 * configure.in: Add case for mips16*-*-*.
3495 * configure: Rebuild.
3497 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3499 * interp.c: Allow -t to enable tracing in standalone simulator.
3500 Fix garbage output in trace file and error messages.
3502 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3504 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3505 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3506 * configure.in: Simplify using macros in ../common/aclocal.m4.
3507 * configure: Regenerated.
3508 * tconfig.in: New file.
3510 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3512 * interp.c: Fix bugs in 64-bit port.
3513 Use ansi function declarations for msvc compiler.
3514 Initialize and test file pointer in trace code.
3515 Prevent duplicate definition of LAST_EMED_REGNUM.
3517 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3519 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3521 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3523 * interp.c (SignalException): Check for explicit terminating
3525 * gencode.c: Pass instruction value through SignalException()
3526 calls for Trap, Breakpoint and Syscall.
3528 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3530 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3531 only used on those hosts that provide it.
3532 * configure.in: Add sqrt() to list of functions to be checked for.
3533 * config.in: Re-generated.
3534 * configure: Re-generated.
3536 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3538 * gencode.c (process_instructions): Call build_endian_shift when
3539 expanding STORE RIGHT, to fix swr.
3540 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3541 clear the high bits.
3542 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3543 Fix float to int conversions to produce signed values.
3545 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3547 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3548 (process_instructions): Correct handling of nor instruction.
3549 Correct shift count for 32 bit shift instructions. Correct sign
3550 extension for arithmetic shifts to not shift the number of bits in
3551 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3552 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3554 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3555 It's OK to have a mult follow a mult. What's not OK is to have a
3556 mult follow an mfhi.
3557 (Convert): Comment out incorrect rounding code.
3559 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3561 * interp.c (sim_monitor): Improved monitor printf
3562 simulation. Tidied up simulator warnings, and added "--log" option
3563 for directing warning message output.
3564 * gencode.c: Use sim_warning() rather than WARNING macro.
3566 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3568 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3569 getopt1.o, rather than on gencode.c. Link objects together.
3570 Don't link against -liberty.
3571 (gencode.o, getopt.o, getopt1.o): New targets.
3572 * gencode.c: Include <ctype.h> and "ansidecl.h".
3573 (AND): Undefine after including "ansidecl.h".
3574 (ULONG_MAX): Define if not defined.
3575 (OP_*): Don't define macros; now defined in opcode/mips.h.
3576 (main): Call my_strtoul rather than strtoul.
3577 (my_strtoul): New static function.
3579 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3581 * gencode.c (process_instructions): Generate word64 and uword64
3582 instead of `long long' and `unsigned long long' data types.
3583 * interp.c: #include sysdep.h to get signals, and define default
3585 * (Convert): Work around for Visual-C++ compiler bug with type
3587 * support.h: Make things compile under Visual-C++ by using
3588 __int64 instead of `long long'. Change many refs to long long
3589 into word64/uword64 typedefs.
3591 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3593 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3594 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3596 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3597 (AC_PROG_INSTALL): Added.
3598 (AC_PROG_CC): Moved to before configure.host call.
3599 * configure: Rebuilt.
3601 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3603 * configure.in: Define @SIMCONF@ depending on mips target.
3604 * configure: Rebuild.
3605 * Makefile.in (run): Add @SIMCONF@ to control simulator
3607 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3608 * interp.c: Remove some debugging, provide more detailed error
3609 messages, update memory accesses to use LOADDRMASK.
3611 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3613 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3614 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3616 * configure: Rebuild.
3617 * config.in: New file, generated by autoheader.
3618 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3619 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3620 HAVE_ANINT and HAVE_AINT, as appropriate.
3621 * Makefile.in (run): Use @LIBS@ rather than -lm.
3622 (interp.o): Depend upon config.h.
3623 (Makefile): Just rebuild Makefile.
3624 (clean): Remove stamp-h.
3625 (mostlyclean): Make the same as clean, not as distclean.
3626 (config.h, stamp-h): New targets.
3628 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3630 * interp.c (ColdReset): Fix boolean test. Make all simulator
3633 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3635 * interp.c (xfer_direct_word, xfer_direct_long,
3636 swap_direct_word, swap_direct_long, xfer_big_word,
3637 xfer_big_long, xfer_little_word, xfer_little_long,
3638 swap_word,swap_long): Added.
3639 * interp.c (ColdReset): Provide function indirection to
3640 host<->simulated_target transfer routines.
3641 * interp.c (sim_store_register, sim_fetch_register): Updated to
3642 make use of indirected transfer routines.
3644 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3646 * gencode.c (process_instructions): Ensure FP ABS instruction
3648 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3649 system call support.
3651 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3653 * interp.c (sim_do_command): Complain if callback structure not
3656 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3658 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3659 support for Sun hosts.
3660 * Makefile.in (gencode): Ensure the host compiler and libraries
3661 used for cross-hosted build.
3663 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3665 * interp.c, gencode.c: Some more (TODO) tidying.
3667 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3669 * gencode.c, interp.c: Replaced explicit long long references with
3670 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3671 * support.h (SET64LO, SET64HI): Macros added.
3673 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3675 * configure: Regenerate with autoconf 2.7.
3677 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3679 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3680 * support.h: Remove superfluous "1" from #if.
3681 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3683 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3685 * interp.c (StoreFPR): Control UndefinedResult() call on
3686 WARN_RESULT manifest.
3688 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3690 * gencode.c: Tidied instruction decoding, and added FP instruction
3693 * interp.c: Added dineroIII, and BSD profiling support. Also
3694 run-time FP handling.
3696 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3698 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3699 gencode.c, interp.c, support.h: created.
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