1 2015-12-26 Mike Frysinger <vapier@gentoo.org>
3 * config.in, configure: Regenerate.
5 2015-12-26 Mike Frysinger <vapier@gentoo.org>
7 * interp.c (sim_write, sim_read): Delete.
8 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
10 * micromips.igen (cache): Likewise.
11 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
12 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
13 do_store_left, do_store_right, do_load_double, do_store_double):
15 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
17 * sim-main.c (address_translation, prefetch): Delete.
18 (ifetch32, ifetch16): Delete call to AddressTranslation and set
20 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
21 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
22 (LoadMemory, StoreMemory): Delete CCA arg.
24 2015-12-24 Mike Frysinger <vapier@gentoo.org>
26 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
27 * configure: Regenerated.
29 2015-12-24 Mike Frysinger <vapier@gentoo.org>
31 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
34 2015-12-24 Mike Frysinger <vapier@gentoo.org>
36 * tconfig.h (SIM_HANDLES_LMA): Delete.
38 2015-12-24 Mike Frysinger <vapier@gentoo.org>
40 * sim-main.h (WITH_WATCHPOINTS): Delete.
42 2015-12-24 Mike Frysinger <vapier@gentoo.org>
44 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
46 2015-12-24 Mike Frysinger <vapier@gentoo.org>
48 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
50 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
52 * micromips.igen (process_isa_mode): Fix left shift of negative
55 2015-11-17 Mike Frysinger <vapier@gentoo.org>
57 * sim-main.h (WITH_MODULO_MEMORY): Delete.
59 2015-11-15 Mike Frysinger <vapier@gentoo.org>
61 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
63 2015-11-14 Mike Frysinger <vapier@gentoo.org>
65 * interp.c (sim_close): Rename to ...
66 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
68 * sim-main.h (mips_sim_close): Declare.
69 (SIM_CLOSE_HOOK): Define.
71 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
72 Ali Lown <ali.lown@imgtec.com>
74 * Makefile.in (tmp-micromips): New rule.
75 (tmp-mach-multi): Add support for micromips.
76 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
77 that works for both mips64 and micromips64.
78 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
80 Add build support for micromips.
81 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
82 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
83 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
84 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
85 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
86 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
87 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
88 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
89 Refactored instruction code to use these functions.
90 * dsp2.igen: Refactored instruction code to use the new functions.
91 * interp.c (decode_coproc): Refactored to work with any instruction
93 (isa_mode): New variable
94 (RSVD_INSTRUCTION): Changed to 0x00000039.
95 * m16.igen (BREAK16): Refactored instruction to use do_break16.
96 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
97 * micromips.dc: New file.
98 * micromips.igen: New file.
99 * micromips16.dc: New file.
100 * micromipsdsp.igen: New file.
101 * micromipsrun.c: New file.
102 * mips.igen (do_swc1): Changed to work with any instruction encoding.
103 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
104 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
105 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
106 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
107 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
108 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
109 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
110 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
111 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
112 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
113 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
114 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
115 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
116 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
117 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
118 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
119 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
120 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
122 Refactored instruction code to use these functions.
123 (RSVD): Changed to use new reserved instruction.
124 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
125 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
126 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
127 do_store_double): Added micromips32 and micromips64 models.
128 Added include for micromips.igen and micromipsdsp.igen
129 Add micromips32 and micromips64 models.
130 (DecodeCoproc): Updated to use new macro definition.
131 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
132 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
133 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
134 Refactored instruction code to use these functions.
135 * sim-main.h (CP0_operation): New enum.
136 (DecodeCoproc): Updated macro.
137 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
138 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
139 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
140 ISA_MODE_MICROMIPS): New defines.
141 (sim_state): Add isa_mode field.
143 2015-06-23 Mike Frysinger <vapier@gentoo.org>
145 * configure: Regenerate.
147 2015-06-12 Mike Frysinger <vapier@gentoo.org>
149 * configure.ac: Change configure.in to configure.ac.
150 * configure: Regenerate.
152 2015-06-12 Mike Frysinger <vapier@gentoo.org>
154 * configure: Regenerate.
156 2015-06-12 Mike Frysinger <vapier@gentoo.org>
158 * interp.c [TRACE]: Delete.
159 (TRACE): Change to WITH_TRACE_ANY_P.
160 [!WITH_TRACE_ANY_P] (open_trace): Define.
161 (mips_option_handler, open_trace, sim_close, dotrace):
162 Change defined(TRACE) to WITH_TRACE_ANY_P.
163 (sim_open): Delete TRACE ifdef check.
164 * sim-main.c (load_memory): Delete TRACE ifdef check.
165 (store_memory): Likewise.
166 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
167 [!WITH_TRACE_ANY_P] (dotrace): Define.
169 2015-04-18 Mike Frysinger <vapier@gentoo.org>
171 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
174 2015-04-18 Mike Frysinger <vapier@gentoo.org>
176 * sim-main.h (SIM_CPU): Delete.
178 2015-04-18 Mike Frysinger <vapier@gentoo.org>
180 * sim-main.h (sim_cia): Delete.
182 2015-04-17 Mike Frysinger <vapier@gentoo.org>
184 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
186 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
187 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
188 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
189 CIA_SET to CPU_PC_SET.
190 * sim-main.h (CIA_GET, CIA_SET): Delete.
192 2015-04-15 Mike Frysinger <vapier@gentoo.org>
194 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
195 * sim-main.h (STATE_CPU): Delete.
197 2015-04-13 Mike Frysinger <vapier@gentoo.org>
199 * configure: Regenerate.
201 2015-04-13 Mike Frysinger <vapier@gentoo.org>
203 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
204 * interp.c (mips_pc_get, mips_pc_set): New functions.
205 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
206 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
207 (sim_pc_get): Delete.
208 * sim-main.h (SIM_CPU): Define.
209 (struct sim_state): Change cpu to an array of pointers.
212 2015-04-13 Mike Frysinger <vapier@gentoo.org>
214 * interp.c (mips_option_handler, open_trace, sim_close,
215 sim_write, sim_read, sim_store_register, sim_fetch_register,
216 sim_create_inferior, pr_addr, pr_uword64): Convert old style
218 (sim_open): Convert old style prototype. Change casts with
219 sim_write to unsigned char *.
220 (fetch_str): Change null to unsigned char, and change cast to
222 (sim_monitor): Change c & ch to unsigned char. Change cast to
225 2015-04-12 Mike Frysinger <vapier@gentoo.org>
227 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
229 2015-04-06 Mike Frysinger <vapier@gentoo.org>
231 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
233 2015-04-01 Mike Frysinger <vapier@gentoo.org>
235 * tconfig.h (SIM_HAVE_PROFILE): Delete.
237 2015-03-31 Mike Frysinger <vapier@gentoo.org>
239 * config.in, configure: Regenerate.
241 2015-03-24 Mike Frysinger <vapier@gentoo.org>
243 * interp.c (sim_pc_get): New function.
245 2015-03-24 Mike Frysinger <vapier@gentoo.org>
247 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
248 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
250 2015-03-24 Mike Frysinger <vapier@gentoo.org>
252 * configure: Regenerate.
254 2015-03-23 Mike Frysinger <vapier@gentoo.org>
256 * configure: Regenerate.
258 2015-03-23 Mike Frysinger <vapier@gentoo.org>
260 * configure: Regenerate.
261 * configure.ac (mips_extra_objs): Delete.
262 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
263 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
265 2015-03-23 Mike Frysinger <vapier@gentoo.org>
267 * configure: Regenerate.
268 * configure.ac: Delete sim_hw checks for dv-sockser.
270 2015-03-16 Mike Frysinger <vapier@gentoo.org>
272 * config.in, configure: Regenerate.
273 * tconfig.in: Rename file ...
274 * tconfig.h: ... here.
276 2015-03-15 Mike Frysinger <vapier@gentoo.org>
278 * tconfig.in: Delete includes.
279 [HAVE_DV_SOCKSER]: Delete.
281 2015-03-14 Mike Frysinger <vapier@gentoo.org>
283 * Makefile.in (SIM_RUN_OBJS): Delete.
285 2015-03-14 Mike Frysinger <vapier@gentoo.org>
287 * configure.ac (AC_CHECK_HEADERS): Delete.
288 * aclocal.m4, configure: Regenerate.
290 2014-08-19 Alan Modra <amodra@gmail.com>
292 * configure: Regenerate.
294 2014-08-15 Roland McGrath <mcgrathr@google.com>
296 * configure: Regenerate.
297 * config.in: Regenerate.
299 2014-03-04 Mike Frysinger <vapier@gentoo.org>
301 * configure: Regenerate.
303 2013-09-23 Alan Modra <amodra@gmail.com>
305 * configure: Regenerate.
307 2013-06-03 Mike Frysinger <vapier@gentoo.org>
309 * aclocal.m4, configure: Regenerate.
311 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
313 * configure: Rebuild.
315 2013-03-26 Mike Frysinger <vapier@gentoo.org>
317 * configure: Regenerate.
319 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
321 * configure.ac: Address use of dv-sockser.o.
322 * tconfig.in: Conditionalize use of dv_sockser_install.
323 * configure: Regenerated.
324 * config.in: Regenerated.
326 2012-10-04 Chao-ying Fu <fu@mips.com>
327 Steve Ellcey <sellcey@mips.com>
329 * mips/mips3264r2.igen (rdhwr): New.
331 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
333 * configure.ac: Always link against dv-sockser.o.
334 * configure: Regenerate.
336 2012-06-15 Joel Brobecker <brobecker@adacore.com>
338 * config.in, configure: Regenerate.
340 2012-05-18 Nick Clifton <nickc@redhat.com>
343 * interp.c: Include config.h before system header files.
345 2012-03-24 Mike Frysinger <vapier@gentoo.org>
347 * aclocal.m4, config.in, configure: Regenerate.
349 2011-12-03 Mike Frysinger <vapier@gentoo.org>
351 * aclocal.m4: New file.
352 * configure: Regenerate.
354 2011-10-19 Mike Frysinger <vapier@gentoo.org>
356 * configure: Regenerate after common/acinclude.m4 update.
358 2011-10-17 Mike Frysinger <vapier@gentoo.org>
360 * configure.ac: Change include to common/acinclude.m4.
362 2011-10-17 Mike Frysinger <vapier@gentoo.org>
364 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
365 call. Replace common.m4 include with SIM_AC_COMMON.
366 * configure: Regenerate.
368 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
370 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
372 (tmp-mach-multi): Exit early when igen fails.
374 2011-07-05 Mike Frysinger <vapier@gentoo.org>
376 * interp.c (sim_do_command): Delete.
378 2011-02-14 Mike Frysinger <vapier@gentoo.org>
380 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
381 (tx3904sio_fifo_reset): Likewise.
382 * interp.c (sim_monitor): Likewise.
384 2010-04-14 Mike Frysinger <vapier@gentoo.org>
386 * interp.c (sim_write): Add const to buffer arg.
388 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
390 * interp.c: Don't include sysdep.h
392 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
394 * configure: Regenerate.
396 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
398 * config.in: Regenerate.
399 * configure: Likewise.
401 * configure: Regenerate.
403 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
405 * configure: Regenerate to track ../common/common.m4 changes.
408 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
409 Daniel Jacobowitz <dan@codesourcery.com>
410 Joseph Myers <joseph@codesourcery.com>
412 * configure: Regenerate.
414 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
416 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
417 that unconditionally allows fmt_ps.
418 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
419 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
420 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
421 filter from 64,f to 32,f.
422 (PREFX): Change filter from 64 to 32.
423 (LDXC1, LUXC1): Provide separate mips32r2 implementations
424 that use do_load_double instead of do_load. Make both LUXC1
425 versions unpredictable if SizeFGR () != 64.
426 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
427 instead of do_store. Remove unused variable. Make both SUXC1
428 versions unpredictable if SizeFGR () != 64.
430 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
432 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
433 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
434 shifts for that case.
436 2007-09-04 Nick Clifton <nickc@redhat.com>
438 * interp.c (options enum): Add OPTION_INFO_MEMORY.
439 (display_mem_info): New static variable.
440 (mips_option_handler): Handle OPTION_INFO_MEMORY.
441 (mips_options): Add info-memory and memory-info.
442 (sim_open): After processing the command line and board
443 specification, check display_mem_info. If it is set then
444 call the real handler for the --memory-info command line
447 2007-08-24 Joel Brobecker <brobecker@adacore.com>
449 * configure.ac: Change license of multi-run.c to GPL version 3.
450 * configure: Regenerate.
452 2007-06-28 Richard Sandiford <richard@codesourcery.com>
454 * configure.ac, configure: Revert last patch.
456 2007-06-26 Richard Sandiford <richard@codesourcery.com>
458 * configure.ac (sim_mipsisa3264_configs): New variable.
459 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
460 every configuration support all four targets, using the triplet to
461 determine the default.
462 * configure: Regenerate.
464 2007-06-25 Richard Sandiford <richard@codesourcery.com>
466 * Makefile.in (m16run.o): New rule.
468 2007-05-15 Thiemo Seufer <ths@mips.com>
470 * mips3264r2.igen (DSHD): Fix compile warning.
472 2007-05-14 Thiemo Seufer <ths@mips.com>
474 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
475 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
476 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
477 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
480 2007-03-01 Thiemo Seufer <ths@mips.com>
482 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
485 2007-02-20 Thiemo Seufer <ths@mips.com>
487 * dsp.igen: Update copyright notice.
488 * dsp2.igen: Fix copyright notice.
490 2007-02-20 Thiemo Seufer <ths@mips.com>
491 Chao-Ying Fu <fu@mips.com>
493 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
494 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
495 Add dsp2 to sim_igen_machine.
496 * configure: Regenerate.
497 * dsp.igen (do_ph_op): Add MUL support when op = 2.
498 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
499 (mulq_rs.ph): Use do_ph_mulq.
500 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
501 * mips.igen: Add dsp2 model and include dsp2.igen.
502 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
503 for *mips32r2, *mips64r2, *dsp.
504 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
505 for *mips32r2, *mips64r2, *dsp2.
506 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
508 2007-02-19 Thiemo Seufer <ths@mips.com>
509 Nigel Stephens <nigel@mips.com>
511 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
512 jumps with hazard barrier.
514 2007-02-19 Thiemo Seufer <ths@mips.com>
515 Nigel Stephens <nigel@mips.com>
517 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
518 after each call to sim_io_write.
520 2007-02-19 Thiemo Seufer <ths@mips.com>
521 Nigel Stephens <nigel@mips.com>
523 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
524 supported by this simulator.
525 (decode_coproc): Recognise additional CP0 Config registers
528 2007-02-19 Thiemo Seufer <ths@mips.com>
529 Nigel Stephens <nigel@mips.com>
530 David Ung <davidu@mips.com>
532 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
533 uninterpreted formats. If fmt is one of the uninterpreted types
534 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
535 fmt_word, and fmt_uninterpreted_64 like fmt_long.
536 (store_fpr): When writing an invalid odd register, set the
537 matching even register to fmt_unknown, not the following register.
538 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
539 the the memory window at offset 0 set by --memory-size command
541 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
543 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
545 (sim_monitor): When returning the memory size to the MIPS
546 application, use the value in STATE_MEM_SIZE, not an arbitrary
548 (cop_lw): Don' mess around with FPR_STATE, just pass
549 fmt_uninterpreted_32 to StoreFPR.
551 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
553 * mips.igen (not_word_value): Single version for mips32, mips64
556 2007-02-19 Thiemo Seufer <ths@mips.com>
557 Nigel Stephens <nigel@mips.com>
559 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
562 2007-02-17 Thiemo Seufer <ths@mips.com>
564 * configure.ac (mips*-sde-elf*): Move in front of generic machine
566 * configure: Regenerate.
568 2007-02-17 Thiemo Seufer <ths@mips.com>
570 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
571 Add mdmx to sim_igen_machine.
572 (mipsisa64*-*-*): Likewise. Remove dsp.
573 (mipsisa32*-*-*): Remove dsp.
574 * configure: Regenerate.
576 2007-02-13 Thiemo Seufer <ths@mips.com>
578 * configure.ac: Add mips*-sde-elf* target.
579 * configure: Regenerate.
581 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
583 * acconfig.h: Remove.
584 * config.in, configure: Regenerate.
586 2006-11-07 Thiemo Seufer <ths@mips.com>
588 * dsp.igen (do_w_op): Fix compiler warning.
590 2006-08-29 Thiemo Seufer <ths@mips.com>
591 David Ung <davidu@mips.com>
593 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
595 * configure: Regenerate.
596 * mips.igen (model): Add smartmips.
597 (MADDU): Increment ACX if carry.
598 (do_mult): Clear ACX.
599 (ROR,RORV): Add smartmips.
600 (include): Include smartmips.igen.
601 * sim-main.h (ACX): Set to REGISTERS[89].
602 * smartmips.igen: New file.
604 2006-08-29 Thiemo Seufer <ths@mips.com>
605 David Ung <davidu@mips.com>
607 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
608 mips3264r2.igen. Add missing dependency rules.
609 * m16e.igen: Support for mips16e save/restore instructions.
611 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
613 * configure: Regenerated.
615 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
617 * configure: Regenerated.
619 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
621 * configure: Regenerated.
623 2006-05-15 Chao-ying Fu <fu@mips.com>
625 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
627 2006-04-18 Nick Clifton <nickc@redhat.com>
629 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
632 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
634 * configure: Regenerate.
636 2005-12-14 Chao-ying Fu <fu@mips.com>
638 * Makefile.in (SIM_OBJS): Add dsp.o.
639 (dsp.o): New dependency.
640 (IGEN_INCLUDE): Add dsp.igen.
641 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
642 mipsisa64*-*-*): Add dsp to sim_igen_machine.
643 * configure: Regenerate.
644 * mips.igen: Add dsp model and include dsp.igen.
645 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
646 because these instructions are extended in DSP ASE.
647 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
648 adding 6 DSP accumulator registers and 1 DSP control register.
649 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
650 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
651 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
652 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
653 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
654 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
655 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
656 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
657 DSPCR_CCOND_SMASK): New define.
658 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
659 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
661 2005-07-08 Ian Lance Taylor <ian@airs.com>
663 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
665 2005-06-16 David Ung <davidu@mips.com>
666 Nigel Stephens <nigel@mips.com>
668 * mips.igen: New mips16e model and include m16e.igen.
669 (check_u64): Add mips16e tag.
670 * m16e.igen: New file for MIPS16e instructions.
671 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
672 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
674 * configure: Regenerate.
676 2005-05-26 David Ung <davidu@mips.com>
678 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
679 tags to all instructions which are applicable to the new ISAs.
680 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
682 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
684 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
686 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
687 * configure: Regenerate.
689 2005-03-23 Mark Kettenis <kettenis@gnu.org>
691 * configure: Regenerate.
693 2005-01-14 Andrew Cagney <cagney@gnu.org>
695 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
696 explicit call to AC_CONFIG_HEADER.
697 * configure: Regenerate.
699 2005-01-12 Andrew Cagney <cagney@gnu.org>
701 * configure.ac: Update to use ../common/common.m4.
702 * configure: Re-generate.
704 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
706 * configure: Regenerated to track ../common/aclocal.m4 changes.
708 2005-01-07 Andrew Cagney <cagney@gnu.org>
710 * configure.ac: Rename configure.in, require autoconf 2.59.
711 * configure: Re-generate.
713 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
715 * configure: Regenerate for ../common/aclocal.m4 update.
717 2004-09-24 Monika Chaddha <monika@acmet.com>
719 Committed by Andrew Cagney.
720 * m16.igen (CMP, CMPI): Fix assembler.
722 2004-08-18 Chris Demetriou <cgd@broadcom.com>
724 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
725 * configure: Regenerate.
727 2004-06-25 Chris Demetriou <cgd@broadcom.com>
729 * configure.in (sim_m16_machine): Include mipsIII.
730 * configure: Regenerate.
732 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
734 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
736 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
738 2004-04-10 Chris Demetriou <cgd@broadcom.com>
740 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
742 2004-04-09 Chris Demetriou <cgd@broadcom.com>
744 * mips.igen (check_fmt): Remove.
745 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
746 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
747 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
748 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
749 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
750 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
751 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
752 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
753 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
754 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
756 2004-04-09 Chris Demetriou <cgd@broadcom.com>
758 * sb1.igen (check_sbx): New function.
759 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
761 2004-03-29 Chris Demetriou <cgd@broadcom.com>
762 Richard Sandiford <rsandifo@redhat.com>
764 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
765 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
766 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
767 separate implementations for mipsIV and mipsV. Use new macros to
768 determine whether the restrictions apply.
770 2004-01-19 Chris Demetriou <cgd@broadcom.com>
772 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
773 (check_mult_hilo): Improve comments.
774 (check_div_hilo): Likewise. Also, fork off a new version
775 to handle mips32/mips64 (since there are no hazards to check
778 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
780 * mips.igen (do_dmultx): Fix check for negative operands.
782 2003-05-16 Ian Lance Taylor <ian@airs.com>
784 * Makefile.in (SHELL): Make sure this is defined.
785 (various): Use $(SHELL) whenever we invoke move-if-change.
787 2003-05-03 Chris Demetriou <cgd@broadcom.com>
789 * cp1.c: Tweak attribution slightly.
792 * mdmx.igen: Likewise.
793 * mips3d.igen: Likewise.
794 * sb1.igen: Likewise.
796 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
798 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
801 2003-02-27 Andrew Cagney <cagney@redhat.com>
803 * interp.c (sim_open): Rename _bfd to bfd.
804 (sim_create_inferior): Ditto.
806 2003-01-14 Chris Demetriou <cgd@broadcom.com>
808 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
810 2003-01-14 Chris Demetriou <cgd@broadcom.com>
812 * mips.igen (EI, DI): Remove.
814 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
816 * Makefile.in (tmp-run-multi): Fix mips16 filter.
818 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
819 Andrew Cagney <ac131313@redhat.com>
820 Gavin Romig-Koch <gavin@redhat.com>
821 Graydon Hoare <graydon@redhat.com>
822 Aldy Hernandez <aldyh@redhat.com>
823 Dave Brolley <brolley@redhat.com>
824 Chris Demetriou <cgd@broadcom.com>
826 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
827 (sim_mach_default): New variable.
828 (mips64vr-*-*, mips64vrel-*-*): New configurations.
829 Add a new simulator generator, MULTI.
830 * configure: Regenerate.
831 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
832 (multi-run.o): New dependency.
833 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
834 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
835 (tmp-multi): Combine them.
836 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
837 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
838 (distclean-extra): New rule.
839 * sim-main.h: Include bfd.h.
840 (MIPS_MACH): New macro.
841 * mips.igen (vr4120, vr5400, vr5500): New models.
842 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
843 * vr.igen: Replace with new version.
845 2003-01-04 Chris Demetriou <cgd@broadcom.com>
847 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
848 * configure: Regenerate.
850 2002-12-31 Chris Demetriou <cgd@broadcom.com>
852 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
853 * mips.igen: Remove all invocations of check_branch_bug and
856 2002-12-16 Chris Demetriou <cgd@broadcom.com>
858 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
860 2002-07-30 Chris Demetriou <cgd@broadcom.com>
862 * mips.igen (do_load_double, do_store_double): New functions.
863 (LDC1, SDC1): Rename to...
864 (LDC1b, SDC1b): respectively.
865 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
867 2002-07-29 Michael Snyder <msnyder@redhat.com>
869 * cp1.c (fp_recip2): Modify initialization expression so that
870 GCC will recognize it as constant.
872 2002-06-18 Chris Demetriou <cgd@broadcom.com>
874 * mdmx.c (SD_): Delete.
875 (Unpredictable): Re-define, for now, to directly invoke
876 unpredictable_action().
877 (mdmx_acc_op): Fix error in .ob immediate handling.
879 2002-06-18 Andrew Cagney <cagney@redhat.com>
881 * interp.c (sim_firmware_command): Initialize `address'.
883 2002-06-16 Andrew Cagney <ac131313@redhat.com>
885 * configure: Regenerated to track ../common/aclocal.m4 changes.
887 2002-06-14 Chris Demetriou <cgd@broadcom.com>
888 Ed Satterthwaite <ehs@broadcom.com>
890 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
891 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
892 * mips.igen: Include mips3d.igen.
893 (mips3d): New model name for MIPS-3D ASE instructions.
894 (CVT.W.fmt): Don't use this instruction for word (source) format
896 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
897 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
898 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
899 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
900 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
901 (RSquareRoot1, RSquareRoot2): New macros.
902 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
903 (fp_rsqrt2): New functions.
904 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
905 * configure: Regenerate.
907 2002-06-13 Chris Demetriou <cgd@broadcom.com>
908 Ed Satterthwaite <ehs@broadcom.com>
910 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
911 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
912 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
913 (convert): Note that this function is not used for paired-single
915 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
916 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
917 (check_fmt_p): Enable paired-single support.
918 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
919 (PUU.PS): New instructions.
920 (CVT.S.fmt): Don't use this instruction for paired-single format
922 * sim-main.h (FP_formats): New value 'fmt_ps.'
923 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
924 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
926 2002-06-12 Chris Demetriou <cgd@broadcom.com>
928 * mips.igen: Fix formatting of function calls in
931 2002-06-12 Chris Demetriou <cgd@broadcom.com>
933 * mips.igen (MOVN, MOVZ): Trace result.
934 (TNEI): Print "tnei" as the opcode name in traces.
935 (CEIL.W): Add disassembly string for traces.
936 (RSQRT.fmt): Make location of disassembly string consistent
937 with other instructions.
939 2002-06-12 Chris Demetriou <cgd@broadcom.com>
941 * mips.igen (X): Delete unused function.
943 2002-06-08 Andrew Cagney <cagney@redhat.com>
945 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
947 2002-06-07 Chris Demetriou <cgd@broadcom.com>
948 Ed Satterthwaite <ehs@broadcom.com>
950 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
951 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
952 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
953 (fp_nmsub): New prototypes.
954 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
955 (NegMultiplySub): New defines.
956 * mips.igen (RSQRT.fmt): Use RSquareRoot().
957 (MADD.D, MADD.S): Replace with...
958 (MADD.fmt): New instruction.
959 (MSUB.D, MSUB.S): Replace with...
960 (MSUB.fmt): New instruction.
961 (NMADD.D, NMADD.S): Replace with...
962 (NMADD.fmt): New instruction.
963 (NMSUB.D, MSUB.S): Replace with...
964 (NMSUB.fmt): New instruction.
966 2002-06-07 Chris Demetriou <cgd@broadcom.com>
967 Ed Satterthwaite <ehs@broadcom.com>
969 * cp1.c: Fix more comment spelling and formatting.
970 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
971 (denorm_mode): New function.
972 (fpu_unary, fpu_binary): Round results after operation, collect
973 status from rounding operations, and update the FCSR.
974 (convert): Collect status from integer conversions and rounding
975 operations, and update the FCSR. Adjust NaN values that result
976 from conversions. Convert to use sim_io_eprintf rather than
977 fprintf, and remove some debugging code.
978 * cp1.h (fenr_FS): New define.
980 2002-06-07 Chris Demetriou <cgd@broadcom.com>
982 * cp1.c (convert): Remove unusable debugging code, and move MIPS
983 rounding mode to sim FP rounding mode flag conversion code into...
984 (rounding_mode): New function.
986 2002-06-07 Chris Demetriou <cgd@broadcom.com>
988 * cp1.c: Clean up formatting of a few comments.
989 (value_fpr): Reformat switch statement.
991 2002-06-06 Chris Demetriou <cgd@broadcom.com>
992 Ed Satterthwaite <ehs@broadcom.com>
995 * sim-main.h: Include cp1.h.
996 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
997 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
998 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
999 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1000 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1001 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1002 * cp1.c: Don't include sim-fpu.h; already included by
1003 sim-main.h. Clean up formatting of some comments.
1004 (NaN, Equal, Less): Remove.
1005 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1006 (fp_cmp): New functions.
1007 * mips.igen (do_c_cond_fmt): Remove.
1008 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1009 Compare. Add result tracing.
1010 (CxC1): Remove, replace with...
1011 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1012 (DMxC1): Remove, replace with...
1013 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1014 (MxC1): Remove, replace with...
1015 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1017 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1019 * sim-main.h (FGRIDX): Remove, replace all uses with...
1020 (FGR_BASE): New macro.
1021 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1022 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1023 (NR_FGR, FGR): Likewise.
1024 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1025 * mips.igen: Likewise.
1027 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1029 * cp1.c: Add an FSF Copyright notice to this file.
1031 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1032 Ed Satterthwaite <ehs@broadcom.com>
1034 * cp1.c (Infinity): Remove.
1035 * sim-main.h (Infinity): Likewise.
1037 * cp1.c (fp_unary, fp_binary): New functions.
1038 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1039 (fp_sqrt): New functions, implemented in terms of the above.
1040 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1041 (Recip, SquareRoot): Remove (replaced by functions above).
1042 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1043 (fp_recip, fp_sqrt): New prototypes.
1044 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1045 (Recip, SquareRoot): Replace prototypes with #defines which
1046 invoke the functions above.
1048 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1050 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1051 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1052 file, remove PARAMS from prototypes.
1053 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1054 simulator state arguments.
1055 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1056 pass simulator state arguments.
1057 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1058 (store_fpr, convert): Remove 'sd' argument.
1059 (value_fpr): Likewise. Convert to use 'SD' instead.
1061 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1063 * cp1.c (Min, Max): Remove #if 0'd functions.
1064 * sim-main.h (Min, Max): Remove.
1066 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1068 * cp1.c: fix formatting of switch case and default labels.
1069 * interp.c: Likewise.
1070 * sim-main.c: Likewise.
1072 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1074 * cp1.c: Clean up comments which describe FP formats.
1075 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1077 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1078 Ed Satterthwaite <ehs@broadcom.com>
1080 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1081 Broadcom SiByte SB-1 processor configurations.
1082 * configure: Regenerate.
1083 * sb1.igen: New file.
1084 * mips.igen: Include sb1.igen.
1086 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1087 * mdmx.igen: Add "sb1" model to all appropriate functions and
1089 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1090 (ob_func, ob_acc): Reference the above.
1091 (qh_acc): Adjust to keep the same size as ob_acc.
1092 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1093 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1095 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1097 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1099 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1100 Ed Satterthwaite <ehs@broadcom.com>
1102 * mips.igen (mdmx): New (pseudo-)model.
1103 * mdmx.c, mdmx.igen: New files.
1104 * Makefile.in (SIM_OBJS): Add mdmx.o.
1105 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1107 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1108 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1109 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1110 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1111 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1112 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1113 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1114 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1115 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1116 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1117 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1118 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1119 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1120 (qh_fmtsel): New macros.
1121 (_sim_cpu): New member "acc".
1122 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1123 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1125 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1127 * interp.c: Use 'deprecated' rather than 'depreciated.'
1128 * sim-main.h: Likewise.
1130 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1132 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1133 which wouldn't compile anyway.
1134 * sim-main.h (unpredictable_action): New function prototype.
1135 (Unpredictable): Define to call igen function unpredictable().
1136 (NotWordValue): New macro to call igen function not_word_value().
1137 (UndefinedResult): Remove.
1138 * interp.c (undefined_result): Remove.
1139 (unpredictable_action): New function.
1140 * mips.igen (not_word_value, unpredictable): New functions.
1141 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1142 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1143 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1144 NotWordValue() to check for unpredictable inputs, then
1145 Unpredictable() to handle them.
1147 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1149 * mips.igen: Fix formatting of calls to Unpredictable().
1151 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1153 * interp.c (sim_open): Revert previous change.
1155 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1157 * interp.c (sim_open): Disable chunk of code that wrote code in
1158 vector table entries.
1160 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1162 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1163 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1166 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1168 * cp1.c: Fix many formatting issues.
1170 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1172 * cp1.c (fpu_format_name): New function to replace...
1173 (DOFMT): This. Delete, and update all callers.
1174 (fpu_rounding_mode_name): New function to replace...
1175 (RMMODE): This. Delete, and update all callers.
1177 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1179 * interp.c: Move FPU support routines from here to...
1180 * cp1.c: Here. New file.
1181 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1182 (cp1.o): New target.
1184 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1186 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1187 * mips.igen (mips32, mips64): New models, add to all instructions
1188 and functions as appropriate.
1189 (loadstore_ea, check_u64): New variant for model mips64.
1190 (check_fmt_p): New variant for models mipsV and mips64, remove
1191 mipsV model marking fro other variant.
1194 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1195 for mips32 and mips64.
1196 (DCLO, DCLZ): New instructions for mips64.
1198 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1200 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1201 immediate or code as a hex value with the "%#lx" format.
1202 (ANDI): Likewise, and fix printed instruction name.
1204 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1206 * sim-main.h (UndefinedResult, Unpredictable): New macros
1207 which currently do nothing.
1209 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1211 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1212 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1213 (status_CU3): New definitions.
1215 * sim-main.h (ExceptionCause): Add new values for MIPS32
1216 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1217 for DebugBreakPoint and NMIReset to note their status in
1219 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1220 (SignalExceptionCacheErr): New exception macros.
1222 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1224 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1225 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1227 (SignalExceptionCoProcessorUnusable): Take as argument the
1228 unusable coprocessor number.
1230 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1232 * mips.igen: Fix formatting of all SignalException calls.
1234 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1236 * sim-main.h (SIGNEXTEND): Remove.
1238 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1240 * mips.igen: Remove gencode comment from top of file, fix
1241 spelling in another comment.
1243 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1245 * mips.igen (check_fmt, check_fmt_p): New functions to check
1246 whether specific floating point formats are usable.
1247 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1248 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1249 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1250 Use the new functions.
1251 (do_c_cond_fmt): Remove format checks...
1252 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1254 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1256 * mips.igen: Fix formatting of check_fpu calls.
1258 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1260 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1262 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1264 * mips.igen: Remove whitespace at end of lines.
1266 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1268 * mips.igen (loadstore_ea): New function to do effective
1269 address calculations.
1270 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1271 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1272 CACHE): Use loadstore_ea to do effective address computations.
1274 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1276 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1277 * mips.igen (LL, CxC1, MxC1): Likewise.
1279 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1281 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1282 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1283 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1284 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1285 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1286 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1287 Don't split opcode fields by hand, use the opcode field values
1290 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1292 * mips.igen (do_divu): Fix spacing.
1294 * mips.igen (do_dsllv): Move to be right before DSLLV,
1295 to match the rest of the do_<shift> functions.
1297 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1299 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1300 DSRL32, do_dsrlv): Trace inputs and results.
1302 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1304 * mips.igen (CACHE): Provide instruction-printing string.
1306 * interp.c (signal_exception): Comment tokens after #endif.
1308 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1310 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1311 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1312 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1313 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1314 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1315 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1316 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1317 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1319 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1321 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1322 instruction-printing string.
1323 (LWU): Use '64' as the filter flag.
1325 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1327 * mips.igen (SDXC1): Fix instruction-printing string.
1329 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1331 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1332 filter flags "32,f".
1334 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1336 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1339 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1341 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1342 add a comma) so that it more closely match the MIPS ISA
1343 documentation opcode partitioning.
1344 (PREF): Put useful names on opcode fields, and include
1345 instruction-printing string.
1347 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1349 * mips.igen (check_u64): New function which in the future will
1350 check whether 64-bit instructions are usable and signal an
1351 exception if not. Currently a no-op.
1352 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1353 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1354 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1355 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1357 * mips.igen (check_fpu): New function which in the future will
1358 check whether FPU instructions are usable and signal an exception
1359 if not. Currently a no-op.
1360 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1361 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1362 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1363 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1364 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1365 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1366 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1367 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1369 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1371 * mips.igen (do_load_left, do_load_right): Move to be immediately
1373 (do_store_left, do_store_right): Move to be immediately following
1376 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1378 * mips.igen (mipsV): New model name. Also, add it to
1379 all instructions and functions where it is appropriate.
1381 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1383 * mips.igen: For all functions and instructions, list model
1384 names that support that instruction one per line.
1386 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1388 * mips.igen: Add some additional comments about supported
1389 models, and about which instructions go where.
1390 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1391 order as is used in the rest of the file.
1393 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1395 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1396 indicating that ALU32_END or ALU64_END are there to check
1398 (DADD): Likewise, but also remove previous comment about
1401 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1403 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1404 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1405 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1406 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1407 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1408 fields (i.e., add and move commas) so that they more closely
1409 match the MIPS ISA documentation opcode partitioning.
1411 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1413 * mips.igen (ADDI): Print immediate value.
1414 (BREAK): Print code.
1415 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1416 (SLL): Print "nop" specially, and don't run the code
1417 that does the shift for the "nop" case.
1419 2001-11-17 Fred Fish <fnf@redhat.com>
1421 * sim-main.h (float_operation): Move enum declaration outside
1422 of _sim_cpu struct declaration.
1424 2001-04-12 Jim Blandy <jimb@redhat.com>
1426 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1427 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1429 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1430 PENDING_FILL, and you can get the intended effect gracefully by
1431 calling PENDING_SCHED directly.
1433 2001-02-23 Ben Elliston <bje@redhat.com>
1435 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1436 already defined elsewhere.
1438 2001-02-19 Ben Elliston <bje@redhat.com>
1440 * sim-main.h (sim_monitor): Return an int.
1441 * interp.c (sim_monitor): Add return values.
1442 (signal_exception): Handle error conditions from sim_monitor.
1444 2001-02-08 Ben Elliston <bje@redhat.com>
1446 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1447 (store_memory): Likewise, pass cia to sim_core_write*.
1449 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1451 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1452 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1454 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1456 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1457 * Makefile.in: Don't delete *.igen when cleaning directory.
1459 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1461 * m16.igen (break): Call SignalException not sim_engine_halt.
1463 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1465 From Jason Eckhardt:
1466 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1468 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1470 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1472 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1474 * mips.igen (do_dmultx): Fix typo.
1476 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1478 * configure: Regenerated to track ../common/aclocal.m4 changes.
1480 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1482 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1484 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1486 * sim-main.h (GPR_CLEAR): Define macro.
1488 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1490 * interp.c (decode_coproc): Output long using %lx and not %s.
1492 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1494 * interp.c (sim_open): Sort & extend dummy memory regions for
1495 --board=jmr3904 for eCos.
1497 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1499 * configure: Regenerated.
1501 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1503 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1504 calls, conditional on the simulator being in verbose mode.
1506 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1508 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1509 cache don't get ReservedInstruction traps.
1511 1999-11-29 Mark Salter <msalter@cygnus.com>
1513 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1514 to clear status bits in sdisr register. This is how the hardware works.
1516 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1517 being used by cygmon.
1519 1999-11-11 Andrew Haley <aph@cygnus.com>
1521 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1524 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1526 * mips.igen (MULT): Correct previous mis-applied patch.
1528 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1530 * mips.igen (delayslot32): Handle sequence like
1531 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1532 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1533 (MULT): Actually pass the third register...
1535 1999-09-03 Mark Salter <msalter@cygnus.com>
1537 * interp.c (sim_open): Added more memory aliases for additional
1538 hardware being touched by cygmon on jmr3904 board.
1540 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1542 * configure: Regenerated to track ../common/aclocal.m4 changes.
1544 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1546 * interp.c (sim_store_register): Handle case where client - GDB -
1547 specifies that a 4 byte register is 8 bytes in size.
1548 (sim_fetch_register): Ditto.
1550 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1552 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1553 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1554 (idt_monitor_base): Base address for IDT monitor traps.
1555 (pmon_monitor_base): Ditto for PMON.
1556 (lsipmon_monitor_base): Ditto for LSI PMON.
1557 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1558 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1559 (sim_firmware_command): New function.
1560 (mips_option_handler): Call it for OPTION_FIRMWARE.
1561 (sim_open): Allocate memory for idt_monitor region. If "--board"
1562 option was given, add no monitor by default. Add BREAK hooks only if
1563 monitors are also there.
1565 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1567 * interp.c (sim_monitor): Flush output before reading input.
1569 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1571 * tconfig.in (SIM_HANDLES_LMA): Always define.
1573 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1575 From Mark Salter <msalter@cygnus.com>:
1576 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1577 (sim_open): Add setup for BSP board.
1579 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1581 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1582 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1583 them as unimplemented.
1585 1999-05-08 Felix Lee <flee@cygnus.com>
1587 * configure: Regenerated to track ../common/aclocal.m4 changes.
1589 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1591 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1593 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1595 * configure.in: Any mips64vr5*-*-* target should have
1596 -DTARGET_ENABLE_FR=1.
1597 (default_endian): Any mips64vr*el-*-* target should default to
1599 * configure: Re-generate.
1601 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1603 * mips.igen (ldl): Extend from _16_, not 32.
1605 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1607 * interp.c (sim_store_register): Force registers written to by GDB
1608 into an un-interpreted state.
1610 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1612 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1613 CPU, start periodic background I/O polls.
1614 (tx3904sio_poll): New function: periodic I/O poller.
1616 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1618 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1620 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1622 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1625 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1627 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1628 (load_word): Call SIM_CORE_SIGNAL hook on error.
1629 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1630 starting. For exception dispatching, pass PC instead of NULL_CIA.
1631 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1632 * sim-main.h (COP0_BADVADDR): Define.
1633 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1634 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1635 (_sim_cpu): Add exc_* fields to store register value snapshots.
1636 * mips.igen (*): Replace memory-related SignalException* calls
1637 with references to SIM_CORE_SIGNAL hook.
1639 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1641 * sim-main.c (*): Minor warning cleanups.
1643 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1645 * m16.igen (DADDIU5): Correct type-o.
1647 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1649 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1652 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1654 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1656 (interp.o): Add dependency on itable.h
1657 (oengine.c, gencode): Delete remaining references.
1658 (BUILT_SRC_FROM_GEN): Clean up.
1660 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1663 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1664 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1665 tmp-run-hack) : New.
1666 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1667 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1668 Drop the "64" qualifier to get the HACK generator working.
1669 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1670 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1671 qualifier to get the hack generator working.
1672 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1673 (DSLL): Use do_dsll.
1674 (DSLLV): Use do_dsllv.
1675 (DSRA): Use do_dsra.
1676 (DSRL): Use do_dsrl.
1677 (DSRLV): Use do_dsrlv.
1678 (BC1): Move *vr4100 to get the HACK generator working.
1679 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1680 get the HACK generator working.
1681 (MACC) Rename to get the HACK generator working.
1682 (DMACC,MACCS,DMACCS): Add the 64.
1684 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1686 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1687 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1689 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1691 * mips/interp.c (DEBUG): Cleanups.
1693 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1695 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1696 (tx3904sio_tickle): fflush after a stdout character output.
1698 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1700 * interp.c (sim_close): Uninstall modules.
1702 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1704 * sim-main.h, interp.c (sim_monitor): Change to global
1707 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1709 * configure.in (vr4100): Only include vr4100 instructions in
1711 * configure: Re-generate.
1712 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1714 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1716 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1717 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1720 * configure.in (sim_default_gen, sim_use_gen): Replace with
1722 (--enable-sim-igen): Delete config option. Always using IGEN.
1723 * configure: Re-generate.
1725 * Makefile.in (gencode): Kill, kill, kill.
1728 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1730 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1731 bit mips16 igen simulator.
1732 * configure: Re-generate.
1734 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1735 as part of vr4100 ISA.
1736 * vr.igen: Mark all instructions as 64 bit only.
1738 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1740 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1743 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1745 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1746 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1747 * configure: Re-generate.
1749 * m16.igen (BREAK): Define breakpoint instruction.
1750 (JALX32): Mark instruction as mips16 and not r3900.
1751 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1753 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1755 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1757 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1758 insn as a debug breakpoint.
1760 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1762 (PENDING_SCHED): Clean up trace statement.
1763 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1764 (PENDING_FILL): Delay write by only one cycle.
1765 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1767 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1769 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1771 (pending_tick): Move incrementing of index to FOR statement.
1772 (pending_tick): Only update PENDING_OUT after a write has occured.
1774 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1776 * configure: Re-generate.
1778 * interp.c (sim_engine_run OLD): Delete explicit call to
1779 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1781 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1783 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1784 interrupt level number to match changed SignalExceptionInterrupt
1787 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1789 * interp.c: #include "itable.h" if WITH_IGEN.
1790 (get_insn_name): New function.
1791 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1792 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1794 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1796 * configure: Rebuilt to inhale new common/aclocal.m4.
1798 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1800 * dv-tx3904sio.c: Include sim-assert.h.
1802 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1804 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1805 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1806 Reorganize target-specific sim-hardware checks.
1807 * configure: rebuilt.
1808 * interp.c (sim_open): For tx39 target boards, set
1809 OPERATING_ENVIRONMENT, add tx3904sio devices.
1810 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1811 ROM executables. Install dv-sockser into sim-modules list.
1813 * dv-tx3904irc.c: Compiler warning clean-up.
1814 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1815 frequent hw-trace messages.
1817 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1819 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1821 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1823 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1825 * vr.igen: New file.
1826 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1827 * mips.igen: Define vr4100 model. Include vr.igen.
1828 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1830 * mips.igen (check_mf_hilo): Correct check.
1832 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1834 * sim-main.h (interrupt_event): Add prototype.
1836 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1837 register_ptr, register_value.
1838 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1840 * sim-main.h (tracefh): Make extern.
1842 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1844 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1845 Reduce unnecessarily high timer event frequency.
1846 * dv-tx3904cpu.c: Ditto for interrupt event.
1848 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1850 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1852 (interrupt_event): Made non-static.
1854 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1855 interchange of configuration values for external vs. internal
1858 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1860 * mips.igen (BREAK): Moved code to here for
1861 simulator-reserved break instructions.
1862 * gencode.c (build_instruction): Ditto.
1863 * interp.c (signal_exception): Code moved from here. Non-
1864 reserved instructions now use exception vector, rather
1866 * sim-main.h: Moved magic constants to here.
1868 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1870 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1871 register upon non-zero interrupt event level, clear upon zero
1873 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1874 by passing zero event value.
1875 (*_io_{read,write}_buffer): Endianness fixes.
1876 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1877 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1879 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1880 serial I/O and timer module at base address 0xFFFF0000.
1882 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1884 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1887 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1889 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1891 * configure: Update.
1893 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1895 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1896 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1897 * configure.in: Include tx3904tmr in hw_device list.
1898 * configure: Rebuilt.
1899 * interp.c (sim_open): Instantiate three timer instances.
1900 Fix address typo of tx3904irc instance.
1902 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1904 * interp.c (signal_exception): SystemCall exception now uses
1905 the exception vector.
1907 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1909 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1912 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1914 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1916 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1918 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1920 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1921 sim-main.h. Declare a struct hw_descriptor instead of struct
1922 hw_device_descriptor.
1924 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1926 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1927 right bits and then re-align left hand bytes to correct byte
1928 lanes. Fix incorrect computation in do_store_left when loading
1929 bytes from second word.
1931 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1934 * interp.c (sim_open): Only create a device tree when HW is
1937 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1938 * interp.c (signal_exception): Ditto.
1940 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1942 * gencode.c: Mark BEGEZALL as LIKELY.
1944 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1947 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1949 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1951 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1952 modules. Recognize TX39 target with "mips*tx39" pattern.
1953 * configure: Rebuilt.
1954 * sim-main.h (*): Added many macros defining bits in
1955 TX39 control registers.
1956 (SignalInterrupt): Send actual PC instead of NULL.
1957 (SignalNMIReset): New exception type.
1958 * interp.c (board): New variable for future use to identify
1959 a particular board being simulated.
1960 (mips_option_handler,mips_options): Added "--board" option.
1961 (interrupt_event): Send actual PC.
1962 (sim_open): Make memory layout conditional on board setting.
1963 (signal_exception): Initial implementation of hardware interrupt
1964 handling. Accept another break instruction variant for simulator
1966 (decode_coproc): Implement RFE instruction for TX39.
1967 (mips.igen): Decode RFE instruction as such.
1968 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1969 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1970 bbegin to implement memory map.
1971 * dv-tx3904cpu.c: New file.
1972 * dv-tx3904irc.c: New file.
1974 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1976 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1978 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1980 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1981 with calls to check_div_hilo.
1983 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1985 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1986 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1987 Add special r3900 version of do_mult_hilo.
1988 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1989 with calls to check_mult_hilo.
1990 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1991 with calls to check_div_hilo.
1993 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1995 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1996 Document a replacement.
1998 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2000 * interp.c (sim_monitor): Make mon_printf work.
2002 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2004 * sim-main.h (INSN_NAME): New arg `cpu'.
2006 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2008 * configure: Regenerated to track ../common/aclocal.m4 changes.
2010 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2012 * configure: Regenerated to track ../common/aclocal.m4 changes.
2015 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2017 * acconfig.h: New file.
2018 * configure.in: Reverted change of Apr 24; use sinclude again.
2020 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2022 * configure: Regenerated to track ../common/aclocal.m4 changes.
2025 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2027 * configure.in: Don't call sinclude.
2029 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2031 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2033 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2035 * mips.igen (ERET): Implement.
2037 * interp.c (decode_coproc): Return sign-extended EPC.
2039 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2041 * interp.c (signal_exception): Do not ignore Trap.
2042 (signal_exception): On TRAP, restart at exception address.
2043 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2044 (signal_exception): Update.
2045 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2046 so that TRAP instructions are caught.
2048 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2050 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2051 contains HI/LO access history.
2052 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2053 (HIACCESS, LOACCESS): Delete, replace with
2054 (HIHISTORY, LOHISTORY): New macros.
2055 (CHECKHILO): Delete all, moved to mips.igen
2057 * gencode.c (build_instruction): Do not generate checks for
2058 correct HI/LO register usage.
2060 * interp.c (old_engine_run): Delete checks for correct HI/LO
2063 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2064 check_mf_cycles): New functions.
2065 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2066 do_divu, domultx, do_mult, do_multu): Use.
2068 * tx.igen ("madd", "maddu"): Use.
2070 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2072 * mips.igen (DSRAV): Use function do_dsrav.
2073 (SRAV): Use new function do_srav.
2075 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2076 (B): Sign extend 11 bit immediate.
2077 (EXT-B*): Shift 16 bit immediate left by 1.
2078 (ADDIU*): Don't sign extend immediate value.
2080 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2082 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2084 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2087 * mips.igen (delayslot32, nullify_next_insn): New functions.
2088 (m16.igen): Always include.
2089 (do_*): Add more tracing.
2091 * m16.igen (delayslot16): Add NIA argument, could be called by a
2092 32 bit MIPS16 instruction.
2094 * interp.c (ifetch16): Move function from here.
2095 * sim-main.c (ifetch16): To here.
2097 * sim-main.c (ifetch16, ifetch32): Update to match current
2098 implementations of LH, LW.
2099 (signal_exception): Don't print out incorrect hex value of illegal
2102 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2104 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2107 * m16.igen: Implement MIPS16 instructions.
2109 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2110 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2111 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2112 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2113 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2114 bodies of corresponding code from 32 bit insn to these. Also used
2115 by MIPS16 versions of functions.
2117 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2118 (IMEM16): Drop NR argument from macro.
2120 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2122 * Makefile.in (SIM_OBJS): Add sim-main.o.
2124 * sim-main.h (address_translation, load_memory, store_memory,
2125 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2127 (pr_addr, pr_uword64): Declare.
2128 (sim-main.c): Include when H_REVEALS_MODULE_P.
2130 * interp.c (address_translation, load_memory, store_memory,
2131 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2133 * sim-main.c: To here. Fix compilation problems.
2135 * configure.in: Enable inlining.
2136 * configure: Re-config.
2138 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2140 * configure: Regenerated to track ../common/aclocal.m4 changes.
2142 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2144 * mips.igen: Include tx.igen.
2145 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2146 * tx.igen: New file, contains MADD and MADDU.
2148 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2149 the hardwired constant `7'.
2150 (store_memory): Ditto.
2151 (LOADDRMASK): Move definition to sim-main.h.
2153 mips.igen (MTC0): Enable for r3900.
2156 mips.igen (do_load_byte): Delete.
2157 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2158 do_store_right): New functions.
2159 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2161 configure.in: Let the tx39 use igen again.
2164 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2166 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2167 not an address sized quantity. Return zero for cache sizes.
2169 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2171 * mips.igen (r3900): r3900 does not support 64 bit integer
2174 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2176 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2178 * configure : Rebuild.
2180 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2182 * configure: Regenerated to track ../common/aclocal.m4 changes.
2184 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2186 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2188 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2190 * configure: Regenerated to track ../common/aclocal.m4 changes.
2191 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2193 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2195 * configure: Regenerated to track ../common/aclocal.m4 changes.
2197 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2199 * interp.c (Max, Min): Comment out functions. Not yet used.
2201 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2203 * configure: Regenerated to track ../common/aclocal.m4 changes.
2205 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2207 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2208 configurable settings for stand-alone simulator.
2210 * configure.in: Added X11 search, just in case.
2212 * configure: Regenerated.
2214 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2216 * interp.c (sim_write, sim_read, load_memory, store_memory):
2217 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2219 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2221 * sim-main.h (GETFCC): Return an unsigned value.
2223 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2225 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2226 (DADD): Result destination is RD not RT.
2228 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2230 * sim-main.h (HIACCESS, LOACCESS): Always define.
2232 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2234 * interp.c (sim_info): Delete.
2236 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2238 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2239 (mips_option_handler): New argument `cpu'.
2240 (sim_open): Update call to sim_add_option_table.
2242 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2244 * mips.igen (CxC1): Add tracing.
2246 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2248 * sim-main.h (Max, Min): Declare.
2250 * interp.c (Max, Min): New functions.
2252 * mips.igen (BC1): Add tracing.
2254 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2256 * interp.c Added memory map for stack in vr4100
2258 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2260 * interp.c (load_memory): Add missing "break"'s.
2262 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2264 * interp.c (sim_store_register, sim_fetch_register): Pass in
2265 length parameter. Return -1.
2267 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2269 * interp.c: Added hardware init hook, fixed warnings.
2271 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2273 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2275 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2277 * interp.c (ifetch16): New function.
2279 * sim-main.h (IMEM32): Rename IMEM.
2280 (IMEM16_IMMED): Define.
2282 (DELAY_SLOT): Update.
2284 * m16run.c (sim_engine_run): New file.
2286 * m16.igen: All instructions except LB.
2287 (LB): Call do_load_byte.
2288 * mips.igen (do_load_byte): New function.
2289 (LB): Call do_load_byte.
2291 * mips.igen: Move spec for insn bit size and high bit from here.
2292 * Makefile.in (tmp-igen, tmp-m16): To here.
2294 * m16.dc: New file, decode mips16 instructions.
2296 * Makefile.in (SIM_NO_ALL): Define.
2297 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2299 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2301 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2302 point unit to 32 bit registers.
2303 * configure: Re-generate.
2305 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2307 * configure.in (sim_use_gen): Make IGEN the default simulator
2308 generator for generic 32 and 64 bit mips targets.
2309 * configure: Re-generate.
2311 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2313 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2316 * interp.c (sim_fetch_register, sim_store_register): Read/write
2317 FGR from correct location.
2318 (sim_open): Set size of FGR's according to
2319 WITH_TARGET_FLOATING_POINT_BITSIZE.
2321 * sim-main.h (FGR): Store floating point registers in a separate
2324 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2326 * configure: Regenerated to track ../common/aclocal.m4 changes.
2328 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2330 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2332 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2334 * interp.c (pending_tick): New function. Deliver pending writes.
2336 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2337 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2338 it can handle mixed sized quantites and single bits.
2340 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2342 * interp.c (oengine.h): Do not include when building with IGEN.
2343 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2344 (sim_info): Ditto for PROCESSOR_64BIT.
2345 (sim_monitor): Replace ut_reg with unsigned_word.
2346 (*): Ditto for t_reg.
2347 (LOADDRMASK): Define.
2348 (sim_open): Remove defunct check that host FP is IEEE compliant,
2349 using software to emulate floating point.
2350 (value_fpr, ...): Always compile, was conditional on HASFPU.
2352 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2354 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2357 * interp.c (SD, CPU): Define.
2358 (mips_option_handler): Set flags in each CPU.
2359 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2360 (sim_close): Do not clear STATE, deleted anyway.
2361 (sim_write, sim_read): Assume CPU zero's vm should be used for
2363 (sim_create_inferior): Set the PC for all processors.
2364 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2366 (mips16_entry): Pass correct nr of args to store_word, load_word.
2367 (ColdReset): Cold reset all cpu's.
2368 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2369 (sim_monitor, load_memory, store_memory, signal_exception): Use
2370 `CPU' instead of STATE_CPU.
2373 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2376 * sim-main.h (signal_exception): Add sim_cpu arg.
2377 (SignalException*): Pass both SD and CPU to signal_exception.
2378 * interp.c (signal_exception): Update.
2380 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2382 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2383 address_translation): Ditto
2384 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2386 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2388 * configure: Regenerated to track ../common/aclocal.m4 changes.
2390 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2392 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2394 * mips.igen (model): Map processor names onto BFD name.
2396 * sim-main.h (CPU_CIA): Delete.
2397 (SET_CIA, GET_CIA): Define
2399 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2401 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2404 * configure.in (default_endian): Configure a big-endian simulator
2406 * configure: Re-generate.
2408 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2410 * configure: Regenerated to track ../common/aclocal.m4 changes.
2412 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2414 * interp.c (sim_monitor): Handle Densan monitor outbyte
2415 and inbyte functions.
2417 1997-12-29 Felix Lee <flee@cygnus.com>
2419 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2421 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2423 * Makefile.in (tmp-igen): Arrange for $zero to always be
2424 reset to zero after every instruction.
2426 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2428 * configure: Regenerated to track ../common/aclocal.m4 changes.
2431 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2433 * mips.igen (MSUB): Fix to work like MADD.
2434 * gencode.c (MSUB): Similarly.
2436 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2438 * configure: Regenerated to track ../common/aclocal.m4 changes.
2440 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2442 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2444 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2446 * sim-main.h (sim-fpu.h): Include.
2448 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2449 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2450 using host independant sim_fpu module.
2452 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2454 * interp.c (signal_exception): Report internal errors with SIGABRT
2457 * sim-main.h (C0_CONFIG): New register.
2458 (signal.h): No longer include.
2460 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2462 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2464 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2466 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2468 * mips.igen: Tag vr5000 instructions.
2469 (ANDI): Was missing mipsIV model, fix assembler syntax.
2470 (do_c_cond_fmt): New function.
2471 (C.cond.fmt): Handle mips I-III which do not support CC field
2473 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2474 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2476 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2477 vr5000 which saves LO in a GPR separatly.
2479 * configure.in (enable-sim-igen): For vr5000, select vr5000
2480 specific instructions.
2481 * configure: Re-generate.
2483 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2485 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2487 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2488 fmt_uninterpreted_64 bit cases to switch. Convert to
2491 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2493 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2494 as specified in IV3.2 spec.
2495 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2497 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2499 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2500 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2501 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2502 PENDING_FILL versions of instructions. Simplify.
2504 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2506 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2508 (MTHI, MFHI): Disable code checking HI-LO.
2510 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2512 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2514 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2516 * gencode.c (build_mips16_operands): Replace IPC with cia.
2518 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2519 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2521 (UndefinedResult): Replace function with macro/function
2523 (sim_engine_run): Don't save PC in IPC.
2525 * sim-main.h (IPC): Delete.
2528 * interp.c (signal_exception, store_word, load_word,
2529 address_translation, load_memory, store_memory, cache_op,
2530 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2531 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2532 current instruction address - cia - argument.
2533 (sim_read, sim_write): Call address_translation directly.
2534 (sim_engine_run): Rename variable vaddr to cia.
2535 (signal_exception): Pass cia to sim_monitor
2537 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2538 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2539 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2541 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2542 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2545 * interp.c (signal_exception): Pass restart address to
2548 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2549 idecode.o): Add dependency.
2551 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2553 (DELAY_SLOT): Update NIA not PC with branch address.
2554 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2556 * mips.igen: Use CIA not PC in branch calculations.
2557 (illegal): Call SignalException.
2558 (BEQ, ADDIU): Fix assembler.
2560 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2562 * m16.igen (JALX): Was missing.
2564 * configure.in (enable-sim-igen): New configuration option.
2565 * configure: Re-generate.
2567 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2569 * interp.c (load_memory, store_memory): Delete parameter RAW.
2570 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2571 bypassing {load,store}_memory.
2573 * sim-main.h (ByteSwapMem): Delete definition.
2575 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2577 * interp.c (sim_do_command, sim_commands): Delete mips specific
2578 commands. Handled by module sim-options.
2580 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2581 (WITH_MODULO_MEMORY): Define.
2583 * interp.c (sim_info): Delete code printing memory size.
2585 * interp.c (mips_size): Nee sim_size, delete function.
2587 (monitor, monitor_base, monitor_size): Delete global variables.
2588 (sim_open, sim_close): Delete code creating monitor and other
2589 memory regions. Use sim-memopts module, via sim_do_commandf, to
2590 manage memory regions.
2591 (load_memory, store_memory): Use sim-core for memory model.
2593 * interp.c (address_translation): Delete all memory map code
2594 except line forcing 32 bit addresses.
2596 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2598 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2601 * interp.c (logfh, logfile): Delete globals.
2602 (sim_open, sim_close): Delete code opening & closing log file.
2603 (mips_option_handler): Delete -l and -n options.
2604 (OPTION mips_options): Ditto.
2606 * interp.c (OPTION mips_options): Rename option trace to dinero.
2607 (mips_option_handler): Update.
2609 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2611 * interp.c (fetch_str): New function.
2612 (sim_monitor): Rewrite using sim_read & sim_write.
2613 (sim_open): Check magic number.
2614 (sim_open): Write monitor vectors into memory using sim_write.
2615 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2616 (sim_read, sim_write): Simplify - transfer data one byte at a
2618 (load_memory, store_memory): Clarify meaning of parameter RAW.
2620 * sim-main.h (isHOST): Defete definition.
2621 (isTARGET): Mark as depreciated.
2622 (address_translation): Delete parameter HOST.
2624 * interp.c (address_translation): Delete parameter HOST.
2626 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2630 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2631 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2633 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2635 * mips.igen: Add model filter field to records.
2637 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2639 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2641 interp.c (sim_engine_run): Do not compile function sim_engine_run
2642 when WITH_IGEN == 1.
2644 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2645 target architecture.
2647 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2648 igen. Replace with configuration variables sim_igen_flags /
2651 * m16.igen: New file. Copy mips16 insns here.
2652 * mips.igen: From here.
2654 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2656 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2658 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2660 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2662 * gencode.c (build_instruction): Follow sim_write's lead in using
2663 BigEndianMem instead of !ByteSwapMem.
2665 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2667 * configure.in (sim_gen): Dependent on target, select type of
2668 generator. Always select old style generator.
2670 configure: Re-generate.
2672 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2674 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2675 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2676 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2677 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2678 SIM_@sim_gen@_*, set by autoconf.
2680 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2682 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2684 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2685 CURRENT_FLOATING_POINT instead.
2687 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2688 (address_translation): Raise exception InstructionFetch when
2689 translation fails and isINSTRUCTION.
2691 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2692 sim_engine_run): Change type of of vaddr and paddr to
2694 (address_translation, prefetch, load_memory, store_memory,
2695 cache_op): Change type of vAddr and pAddr to address_word.
2697 * gencode.c (build_instruction): Change type of vaddr and paddr to
2700 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2702 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2703 macro to obtain result of ALU op.
2705 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2707 * interp.c (sim_info): Call profile_print.
2709 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2711 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2713 * sim-main.h (WITH_PROFILE): Do not define, defined in
2714 common/sim-config.h. Use sim-profile module.
2715 (simPROFILE): Delete defintion.
2717 * interp.c (PROFILE): Delete definition.
2718 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2719 (sim_close): Delete code writing profile histogram.
2720 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2722 (sim_engine_run): Delete code profiling the PC.
2724 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2728 * interp.c (sim_monitor): Make register pointers of type
2731 * sim-main.h: Make registers of type unsigned_word not
2734 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2736 * interp.c (sync_operation): Rename from SyncOperation, make
2737 global, add SD argument.
2738 (prefetch): Rename from Prefetch, make global, add SD argument.
2739 (decode_coproc): Make global.
2741 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2743 * gencode.c (build_instruction): Generate DecodeCoproc not
2744 decode_coproc calls.
2746 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2747 (SizeFGR): Move to sim-main.h
2748 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2749 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2750 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2752 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2753 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2754 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2755 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2756 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2757 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2759 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2761 (sim-alu.h): Include.
2762 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2763 (sim_cia): Typedef to instruction_address.
2765 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2767 * Makefile.in (interp.o): Rename generated file engine.c to
2772 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2774 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2776 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2778 * gencode.c (build_instruction): For "FPSQRT", output correct
2779 number of arguments to Recip.
2781 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2783 * Makefile.in (interp.o): Depends on sim-main.h
2785 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2787 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2788 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2789 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2790 STATE, DSSTATE): Define
2791 (GPR, FGRIDX, ..): Define.
2793 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2794 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2795 (GPR, FGRIDX, ...): Delete macros.
2797 * interp.c: Update names to match defines from sim-main.h
2799 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2801 * interp.c (sim_monitor): Add SD argument.
2802 (sim_warning): Delete. Replace calls with calls to
2804 (sim_error): Delete. Replace calls with sim_io_error.
2805 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2806 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2807 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2809 (mips_size): Rename from sim_size. Add SD argument.
2811 * interp.c (simulator): Delete global variable.
2812 (callback): Delete global variable.
2813 (mips_option_handler, sim_open, sim_write, sim_read,
2814 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2815 sim_size,sim_monitor): Use sim_io_* not callback->*.
2816 (sim_open): ZALLOC simulator struct.
2817 (PROFILE): Do not define.
2819 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2821 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2822 support.h with corresponding code.
2824 * sim-main.h (word64, uword64), support.h: Move definition to
2826 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2829 * Makefile.in: Update dependencies
2830 * interp.c: Do not include.
2832 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2834 * interp.c (address_translation, load_memory, store_memory,
2835 cache_op): Rename to from AddressTranslation et.al., make global,
2838 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2841 * interp.c (SignalException): Rename to signal_exception, make
2844 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2846 * sim-main.h (SignalException, SignalExceptionInterrupt,
2847 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2848 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2849 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2852 * interp.c, support.h: Use.
2854 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2856 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2857 to value_fpr / store_fpr. Add SD argument.
2858 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2859 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2861 * sim-main.h (ValueFPR, StoreFPR): Define.
2863 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2865 * interp.c (sim_engine_run): Check consistency between configure
2866 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2869 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2870 (mips_fpu): Configure WITH_FLOATING_POINT.
2871 (mips_endian): Configure WITH_TARGET_ENDIAN.
2872 * configure: Update.
2874 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2876 * configure: Regenerated to track ../common/aclocal.m4 changes.
2878 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2880 * configure: Regenerated.
2882 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2884 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2886 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2888 * gencode.c (print_igen_insn_models): Assume certain architectures
2889 include all mips* instructions.
2890 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2893 * Makefile.in (tmp.igen): Add target. Generate igen input from
2896 * gencode.c (FEATURE_IGEN): Define.
2897 (main): Add --igen option. Generate output in igen format.
2898 (process_instructions): Format output according to igen option.
2899 (print_igen_insn_format): New function.
2900 (print_igen_insn_models): New function.
2901 (process_instructions): Only issue warnings and ignore
2902 instructions when no FEATURE_IGEN.
2904 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2906 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2909 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2911 * configure: Regenerated to track ../common/aclocal.m4 changes.
2913 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2915 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2916 SIM_RESERVED_BITS): Delete, moved to common.
2917 (SIM_EXTRA_CFLAGS): Update.
2919 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2921 * configure.in: Configure non-strict memory alignment.
2922 * configure: Regenerated to track ../common/aclocal.m4 changes.
2924 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2926 * configure: Regenerated to track ../common/aclocal.m4 changes.
2928 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2930 * gencode.c (SDBBP,DERET): Added (3900) insns.
2931 (RFE): Turn on for 3900.
2932 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2933 (dsstate): Made global.
2934 (SUBTARGET_R3900): Added.
2935 (CANCELDELAYSLOT): New.
2936 (SignalException): Ignore SystemCall rather than ignore and
2937 terminate. Add DebugBreakPoint handling.
2938 (decode_coproc): New insns RFE, DERET; and new registers Debug
2939 and DEPC protected by SUBTARGET_R3900.
2940 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2942 * Makefile.in,configure.in: Add mips subtarget option.
2943 * configure: Update.
2945 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2947 * gencode.c: Add r3900 (tx39).
2950 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2952 * gencode.c (build_instruction): Don't need to subtract 4 for
2955 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2957 * interp.c: Correct some HASFPU problems.
2959 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2961 * configure: Regenerated to track ../common/aclocal.m4 changes.
2963 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2965 * interp.c (mips_options): Fix samples option short form, should
2968 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2970 * interp.c (sim_info): Enable info code. Was just returning.
2972 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2974 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2977 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2979 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2981 (build_instruction): Ditto for LL.
2983 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2985 * configure: Regenerated to track ../common/aclocal.m4 changes.
2987 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2989 * configure: Regenerated to track ../common/aclocal.m4 changes.
2992 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2994 * interp.c (sim_open): Add call to sim_analyze_program, update
2997 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2999 * interp.c (sim_kill): Delete.
3000 (sim_create_inferior): Add ABFD argument. Set PC from same.
3001 (sim_load): Move code initializing trap handlers from here.
3002 (sim_open): To here.
3003 (sim_load): Delete, use sim-hload.c.
3005 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3007 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3009 * configure: Regenerated to track ../common/aclocal.m4 changes.
3012 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3014 * interp.c (sim_open): Add ABFD argument.
3015 (sim_load): Move call to sim_config from here.
3016 (sim_open): To here. Check return status.
3018 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3020 * gencode.c (build_instruction): Two arg MADD should
3021 not assign result to $0.
3023 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3025 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3026 * sim/mips/configure.in: Regenerate.
3028 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3030 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3031 signed8, unsigned8 et.al. types.
3033 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3034 hosts when selecting subreg.
3036 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3038 * interp.c (sim_engine_run): Reset the ZERO register to zero
3039 regardless of FEATURE_WARN_ZERO.
3040 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3042 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3044 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3045 (SignalException): For BreakPoints ignore any mode bits and just
3047 (SignalException): Always set the CAUSE register.
3049 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3051 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3052 exception has been taken.
3054 * interp.c: Implement the ERET and mt/f sr instructions.
3056 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3058 * interp.c (SignalException): Don't bother restarting an
3061 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3063 * interp.c (SignalException): Really take an interrupt.
3064 (interrupt_event): Only deliver interrupts when enabled.
3066 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3068 * interp.c (sim_info): Only print info when verbose.
3069 (sim_info) Use sim_io_printf for output.
3071 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3073 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3076 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3078 * interp.c (sim_do_command): Check for common commands if a
3079 simulator specific command fails.
3081 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3083 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3084 and simBE when DEBUG is defined.
3086 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3088 * interp.c (interrupt_event): New function. Pass exception event
3089 onto exception handler.
3091 * configure.in: Check for stdlib.h.
3092 * configure: Regenerate.
3094 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3095 variable declaration.
3096 (build_instruction): Initialize memval1.
3097 (build_instruction): Add UNUSED attribute to byte, bigend,
3099 (build_operands): Ditto.
3101 * interp.c: Fix GCC warnings.
3102 (sim_get_quit_code): Delete.
3104 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3105 * Makefile.in: Ditto.
3106 * configure: Re-generate.
3108 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3110 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3112 * interp.c (mips_option_handler): New function parse argumes using
3114 (myname): Replace with STATE_MY_NAME.
3115 (sim_open): Delete check for host endianness - performed by
3117 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3118 (sim_open): Move much of the initialization from here.
3119 (sim_load): To here. After the image has been loaded and
3121 (sim_open): Move ColdReset from here.
3122 (sim_create_inferior): To here.
3123 (sim_open): Make FP check less dependant on host endianness.
3125 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3127 * interp.c (sim_set_callbacks): Delete.
3129 * interp.c (membank, membank_base, membank_size): Replace with
3130 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3131 (sim_open): Remove call to callback->init. gdb/run do this.
3135 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3137 * interp.c (big_endian_p): Delete, replaced by
3138 current_target_byte_order.
3140 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3142 * interp.c (host_read_long, host_read_word, host_swap_word,
3143 host_swap_long): Delete. Using common sim-endian.
3144 (sim_fetch_register, sim_store_register): Use H2T.
3145 (pipeline_ticks): Delete. Handled by sim-events.
3147 (sim_engine_run): Update.
3149 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3151 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3153 (SignalException): To here. Signal using sim_engine_halt.
3154 (sim_stop_reason): Delete, moved to common.
3156 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3158 * interp.c (sim_open): Add callback argument.
3159 (sim_set_callbacks): Delete SIM_DESC argument.
3162 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3164 * Makefile.in (SIM_OBJS): Add common modules.
3166 * interp.c (sim_set_callbacks): Also set SD callback.
3167 (set_endianness, xfer_*, swap_*): Delete.
3168 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3169 Change to functions using sim-endian macros.
3170 (control_c, sim_stop): Delete, use common version.
3171 (simulate): Convert into.
3172 (sim_engine_run): This function.
3173 (sim_resume): Delete.
3175 * interp.c (simulation): New variable - the simulator object.
3176 (sim_kind): Delete global - merged into simulation.
3177 (sim_load): Cleanup. Move PC assignment from here.
3178 (sim_create_inferior): To here.
3180 * sim-main.h: New file.
3181 * interp.c (sim-main.h): Include.
3183 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3185 * configure: Regenerated to track ../common/aclocal.m4 changes.
3187 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3189 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3191 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3193 * gencode.c (build_instruction): DIV instructions: check
3194 for division by zero and integer overflow before using
3195 host's division operation.
3197 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3199 * Makefile.in (SIM_OBJS): Add sim-load.o.
3200 * interp.c: #include bfd.h.
3201 (target_byte_order): Delete.
3202 (sim_kind, myname, big_endian_p): New static locals.
3203 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3204 after argument parsing. Recognize -E arg, set endianness accordingly.
3205 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3206 load file into simulator. Set PC from bfd.
3207 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3208 (set_endianness): Use big_endian_p instead of target_byte_order.
3210 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3212 * interp.c (sim_size): Delete prototype - conflicts with
3213 definition in remote-sim.h. Correct definition.
3215 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3217 * configure: Regenerated to track ../common/aclocal.m4 changes.
3220 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3222 * interp.c (sim_open): New arg `kind'.
3224 * configure: Regenerated to track ../common/aclocal.m4 changes.
3226 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3228 * configure: Regenerated to track ../common/aclocal.m4 changes.
3230 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3232 * interp.c (sim_open): Set optind to 0 before calling getopt.
3234 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3236 * configure: Regenerated to track ../common/aclocal.m4 changes.
3238 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3240 * interp.c : Replace uses of pr_addr with pr_uword64
3241 where the bit length is always 64 independent of SIM_ADDR.
3242 (pr_uword64) : added.
3244 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3246 * configure: Re-generate.
3248 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3250 * configure: Regenerate to track ../common/aclocal.m4 changes.
3252 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3254 * interp.c (sim_open): New SIM_DESC result. Argument is now
3256 (other sim_*): New SIM_DESC argument.
3258 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3260 * interp.c: Fix printing of addresses for non-64-bit targets.
3261 (pr_addr): Add function to print address based on size.
3263 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3265 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3267 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3269 * gencode.c (build_mips16_operands): Correct computation of base
3270 address for extended PC relative instruction.
3272 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3274 * interp.c (mips16_entry): Add support for floating point cases.
3275 (SignalException): Pass floating point cases to mips16_entry.
3276 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3278 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3280 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3281 and then set the state to fmt_uninterpreted.
3282 (COP_SW): Temporarily set the state to fmt_word while calling
3285 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3287 * gencode.c (build_instruction): The high order may be set in the
3288 comparison flags at any ISA level, not just ISA 4.
3290 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3292 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3293 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3294 * configure.in: sinclude ../common/aclocal.m4.
3295 * configure: Regenerated.
3297 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3299 * configure: Rebuild after change to aclocal.m4.
3301 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3303 * configure configure.in Makefile.in: Update to new configure
3304 scheme which is more compatible with WinGDB builds.
3305 * configure.in: Improve comment on how to run autoconf.
3306 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3307 * Makefile.in: Use autoconf substitution to install common
3310 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3312 * gencode.c (build_instruction): Use BigEndianCPU instead of
3315 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3317 * interp.c (sim_monitor): Make output to stdout visible in
3318 wingdb's I/O log window.
3320 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3322 * support.h: Undo previous change to SIGTRAP
3325 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3327 * interp.c (store_word, load_word): New static functions.
3328 (mips16_entry): New static function.
3329 (SignalException): Look for mips16 entry and exit instructions.
3330 (simulate): Use the correct index when setting fpr_state after
3331 doing a pending move.
3333 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3335 * interp.c: Fix byte-swapping code throughout to work on
3336 both little- and big-endian hosts.
3338 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3340 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3341 with gdb/config/i386/xm-windows.h.
3343 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3345 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3346 that messes up arithmetic shifts.
3348 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3350 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3351 SIGTRAP and SIGQUIT for _WIN32.
3353 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3355 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3356 force a 64 bit multiplication.
3357 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3358 destination register is 0, since that is the default mips16 nop
3361 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3363 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3364 (build_endian_shift): Don't check proc64.
3365 (build_instruction): Always set memval to uword64. Cast op2 to
3366 uword64 when shifting it left in memory instructions. Always use
3367 the same code for stores--don't special case proc64.
3369 * gencode.c (build_mips16_operands): Fix base PC value for PC
3371 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3373 * interp.c (simJALDELAYSLOT): Define.
3374 (JALDELAYSLOT): Define.
3375 (INDELAYSLOT, INJALDELAYSLOT): Define.
3376 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3378 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3380 * interp.c (sim_open): add flush_cache as a PMON routine
3381 (sim_monitor): handle flush_cache by ignoring it
3383 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3385 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3387 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3388 (BigEndianMem): Rename to ByteSwapMem and change sense.
3389 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3390 BigEndianMem references to !ByteSwapMem.
3391 (set_endianness): New function, with prototype.
3392 (sim_open): Call set_endianness.
3393 (sim_info): Use simBE instead of BigEndianMem.
3394 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3395 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3396 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3397 ifdefs, keeping the prototype declaration.
3398 (swap_word): Rewrite correctly.
3399 (ColdReset): Delete references to CONFIG. Delete endianness related
3400 code; moved to set_endianness.
3402 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3404 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3405 * interp.c (CHECKHILO): Define away.
3406 (simSIGINT): New macro.
3407 (membank_size): Increase from 1MB to 2MB.
3408 (control_c): New function.
3409 (sim_resume): Rename parameter signal to signal_number. Add local
3410 variable prev. Call signal before and after simulate.
3411 (sim_stop_reason): Add simSIGINT support.
3412 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3414 (sim_warning): Delete call to SignalException. Do call printf_filtered
3416 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3417 a call to sim_warning.
3419 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3421 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3422 16 bit instructions.
3424 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3426 Add support for mips16 (16 bit MIPS implementation):
3427 * gencode.c (inst_type): Add mips16 instruction encoding types.
3428 (GETDATASIZEINSN): Define.
3429 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3430 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3432 (MIPS16_DECODE): New table, for mips16 instructions.
3433 (bitmap_val): New static function.
3434 (struct mips16_op): Define.
3435 (mips16_op_table): New table, for mips16 operands.
3436 (build_mips16_operands): New static function.
3437 (process_instructions): If PC is odd, decode a mips16
3438 instruction. Break out instruction handling into new
3439 build_instruction function.
3440 (build_instruction): New static function, broken out of
3441 process_instructions. Check modifiers rather than flags for SHIFT
3442 bit count and m[ft]{hi,lo} direction.
3443 (usage): Pass program name to fprintf.
3444 (main): Remove unused variable this_option_optind. Change
3445 ``*loptarg++'' to ``loptarg++''.
3446 (my_strtoul): Parenthesize && within ||.
3447 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3448 (simulate): If PC is odd, fetch a 16 bit instruction, and
3449 increment PC by 2 rather than 4.
3450 * configure.in: Add case for mips16*-*-*.
3451 * configure: Rebuild.
3453 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3455 * interp.c: Allow -t to enable tracing in standalone simulator.
3456 Fix garbage output in trace file and error messages.
3458 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3460 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3461 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3462 * configure.in: Simplify using macros in ../common/aclocal.m4.
3463 * configure: Regenerated.
3464 * tconfig.in: New file.
3466 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3468 * interp.c: Fix bugs in 64-bit port.
3469 Use ansi function declarations for msvc compiler.
3470 Initialize and test file pointer in trace code.
3471 Prevent duplicate definition of LAST_EMED_REGNUM.
3473 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3475 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3477 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3479 * interp.c (SignalException): Check for explicit terminating
3481 * gencode.c: Pass instruction value through SignalException()
3482 calls for Trap, Breakpoint and Syscall.
3484 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3486 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3487 only used on those hosts that provide it.
3488 * configure.in: Add sqrt() to list of functions to be checked for.
3489 * config.in: Re-generated.
3490 * configure: Re-generated.
3492 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3494 * gencode.c (process_instructions): Call build_endian_shift when
3495 expanding STORE RIGHT, to fix swr.
3496 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3497 clear the high bits.
3498 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3499 Fix float to int conversions to produce signed values.
3501 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3503 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3504 (process_instructions): Correct handling of nor instruction.
3505 Correct shift count for 32 bit shift instructions. Correct sign
3506 extension for arithmetic shifts to not shift the number of bits in
3507 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3508 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3510 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3511 It's OK to have a mult follow a mult. What's not OK is to have a
3512 mult follow an mfhi.
3513 (Convert): Comment out incorrect rounding code.
3515 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3517 * interp.c (sim_monitor): Improved monitor printf
3518 simulation. Tidied up simulator warnings, and added "--log" option
3519 for directing warning message output.
3520 * gencode.c: Use sim_warning() rather than WARNING macro.
3522 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3524 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3525 getopt1.o, rather than on gencode.c. Link objects together.
3526 Don't link against -liberty.
3527 (gencode.o, getopt.o, getopt1.o): New targets.
3528 * gencode.c: Include <ctype.h> and "ansidecl.h".
3529 (AND): Undefine after including "ansidecl.h".
3530 (ULONG_MAX): Define if not defined.
3531 (OP_*): Don't define macros; now defined in opcode/mips.h.
3532 (main): Call my_strtoul rather than strtoul.
3533 (my_strtoul): New static function.
3535 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3537 * gencode.c (process_instructions): Generate word64 and uword64
3538 instead of `long long' and `unsigned long long' data types.
3539 * interp.c: #include sysdep.h to get signals, and define default
3541 * (Convert): Work around for Visual-C++ compiler bug with type
3543 * support.h: Make things compile under Visual-C++ by using
3544 __int64 instead of `long long'. Change many refs to long long
3545 into word64/uword64 typedefs.
3547 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3549 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3550 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3552 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3553 (AC_PROG_INSTALL): Added.
3554 (AC_PROG_CC): Moved to before configure.host call.
3555 * configure: Rebuilt.
3557 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3559 * configure.in: Define @SIMCONF@ depending on mips target.
3560 * configure: Rebuild.
3561 * Makefile.in (run): Add @SIMCONF@ to control simulator
3563 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3564 * interp.c: Remove some debugging, provide more detailed error
3565 messages, update memory accesses to use LOADDRMASK.
3567 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3569 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3570 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3572 * configure: Rebuild.
3573 * config.in: New file, generated by autoheader.
3574 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3575 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3576 HAVE_ANINT and HAVE_AINT, as appropriate.
3577 * Makefile.in (run): Use @LIBS@ rather than -lm.
3578 (interp.o): Depend upon config.h.
3579 (Makefile): Just rebuild Makefile.
3580 (clean): Remove stamp-h.
3581 (mostlyclean): Make the same as clean, not as distclean.
3582 (config.h, stamp-h): New targets.
3584 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3586 * interp.c (ColdReset): Fix boolean test. Make all simulator
3589 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3591 * interp.c (xfer_direct_word, xfer_direct_long,
3592 swap_direct_word, swap_direct_long, xfer_big_word,
3593 xfer_big_long, xfer_little_word, xfer_little_long,
3594 swap_word,swap_long): Added.
3595 * interp.c (ColdReset): Provide function indirection to
3596 host<->simulated_target transfer routines.
3597 * interp.c (sim_store_register, sim_fetch_register): Updated to
3598 make use of indirected transfer routines.
3600 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3602 * gencode.c (process_instructions): Ensure FP ABS instruction
3604 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3605 system call support.
3607 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3609 * interp.c (sim_do_command): Complain if callback structure not
3612 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3614 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3615 support for Sun hosts.
3616 * Makefile.in (gencode): Ensure the host compiler and libraries
3617 used for cross-hosted build.
3619 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3621 * interp.c, gencode.c: Some more (TODO) tidying.
3623 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3625 * gencode.c, interp.c: Replaced explicit long long references with
3626 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3627 * support.h (SET64LO, SET64HI): Macros added.
3629 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3631 * configure: Regenerate with autoconf 2.7.
3633 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3635 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3636 * support.h: Remove superfluous "1" from #if.
3637 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3639 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3641 * interp.c (StoreFPR): Control UndefinedResult() call on
3642 WARN_RESULT manifest.
3644 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3646 * gencode.c: Tidied instruction decoding, and added FP instruction
3649 * interp.c: Added dineroIII, and BSD profiling support. Also
3650 run-time FP handling.
3652 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3654 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3655 gencode.c, interp.c, support.h: created.
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