1 2014-03-04 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2013-09-23 Alan Modra <amodra@gmail.com>
7 * configure: Regenerate.
9 2013-06-03 Mike Frysinger <vapier@gentoo.org>
11 * aclocal.m4, configure: Regenerate.
13 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
17 2013-03-26 Mike Frysinger <vapier@gentoo.org>
19 * configure: Regenerate.
21 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
23 * configure.ac: Address use of dv-sockser.o.
24 * tconfig.in: Conditionalize use of dv_sockser_install.
25 * configure: Regenerated.
26 * config.in: Regenerated.
28 2012-10-04 Chao-ying Fu <fu@mips.com>
29 Steve Ellcey <sellcey@mips.com>
31 * mips/mips3264r2.igen (rdhwr): New.
33 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
35 * configure.ac: Always link against dv-sockser.o.
36 * configure: Regenerate.
38 2012-06-15 Joel Brobecker <brobecker@adacore.com>
40 * config.in, configure: Regenerate.
42 2012-05-18 Nick Clifton <nickc@redhat.com>
45 * interp.c: Include config.h before system header files.
47 2012-03-24 Mike Frysinger <vapier@gentoo.org>
49 * aclocal.m4, config.in, configure: Regenerate.
51 2011-12-03 Mike Frysinger <vapier@gentoo.org>
53 * aclocal.m4: New file.
54 * configure: Regenerate.
56 2011-10-19 Mike Frysinger <vapier@gentoo.org>
58 * configure: Regenerate after common/acinclude.m4 update.
60 2011-10-17 Mike Frysinger <vapier@gentoo.org>
62 * configure.ac: Change include to common/acinclude.m4.
64 2011-10-17 Mike Frysinger <vapier@gentoo.org>
66 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
67 call. Replace common.m4 include with SIM_AC_COMMON.
68 * configure: Regenerate.
70 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
72 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
74 (tmp-mach-multi): Exit early when igen fails.
76 2011-07-05 Mike Frysinger <vapier@gentoo.org>
78 * interp.c (sim_do_command): Delete.
80 2011-02-14 Mike Frysinger <vapier@gentoo.org>
82 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
83 (tx3904sio_fifo_reset): Likewise.
84 * interp.c (sim_monitor): Likewise.
86 2010-04-14 Mike Frysinger <vapier@gentoo.org>
88 * interp.c (sim_write): Add const to buffer arg.
90 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
92 * interp.c: Don't include sysdep.h
94 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
96 * configure: Regenerate.
98 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
100 * config.in: Regenerate.
101 * configure: Likewise.
103 * configure: Regenerate.
105 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
107 * configure: Regenerate to track ../common/common.m4 changes.
110 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
111 Daniel Jacobowitz <dan@codesourcery.com>
112 Joseph Myers <joseph@codesourcery.com>
114 * configure: Regenerate.
116 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
118 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
119 that unconditionally allows fmt_ps.
120 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
121 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
122 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
123 filter from 64,f to 32,f.
124 (PREFX): Change filter from 64 to 32.
125 (LDXC1, LUXC1): Provide separate mips32r2 implementations
126 that use do_load_double instead of do_load. Make both LUXC1
127 versions unpredictable if SizeFGR () != 64.
128 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
129 instead of do_store. Remove unused variable. Make both SUXC1
130 versions unpredictable if SizeFGR () != 64.
132 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
134 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
135 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
136 shifts for that case.
138 2007-09-04 Nick Clifton <nickc@redhat.com>
140 * interp.c (options enum): Add OPTION_INFO_MEMORY.
141 (display_mem_info): New static variable.
142 (mips_option_handler): Handle OPTION_INFO_MEMORY.
143 (mips_options): Add info-memory and memory-info.
144 (sim_open): After processing the command line and board
145 specification, check display_mem_info. If it is set then
146 call the real handler for the --memory-info command line
149 2007-08-24 Joel Brobecker <brobecker@adacore.com>
151 * configure.ac: Change license of multi-run.c to GPL version 3.
152 * configure: Regenerate.
154 2007-06-28 Richard Sandiford <richard@codesourcery.com>
156 * configure.ac, configure: Revert last patch.
158 2007-06-26 Richard Sandiford <richard@codesourcery.com>
160 * configure.ac (sim_mipsisa3264_configs): New variable.
161 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
162 every configuration support all four targets, using the triplet to
163 determine the default.
164 * configure: Regenerate.
166 2007-06-25 Richard Sandiford <richard@codesourcery.com>
168 * Makefile.in (m16run.o): New rule.
170 2007-05-15 Thiemo Seufer <ths@mips.com>
172 * mips3264r2.igen (DSHD): Fix compile warning.
174 2007-05-14 Thiemo Seufer <ths@mips.com>
176 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
177 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
178 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
179 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
182 2007-03-01 Thiemo Seufer <ths@mips.com>
184 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
187 2007-02-20 Thiemo Seufer <ths@mips.com>
189 * dsp.igen: Update copyright notice.
190 * dsp2.igen: Fix copyright notice.
192 2007-02-20 Thiemo Seufer <ths@mips.com>
193 Chao-Ying Fu <fu@mips.com>
195 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
196 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
197 Add dsp2 to sim_igen_machine.
198 * configure: Regenerate.
199 * dsp.igen (do_ph_op): Add MUL support when op = 2.
200 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
201 (mulq_rs.ph): Use do_ph_mulq.
202 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
203 * mips.igen: Add dsp2 model and include dsp2.igen.
204 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
205 for *mips32r2, *mips64r2, *dsp.
206 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
207 for *mips32r2, *mips64r2, *dsp2.
208 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
210 2007-02-19 Thiemo Seufer <ths@mips.com>
211 Nigel Stephens <nigel@mips.com>
213 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
214 jumps with hazard barrier.
216 2007-02-19 Thiemo Seufer <ths@mips.com>
217 Nigel Stephens <nigel@mips.com>
219 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
220 after each call to sim_io_write.
222 2007-02-19 Thiemo Seufer <ths@mips.com>
223 Nigel Stephens <nigel@mips.com>
225 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
226 supported by this simulator.
227 (decode_coproc): Recognise additional CP0 Config registers
230 2007-02-19 Thiemo Seufer <ths@mips.com>
231 Nigel Stephens <nigel@mips.com>
232 David Ung <davidu@mips.com>
234 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
235 uninterpreted formats. If fmt is one of the uninterpreted types
236 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
237 fmt_word, and fmt_uninterpreted_64 like fmt_long.
238 (store_fpr): When writing an invalid odd register, set the
239 matching even register to fmt_unknown, not the following register.
240 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
241 the the memory window at offset 0 set by --memory-size command
243 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
245 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
247 (sim_monitor): When returning the memory size to the MIPS
248 application, use the value in STATE_MEM_SIZE, not an arbitrary
250 (cop_lw): Don' mess around with FPR_STATE, just pass
251 fmt_uninterpreted_32 to StoreFPR.
253 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
255 * mips.igen (not_word_value): Single version for mips32, mips64
258 2007-02-19 Thiemo Seufer <ths@mips.com>
259 Nigel Stephens <nigel@mips.com>
261 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
264 2007-02-17 Thiemo Seufer <ths@mips.com>
266 * configure.ac (mips*-sde-elf*): Move in front of generic machine
268 * configure: Regenerate.
270 2007-02-17 Thiemo Seufer <ths@mips.com>
272 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
273 Add mdmx to sim_igen_machine.
274 (mipsisa64*-*-*): Likewise. Remove dsp.
275 (mipsisa32*-*-*): Remove dsp.
276 * configure: Regenerate.
278 2007-02-13 Thiemo Seufer <ths@mips.com>
280 * configure.ac: Add mips*-sde-elf* target.
281 * configure: Regenerate.
283 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
285 * acconfig.h: Remove.
286 * config.in, configure: Regenerate.
288 2006-11-07 Thiemo Seufer <ths@mips.com>
290 * dsp.igen (do_w_op): Fix compiler warning.
292 2006-08-29 Thiemo Seufer <ths@mips.com>
293 David Ung <davidu@mips.com>
295 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
297 * configure: Regenerate.
298 * mips.igen (model): Add smartmips.
299 (MADDU): Increment ACX if carry.
300 (do_mult): Clear ACX.
301 (ROR,RORV): Add smartmips.
302 (include): Include smartmips.igen.
303 * sim-main.h (ACX): Set to REGISTERS[89].
304 * smartmips.igen: New file.
306 2006-08-29 Thiemo Seufer <ths@mips.com>
307 David Ung <davidu@mips.com>
309 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
310 mips3264r2.igen. Add missing dependency rules.
311 * m16e.igen: Support for mips16e save/restore instructions.
313 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
315 * configure: Regenerated.
317 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
319 * configure: Regenerated.
321 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
323 * configure: Regenerated.
325 2006-05-15 Chao-ying Fu <fu@mips.com>
327 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
329 2006-04-18 Nick Clifton <nickc@redhat.com>
331 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
334 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
336 * configure: Regenerate.
338 2005-12-14 Chao-ying Fu <fu@mips.com>
340 * Makefile.in (SIM_OBJS): Add dsp.o.
341 (dsp.o): New dependency.
342 (IGEN_INCLUDE): Add dsp.igen.
343 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
344 mipsisa64*-*-*): Add dsp to sim_igen_machine.
345 * configure: Regenerate.
346 * mips.igen: Add dsp model and include dsp.igen.
347 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
348 because these instructions are extended in DSP ASE.
349 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
350 adding 6 DSP accumulator registers and 1 DSP control register.
351 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
352 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
353 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
354 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
355 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
356 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
357 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
358 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
359 DSPCR_CCOND_SMASK): New define.
360 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
361 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
363 2005-07-08 Ian Lance Taylor <ian@airs.com>
365 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
367 2005-06-16 David Ung <davidu@mips.com>
368 Nigel Stephens <nigel@mips.com>
370 * mips.igen: New mips16e model and include m16e.igen.
371 (check_u64): Add mips16e tag.
372 * m16e.igen: New file for MIPS16e instructions.
373 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
374 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
376 * configure: Regenerate.
378 2005-05-26 David Ung <davidu@mips.com>
380 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
381 tags to all instructions which are applicable to the new ISAs.
382 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
384 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
386 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
388 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
389 * configure: Regenerate.
391 2005-03-23 Mark Kettenis <kettenis@gnu.org>
393 * configure: Regenerate.
395 2005-01-14 Andrew Cagney <cagney@gnu.org>
397 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
398 explicit call to AC_CONFIG_HEADER.
399 * configure: Regenerate.
401 2005-01-12 Andrew Cagney <cagney@gnu.org>
403 * configure.ac: Update to use ../common/common.m4.
404 * configure: Re-generate.
406 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
408 * configure: Regenerated to track ../common/aclocal.m4 changes.
410 2005-01-07 Andrew Cagney <cagney@gnu.org>
412 * configure.ac: Rename configure.in, require autoconf 2.59.
413 * configure: Re-generate.
415 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
417 * configure: Regenerate for ../common/aclocal.m4 update.
419 2004-09-24 Monika Chaddha <monika@acmet.com>
421 Committed by Andrew Cagney.
422 * m16.igen (CMP, CMPI): Fix assembler.
424 2004-08-18 Chris Demetriou <cgd@broadcom.com>
426 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
427 * configure: Regenerate.
429 2004-06-25 Chris Demetriou <cgd@broadcom.com>
431 * configure.in (sim_m16_machine): Include mipsIII.
432 * configure: Regenerate.
434 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
436 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
438 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
440 2004-04-10 Chris Demetriou <cgd@broadcom.com>
442 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
444 2004-04-09 Chris Demetriou <cgd@broadcom.com>
446 * mips.igen (check_fmt): Remove.
447 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
448 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
449 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
450 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
451 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
452 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
453 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
454 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
455 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
456 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
458 2004-04-09 Chris Demetriou <cgd@broadcom.com>
460 * sb1.igen (check_sbx): New function.
461 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
463 2004-03-29 Chris Demetriou <cgd@broadcom.com>
464 Richard Sandiford <rsandifo@redhat.com>
466 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
467 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
468 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
469 separate implementations for mipsIV and mipsV. Use new macros to
470 determine whether the restrictions apply.
472 2004-01-19 Chris Demetriou <cgd@broadcom.com>
474 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
475 (check_mult_hilo): Improve comments.
476 (check_div_hilo): Likewise. Also, fork off a new version
477 to handle mips32/mips64 (since there are no hazards to check
480 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
482 * mips.igen (do_dmultx): Fix check for negative operands.
484 2003-05-16 Ian Lance Taylor <ian@airs.com>
486 * Makefile.in (SHELL): Make sure this is defined.
487 (various): Use $(SHELL) whenever we invoke move-if-change.
489 2003-05-03 Chris Demetriou <cgd@broadcom.com>
491 * cp1.c: Tweak attribution slightly.
494 * mdmx.igen: Likewise.
495 * mips3d.igen: Likewise.
496 * sb1.igen: Likewise.
498 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
500 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
503 2003-02-27 Andrew Cagney <cagney@redhat.com>
505 * interp.c (sim_open): Rename _bfd to bfd.
506 (sim_create_inferior): Ditto.
508 2003-01-14 Chris Demetriou <cgd@broadcom.com>
510 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
512 2003-01-14 Chris Demetriou <cgd@broadcom.com>
514 * mips.igen (EI, DI): Remove.
516 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
518 * Makefile.in (tmp-run-multi): Fix mips16 filter.
520 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
521 Andrew Cagney <ac131313@redhat.com>
522 Gavin Romig-Koch <gavin@redhat.com>
523 Graydon Hoare <graydon@redhat.com>
524 Aldy Hernandez <aldyh@redhat.com>
525 Dave Brolley <brolley@redhat.com>
526 Chris Demetriou <cgd@broadcom.com>
528 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
529 (sim_mach_default): New variable.
530 (mips64vr-*-*, mips64vrel-*-*): New configurations.
531 Add a new simulator generator, MULTI.
532 * configure: Regenerate.
533 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
534 (multi-run.o): New dependency.
535 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
536 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
537 (tmp-multi): Combine them.
538 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
539 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
540 (distclean-extra): New rule.
541 * sim-main.h: Include bfd.h.
542 (MIPS_MACH): New macro.
543 * mips.igen (vr4120, vr5400, vr5500): New models.
544 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
545 * vr.igen: Replace with new version.
547 2003-01-04 Chris Demetriou <cgd@broadcom.com>
549 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
550 * configure: Regenerate.
552 2002-12-31 Chris Demetriou <cgd@broadcom.com>
554 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
555 * mips.igen: Remove all invocations of check_branch_bug and
558 2002-12-16 Chris Demetriou <cgd@broadcom.com>
560 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
562 2002-07-30 Chris Demetriou <cgd@broadcom.com>
564 * mips.igen (do_load_double, do_store_double): New functions.
565 (LDC1, SDC1): Rename to...
566 (LDC1b, SDC1b): respectively.
567 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
569 2002-07-29 Michael Snyder <msnyder@redhat.com>
571 * cp1.c (fp_recip2): Modify initialization expression so that
572 GCC will recognize it as constant.
574 2002-06-18 Chris Demetriou <cgd@broadcom.com>
576 * mdmx.c (SD_): Delete.
577 (Unpredictable): Re-define, for now, to directly invoke
578 unpredictable_action().
579 (mdmx_acc_op): Fix error in .ob immediate handling.
581 2002-06-18 Andrew Cagney <cagney@redhat.com>
583 * interp.c (sim_firmware_command): Initialize `address'.
585 2002-06-16 Andrew Cagney <ac131313@redhat.com>
587 * configure: Regenerated to track ../common/aclocal.m4 changes.
589 2002-06-14 Chris Demetriou <cgd@broadcom.com>
590 Ed Satterthwaite <ehs@broadcom.com>
592 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
593 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
594 * mips.igen: Include mips3d.igen.
595 (mips3d): New model name for MIPS-3D ASE instructions.
596 (CVT.W.fmt): Don't use this instruction for word (source) format
598 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
599 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
600 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
601 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
602 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
603 (RSquareRoot1, RSquareRoot2): New macros.
604 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
605 (fp_rsqrt2): New functions.
606 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
607 * configure: Regenerate.
609 2002-06-13 Chris Demetriou <cgd@broadcom.com>
610 Ed Satterthwaite <ehs@broadcom.com>
612 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
613 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
614 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
615 (convert): Note that this function is not used for paired-single
617 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
618 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
619 (check_fmt_p): Enable paired-single support.
620 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
621 (PUU.PS): New instructions.
622 (CVT.S.fmt): Don't use this instruction for paired-single format
624 * sim-main.h (FP_formats): New value 'fmt_ps.'
625 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
626 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
628 2002-06-12 Chris Demetriou <cgd@broadcom.com>
630 * mips.igen: Fix formatting of function calls in
633 2002-06-12 Chris Demetriou <cgd@broadcom.com>
635 * mips.igen (MOVN, MOVZ): Trace result.
636 (TNEI): Print "tnei" as the opcode name in traces.
637 (CEIL.W): Add disassembly string for traces.
638 (RSQRT.fmt): Make location of disassembly string consistent
639 with other instructions.
641 2002-06-12 Chris Demetriou <cgd@broadcom.com>
643 * mips.igen (X): Delete unused function.
645 2002-06-08 Andrew Cagney <cagney@redhat.com>
647 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
649 2002-06-07 Chris Demetriou <cgd@broadcom.com>
650 Ed Satterthwaite <ehs@broadcom.com>
652 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
653 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
654 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
655 (fp_nmsub): New prototypes.
656 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
657 (NegMultiplySub): New defines.
658 * mips.igen (RSQRT.fmt): Use RSquareRoot().
659 (MADD.D, MADD.S): Replace with...
660 (MADD.fmt): New instruction.
661 (MSUB.D, MSUB.S): Replace with...
662 (MSUB.fmt): New instruction.
663 (NMADD.D, NMADD.S): Replace with...
664 (NMADD.fmt): New instruction.
665 (NMSUB.D, MSUB.S): Replace with...
666 (NMSUB.fmt): New instruction.
668 2002-06-07 Chris Demetriou <cgd@broadcom.com>
669 Ed Satterthwaite <ehs@broadcom.com>
671 * cp1.c: Fix more comment spelling and formatting.
672 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
673 (denorm_mode): New function.
674 (fpu_unary, fpu_binary): Round results after operation, collect
675 status from rounding operations, and update the FCSR.
676 (convert): Collect status from integer conversions and rounding
677 operations, and update the FCSR. Adjust NaN values that result
678 from conversions. Convert to use sim_io_eprintf rather than
679 fprintf, and remove some debugging code.
680 * cp1.h (fenr_FS): New define.
682 2002-06-07 Chris Demetriou <cgd@broadcom.com>
684 * cp1.c (convert): Remove unusable debugging code, and move MIPS
685 rounding mode to sim FP rounding mode flag conversion code into...
686 (rounding_mode): New function.
688 2002-06-07 Chris Demetriou <cgd@broadcom.com>
690 * cp1.c: Clean up formatting of a few comments.
691 (value_fpr): Reformat switch statement.
693 2002-06-06 Chris Demetriou <cgd@broadcom.com>
694 Ed Satterthwaite <ehs@broadcom.com>
697 * sim-main.h: Include cp1.h.
698 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
699 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
700 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
701 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
702 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
703 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
704 * cp1.c: Don't include sim-fpu.h; already included by
705 sim-main.h. Clean up formatting of some comments.
706 (NaN, Equal, Less): Remove.
707 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
708 (fp_cmp): New functions.
709 * mips.igen (do_c_cond_fmt): Remove.
710 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
711 Compare. Add result tracing.
712 (CxC1): Remove, replace with...
713 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
714 (DMxC1): Remove, replace with...
715 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
716 (MxC1): Remove, replace with...
717 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
719 2002-06-04 Chris Demetriou <cgd@broadcom.com>
721 * sim-main.h (FGRIDX): Remove, replace all uses with...
722 (FGR_BASE): New macro.
723 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
724 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
725 (NR_FGR, FGR): Likewise.
726 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
727 * mips.igen: Likewise.
729 2002-06-04 Chris Demetriou <cgd@broadcom.com>
731 * cp1.c: Add an FSF Copyright notice to this file.
733 2002-06-04 Chris Demetriou <cgd@broadcom.com>
734 Ed Satterthwaite <ehs@broadcom.com>
736 * cp1.c (Infinity): Remove.
737 * sim-main.h (Infinity): Likewise.
739 * cp1.c (fp_unary, fp_binary): New functions.
740 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
741 (fp_sqrt): New functions, implemented in terms of the above.
742 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
743 (Recip, SquareRoot): Remove (replaced by functions above).
744 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
745 (fp_recip, fp_sqrt): New prototypes.
746 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
747 (Recip, SquareRoot): Replace prototypes with #defines which
748 invoke the functions above.
750 2002-06-03 Chris Demetriou <cgd@broadcom.com>
752 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
753 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
754 file, remove PARAMS from prototypes.
755 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
756 simulator state arguments.
757 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
758 pass simulator state arguments.
759 * cp1.c (SD): Redefine as CPU_STATE(cpu).
760 (store_fpr, convert): Remove 'sd' argument.
761 (value_fpr): Likewise. Convert to use 'SD' instead.
763 2002-06-03 Chris Demetriou <cgd@broadcom.com>
765 * cp1.c (Min, Max): Remove #if 0'd functions.
766 * sim-main.h (Min, Max): Remove.
768 2002-06-03 Chris Demetriou <cgd@broadcom.com>
770 * cp1.c: fix formatting of switch case and default labels.
771 * interp.c: Likewise.
772 * sim-main.c: Likewise.
774 2002-06-03 Chris Demetriou <cgd@broadcom.com>
776 * cp1.c: Clean up comments which describe FP formats.
777 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
779 2002-06-03 Chris Demetriou <cgd@broadcom.com>
780 Ed Satterthwaite <ehs@broadcom.com>
782 * configure.in (mipsisa64sb1*-*-*): New target for supporting
783 Broadcom SiByte SB-1 processor configurations.
784 * configure: Regenerate.
785 * sb1.igen: New file.
786 * mips.igen: Include sb1.igen.
788 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
789 * mdmx.igen: Add "sb1" model to all appropriate functions and
791 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
792 (ob_func, ob_acc): Reference the above.
793 (qh_acc): Adjust to keep the same size as ob_acc.
794 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
795 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
797 2002-06-03 Chris Demetriou <cgd@broadcom.com>
799 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
801 2002-06-02 Chris Demetriou <cgd@broadcom.com>
802 Ed Satterthwaite <ehs@broadcom.com>
804 * mips.igen (mdmx): New (pseudo-)model.
805 * mdmx.c, mdmx.igen: New files.
806 * Makefile.in (SIM_OBJS): Add mdmx.o.
807 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
809 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
810 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
811 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
812 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
813 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
814 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
815 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
816 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
817 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
818 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
819 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
820 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
821 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
822 (qh_fmtsel): New macros.
823 (_sim_cpu): New member "acc".
824 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
825 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
827 2002-05-01 Chris Demetriou <cgd@broadcom.com>
829 * interp.c: Use 'deprecated' rather than 'depreciated.'
830 * sim-main.h: Likewise.
832 2002-05-01 Chris Demetriou <cgd@broadcom.com>
834 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
835 which wouldn't compile anyway.
836 * sim-main.h (unpredictable_action): New function prototype.
837 (Unpredictable): Define to call igen function unpredictable().
838 (NotWordValue): New macro to call igen function not_word_value().
839 (UndefinedResult): Remove.
840 * interp.c (undefined_result): Remove.
841 (unpredictable_action): New function.
842 * mips.igen (not_word_value, unpredictable): New functions.
843 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
844 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
845 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
846 NotWordValue() to check for unpredictable inputs, then
847 Unpredictable() to handle them.
849 2002-02-24 Chris Demetriou <cgd@broadcom.com>
851 * mips.igen: Fix formatting of calls to Unpredictable().
853 2002-04-20 Andrew Cagney <ac131313@redhat.com>
855 * interp.c (sim_open): Revert previous change.
857 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
859 * interp.c (sim_open): Disable chunk of code that wrote code in
860 vector table entries.
862 2002-03-19 Chris Demetriou <cgd@broadcom.com>
864 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
865 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
868 2002-03-19 Chris Demetriou <cgd@broadcom.com>
870 * cp1.c: Fix many formatting issues.
872 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
874 * cp1.c (fpu_format_name): New function to replace...
875 (DOFMT): This. Delete, and update all callers.
876 (fpu_rounding_mode_name): New function to replace...
877 (RMMODE): This. Delete, and update all callers.
879 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
881 * interp.c: Move FPU support routines from here to...
882 * cp1.c: Here. New file.
883 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
886 2002-03-12 Chris Demetriou <cgd@broadcom.com>
888 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
889 * mips.igen (mips32, mips64): New models, add to all instructions
890 and functions as appropriate.
891 (loadstore_ea, check_u64): New variant for model mips64.
892 (check_fmt_p): New variant for models mipsV and mips64, remove
893 mipsV model marking fro other variant.
896 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
897 for mips32 and mips64.
898 (DCLO, DCLZ): New instructions for mips64.
900 2002-03-07 Chris Demetriou <cgd@broadcom.com>
902 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
903 immediate or code as a hex value with the "%#lx" format.
904 (ANDI): Likewise, and fix printed instruction name.
906 2002-03-05 Chris Demetriou <cgd@broadcom.com>
908 * sim-main.h (UndefinedResult, Unpredictable): New macros
909 which currently do nothing.
911 2002-03-05 Chris Demetriou <cgd@broadcom.com>
913 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
914 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
915 (status_CU3): New definitions.
917 * sim-main.h (ExceptionCause): Add new values for MIPS32
918 and MIPS64: MDMX, MCheck, CacheErr. Update comments
919 for DebugBreakPoint and NMIReset to note their status in
921 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
922 (SignalExceptionCacheErr): New exception macros.
924 2002-03-05 Chris Demetriou <cgd@broadcom.com>
926 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
927 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
929 (SignalExceptionCoProcessorUnusable): Take as argument the
930 unusable coprocessor number.
932 2002-03-05 Chris Demetriou <cgd@broadcom.com>
934 * mips.igen: Fix formatting of all SignalException calls.
936 2002-03-05 Chris Demetriou <cgd@broadcom.com>
938 * sim-main.h (SIGNEXTEND): Remove.
940 2002-03-04 Chris Demetriou <cgd@broadcom.com>
942 * mips.igen: Remove gencode comment from top of file, fix
943 spelling in another comment.
945 2002-03-04 Chris Demetriou <cgd@broadcom.com>
947 * mips.igen (check_fmt, check_fmt_p): New functions to check
948 whether specific floating point formats are usable.
949 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
950 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
951 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
952 Use the new functions.
953 (do_c_cond_fmt): Remove format checks...
954 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
956 2002-03-03 Chris Demetriou <cgd@broadcom.com>
958 * mips.igen: Fix formatting of check_fpu calls.
960 2002-03-03 Chris Demetriou <cgd@broadcom.com>
962 * mips.igen (FLOOR.L.fmt): Store correct destination register.
964 2002-03-03 Chris Demetriou <cgd@broadcom.com>
966 * mips.igen: Remove whitespace at end of lines.
968 2002-03-02 Chris Demetriou <cgd@broadcom.com>
970 * mips.igen (loadstore_ea): New function to do effective
971 address calculations.
972 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
973 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
974 CACHE): Use loadstore_ea to do effective address computations.
976 2002-03-02 Chris Demetriou <cgd@broadcom.com>
978 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
979 * mips.igen (LL, CxC1, MxC1): Likewise.
981 2002-03-02 Chris Demetriou <cgd@broadcom.com>
983 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
984 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
985 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
986 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
987 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
988 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
989 Don't split opcode fields by hand, use the opcode field values
992 2002-03-01 Chris Demetriou <cgd@broadcom.com>
994 * mips.igen (do_divu): Fix spacing.
996 * mips.igen (do_dsllv): Move to be right before DSLLV,
997 to match the rest of the do_<shift> functions.
999 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1001 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1002 DSRL32, do_dsrlv): Trace inputs and results.
1004 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1006 * mips.igen (CACHE): Provide instruction-printing string.
1008 * interp.c (signal_exception): Comment tokens after #endif.
1010 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1012 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1013 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1014 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1015 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1016 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1017 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1018 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1019 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1021 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1023 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1024 instruction-printing string.
1025 (LWU): Use '64' as the filter flag.
1027 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1029 * mips.igen (SDXC1): Fix instruction-printing string.
1031 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1033 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1034 filter flags "32,f".
1036 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1038 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1041 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1043 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1044 add a comma) so that it more closely match the MIPS ISA
1045 documentation opcode partitioning.
1046 (PREF): Put useful names on opcode fields, and include
1047 instruction-printing string.
1049 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1051 * mips.igen (check_u64): New function which in the future will
1052 check whether 64-bit instructions are usable and signal an
1053 exception if not. Currently a no-op.
1054 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1055 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1056 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1057 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1059 * mips.igen (check_fpu): New function which in the future will
1060 check whether FPU instructions are usable and signal an exception
1061 if not. Currently a no-op.
1062 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1063 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1064 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1065 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1066 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1067 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1068 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1069 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1071 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1073 * mips.igen (do_load_left, do_load_right): Move to be immediately
1075 (do_store_left, do_store_right): Move to be immediately following
1078 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1080 * mips.igen (mipsV): New model name. Also, add it to
1081 all instructions and functions where it is appropriate.
1083 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1085 * mips.igen: For all functions and instructions, list model
1086 names that support that instruction one per line.
1088 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1090 * mips.igen: Add some additional comments about supported
1091 models, and about which instructions go where.
1092 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1093 order as is used in the rest of the file.
1095 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1097 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1098 indicating that ALU32_END or ALU64_END are there to check
1100 (DADD): Likewise, but also remove previous comment about
1103 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1105 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1106 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1107 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1108 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1109 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1110 fields (i.e., add and move commas) so that they more closely
1111 match the MIPS ISA documentation opcode partitioning.
1113 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1115 * mips.igen (ADDI): Print immediate value.
1116 (BREAK): Print code.
1117 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1118 (SLL): Print "nop" specially, and don't run the code
1119 that does the shift for the "nop" case.
1121 2001-11-17 Fred Fish <fnf@redhat.com>
1123 * sim-main.h (float_operation): Move enum declaration outside
1124 of _sim_cpu struct declaration.
1126 2001-04-12 Jim Blandy <jimb@redhat.com>
1128 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1129 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1131 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1132 PENDING_FILL, and you can get the intended effect gracefully by
1133 calling PENDING_SCHED directly.
1135 2001-02-23 Ben Elliston <bje@redhat.com>
1137 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1138 already defined elsewhere.
1140 2001-02-19 Ben Elliston <bje@redhat.com>
1142 * sim-main.h (sim_monitor): Return an int.
1143 * interp.c (sim_monitor): Add return values.
1144 (signal_exception): Handle error conditions from sim_monitor.
1146 2001-02-08 Ben Elliston <bje@redhat.com>
1148 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1149 (store_memory): Likewise, pass cia to sim_core_write*.
1151 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1153 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1154 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1156 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1158 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1159 * Makefile.in: Don't delete *.igen when cleaning directory.
1161 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1163 * m16.igen (break): Call SignalException not sim_engine_halt.
1165 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1167 From Jason Eckhardt:
1168 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1170 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1172 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1174 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1176 * mips.igen (do_dmultx): Fix typo.
1178 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1180 * configure: Regenerated to track ../common/aclocal.m4 changes.
1182 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1184 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1186 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1188 * sim-main.h (GPR_CLEAR): Define macro.
1190 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1192 * interp.c (decode_coproc): Output long using %lx and not %s.
1194 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1196 * interp.c (sim_open): Sort & extend dummy memory regions for
1197 --board=jmr3904 for eCos.
1199 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1201 * configure: Regenerated.
1203 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1205 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1206 calls, conditional on the simulator being in verbose mode.
1208 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1210 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1211 cache don't get ReservedInstruction traps.
1213 1999-11-29 Mark Salter <msalter@cygnus.com>
1215 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1216 to clear status bits in sdisr register. This is how the hardware works.
1218 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1219 being used by cygmon.
1221 1999-11-11 Andrew Haley <aph@cygnus.com>
1223 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1226 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1228 * mips.igen (MULT): Correct previous mis-applied patch.
1230 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1232 * mips.igen (delayslot32): Handle sequence like
1233 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1234 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1235 (MULT): Actually pass the third register...
1237 1999-09-03 Mark Salter <msalter@cygnus.com>
1239 * interp.c (sim_open): Added more memory aliases for additional
1240 hardware being touched by cygmon on jmr3904 board.
1242 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1244 * configure: Regenerated to track ../common/aclocal.m4 changes.
1246 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1248 * interp.c (sim_store_register): Handle case where client - GDB -
1249 specifies that a 4 byte register is 8 bytes in size.
1250 (sim_fetch_register): Ditto.
1252 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1254 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1255 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1256 (idt_monitor_base): Base address for IDT monitor traps.
1257 (pmon_monitor_base): Ditto for PMON.
1258 (lsipmon_monitor_base): Ditto for LSI PMON.
1259 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1260 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1261 (sim_firmware_command): New function.
1262 (mips_option_handler): Call it for OPTION_FIRMWARE.
1263 (sim_open): Allocate memory for idt_monitor region. If "--board"
1264 option was given, add no monitor by default. Add BREAK hooks only if
1265 monitors are also there.
1267 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1269 * interp.c (sim_monitor): Flush output before reading input.
1271 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1273 * tconfig.in (SIM_HANDLES_LMA): Always define.
1275 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1277 From Mark Salter <msalter@cygnus.com>:
1278 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1279 (sim_open): Add setup for BSP board.
1281 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1283 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1284 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1285 them as unimplemented.
1287 1999-05-08 Felix Lee <flee@cygnus.com>
1289 * configure: Regenerated to track ../common/aclocal.m4 changes.
1291 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1293 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1295 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1297 * configure.in: Any mips64vr5*-*-* target should have
1298 -DTARGET_ENABLE_FR=1.
1299 (default_endian): Any mips64vr*el-*-* target should default to
1301 * configure: Re-generate.
1303 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1305 * mips.igen (ldl): Extend from _16_, not 32.
1307 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1309 * interp.c (sim_store_register): Force registers written to by GDB
1310 into an un-interpreted state.
1312 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1314 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1315 CPU, start periodic background I/O polls.
1316 (tx3904sio_poll): New function: periodic I/O poller.
1318 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1320 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1322 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1324 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1327 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1329 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1330 (load_word): Call SIM_CORE_SIGNAL hook on error.
1331 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1332 starting. For exception dispatching, pass PC instead of NULL_CIA.
1333 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1334 * sim-main.h (COP0_BADVADDR): Define.
1335 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1336 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1337 (_sim_cpu): Add exc_* fields to store register value snapshots.
1338 * mips.igen (*): Replace memory-related SignalException* calls
1339 with references to SIM_CORE_SIGNAL hook.
1341 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1343 * sim-main.c (*): Minor warning cleanups.
1345 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1347 * m16.igen (DADDIU5): Correct type-o.
1349 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1351 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1354 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1356 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1358 (interp.o): Add dependency on itable.h
1359 (oengine.c, gencode): Delete remaining references.
1360 (BUILT_SRC_FROM_GEN): Clean up.
1362 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1365 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1366 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1367 tmp-run-hack) : New.
1368 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1369 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1370 Drop the "64" qualifier to get the HACK generator working.
1371 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1372 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1373 qualifier to get the hack generator working.
1374 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1375 (DSLL): Use do_dsll.
1376 (DSLLV): Use do_dsllv.
1377 (DSRA): Use do_dsra.
1378 (DSRL): Use do_dsrl.
1379 (DSRLV): Use do_dsrlv.
1380 (BC1): Move *vr4100 to get the HACK generator working.
1381 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1382 get the HACK generator working.
1383 (MACC) Rename to get the HACK generator working.
1384 (DMACC,MACCS,DMACCS): Add the 64.
1386 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1388 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1389 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1391 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1393 * mips/interp.c (DEBUG): Cleanups.
1395 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1397 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1398 (tx3904sio_tickle): fflush after a stdout character output.
1400 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1402 * interp.c (sim_close): Uninstall modules.
1404 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1406 * sim-main.h, interp.c (sim_monitor): Change to global
1409 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1411 * configure.in (vr4100): Only include vr4100 instructions in
1413 * configure: Re-generate.
1414 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1416 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1418 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1419 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1422 * configure.in (sim_default_gen, sim_use_gen): Replace with
1424 (--enable-sim-igen): Delete config option. Always using IGEN.
1425 * configure: Re-generate.
1427 * Makefile.in (gencode): Kill, kill, kill.
1430 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1432 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1433 bit mips16 igen simulator.
1434 * configure: Re-generate.
1436 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1437 as part of vr4100 ISA.
1438 * vr.igen: Mark all instructions as 64 bit only.
1440 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1442 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1445 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1447 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1448 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1449 * configure: Re-generate.
1451 * m16.igen (BREAK): Define breakpoint instruction.
1452 (JALX32): Mark instruction as mips16 and not r3900.
1453 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1455 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1457 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1459 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1460 insn as a debug breakpoint.
1462 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1464 (PENDING_SCHED): Clean up trace statement.
1465 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1466 (PENDING_FILL): Delay write by only one cycle.
1467 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1469 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1471 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1473 (pending_tick): Move incrementing of index to FOR statement.
1474 (pending_tick): Only update PENDING_OUT after a write has occured.
1476 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1478 * configure: Re-generate.
1480 * interp.c (sim_engine_run OLD): Delete explicit call to
1481 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1483 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1485 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1486 interrupt level number to match changed SignalExceptionInterrupt
1489 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1491 * interp.c: #include "itable.h" if WITH_IGEN.
1492 (get_insn_name): New function.
1493 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1494 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1496 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1498 * configure: Rebuilt to inhale new common/aclocal.m4.
1500 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1502 * dv-tx3904sio.c: Include sim-assert.h.
1504 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1506 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1507 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1508 Reorganize target-specific sim-hardware checks.
1509 * configure: rebuilt.
1510 * interp.c (sim_open): For tx39 target boards, set
1511 OPERATING_ENVIRONMENT, add tx3904sio devices.
1512 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1513 ROM executables. Install dv-sockser into sim-modules list.
1515 * dv-tx3904irc.c: Compiler warning clean-up.
1516 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1517 frequent hw-trace messages.
1519 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1521 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1523 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1525 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1527 * vr.igen: New file.
1528 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1529 * mips.igen: Define vr4100 model. Include vr.igen.
1530 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1532 * mips.igen (check_mf_hilo): Correct check.
1534 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1536 * sim-main.h (interrupt_event): Add prototype.
1538 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1539 register_ptr, register_value.
1540 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1542 * sim-main.h (tracefh): Make extern.
1544 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1546 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1547 Reduce unnecessarily high timer event frequency.
1548 * dv-tx3904cpu.c: Ditto for interrupt event.
1550 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1552 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1554 (interrupt_event): Made non-static.
1556 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1557 interchange of configuration values for external vs. internal
1560 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1562 * mips.igen (BREAK): Moved code to here for
1563 simulator-reserved break instructions.
1564 * gencode.c (build_instruction): Ditto.
1565 * interp.c (signal_exception): Code moved from here. Non-
1566 reserved instructions now use exception vector, rather
1568 * sim-main.h: Moved magic constants to here.
1570 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1572 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1573 register upon non-zero interrupt event level, clear upon zero
1575 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1576 by passing zero event value.
1577 (*_io_{read,write}_buffer): Endianness fixes.
1578 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1579 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1581 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1582 serial I/O and timer module at base address 0xFFFF0000.
1584 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1586 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1589 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1591 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1593 * configure: Update.
1595 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1597 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1598 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1599 * configure.in: Include tx3904tmr in hw_device list.
1600 * configure: Rebuilt.
1601 * interp.c (sim_open): Instantiate three timer instances.
1602 Fix address typo of tx3904irc instance.
1604 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1606 * interp.c (signal_exception): SystemCall exception now uses
1607 the exception vector.
1609 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1611 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1614 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1616 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1618 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1620 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1622 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1623 sim-main.h. Declare a struct hw_descriptor instead of struct
1624 hw_device_descriptor.
1626 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1628 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1629 right bits and then re-align left hand bytes to correct byte
1630 lanes. Fix incorrect computation in do_store_left when loading
1631 bytes from second word.
1633 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1635 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1636 * interp.c (sim_open): Only create a device tree when HW is
1639 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1640 * interp.c (signal_exception): Ditto.
1642 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1644 * gencode.c: Mark BEGEZALL as LIKELY.
1646 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1648 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1649 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1651 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1653 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1654 modules. Recognize TX39 target with "mips*tx39" pattern.
1655 * configure: Rebuilt.
1656 * sim-main.h (*): Added many macros defining bits in
1657 TX39 control registers.
1658 (SignalInterrupt): Send actual PC instead of NULL.
1659 (SignalNMIReset): New exception type.
1660 * interp.c (board): New variable for future use to identify
1661 a particular board being simulated.
1662 (mips_option_handler,mips_options): Added "--board" option.
1663 (interrupt_event): Send actual PC.
1664 (sim_open): Make memory layout conditional on board setting.
1665 (signal_exception): Initial implementation of hardware interrupt
1666 handling. Accept another break instruction variant for simulator
1668 (decode_coproc): Implement RFE instruction for TX39.
1669 (mips.igen): Decode RFE instruction as such.
1670 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1671 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1672 bbegin to implement memory map.
1673 * dv-tx3904cpu.c: New file.
1674 * dv-tx3904irc.c: New file.
1676 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1678 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1680 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1682 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1683 with calls to check_div_hilo.
1685 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1687 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1688 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1689 Add special r3900 version of do_mult_hilo.
1690 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1691 with calls to check_mult_hilo.
1692 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1693 with calls to check_div_hilo.
1695 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1697 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1698 Document a replacement.
1700 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1702 * interp.c (sim_monitor): Make mon_printf work.
1704 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1706 * sim-main.h (INSN_NAME): New arg `cpu'.
1708 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1710 * configure: Regenerated to track ../common/aclocal.m4 changes.
1712 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1714 * configure: Regenerated to track ../common/aclocal.m4 changes.
1717 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1719 * acconfig.h: New file.
1720 * configure.in: Reverted change of Apr 24; use sinclude again.
1722 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1724 * configure: Regenerated to track ../common/aclocal.m4 changes.
1727 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1729 * configure.in: Don't call sinclude.
1731 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1733 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1735 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1737 * mips.igen (ERET): Implement.
1739 * interp.c (decode_coproc): Return sign-extended EPC.
1741 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1743 * interp.c (signal_exception): Do not ignore Trap.
1744 (signal_exception): On TRAP, restart at exception address.
1745 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1746 (signal_exception): Update.
1747 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1748 so that TRAP instructions are caught.
1750 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1752 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1753 contains HI/LO access history.
1754 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1755 (HIACCESS, LOACCESS): Delete, replace with
1756 (HIHISTORY, LOHISTORY): New macros.
1757 (CHECKHILO): Delete all, moved to mips.igen
1759 * gencode.c (build_instruction): Do not generate checks for
1760 correct HI/LO register usage.
1762 * interp.c (old_engine_run): Delete checks for correct HI/LO
1765 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1766 check_mf_cycles): New functions.
1767 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1768 do_divu, domultx, do_mult, do_multu): Use.
1770 * tx.igen ("madd", "maddu"): Use.
1772 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1774 * mips.igen (DSRAV): Use function do_dsrav.
1775 (SRAV): Use new function do_srav.
1777 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1778 (B): Sign extend 11 bit immediate.
1779 (EXT-B*): Shift 16 bit immediate left by 1.
1780 (ADDIU*): Don't sign extend immediate value.
1782 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1784 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1786 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1789 * mips.igen (delayslot32, nullify_next_insn): New functions.
1790 (m16.igen): Always include.
1791 (do_*): Add more tracing.
1793 * m16.igen (delayslot16): Add NIA argument, could be called by a
1794 32 bit MIPS16 instruction.
1796 * interp.c (ifetch16): Move function from here.
1797 * sim-main.c (ifetch16): To here.
1799 * sim-main.c (ifetch16, ifetch32): Update to match current
1800 implementations of LH, LW.
1801 (signal_exception): Don't print out incorrect hex value of illegal
1804 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1806 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1809 * m16.igen: Implement MIPS16 instructions.
1811 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1812 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1813 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1814 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1815 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1816 bodies of corresponding code from 32 bit insn to these. Also used
1817 by MIPS16 versions of functions.
1819 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1820 (IMEM16): Drop NR argument from macro.
1822 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1824 * Makefile.in (SIM_OBJS): Add sim-main.o.
1826 * sim-main.h (address_translation, load_memory, store_memory,
1827 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1829 (pr_addr, pr_uword64): Declare.
1830 (sim-main.c): Include when H_REVEALS_MODULE_P.
1832 * interp.c (address_translation, load_memory, store_memory,
1833 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1835 * sim-main.c: To here. Fix compilation problems.
1837 * configure.in: Enable inlining.
1838 * configure: Re-config.
1840 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1842 * configure: Regenerated to track ../common/aclocal.m4 changes.
1844 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1846 * mips.igen: Include tx.igen.
1847 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1848 * tx.igen: New file, contains MADD and MADDU.
1850 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1851 the hardwired constant `7'.
1852 (store_memory): Ditto.
1853 (LOADDRMASK): Move definition to sim-main.h.
1855 mips.igen (MTC0): Enable for r3900.
1858 mips.igen (do_load_byte): Delete.
1859 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1860 do_store_right): New functions.
1861 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1863 configure.in: Let the tx39 use igen again.
1866 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1868 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1869 not an address sized quantity. Return zero for cache sizes.
1871 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1873 * mips.igen (r3900): r3900 does not support 64 bit integer
1876 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1878 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1880 * configure : Rebuild.
1882 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1884 * configure: Regenerated to track ../common/aclocal.m4 changes.
1886 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1888 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1890 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1892 * configure: Regenerated to track ../common/aclocal.m4 changes.
1893 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1895 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1897 * configure: Regenerated to track ../common/aclocal.m4 changes.
1899 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1901 * interp.c (Max, Min): Comment out functions. Not yet used.
1903 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1905 * configure: Regenerated to track ../common/aclocal.m4 changes.
1907 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1909 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1910 configurable settings for stand-alone simulator.
1912 * configure.in: Added X11 search, just in case.
1914 * configure: Regenerated.
1916 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1918 * interp.c (sim_write, sim_read, load_memory, store_memory):
1919 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1921 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1923 * sim-main.h (GETFCC): Return an unsigned value.
1925 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1927 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1928 (DADD): Result destination is RD not RT.
1930 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1932 * sim-main.h (HIACCESS, LOACCESS): Always define.
1934 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1936 * interp.c (sim_info): Delete.
1938 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1940 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1941 (mips_option_handler): New argument `cpu'.
1942 (sim_open): Update call to sim_add_option_table.
1944 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * mips.igen (CxC1): Add tracing.
1948 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1950 * sim-main.h (Max, Min): Declare.
1952 * interp.c (Max, Min): New functions.
1954 * mips.igen (BC1): Add tracing.
1956 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1958 * interp.c Added memory map for stack in vr4100
1960 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1962 * interp.c (load_memory): Add missing "break"'s.
1964 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1966 * interp.c (sim_store_register, sim_fetch_register): Pass in
1967 length parameter. Return -1.
1969 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1971 * interp.c: Added hardware init hook, fixed warnings.
1973 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1977 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1979 * interp.c (ifetch16): New function.
1981 * sim-main.h (IMEM32): Rename IMEM.
1982 (IMEM16_IMMED): Define.
1984 (DELAY_SLOT): Update.
1986 * m16run.c (sim_engine_run): New file.
1988 * m16.igen: All instructions except LB.
1989 (LB): Call do_load_byte.
1990 * mips.igen (do_load_byte): New function.
1991 (LB): Call do_load_byte.
1993 * mips.igen: Move spec for insn bit size and high bit from here.
1994 * Makefile.in (tmp-igen, tmp-m16): To here.
1996 * m16.dc: New file, decode mips16 instructions.
1998 * Makefile.in (SIM_NO_ALL): Define.
1999 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2001 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2003 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2004 point unit to 32 bit registers.
2005 * configure: Re-generate.
2007 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2009 * configure.in (sim_use_gen): Make IGEN the default simulator
2010 generator for generic 32 and 64 bit mips targets.
2011 * configure: Re-generate.
2013 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2015 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2018 * interp.c (sim_fetch_register, sim_store_register): Read/write
2019 FGR from correct location.
2020 (sim_open): Set size of FGR's according to
2021 WITH_TARGET_FLOATING_POINT_BITSIZE.
2023 * sim-main.h (FGR): Store floating point registers in a separate
2026 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2028 * configure: Regenerated to track ../common/aclocal.m4 changes.
2030 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2032 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2034 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2036 * interp.c (pending_tick): New function. Deliver pending writes.
2038 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2039 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2040 it can handle mixed sized quantites and single bits.
2042 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2044 * interp.c (oengine.h): Do not include when building with IGEN.
2045 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2046 (sim_info): Ditto for PROCESSOR_64BIT.
2047 (sim_monitor): Replace ut_reg with unsigned_word.
2048 (*): Ditto for t_reg.
2049 (LOADDRMASK): Define.
2050 (sim_open): Remove defunct check that host FP is IEEE compliant,
2051 using software to emulate floating point.
2052 (value_fpr, ...): Always compile, was conditional on HASFPU.
2054 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2056 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2059 * interp.c (SD, CPU): Define.
2060 (mips_option_handler): Set flags in each CPU.
2061 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2062 (sim_close): Do not clear STATE, deleted anyway.
2063 (sim_write, sim_read): Assume CPU zero's vm should be used for
2065 (sim_create_inferior): Set the PC for all processors.
2066 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2068 (mips16_entry): Pass correct nr of args to store_word, load_word.
2069 (ColdReset): Cold reset all cpu's.
2070 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2071 (sim_monitor, load_memory, store_memory, signal_exception): Use
2072 `CPU' instead of STATE_CPU.
2075 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2078 * sim-main.h (signal_exception): Add sim_cpu arg.
2079 (SignalException*): Pass both SD and CPU to signal_exception.
2080 * interp.c (signal_exception): Update.
2082 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2084 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2085 address_translation): Ditto
2086 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2088 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2090 * configure: Regenerated to track ../common/aclocal.m4 changes.
2092 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2094 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2096 * mips.igen (model): Map processor names onto BFD name.
2098 * sim-main.h (CPU_CIA): Delete.
2099 (SET_CIA, GET_CIA): Define
2101 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2103 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2106 * configure.in (default_endian): Configure a big-endian simulator
2108 * configure: Re-generate.
2110 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2112 * configure: Regenerated to track ../common/aclocal.m4 changes.
2114 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2116 * interp.c (sim_monitor): Handle Densan monitor outbyte
2117 and inbyte functions.
2119 1997-12-29 Felix Lee <flee@cygnus.com>
2121 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2123 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2125 * Makefile.in (tmp-igen): Arrange for $zero to always be
2126 reset to zero after every instruction.
2128 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2130 * configure: Regenerated to track ../common/aclocal.m4 changes.
2133 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2135 * mips.igen (MSUB): Fix to work like MADD.
2136 * gencode.c (MSUB): Similarly.
2138 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2140 * configure: Regenerated to track ../common/aclocal.m4 changes.
2142 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2144 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2146 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2148 * sim-main.h (sim-fpu.h): Include.
2150 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2151 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2152 using host independant sim_fpu module.
2154 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2156 * interp.c (signal_exception): Report internal errors with SIGABRT
2159 * sim-main.h (C0_CONFIG): New register.
2160 (signal.h): No longer include.
2162 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2164 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2166 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2168 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2170 * mips.igen: Tag vr5000 instructions.
2171 (ANDI): Was missing mipsIV model, fix assembler syntax.
2172 (do_c_cond_fmt): New function.
2173 (C.cond.fmt): Handle mips I-III which do not support CC field
2175 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2176 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2178 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2179 vr5000 which saves LO in a GPR separatly.
2181 * configure.in (enable-sim-igen): For vr5000, select vr5000
2182 specific instructions.
2183 * configure: Re-generate.
2185 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2187 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2189 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2190 fmt_uninterpreted_64 bit cases to switch. Convert to
2193 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2195 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2196 as specified in IV3.2 spec.
2197 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2199 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2201 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2202 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2203 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2204 PENDING_FILL versions of instructions. Simplify.
2206 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2208 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2210 (MTHI, MFHI): Disable code checking HI-LO.
2212 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2214 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2216 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2218 * gencode.c (build_mips16_operands): Replace IPC with cia.
2220 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2221 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2223 (UndefinedResult): Replace function with macro/function
2225 (sim_engine_run): Don't save PC in IPC.
2227 * sim-main.h (IPC): Delete.
2230 * interp.c (signal_exception, store_word, load_word,
2231 address_translation, load_memory, store_memory, cache_op,
2232 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2233 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2234 current instruction address - cia - argument.
2235 (sim_read, sim_write): Call address_translation directly.
2236 (sim_engine_run): Rename variable vaddr to cia.
2237 (signal_exception): Pass cia to sim_monitor
2239 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2240 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2241 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2243 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2244 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2247 * interp.c (signal_exception): Pass restart address to
2250 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2251 idecode.o): Add dependency.
2253 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2255 (DELAY_SLOT): Update NIA not PC with branch address.
2256 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2258 * mips.igen: Use CIA not PC in branch calculations.
2259 (illegal): Call SignalException.
2260 (BEQ, ADDIU): Fix assembler.
2262 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2264 * m16.igen (JALX): Was missing.
2266 * configure.in (enable-sim-igen): New configuration option.
2267 * configure: Re-generate.
2269 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2271 * interp.c (load_memory, store_memory): Delete parameter RAW.
2272 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2273 bypassing {load,store}_memory.
2275 * sim-main.h (ByteSwapMem): Delete definition.
2277 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2279 * interp.c (sim_do_command, sim_commands): Delete mips specific
2280 commands. Handled by module sim-options.
2282 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2283 (WITH_MODULO_MEMORY): Define.
2285 * interp.c (sim_info): Delete code printing memory size.
2287 * interp.c (mips_size): Nee sim_size, delete function.
2289 (monitor, monitor_base, monitor_size): Delete global variables.
2290 (sim_open, sim_close): Delete code creating monitor and other
2291 memory regions. Use sim-memopts module, via sim_do_commandf, to
2292 manage memory regions.
2293 (load_memory, store_memory): Use sim-core for memory model.
2295 * interp.c (address_translation): Delete all memory map code
2296 except line forcing 32 bit addresses.
2298 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2300 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2303 * interp.c (logfh, logfile): Delete globals.
2304 (sim_open, sim_close): Delete code opening & closing log file.
2305 (mips_option_handler): Delete -l and -n options.
2306 (OPTION mips_options): Ditto.
2308 * interp.c (OPTION mips_options): Rename option trace to dinero.
2309 (mips_option_handler): Update.
2311 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2313 * interp.c (fetch_str): New function.
2314 (sim_monitor): Rewrite using sim_read & sim_write.
2315 (sim_open): Check magic number.
2316 (sim_open): Write monitor vectors into memory using sim_write.
2317 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2318 (sim_read, sim_write): Simplify - transfer data one byte at a
2320 (load_memory, store_memory): Clarify meaning of parameter RAW.
2322 * sim-main.h (isHOST): Defete definition.
2323 (isTARGET): Mark as depreciated.
2324 (address_translation): Delete parameter HOST.
2326 * interp.c (address_translation): Delete parameter HOST.
2328 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2332 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2333 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2335 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2337 * mips.igen: Add model filter field to records.
2339 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2341 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2343 interp.c (sim_engine_run): Do not compile function sim_engine_run
2344 when WITH_IGEN == 1.
2346 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2347 target architecture.
2349 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2350 igen. Replace with configuration variables sim_igen_flags /
2353 * m16.igen: New file. Copy mips16 insns here.
2354 * mips.igen: From here.
2356 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2358 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2360 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2362 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2364 * gencode.c (build_instruction): Follow sim_write's lead in using
2365 BigEndianMem instead of !ByteSwapMem.
2367 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2369 * configure.in (sim_gen): Dependent on target, select type of
2370 generator. Always select old style generator.
2372 configure: Re-generate.
2374 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2376 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2377 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2378 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2379 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2380 SIM_@sim_gen@_*, set by autoconf.
2382 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2384 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2386 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2387 CURRENT_FLOATING_POINT instead.
2389 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2390 (address_translation): Raise exception InstructionFetch when
2391 translation fails and isINSTRUCTION.
2393 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2394 sim_engine_run): Change type of of vaddr and paddr to
2396 (address_translation, prefetch, load_memory, store_memory,
2397 cache_op): Change type of vAddr and pAddr to address_word.
2399 * gencode.c (build_instruction): Change type of vaddr and paddr to
2402 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2404 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2405 macro to obtain result of ALU op.
2407 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2409 * interp.c (sim_info): Call profile_print.
2411 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2413 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2415 * sim-main.h (WITH_PROFILE): Do not define, defined in
2416 common/sim-config.h. Use sim-profile module.
2417 (simPROFILE): Delete defintion.
2419 * interp.c (PROFILE): Delete definition.
2420 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2421 (sim_close): Delete code writing profile histogram.
2422 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2424 (sim_engine_run): Delete code profiling the PC.
2426 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2428 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2430 * interp.c (sim_monitor): Make register pointers of type
2433 * sim-main.h: Make registers of type unsigned_word not
2436 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2438 * interp.c (sync_operation): Rename from SyncOperation, make
2439 global, add SD argument.
2440 (prefetch): Rename from Prefetch, make global, add SD argument.
2441 (decode_coproc): Make global.
2443 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2445 * gencode.c (build_instruction): Generate DecodeCoproc not
2446 decode_coproc calls.
2448 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2449 (SizeFGR): Move to sim-main.h
2450 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2451 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2452 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2454 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2455 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2456 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2457 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2458 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2459 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2461 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2463 (sim-alu.h): Include.
2464 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2465 (sim_cia): Typedef to instruction_address.
2467 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2469 * Makefile.in (interp.o): Rename generated file engine.c to
2474 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2476 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2478 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2480 * gencode.c (build_instruction): For "FPSQRT", output correct
2481 number of arguments to Recip.
2483 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2485 * Makefile.in (interp.o): Depends on sim-main.h
2487 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2489 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2490 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2491 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2492 STATE, DSSTATE): Define
2493 (GPR, FGRIDX, ..): Define.
2495 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2496 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2497 (GPR, FGRIDX, ...): Delete macros.
2499 * interp.c: Update names to match defines from sim-main.h
2501 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2503 * interp.c (sim_monitor): Add SD argument.
2504 (sim_warning): Delete. Replace calls with calls to
2506 (sim_error): Delete. Replace calls with sim_io_error.
2507 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2508 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2509 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2511 (mips_size): Rename from sim_size. Add SD argument.
2513 * interp.c (simulator): Delete global variable.
2514 (callback): Delete global variable.
2515 (mips_option_handler, sim_open, sim_write, sim_read,
2516 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2517 sim_size,sim_monitor): Use sim_io_* not callback->*.
2518 (sim_open): ZALLOC simulator struct.
2519 (PROFILE): Do not define.
2521 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2523 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2524 support.h with corresponding code.
2526 * sim-main.h (word64, uword64), support.h: Move definition to
2528 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2531 * Makefile.in: Update dependencies
2532 * interp.c: Do not include.
2534 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2536 * interp.c (address_translation, load_memory, store_memory,
2537 cache_op): Rename to from AddressTranslation et.al., make global,
2540 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2543 * interp.c (SignalException): Rename to signal_exception, make
2546 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2548 * sim-main.h (SignalException, SignalExceptionInterrupt,
2549 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2550 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2551 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2554 * interp.c, support.h: Use.
2556 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2558 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2559 to value_fpr / store_fpr. Add SD argument.
2560 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2561 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2563 * sim-main.h (ValueFPR, StoreFPR): Define.
2565 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2567 * interp.c (sim_engine_run): Check consistency between configure
2568 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2571 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2572 (mips_fpu): Configure WITH_FLOATING_POINT.
2573 (mips_endian): Configure WITH_TARGET_ENDIAN.
2574 * configure: Update.
2576 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2578 * configure: Regenerated to track ../common/aclocal.m4 changes.
2580 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2582 * configure: Regenerated.
2584 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2586 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2588 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * gencode.c (print_igen_insn_models): Assume certain architectures
2591 include all mips* instructions.
2592 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2595 * Makefile.in (tmp.igen): Add target. Generate igen input from
2598 * gencode.c (FEATURE_IGEN): Define.
2599 (main): Add --igen option. Generate output in igen format.
2600 (process_instructions): Format output according to igen option.
2601 (print_igen_insn_format): New function.
2602 (print_igen_insn_models): New function.
2603 (process_instructions): Only issue warnings and ignore
2604 instructions when no FEATURE_IGEN.
2606 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2608 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2611 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2613 * configure: Regenerated to track ../common/aclocal.m4 changes.
2615 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2617 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2618 SIM_RESERVED_BITS): Delete, moved to common.
2619 (SIM_EXTRA_CFLAGS): Update.
2621 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2623 * configure.in: Configure non-strict memory alignment.
2624 * configure: Regenerated to track ../common/aclocal.m4 changes.
2626 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2628 * configure: Regenerated to track ../common/aclocal.m4 changes.
2630 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2632 * gencode.c (SDBBP,DERET): Added (3900) insns.
2633 (RFE): Turn on for 3900.
2634 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2635 (dsstate): Made global.
2636 (SUBTARGET_R3900): Added.
2637 (CANCELDELAYSLOT): New.
2638 (SignalException): Ignore SystemCall rather than ignore and
2639 terminate. Add DebugBreakPoint handling.
2640 (decode_coproc): New insns RFE, DERET; and new registers Debug
2641 and DEPC protected by SUBTARGET_R3900.
2642 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2644 * Makefile.in,configure.in: Add mips subtarget option.
2645 * configure: Update.
2647 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2649 * gencode.c: Add r3900 (tx39).
2652 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2654 * gencode.c (build_instruction): Don't need to subtract 4 for
2657 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2659 * interp.c: Correct some HASFPU problems.
2661 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2663 * configure: Regenerated to track ../common/aclocal.m4 changes.
2665 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2667 * interp.c (mips_options): Fix samples option short form, should
2670 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2672 * interp.c (sim_info): Enable info code. Was just returning.
2674 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2676 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2679 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2681 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2683 (build_instruction): Ditto for LL.
2685 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2687 * configure: Regenerated to track ../common/aclocal.m4 changes.
2689 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2691 * configure: Regenerated to track ../common/aclocal.m4 changes.
2694 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2696 * interp.c (sim_open): Add call to sim_analyze_program, update
2699 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2701 * interp.c (sim_kill): Delete.
2702 (sim_create_inferior): Add ABFD argument. Set PC from same.
2703 (sim_load): Move code initializing trap handlers from here.
2704 (sim_open): To here.
2705 (sim_load): Delete, use sim-hload.c.
2707 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2709 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2711 * configure: Regenerated to track ../common/aclocal.m4 changes.
2714 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2716 * interp.c (sim_open): Add ABFD argument.
2717 (sim_load): Move call to sim_config from here.
2718 (sim_open): To here. Check return status.
2720 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2722 * gencode.c (build_instruction): Two arg MADD should
2723 not assign result to $0.
2725 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2727 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2728 * sim/mips/configure.in: Regenerate.
2730 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2732 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2733 signed8, unsigned8 et.al. types.
2735 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2736 hosts when selecting subreg.
2738 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2740 * interp.c (sim_engine_run): Reset the ZERO register to zero
2741 regardless of FEATURE_WARN_ZERO.
2742 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2744 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2747 (SignalException): For BreakPoints ignore any mode bits and just
2749 (SignalException): Always set the CAUSE register.
2751 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2753 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2754 exception has been taken.
2756 * interp.c: Implement the ERET and mt/f sr instructions.
2758 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2760 * interp.c (SignalException): Don't bother restarting an
2763 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * interp.c (SignalException): Really take an interrupt.
2766 (interrupt_event): Only deliver interrupts when enabled.
2768 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2770 * interp.c (sim_info): Only print info when verbose.
2771 (sim_info) Use sim_io_printf for output.
2773 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2775 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2778 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2780 * interp.c (sim_do_command): Check for common commands if a
2781 simulator specific command fails.
2783 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2785 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2786 and simBE when DEBUG is defined.
2788 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2790 * interp.c (interrupt_event): New function. Pass exception event
2791 onto exception handler.
2793 * configure.in: Check for stdlib.h.
2794 * configure: Regenerate.
2796 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2797 variable declaration.
2798 (build_instruction): Initialize memval1.
2799 (build_instruction): Add UNUSED attribute to byte, bigend,
2801 (build_operands): Ditto.
2803 * interp.c: Fix GCC warnings.
2804 (sim_get_quit_code): Delete.
2806 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2807 * Makefile.in: Ditto.
2808 * configure: Re-generate.
2810 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2812 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2814 * interp.c (mips_option_handler): New function parse argumes using
2816 (myname): Replace with STATE_MY_NAME.
2817 (sim_open): Delete check for host endianness - performed by
2819 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2820 (sim_open): Move much of the initialization from here.
2821 (sim_load): To here. After the image has been loaded and
2823 (sim_open): Move ColdReset from here.
2824 (sim_create_inferior): To here.
2825 (sim_open): Make FP check less dependant on host endianness.
2827 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2829 * interp.c (sim_set_callbacks): Delete.
2831 * interp.c (membank, membank_base, membank_size): Replace with
2832 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2833 (sim_open): Remove call to callback->init. gdb/run do this.
2837 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2839 * interp.c (big_endian_p): Delete, replaced by
2840 current_target_byte_order.
2842 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2844 * interp.c (host_read_long, host_read_word, host_swap_word,
2845 host_swap_long): Delete. Using common sim-endian.
2846 (sim_fetch_register, sim_store_register): Use H2T.
2847 (pipeline_ticks): Delete. Handled by sim-events.
2849 (sim_engine_run): Update.
2851 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2853 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2855 (SignalException): To here. Signal using sim_engine_halt.
2856 (sim_stop_reason): Delete, moved to common.
2858 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2860 * interp.c (sim_open): Add callback argument.
2861 (sim_set_callbacks): Delete SIM_DESC argument.
2864 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2866 * Makefile.in (SIM_OBJS): Add common modules.
2868 * interp.c (sim_set_callbacks): Also set SD callback.
2869 (set_endianness, xfer_*, swap_*): Delete.
2870 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2871 Change to functions using sim-endian macros.
2872 (control_c, sim_stop): Delete, use common version.
2873 (simulate): Convert into.
2874 (sim_engine_run): This function.
2875 (sim_resume): Delete.
2877 * interp.c (simulation): New variable - the simulator object.
2878 (sim_kind): Delete global - merged into simulation.
2879 (sim_load): Cleanup. Move PC assignment from here.
2880 (sim_create_inferior): To here.
2882 * sim-main.h: New file.
2883 * interp.c (sim-main.h): Include.
2885 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2887 * configure: Regenerated to track ../common/aclocal.m4 changes.
2889 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2891 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2893 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2895 * gencode.c (build_instruction): DIV instructions: check
2896 for division by zero and integer overflow before using
2897 host's division operation.
2899 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2901 * Makefile.in (SIM_OBJS): Add sim-load.o.
2902 * interp.c: #include bfd.h.
2903 (target_byte_order): Delete.
2904 (sim_kind, myname, big_endian_p): New static locals.
2905 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2906 after argument parsing. Recognize -E arg, set endianness accordingly.
2907 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2908 load file into simulator. Set PC from bfd.
2909 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2910 (set_endianness): Use big_endian_p instead of target_byte_order.
2912 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2914 * interp.c (sim_size): Delete prototype - conflicts with
2915 definition in remote-sim.h. Correct definition.
2917 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2919 * configure: Regenerated to track ../common/aclocal.m4 changes.
2922 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2924 * interp.c (sim_open): New arg `kind'.
2926 * configure: Regenerated to track ../common/aclocal.m4 changes.
2928 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2930 * configure: Regenerated to track ../common/aclocal.m4 changes.
2932 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2934 * interp.c (sim_open): Set optind to 0 before calling getopt.
2936 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2938 * configure: Regenerated to track ../common/aclocal.m4 changes.
2940 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2942 * interp.c : Replace uses of pr_addr with pr_uword64
2943 where the bit length is always 64 independent of SIM_ADDR.
2944 (pr_uword64) : added.
2946 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2948 * configure: Re-generate.
2950 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2952 * configure: Regenerate to track ../common/aclocal.m4 changes.
2954 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2956 * interp.c (sim_open): New SIM_DESC result. Argument is now
2958 (other sim_*): New SIM_DESC argument.
2960 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2962 * interp.c: Fix printing of addresses for non-64-bit targets.
2963 (pr_addr): Add function to print address based on size.
2965 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2967 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2969 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2971 * gencode.c (build_mips16_operands): Correct computation of base
2972 address for extended PC relative instruction.
2974 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2976 * interp.c (mips16_entry): Add support for floating point cases.
2977 (SignalException): Pass floating point cases to mips16_entry.
2978 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2980 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2982 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2983 and then set the state to fmt_uninterpreted.
2984 (COP_SW): Temporarily set the state to fmt_word while calling
2987 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2989 * gencode.c (build_instruction): The high order may be set in the
2990 comparison flags at any ISA level, not just ISA 4.
2992 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2994 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2995 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2996 * configure.in: sinclude ../common/aclocal.m4.
2997 * configure: Regenerated.
2999 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3001 * configure: Rebuild after change to aclocal.m4.
3003 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3005 * configure configure.in Makefile.in: Update to new configure
3006 scheme which is more compatible with WinGDB builds.
3007 * configure.in: Improve comment on how to run autoconf.
3008 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3009 * Makefile.in: Use autoconf substitution to install common
3012 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3014 * gencode.c (build_instruction): Use BigEndianCPU instead of
3017 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3019 * interp.c (sim_monitor): Make output to stdout visible in
3020 wingdb's I/O log window.
3022 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3024 * support.h: Undo previous change to SIGTRAP
3027 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3029 * interp.c (store_word, load_word): New static functions.
3030 (mips16_entry): New static function.
3031 (SignalException): Look for mips16 entry and exit instructions.
3032 (simulate): Use the correct index when setting fpr_state after
3033 doing a pending move.
3035 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3037 * interp.c: Fix byte-swapping code throughout to work on
3038 both little- and big-endian hosts.
3040 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3042 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3043 with gdb/config/i386/xm-windows.h.
3045 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3047 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3048 that messes up arithmetic shifts.
3050 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3052 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3053 SIGTRAP and SIGQUIT for _WIN32.
3055 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3057 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3058 force a 64 bit multiplication.
3059 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3060 destination register is 0, since that is the default mips16 nop
3063 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3065 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3066 (build_endian_shift): Don't check proc64.
3067 (build_instruction): Always set memval to uword64. Cast op2 to
3068 uword64 when shifting it left in memory instructions. Always use
3069 the same code for stores--don't special case proc64.
3071 * gencode.c (build_mips16_operands): Fix base PC value for PC
3073 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3075 * interp.c (simJALDELAYSLOT): Define.
3076 (JALDELAYSLOT): Define.
3077 (INDELAYSLOT, INJALDELAYSLOT): Define.
3078 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3080 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3082 * interp.c (sim_open): add flush_cache as a PMON routine
3083 (sim_monitor): handle flush_cache by ignoring it
3085 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3087 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3089 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3090 (BigEndianMem): Rename to ByteSwapMem and change sense.
3091 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3092 BigEndianMem references to !ByteSwapMem.
3093 (set_endianness): New function, with prototype.
3094 (sim_open): Call set_endianness.
3095 (sim_info): Use simBE instead of BigEndianMem.
3096 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3097 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3098 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3099 ifdefs, keeping the prototype declaration.
3100 (swap_word): Rewrite correctly.
3101 (ColdReset): Delete references to CONFIG. Delete endianness related
3102 code; moved to set_endianness.
3104 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3106 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3107 * interp.c (CHECKHILO): Define away.
3108 (simSIGINT): New macro.
3109 (membank_size): Increase from 1MB to 2MB.
3110 (control_c): New function.
3111 (sim_resume): Rename parameter signal to signal_number. Add local
3112 variable prev. Call signal before and after simulate.
3113 (sim_stop_reason): Add simSIGINT support.
3114 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3116 (sim_warning): Delete call to SignalException. Do call printf_filtered
3118 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3119 a call to sim_warning.
3121 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3123 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3124 16 bit instructions.
3126 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3128 Add support for mips16 (16 bit MIPS implementation):
3129 * gencode.c (inst_type): Add mips16 instruction encoding types.
3130 (GETDATASIZEINSN): Define.
3131 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3132 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3134 (MIPS16_DECODE): New table, for mips16 instructions.
3135 (bitmap_val): New static function.
3136 (struct mips16_op): Define.
3137 (mips16_op_table): New table, for mips16 operands.
3138 (build_mips16_operands): New static function.
3139 (process_instructions): If PC is odd, decode a mips16
3140 instruction. Break out instruction handling into new
3141 build_instruction function.
3142 (build_instruction): New static function, broken out of
3143 process_instructions. Check modifiers rather than flags for SHIFT
3144 bit count and m[ft]{hi,lo} direction.
3145 (usage): Pass program name to fprintf.
3146 (main): Remove unused variable this_option_optind. Change
3147 ``*loptarg++'' to ``loptarg++''.
3148 (my_strtoul): Parenthesize && within ||.
3149 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3150 (simulate): If PC is odd, fetch a 16 bit instruction, and
3151 increment PC by 2 rather than 4.
3152 * configure.in: Add case for mips16*-*-*.
3153 * configure: Rebuild.
3155 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3157 * interp.c: Allow -t to enable tracing in standalone simulator.
3158 Fix garbage output in trace file and error messages.
3160 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3162 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3163 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3164 * configure.in: Simplify using macros in ../common/aclocal.m4.
3165 * configure: Regenerated.
3166 * tconfig.in: New file.
3168 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3170 * interp.c: Fix bugs in 64-bit port.
3171 Use ansi function declarations for msvc compiler.
3172 Initialize and test file pointer in trace code.
3173 Prevent duplicate definition of LAST_EMED_REGNUM.
3175 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3177 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3179 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3181 * interp.c (SignalException): Check for explicit terminating
3183 * gencode.c: Pass instruction value through SignalException()
3184 calls for Trap, Breakpoint and Syscall.
3186 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3188 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3189 only used on those hosts that provide it.
3190 * configure.in: Add sqrt() to list of functions to be checked for.
3191 * config.in: Re-generated.
3192 * configure: Re-generated.
3194 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3196 * gencode.c (process_instructions): Call build_endian_shift when
3197 expanding STORE RIGHT, to fix swr.
3198 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3199 clear the high bits.
3200 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3201 Fix float to int conversions to produce signed values.
3203 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3205 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3206 (process_instructions): Correct handling of nor instruction.
3207 Correct shift count for 32 bit shift instructions. Correct sign
3208 extension for arithmetic shifts to not shift the number of bits in
3209 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3210 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3212 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3213 It's OK to have a mult follow a mult. What's not OK is to have a
3214 mult follow an mfhi.
3215 (Convert): Comment out incorrect rounding code.
3217 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3219 * interp.c (sim_monitor): Improved monitor printf
3220 simulation. Tidied up simulator warnings, and added "--log" option
3221 for directing warning message output.
3222 * gencode.c: Use sim_warning() rather than WARNING macro.
3224 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3226 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3227 getopt1.o, rather than on gencode.c. Link objects together.
3228 Don't link against -liberty.
3229 (gencode.o, getopt.o, getopt1.o): New targets.
3230 * gencode.c: Include <ctype.h> and "ansidecl.h".
3231 (AND): Undefine after including "ansidecl.h".
3232 (ULONG_MAX): Define if not defined.
3233 (OP_*): Don't define macros; now defined in opcode/mips.h.
3234 (main): Call my_strtoul rather than strtoul.
3235 (my_strtoul): New static function.
3237 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3239 * gencode.c (process_instructions): Generate word64 and uword64
3240 instead of `long long' and `unsigned long long' data types.
3241 * interp.c: #include sysdep.h to get signals, and define default
3243 * (Convert): Work around for Visual-C++ compiler bug with type
3245 * support.h: Make things compile under Visual-C++ by using
3246 __int64 instead of `long long'. Change many refs to long long
3247 into word64/uword64 typedefs.
3249 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3251 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3252 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3254 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3255 (AC_PROG_INSTALL): Added.
3256 (AC_PROG_CC): Moved to before configure.host call.
3257 * configure: Rebuilt.
3259 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3261 * configure.in: Define @SIMCONF@ depending on mips target.
3262 * configure: Rebuild.
3263 * Makefile.in (run): Add @SIMCONF@ to control simulator
3265 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3266 * interp.c: Remove some debugging, provide more detailed error
3267 messages, update memory accesses to use LOADDRMASK.
3269 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3271 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3272 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3274 * configure: Rebuild.
3275 * config.in: New file, generated by autoheader.
3276 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3277 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3278 HAVE_ANINT and HAVE_AINT, as appropriate.
3279 * Makefile.in (run): Use @LIBS@ rather than -lm.
3280 (interp.o): Depend upon config.h.
3281 (Makefile): Just rebuild Makefile.
3282 (clean): Remove stamp-h.
3283 (mostlyclean): Make the same as clean, not as distclean.
3284 (config.h, stamp-h): New targets.
3286 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3288 * interp.c (ColdReset): Fix boolean test. Make all simulator
3291 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3293 * interp.c (xfer_direct_word, xfer_direct_long,
3294 swap_direct_word, swap_direct_long, xfer_big_word,
3295 xfer_big_long, xfer_little_word, xfer_little_long,
3296 swap_word,swap_long): Added.
3297 * interp.c (ColdReset): Provide function indirection to
3298 host<->simulated_target transfer routines.
3299 * interp.c (sim_store_register, sim_fetch_register): Updated to
3300 make use of indirected transfer routines.
3302 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3304 * gencode.c (process_instructions): Ensure FP ABS instruction
3306 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3307 system call support.
3309 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3311 * interp.c (sim_do_command): Complain if callback structure not
3314 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3316 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3317 support for Sun hosts.
3318 * Makefile.in (gencode): Ensure the host compiler and libraries
3319 used for cross-hosted build.
3321 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3323 * interp.c, gencode.c: Some more (TODO) tidying.
3325 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3327 * gencode.c, interp.c: Replaced explicit long long references with
3328 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3329 * support.h (SET64LO, SET64HI): Macros added.
3331 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3333 * configure: Regenerate with autoconf 2.7.
3335 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3337 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3338 * support.h: Remove superfluous "1" from #if.
3339 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3341 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3343 * interp.c (StoreFPR): Control UndefinedResult() call on
3344 WARN_RESULT manifest.
3346 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3348 * gencode.c: Tidied instruction decoding, and added FP instruction
3351 * interp.c: Added dineroIII, and BSD profiling support. Also
3352 run-time FP handling.
3354 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3356 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3357 gencode.c, interp.c, support.h: created.