1 2015-04-06 Mike Frysinger <vapier@gentoo.org>
3 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
5 2015-04-01 Mike Frysinger <vapier@gentoo.org>
7 * tconfig.h (SIM_HAVE_PROFILE): Delete.
9 2015-03-31 Mike Frysinger <vapier@gentoo.org>
11 * config.in, configure: Regenerate.
13 2015-03-24 Mike Frysinger <vapier@gentoo.org>
15 * interp.c (sim_pc_get): New function.
17 2015-03-24 Mike Frysinger <vapier@gentoo.org>
19 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
20 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
22 2015-03-24 Mike Frysinger <vapier@gentoo.org>
24 * configure: Regenerate.
26 2015-03-23 Mike Frysinger <vapier@gentoo.org>
28 * configure: Regenerate.
30 2015-03-23 Mike Frysinger <vapier@gentoo.org>
32 * configure: Regenerate.
33 * configure.ac (mips_extra_objs): Delete.
34 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
35 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
37 2015-03-23 Mike Frysinger <vapier@gentoo.org>
39 * configure: Regenerate.
40 * configure.ac: Delete sim_hw checks for dv-sockser.
42 2015-03-16 Mike Frysinger <vapier@gentoo.org>
44 * config.in, configure: Regenerate.
45 * tconfig.in: Rename file ...
46 * tconfig.h: ... here.
48 2015-03-15 Mike Frysinger <vapier@gentoo.org>
50 * tconfig.in: Delete includes.
51 [HAVE_DV_SOCKSER]: Delete.
53 2015-03-14 Mike Frysinger <vapier@gentoo.org>
55 * Makefile.in (SIM_RUN_OBJS): Delete.
57 2015-03-14 Mike Frysinger <vapier@gentoo.org>
59 * configure.ac (AC_CHECK_HEADERS): Delete.
60 * aclocal.m4, configure: Regenerate.
62 2014-08-19 Alan Modra <amodra@gmail.com>
64 * configure: Regenerate.
66 2014-08-15 Roland McGrath <mcgrathr@google.com>
68 * configure: Regenerate.
69 * config.in: Regenerate.
71 2014-03-04 Mike Frysinger <vapier@gentoo.org>
73 * configure: Regenerate.
75 2013-09-23 Alan Modra <amodra@gmail.com>
77 * configure: Regenerate.
79 2013-06-03 Mike Frysinger <vapier@gentoo.org>
81 * aclocal.m4, configure: Regenerate.
83 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
87 2013-03-26 Mike Frysinger <vapier@gentoo.org>
89 * configure: Regenerate.
91 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
93 * configure.ac: Address use of dv-sockser.o.
94 * tconfig.in: Conditionalize use of dv_sockser_install.
95 * configure: Regenerated.
96 * config.in: Regenerated.
98 2012-10-04 Chao-ying Fu <fu@mips.com>
99 Steve Ellcey <sellcey@mips.com>
101 * mips/mips3264r2.igen (rdhwr): New.
103 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
105 * configure.ac: Always link against dv-sockser.o.
106 * configure: Regenerate.
108 2012-06-15 Joel Brobecker <brobecker@adacore.com>
110 * config.in, configure: Regenerate.
112 2012-05-18 Nick Clifton <nickc@redhat.com>
115 * interp.c: Include config.h before system header files.
117 2012-03-24 Mike Frysinger <vapier@gentoo.org>
119 * aclocal.m4, config.in, configure: Regenerate.
121 2011-12-03 Mike Frysinger <vapier@gentoo.org>
123 * aclocal.m4: New file.
124 * configure: Regenerate.
126 2011-10-19 Mike Frysinger <vapier@gentoo.org>
128 * configure: Regenerate after common/acinclude.m4 update.
130 2011-10-17 Mike Frysinger <vapier@gentoo.org>
132 * configure.ac: Change include to common/acinclude.m4.
134 2011-10-17 Mike Frysinger <vapier@gentoo.org>
136 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
137 call. Replace common.m4 include with SIM_AC_COMMON.
138 * configure: Regenerate.
140 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
142 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
144 (tmp-mach-multi): Exit early when igen fails.
146 2011-07-05 Mike Frysinger <vapier@gentoo.org>
148 * interp.c (sim_do_command): Delete.
150 2011-02-14 Mike Frysinger <vapier@gentoo.org>
152 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
153 (tx3904sio_fifo_reset): Likewise.
154 * interp.c (sim_monitor): Likewise.
156 2010-04-14 Mike Frysinger <vapier@gentoo.org>
158 * interp.c (sim_write): Add const to buffer arg.
160 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
162 * interp.c: Don't include sysdep.h
164 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
166 * configure: Regenerate.
168 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
170 * config.in: Regenerate.
171 * configure: Likewise.
173 * configure: Regenerate.
175 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
177 * configure: Regenerate to track ../common/common.m4 changes.
180 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
181 Daniel Jacobowitz <dan@codesourcery.com>
182 Joseph Myers <joseph@codesourcery.com>
184 * configure: Regenerate.
186 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
188 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
189 that unconditionally allows fmt_ps.
190 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
191 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
192 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
193 filter from 64,f to 32,f.
194 (PREFX): Change filter from 64 to 32.
195 (LDXC1, LUXC1): Provide separate mips32r2 implementations
196 that use do_load_double instead of do_load. Make both LUXC1
197 versions unpredictable if SizeFGR () != 64.
198 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
199 instead of do_store. Remove unused variable. Make both SUXC1
200 versions unpredictable if SizeFGR () != 64.
202 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
204 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
205 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
206 shifts for that case.
208 2007-09-04 Nick Clifton <nickc@redhat.com>
210 * interp.c (options enum): Add OPTION_INFO_MEMORY.
211 (display_mem_info): New static variable.
212 (mips_option_handler): Handle OPTION_INFO_MEMORY.
213 (mips_options): Add info-memory and memory-info.
214 (sim_open): After processing the command line and board
215 specification, check display_mem_info. If it is set then
216 call the real handler for the --memory-info command line
219 2007-08-24 Joel Brobecker <brobecker@adacore.com>
221 * configure.ac: Change license of multi-run.c to GPL version 3.
222 * configure: Regenerate.
224 2007-06-28 Richard Sandiford <richard@codesourcery.com>
226 * configure.ac, configure: Revert last patch.
228 2007-06-26 Richard Sandiford <richard@codesourcery.com>
230 * configure.ac (sim_mipsisa3264_configs): New variable.
231 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
232 every configuration support all four targets, using the triplet to
233 determine the default.
234 * configure: Regenerate.
236 2007-06-25 Richard Sandiford <richard@codesourcery.com>
238 * Makefile.in (m16run.o): New rule.
240 2007-05-15 Thiemo Seufer <ths@mips.com>
242 * mips3264r2.igen (DSHD): Fix compile warning.
244 2007-05-14 Thiemo Seufer <ths@mips.com>
246 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
247 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
248 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
249 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
252 2007-03-01 Thiemo Seufer <ths@mips.com>
254 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
257 2007-02-20 Thiemo Seufer <ths@mips.com>
259 * dsp.igen: Update copyright notice.
260 * dsp2.igen: Fix copyright notice.
262 2007-02-20 Thiemo Seufer <ths@mips.com>
263 Chao-Ying Fu <fu@mips.com>
265 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
266 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
267 Add dsp2 to sim_igen_machine.
268 * configure: Regenerate.
269 * dsp.igen (do_ph_op): Add MUL support when op = 2.
270 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
271 (mulq_rs.ph): Use do_ph_mulq.
272 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
273 * mips.igen: Add dsp2 model and include dsp2.igen.
274 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
275 for *mips32r2, *mips64r2, *dsp.
276 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
277 for *mips32r2, *mips64r2, *dsp2.
278 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
280 2007-02-19 Thiemo Seufer <ths@mips.com>
281 Nigel Stephens <nigel@mips.com>
283 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
284 jumps with hazard barrier.
286 2007-02-19 Thiemo Seufer <ths@mips.com>
287 Nigel Stephens <nigel@mips.com>
289 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
290 after each call to sim_io_write.
292 2007-02-19 Thiemo Seufer <ths@mips.com>
293 Nigel Stephens <nigel@mips.com>
295 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
296 supported by this simulator.
297 (decode_coproc): Recognise additional CP0 Config registers
300 2007-02-19 Thiemo Seufer <ths@mips.com>
301 Nigel Stephens <nigel@mips.com>
302 David Ung <davidu@mips.com>
304 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
305 uninterpreted formats. If fmt is one of the uninterpreted types
306 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
307 fmt_word, and fmt_uninterpreted_64 like fmt_long.
308 (store_fpr): When writing an invalid odd register, set the
309 matching even register to fmt_unknown, not the following register.
310 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
311 the the memory window at offset 0 set by --memory-size command
313 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
315 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
317 (sim_monitor): When returning the memory size to the MIPS
318 application, use the value in STATE_MEM_SIZE, not an arbitrary
320 (cop_lw): Don' mess around with FPR_STATE, just pass
321 fmt_uninterpreted_32 to StoreFPR.
323 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
325 * mips.igen (not_word_value): Single version for mips32, mips64
328 2007-02-19 Thiemo Seufer <ths@mips.com>
329 Nigel Stephens <nigel@mips.com>
331 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
334 2007-02-17 Thiemo Seufer <ths@mips.com>
336 * configure.ac (mips*-sde-elf*): Move in front of generic machine
338 * configure: Regenerate.
340 2007-02-17 Thiemo Seufer <ths@mips.com>
342 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
343 Add mdmx to sim_igen_machine.
344 (mipsisa64*-*-*): Likewise. Remove dsp.
345 (mipsisa32*-*-*): Remove dsp.
346 * configure: Regenerate.
348 2007-02-13 Thiemo Seufer <ths@mips.com>
350 * configure.ac: Add mips*-sde-elf* target.
351 * configure: Regenerate.
353 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
355 * acconfig.h: Remove.
356 * config.in, configure: Regenerate.
358 2006-11-07 Thiemo Seufer <ths@mips.com>
360 * dsp.igen (do_w_op): Fix compiler warning.
362 2006-08-29 Thiemo Seufer <ths@mips.com>
363 David Ung <davidu@mips.com>
365 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
367 * configure: Regenerate.
368 * mips.igen (model): Add smartmips.
369 (MADDU): Increment ACX if carry.
370 (do_mult): Clear ACX.
371 (ROR,RORV): Add smartmips.
372 (include): Include smartmips.igen.
373 * sim-main.h (ACX): Set to REGISTERS[89].
374 * smartmips.igen: New file.
376 2006-08-29 Thiemo Seufer <ths@mips.com>
377 David Ung <davidu@mips.com>
379 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
380 mips3264r2.igen. Add missing dependency rules.
381 * m16e.igen: Support for mips16e save/restore instructions.
383 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
385 * configure: Regenerated.
387 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
389 * configure: Regenerated.
391 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
393 * configure: Regenerated.
395 2006-05-15 Chao-ying Fu <fu@mips.com>
397 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
399 2006-04-18 Nick Clifton <nickc@redhat.com>
401 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
404 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
406 * configure: Regenerate.
408 2005-12-14 Chao-ying Fu <fu@mips.com>
410 * Makefile.in (SIM_OBJS): Add dsp.o.
411 (dsp.o): New dependency.
412 (IGEN_INCLUDE): Add dsp.igen.
413 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
414 mipsisa64*-*-*): Add dsp to sim_igen_machine.
415 * configure: Regenerate.
416 * mips.igen: Add dsp model and include dsp.igen.
417 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
418 because these instructions are extended in DSP ASE.
419 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
420 adding 6 DSP accumulator registers and 1 DSP control register.
421 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
422 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
423 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
424 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
425 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
426 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
427 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
428 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
429 DSPCR_CCOND_SMASK): New define.
430 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
431 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
433 2005-07-08 Ian Lance Taylor <ian@airs.com>
435 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
437 2005-06-16 David Ung <davidu@mips.com>
438 Nigel Stephens <nigel@mips.com>
440 * mips.igen: New mips16e model and include m16e.igen.
441 (check_u64): Add mips16e tag.
442 * m16e.igen: New file for MIPS16e instructions.
443 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
444 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
446 * configure: Regenerate.
448 2005-05-26 David Ung <davidu@mips.com>
450 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
451 tags to all instructions which are applicable to the new ISAs.
452 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
454 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
456 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
458 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
459 * configure: Regenerate.
461 2005-03-23 Mark Kettenis <kettenis@gnu.org>
463 * configure: Regenerate.
465 2005-01-14 Andrew Cagney <cagney@gnu.org>
467 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
468 explicit call to AC_CONFIG_HEADER.
469 * configure: Regenerate.
471 2005-01-12 Andrew Cagney <cagney@gnu.org>
473 * configure.ac: Update to use ../common/common.m4.
474 * configure: Re-generate.
476 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
478 * configure: Regenerated to track ../common/aclocal.m4 changes.
480 2005-01-07 Andrew Cagney <cagney@gnu.org>
482 * configure.ac: Rename configure.in, require autoconf 2.59.
483 * configure: Re-generate.
485 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
487 * configure: Regenerate for ../common/aclocal.m4 update.
489 2004-09-24 Monika Chaddha <monika@acmet.com>
491 Committed by Andrew Cagney.
492 * m16.igen (CMP, CMPI): Fix assembler.
494 2004-08-18 Chris Demetriou <cgd@broadcom.com>
496 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
497 * configure: Regenerate.
499 2004-06-25 Chris Demetriou <cgd@broadcom.com>
501 * configure.in (sim_m16_machine): Include mipsIII.
502 * configure: Regenerate.
504 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
506 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
508 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
510 2004-04-10 Chris Demetriou <cgd@broadcom.com>
512 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
514 2004-04-09 Chris Demetriou <cgd@broadcom.com>
516 * mips.igen (check_fmt): Remove.
517 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
518 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
519 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
520 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
521 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
522 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
523 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
524 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
525 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
526 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
528 2004-04-09 Chris Demetriou <cgd@broadcom.com>
530 * sb1.igen (check_sbx): New function.
531 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
533 2004-03-29 Chris Demetriou <cgd@broadcom.com>
534 Richard Sandiford <rsandifo@redhat.com>
536 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
537 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
538 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
539 separate implementations for mipsIV and mipsV. Use new macros to
540 determine whether the restrictions apply.
542 2004-01-19 Chris Demetriou <cgd@broadcom.com>
544 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
545 (check_mult_hilo): Improve comments.
546 (check_div_hilo): Likewise. Also, fork off a new version
547 to handle mips32/mips64 (since there are no hazards to check
550 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
552 * mips.igen (do_dmultx): Fix check for negative operands.
554 2003-05-16 Ian Lance Taylor <ian@airs.com>
556 * Makefile.in (SHELL): Make sure this is defined.
557 (various): Use $(SHELL) whenever we invoke move-if-change.
559 2003-05-03 Chris Demetriou <cgd@broadcom.com>
561 * cp1.c: Tweak attribution slightly.
564 * mdmx.igen: Likewise.
565 * mips3d.igen: Likewise.
566 * sb1.igen: Likewise.
568 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
570 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
573 2003-02-27 Andrew Cagney <cagney@redhat.com>
575 * interp.c (sim_open): Rename _bfd to bfd.
576 (sim_create_inferior): Ditto.
578 2003-01-14 Chris Demetriou <cgd@broadcom.com>
580 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
582 2003-01-14 Chris Demetriou <cgd@broadcom.com>
584 * mips.igen (EI, DI): Remove.
586 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
588 * Makefile.in (tmp-run-multi): Fix mips16 filter.
590 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
591 Andrew Cagney <ac131313@redhat.com>
592 Gavin Romig-Koch <gavin@redhat.com>
593 Graydon Hoare <graydon@redhat.com>
594 Aldy Hernandez <aldyh@redhat.com>
595 Dave Brolley <brolley@redhat.com>
596 Chris Demetriou <cgd@broadcom.com>
598 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
599 (sim_mach_default): New variable.
600 (mips64vr-*-*, mips64vrel-*-*): New configurations.
601 Add a new simulator generator, MULTI.
602 * configure: Regenerate.
603 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
604 (multi-run.o): New dependency.
605 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
606 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
607 (tmp-multi): Combine them.
608 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
609 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
610 (distclean-extra): New rule.
611 * sim-main.h: Include bfd.h.
612 (MIPS_MACH): New macro.
613 * mips.igen (vr4120, vr5400, vr5500): New models.
614 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
615 * vr.igen: Replace with new version.
617 2003-01-04 Chris Demetriou <cgd@broadcom.com>
619 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
620 * configure: Regenerate.
622 2002-12-31 Chris Demetriou <cgd@broadcom.com>
624 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
625 * mips.igen: Remove all invocations of check_branch_bug and
628 2002-12-16 Chris Demetriou <cgd@broadcom.com>
630 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
632 2002-07-30 Chris Demetriou <cgd@broadcom.com>
634 * mips.igen (do_load_double, do_store_double): New functions.
635 (LDC1, SDC1): Rename to...
636 (LDC1b, SDC1b): respectively.
637 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
639 2002-07-29 Michael Snyder <msnyder@redhat.com>
641 * cp1.c (fp_recip2): Modify initialization expression so that
642 GCC will recognize it as constant.
644 2002-06-18 Chris Demetriou <cgd@broadcom.com>
646 * mdmx.c (SD_): Delete.
647 (Unpredictable): Re-define, for now, to directly invoke
648 unpredictable_action().
649 (mdmx_acc_op): Fix error in .ob immediate handling.
651 2002-06-18 Andrew Cagney <cagney@redhat.com>
653 * interp.c (sim_firmware_command): Initialize `address'.
655 2002-06-16 Andrew Cagney <ac131313@redhat.com>
657 * configure: Regenerated to track ../common/aclocal.m4 changes.
659 2002-06-14 Chris Demetriou <cgd@broadcom.com>
660 Ed Satterthwaite <ehs@broadcom.com>
662 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
663 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
664 * mips.igen: Include mips3d.igen.
665 (mips3d): New model name for MIPS-3D ASE instructions.
666 (CVT.W.fmt): Don't use this instruction for word (source) format
668 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
669 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
670 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
671 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
672 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
673 (RSquareRoot1, RSquareRoot2): New macros.
674 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
675 (fp_rsqrt2): New functions.
676 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
677 * configure: Regenerate.
679 2002-06-13 Chris Demetriou <cgd@broadcom.com>
680 Ed Satterthwaite <ehs@broadcom.com>
682 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
683 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
684 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
685 (convert): Note that this function is not used for paired-single
687 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
688 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
689 (check_fmt_p): Enable paired-single support.
690 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
691 (PUU.PS): New instructions.
692 (CVT.S.fmt): Don't use this instruction for paired-single format
694 * sim-main.h (FP_formats): New value 'fmt_ps.'
695 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
696 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
698 2002-06-12 Chris Demetriou <cgd@broadcom.com>
700 * mips.igen: Fix formatting of function calls in
703 2002-06-12 Chris Demetriou <cgd@broadcom.com>
705 * mips.igen (MOVN, MOVZ): Trace result.
706 (TNEI): Print "tnei" as the opcode name in traces.
707 (CEIL.W): Add disassembly string for traces.
708 (RSQRT.fmt): Make location of disassembly string consistent
709 with other instructions.
711 2002-06-12 Chris Demetriou <cgd@broadcom.com>
713 * mips.igen (X): Delete unused function.
715 2002-06-08 Andrew Cagney <cagney@redhat.com>
717 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
719 2002-06-07 Chris Demetriou <cgd@broadcom.com>
720 Ed Satterthwaite <ehs@broadcom.com>
722 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
723 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
724 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
725 (fp_nmsub): New prototypes.
726 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
727 (NegMultiplySub): New defines.
728 * mips.igen (RSQRT.fmt): Use RSquareRoot().
729 (MADD.D, MADD.S): Replace with...
730 (MADD.fmt): New instruction.
731 (MSUB.D, MSUB.S): Replace with...
732 (MSUB.fmt): New instruction.
733 (NMADD.D, NMADD.S): Replace with...
734 (NMADD.fmt): New instruction.
735 (NMSUB.D, MSUB.S): Replace with...
736 (NMSUB.fmt): New instruction.
738 2002-06-07 Chris Demetriou <cgd@broadcom.com>
739 Ed Satterthwaite <ehs@broadcom.com>
741 * cp1.c: Fix more comment spelling and formatting.
742 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
743 (denorm_mode): New function.
744 (fpu_unary, fpu_binary): Round results after operation, collect
745 status from rounding operations, and update the FCSR.
746 (convert): Collect status from integer conversions and rounding
747 operations, and update the FCSR. Adjust NaN values that result
748 from conversions. Convert to use sim_io_eprintf rather than
749 fprintf, and remove some debugging code.
750 * cp1.h (fenr_FS): New define.
752 2002-06-07 Chris Demetriou <cgd@broadcom.com>
754 * cp1.c (convert): Remove unusable debugging code, and move MIPS
755 rounding mode to sim FP rounding mode flag conversion code into...
756 (rounding_mode): New function.
758 2002-06-07 Chris Demetriou <cgd@broadcom.com>
760 * cp1.c: Clean up formatting of a few comments.
761 (value_fpr): Reformat switch statement.
763 2002-06-06 Chris Demetriou <cgd@broadcom.com>
764 Ed Satterthwaite <ehs@broadcom.com>
767 * sim-main.h: Include cp1.h.
768 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
769 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
770 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
771 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
772 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
773 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
774 * cp1.c: Don't include sim-fpu.h; already included by
775 sim-main.h. Clean up formatting of some comments.
776 (NaN, Equal, Less): Remove.
777 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
778 (fp_cmp): New functions.
779 * mips.igen (do_c_cond_fmt): Remove.
780 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
781 Compare. Add result tracing.
782 (CxC1): Remove, replace with...
783 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
784 (DMxC1): Remove, replace with...
785 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
786 (MxC1): Remove, replace with...
787 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
789 2002-06-04 Chris Demetriou <cgd@broadcom.com>
791 * sim-main.h (FGRIDX): Remove, replace all uses with...
792 (FGR_BASE): New macro.
793 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
794 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
795 (NR_FGR, FGR): Likewise.
796 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
797 * mips.igen: Likewise.
799 2002-06-04 Chris Demetriou <cgd@broadcom.com>
801 * cp1.c: Add an FSF Copyright notice to this file.
803 2002-06-04 Chris Demetriou <cgd@broadcom.com>
804 Ed Satterthwaite <ehs@broadcom.com>
806 * cp1.c (Infinity): Remove.
807 * sim-main.h (Infinity): Likewise.
809 * cp1.c (fp_unary, fp_binary): New functions.
810 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
811 (fp_sqrt): New functions, implemented in terms of the above.
812 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
813 (Recip, SquareRoot): Remove (replaced by functions above).
814 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
815 (fp_recip, fp_sqrt): New prototypes.
816 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
817 (Recip, SquareRoot): Replace prototypes with #defines which
818 invoke the functions above.
820 2002-06-03 Chris Demetriou <cgd@broadcom.com>
822 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
823 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
824 file, remove PARAMS from prototypes.
825 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
826 simulator state arguments.
827 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
828 pass simulator state arguments.
829 * cp1.c (SD): Redefine as CPU_STATE(cpu).
830 (store_fpr, convert): Remove 'sd' argument.
831 (value_fpr): Likewise. Convert to use 'SD' instead.
833 2002-06-03 Chris Demetriou <cgd@broadcom.com>
835 * cp1.c (Min, Max): Remove #if 0'd functions.
836 * sim-main.h (Min, Max): Remove.
838 2002-06-03 Chris Demetriou <cgd@broadcom.com>
840 * cp1.c: fix formatting of switch case and default labels.
841 * interp.c: Likewise.
842 * sim-main.c: Likewise.
844 2002-06-03 Chris Demetriou <cgd@broadcom.com>
846 * cp1.c: Clean up comments which describe FP formats.
847 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
849 2002-06-03 Chris Demetriou <cgd@broadcom.com>
850 Ed Satterthwaite <ehs@broadcom.com>
852 * configure.in (mipsisa64sb1*-*-*): New target for supporting
853 Broadcom SiByte SB-1 processor configurations.
854 * configure: Regenerate.
855 * sb1.igen: New file.
856 * mips.igen: Include sb1.igen.
858 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
859 * mdmx.igen: Add "sb1" model to all appropriate functions and
861 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
862 (ob_func, ob_acc): Reference the above.
863 (qh_acc): Adjust to keep the same size as ob_acc.
864 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
865 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
867 2002-06-03 Chris Demetriou <cgd@broadcom.com>
869 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
871 2002-06-02 Chris Demetriou <cgd@broadcom.com>
872 Ed Satterthwaite <ehs@broadcom.com>
874 * mips.igen (mdmx): New (pseudo-)model.
875 * mdmx.c, mdmx.igen: New files.
876 * Makefile.in (SIM_OBJS): Add mdmx.o.
877 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
879 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
880 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
881 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
882 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
883 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
884 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
885 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
886 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
887 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
888 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
889 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
890 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
891 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
892 (qh_fmtsel): New macros.
893 (_sim_cpu): New member "acc".
894 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
895 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
897 2002-05-01 Chris Demetriou <cgd@broadcom.com>
899 * interp.c: Use 'deprecated' rather than 'depreciated.'
900 * sim-main.h: Likewise.
902 2002-05-01 Chris Demetriou <cgd@broadcom.com>
904 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
905 which wouldn't compile anyway.
906 * sim-main.h (unpredictable_action): New function prototype.
907 (Unpredictable): Define to call igen function unpredictable().
908 (NotWordValue): New macro to call igen function not_word_value().
909 (UndefinedResult): Remove.
910 * interp.c (undefined_result): Remove.
911 (unpredictable_action): New function.
912 * mips.igen (not_word_value, unpredictable): New functions.
913 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
914 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
915 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
916 NotWordValue() to check for unpredictable inputs, then
917 Unpredictable() to handle them.
919 2002-02-24 Chris Demetriou <cgd@broadcom.com>
921 * mips.igen: Fix formatting of calls to Unpredictable().
923 2002-04-20 Andrew Cagney <ac131313@redhat.com>
925 * interp.c (sim_open): Revert previous change.
927 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
929 * interp.c (sim_open): Disable chunk of code that wrote code in
930 vector table entries.
932 2002-03-19 Chris Demetriou <cgd@broadcom.com>
934 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
935 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
938 2002-03-19 Chris Demetriou <cgd@broadcom.com>
940 * cp1.c: Fix many formatting issues.
942 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
944 * cp1.c (fpu_format_name): New function to replace...
945 (DOFMT): This. Delete, and update all callers.
946 (fpu_rounding_mode_name): New function to replace...
947 (RMMODE): This. Delete, and update all callers.
949 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
951 * interp.c: Move FPU support routines from here to...
952 * cp1.c: Here. New file.
953 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
956 2002-03-12 Chris Demetriou <cgd@broadcom.com>
958 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
959 * mips.igen (mips32, mips64): New models, add to all instructions
960 and functions as appropriate.
961 (loadstore_ea, check_u64): New variant for model mips64.
962 (check_fmt_p): New variant for models mipsV and mips64, remove
963 mipsV model marking fro other variant.
966 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
967 for mips32 and mips64.
968 (DCLO, DCLZ): New instructions for mips64.
970 2002-03-07 Chris Demetriou <cgd@broadcom.com>
972 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
973 immediate or code as a hex value with the "%#lx" format.
974 (ANDI): Likewise, and fix printed instruction name.
976 2002-03-05 Chris Demetriou <cgd@broadcom.com>
978 * sim-main.h (UndefinedResult, Unpredictable): New macros
979 which currently do nothing.
981 2002-03-05 Chris Demetriou <cgd@broadcom.com>
983 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
984 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
985 (status_CU3): New definitions.
987 * sim-main.h (ExceptionCause): Add new values for MIPS32
988 and MIPS64: MDMX, MCheck, CacheErr. Update comments
989 for DebugBreakPoint and NMIReset to note their status in
991 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
992 (SignalExceptionCacheErr): New exception macros.
994 2002-03-05 Chris Demetriou <cgd@broadcom.com>
996 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
997 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
999 (SignalExceptionCoProcessorUnusable): Take as argument the
1000 unusable coprocessor number.
1002 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1004 * mips.igen: Fix formatting of all SignalException calls.
1006 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1008 * sim-main.h (SIGNEXTEND): Remove.
1010 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1012 * mips.igen: Remove gencode comment from top of file, fix
1013 spelling in another comment.
1015 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1017 * mips.igen (check_fmt, check_fmt_p): New functions to check
1018 whether specific floating point formats are usable.
1019 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1020 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1021 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1022 Use the new functions.
1023 (do_c_cond_fmt): Remove format checks...
1024 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1026 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1028 * mips.igen: Fix formatting of check_fpu calls.
1030 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1032 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1034 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1036 * mips.igen: Remove whitespace at end of lines.
1038 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1040 * mips.igen (loadstore_ea): New function to do effective
1041 address calculations.
1042 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1043 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1044 CACHE): Use loadstore_ea to do effective address computations.
1046 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1048 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1049 * mips.igen (LL, CxC1, MxC1): Likewise.
1051 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1053 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1054 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1055 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1056 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1057 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1058 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1059 Don't split opcode fields by hand, use the opcode field values
1062 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1064 * mips.igen (do_divu): Fix spacing.
1066 * mips.igen (do_dsllv): Move to be right before DSLLV,
1067 to match the rest of the do_<shift> functions.
1069 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1071 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1072 DSRL32, do_dsrlv): Trace inputs and results.
1074 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1076 * mips.igen (CACHE): Provide instruction-printing string.
1078 * interp.c (signal_exception): Comment tokens after #endif.
1080 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1082 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1083 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1084 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1085 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1086 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1087 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1088 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1089 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1091 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1093 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1094 instruction-printing string.
1095 (LWU): Use '64' as the filter flag.
1097 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1099 * mips.igen (SDXC1): Fix instruction-printing string.
1101 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1103 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1104 filter flags "32,f".
1106 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1108 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1111 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1113 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1114 add a comma) so that it more closely match the MIPS ISA
1115 documentation opcode partitioning.
1116 (PREF): Put useful names on opcode fields, and include
1117 instruction-printing string.
1119 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1121 * mips.igen (check_u64): New function which in the future will
1122 check whether 64-bit instructions are usable and signal an
1123 exception if not. Currently a no-op.
1124 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1125 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1126 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1127 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1129 * mips.igen (check_fpu): New function which in the future will
1130 check whether FPU instructions are usable and signal an exception
1131 if not. Currently a no-op.
1132 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1133 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1134 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1135 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1136 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1137 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1138 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1139 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1141 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1143 * mips.igen (do_load_left, do_load_right): Move to be immediately
1145 (do_store_left, do_store_right): Move to be immediately following
1148 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1150 * mips.igen (mipsV): New model name. Also, add it to
1151 all instructions and functions where it is appropriate.
1153 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1155 * mips.igen: For all functions and instructions, list model
1156 names that support that instruction one per line.
1158 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1160 * mips.igen: Add some additional comments about supported
1161 models, and about which instructions go where.
1162 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1163 order as is used in the rest of the file.
1165 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1167 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1168 indicating that ALU32_END or ALU64_END are there to check
1170 (DADD): Likewise, but also remove previous comment about
1173 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1175 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1176 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1177 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1178 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1179 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1180 fields (i.e., add and move commas) so that they more closely
1181 match the MIPS ISA documentation opcode partitioning.
1183 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1185 * mips.igen (ADDI): Print immediate value.
1186 (BREAK): Print code.
1187 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1188 (SLL): Print "nop" specially, and don't run the code
1189 that does the shift for the "nop" case.
1191 2001-11-17 Fred Fish <fnf@redhat.com>
1193 * sim-main.h (float_operation): Move enum declaration outside
1194 of _sim_cpu struct declaration.
1196 2001-04-12 Jim Blandy <jimb@redhat.com>
1198 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1199 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1201 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1202 PENDING_FILL, and you can get the intended effect gracefully by
1203 calling PENDING_SCHED directly.
1205 2001-02-23 Ben Elliston <bje@redhat.com>
1207 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1208 already defined elsewhere.
1210 2001-02-19 Ben Elliston <bje@redhat.com>
1212 * sim-main.h (sim_monitor): Return an int.
1213 * interp.c (sim_monitor): Add return values.
1214 (signal_exception): Handle error conditions from sim_monitor.
1216 2001-02-08 Ben Elliston <bje@redhat.com>
1218 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1219 (store_memory): Likewise, pass cia to sim_core_write*.
1221 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1223 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1224 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1226 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1228 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1229 * Makefile.in: Don't delete *.igen when cleaning directory.
1231 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1233 * m16.igen (break): Call SignalException not sim_engine_halt.
1235 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1237 From Jason Eckhardt:
1238 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1240 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1242 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1244 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1246 * mips.igen (do_dmultx): Fix typo.
1248 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1250 * configure: Regenerated to track ../common/aclocal.m4 changes.
1252 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1254 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1256 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1258 * sim-main.h (GPR_CLEAR): Define macro.
1260 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1262 * interp.c (decode_coproc): Output long using %lx and not %s.
1264 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1266 * interp.c (sim_open): Sort & extend dummy memory regions for
1267 --board=jmr3904 for eCos.
1269 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1271 * configure: Regenerated.
1273 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1275 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1276 calls, conditional on the simulator being in verbose mode.
1278 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1280 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1281 cache don't get ReservedInstruction traps.
1283 1999-11-29 Mark Salter <msalter@cygnus.com>
1285 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1286 to clear status bits in sdisr register. This is how the hardware works.
1288 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1289 being used by cygmon.
1291 1999-11-11 Andrew Haley <aph@cygnus.com>
1293 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1296 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1298 * mips.igen (MULT): Correct previous mis-applied patch.
1300 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1302 * mips.igen (delayslot32): Handle sequence like
1303 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1304 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1305 (MULT): Actually pass the third register...
1307 1999-09-03 Mark Salter <msalter@cygnus.com>
1309 * interp.c (sim_open): Added more memory aliases for additional
1310 hardware being touched by cygmon on jmr3904 board.
1312 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1314 * configure: Regenerated to track ../common/aclocal.m4 changes.
1316 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1318 * interp.c (sim_store_register): Handle case where client - GDB -
1319 specifies that a 4 byte register is 8 bytes in size.
1320 (sim_fetch_register): Ditto.
1322 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1324 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1325 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1326 (idt_monitor_base): Base address for IDT monitor traps.
1327 (pmon_monitor_base): Ditto for PMON.
1328 (lsipmon_monitor_base): Ditto for LSI PMON.
1329 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1330 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1331 (sim_firmware_command): New function.
1332 (mips_option_handler): Call it for OPTION_FIRMWARE.
1333 (sim_open): Allocate memory for idt_monitor region. If "--board"
1334 option was given, add no monitor by default. Add BREAK hooks only if
1335 monitors are also there.
1337 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1339 * interp.c (sim_monitor): Flush output before reading input.
1341 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1343 * tconfig.in (SIM_HANDLES_LMA): Always define.
1345 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1347 From Mark Salter <msalter@cygnus.com>:
1348 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1349 (sim_open): Add setup for BSP board.
1351 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1353 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1354 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1355 them as unimplemented.
1357 1999-05-08 Felix Lee <flee@cygnus.com>
1359 * configure: Regenerated to track ../common/aclocal.m4 changes.
1361 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1363 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1365 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1367 * configure.in: Any mips64vr5*-*-* target should have
1368 -DTARGET_ENABLE_FR=1.
1369 (default_endian): Any mips64vr*el-*-* target should default to
1371 * configure: Re-generate.
1373 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1375 * mips.igen (ldl): Extend from _16_, not 32.
1377 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1379 * interp.c (sim_store_register): Force registers written to by GDB
1380 into an un-interpreted state.
1382 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1384 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1385 CPU, start periodic background I/O polls.
1386 (tx3904sio_poll): New function: periodic I/O poller.
1388 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1390 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1392 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1394 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1397 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1399 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1400 (load_word): Call SIM_CORE_SIGNAL hook on error.
1401 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1402 starting. For exception dispatching, pass PC instead of NULL_CIA.
1403 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1404 * sim-main.h (COP0_BADVADDR): Define.
1405 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1406 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1407 (_sim_cpu): Add exc_* fields to store register value snapshots.
1408 * mips.igen (*): Replace memory-related SignalException* calls
1409 with references to SIM_CORE_SIGNAL hook.
1411 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1413 * sim-main.c (*): Minor warning cleanups.
1415 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1417 * m16.igen (DADDIU5): Correct type-o.
1419 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1421 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1424 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1426 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1428 (interp.o): Add dependency on itable.h
1429 (oengine.c, gencode): Delete remaining references.
1430 (BUILT_SRC_FROM_GEN): Clean up.
1432 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1435 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1436 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1437 tmp-run-hack) : New.
1438 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1439 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1440 Drop the "64" qualifier to get the HACK generator working.
1441 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1442 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1443 qualifier to get the hack generator working.
1444 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1445 (DSLL): Use do_dsll.
1446 (DSLLV): Use do_dsllv.
1447 (DSRA): Use do_dsra.
1448 (DSRL): Use do_dsrl.
1449 (DSRLV): Use do_dsrlv.
1450 (BC1): Move *vr4100 to get the HACK generator working.
1451 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1452 get the HACK generator working.
1453 (MACC) Rename to get the HACK generator working.
1454 (DMACC,MACCS,DMACCS): Add the 64.
1456 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1458 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1459 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1461 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1463 * mips/interp.c (DEBUG): Cleanups.
1465 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1467 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1468 (tx3904sio_tickle): fflush after a stdout character output.
1470 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1472 * interp.c (sim_close): Uninstall modules.
1474 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1476 * sim-main.h, interp.c (sim_monitor): Change to global
1479 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1481 * configure.in (vr4100): Only include vr4100 instructions in
1483 * configure: Re-generate.
1484 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1486 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1488 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1489 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1492 * configure.in (sim_default_gen, sim_use_gen): Replace with
1494 (--enable-sim-igen): Delete config option. Always using IGEN.
1495 * configure: Re-generate.
1497 * Makefile.in (gencode): Kill, kill, kill.
1500 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1502 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1503 bit mips16 igen simulator.
1504 * configure: Re-generate.
1506 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1507 as part of vr4100 ISA.
1508 * vr.igen: Mark all instructions as 64 bit only.
1510 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1512 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1515 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1517 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1518 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1519 * configure: Re-generate.
1521 * m16.igen (BREAK): Define breakpoint instruction.
1522 (JALX32): Mark instruction as mips16 and not r3900.
1523 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1525 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1527 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1529 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1530 insn as a debug breakpoint.
1532 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1534 (PENDING_SCHED): Clean up trace statement.
1535 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1536 (PENDING_FILL): Delay write by only one cycle.
1537 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1539 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1541 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1543 (pending_tick): Move incrementing of index to FOR statement.
1544 (pending_tick): Only update PENDING_OUT after a write has occured.
1546 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1548 * configure: Re-generate.
1550 * interp.c (sim_engine_run OLD): Delete explicit call to
1551 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1553 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1555 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1556 interrupt level number to match changed SignalExceptionInterrupt
1559 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1561 * interp.c: #include "itable.h" if WITH_IGEN.
1562 (get_insn_name): New function.
1563 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1564 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1566 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1568 * configure: Rebuilt to inhale new common/aclocal.m4.
1570 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1572 * dv-tx3904sio.c: Include sim-assert.h.
1574 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1576 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1577 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1578 Reorganize target-specific sim-hardware checks.
1579 * configure: rebuilt.
1580 * interp.c (sim_open): For tx39 target boards, set
1581 OPERATING_ENVIRONMENT, add tx3904sio devices.
1582 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1583 ROM executables. Install dv-sockser into sim-modules list.
1585 * dv-tx3904irc.c: Compiler warning clean-up.
1586 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1587 frequent hw-trace messages.
1589 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1591 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1593 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1595 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1597 * vr.igen: New file.
1598 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1599 * mips.igen: Define vr4100 model. Include vr.igen.
1600 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1602 * mips.igen (check_mf_hilo): Correct check.
1604 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1606 * sim-main.h (interrupt_event): Add prototype.
1608 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1609 register_ptr, register_value.
1610 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1612 * sim-main.h (tracefh): Make extern.
1614 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1616 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1617 Reduce unnecessarily high timer event frequency.
1618 * dv-tx3904cpu.c: Ditto for interrupt event.
1620 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1622 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1624 (interrupt_event): Made non-static.
1626 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1627 interchange of configuration values for external vs. internal
1630 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1632 * mips.igen (BREAK): Moved code to here for
1633 simulator-reserved break instructions.
1634 * gencode.c (build_instruction): Ditto.
1635 * interp.c (signal_exception): Code moved from here. Non-
1636 reserved instructions now use exception vector, rather
1638 * sim-main.h: Moved magic constants to here.
1640 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1642 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1643 register upon non-zero interrupt event level, clear upon zero
1645 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1646 by passing zero event value.
1647 (*_io_{read,write}_buffer): Endianness fixes.
1648 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1649 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1651 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1652 serial I/O and timer module at base address 0xFFFF0000.
1654 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1656 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1659 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1661 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1663 * configure: Update.
1665 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1667 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1668 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1669 * configure.in: Include tx3904tmr in hw_device list.
1670 * configure: Rebuilt.
1671 * interp.c (sim_open): Instantiate three timer instances.
1672 Fix address typo of tx3904irc instance.
1674 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1676 * interp.c (signal_exception): SystemCall exception now uses
1677 the exception vector.
1679 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1681 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1684 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1686 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1688 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1690 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1692 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1693 sim-main.h. Declare a struct hw_descriptor instead of struct
1694 hw_device_descriptor.
1696 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1698 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1699 right bits and then re-align left hand bytes to correct byte
1700 lanes. Fix incorrect computation in do_store_left when loading
1701 bytes from second word.
1703 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1705 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1706 * interp.c (sim_open): Only create a device tree when HW is
1709 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1710 * interp.c (signal_exception): Ditto.
1712 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1714 * gencode.c: Mark BEGEZALL as LIKELY.
1716 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1718 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1719 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1721 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1723 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1724 modules. Recognize TX39 target with "mips*tx39" pattern.
1725 * configure: Rebuilt.
1726 * sim-main.h (*): Added many macros defining bits in
1727 TX39 control registers.
1728 (SignalInterrupt): Send actual PC instead of NULL.
1729 (SignalNMIReset): New exception type.
1730 * interp.c (board): New variable for future use to identify
1731 a particular board being simulated.
1732 (mips_option_handler,mips_options): Added "--board" option.
1733 (interrupt_event): Send actual PC.
1734 (sim_open): Make memory layout conditional on board setting.
1735 (signal_exception): Initial implementation of hardware interrupt
1736 handling. Accept another break instruction variant for simulator
1738 (decode_coproc): Implement RFE instruction for TX39.
1739 (mips.igen): Decode RFE instruction as such.
1740 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1741 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1742 bbegin to implement memory map.
1743 * dv-tx3904cpu.c: New file.
1744 * dv-tx3904irc.c: New file.
1746 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1748 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1750 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1752 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1753 with calls to check_div_hilo.
1755 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1757 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1758 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1759 Add special r3900 version of do_mult_hilo.
1760 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1761 with calls to check_mult_hilo.
1762 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1763 with calls to check_div_hilo.
1765 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1767 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1768 Document a replacement.
1770 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1772 * interp.c (sim_monitor): Make mon_printf work.
1774 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1776 * sim-main.h (INSN_NAME): New arg `cpu'.
1778 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1780 * configure: Regenerated to track ../common/aclocal.m4 changes.
1782 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1784 * configure: Regenerated to track ../common/aclocal.m4 changes.
1787 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1789 * acconfig.h: New file.
1790 * configure.in: Reverted change of Apr 24; use sinclude again.
1792 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1794 * configure: Regenerated to track ../common/aclocal.m4 changes.
1797 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1799 * configure.in: Don't call sinclude.
1801 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1803 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1805 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1807 * mips.igen (ERET): Implement.
1809 * interp.c (decode_coproc): Return sign-extended EPC.
1811 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1813 * interp.c (signal_exception): Do not ignore Trap.
1814 (signal_exception): On TRAP, restart at exception address.
1815 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1816 (signal_exception): Update.
1817 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1818 so that TRAP instructions are caught.
1820 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1822 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1823 contains HI/LO access history.
1824 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1825 (HIACCESS, LOACCESS): Delete, replace with
1826 (HIHISTORY, LOHISTORY): New macros.
1827 (CHECKHILO): Delete all, moved to mips.igen
1829 * gencode.c (build_instruction): Do not generate checks for
1830 correct HI/LO register usage.
1832 * interp.c (old_engine_run): Delete checks for correct HI/LO
1835 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1836 check_mf_cycles): New functions.
1837 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1838 do_divu, domultx, do_mult, do_multu): Use.
1840 * tx.igen ("madd", "maddu"): Use.
1842 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1844 * mips.igen (DSRAV): Use function do_dsrav.
1845 (SRAV): Use new function do_srav.
1847 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1848 (B): Sign extend 11 bit immediate.
1849 (EXT-B*): Shift 16 bit immediate left by 1.
1850 (ADDIU*): Don't sign extend immediate value.
1852 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1854 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1856 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1859 * mips.igen (delayslot32, nullify_next_insn): New functions.
1860 (m16.igen): Always include.
1861 (do_*): Add more tracing.
1863 * m16.igen (delayslot16): Add NIA argument, could be called by a
1864 32 bit MIPS16 instruction.
1866 * interp.c (ifetch16): Move function from here.
1867 * sim-main.c (ifetch16): To here.
1869 * sim-main.c (ifetch16, ifetch32): Update to match current
1870 implementations of LH, LW.
1871 (signal_exception): Don't print out incorrect hex value of illegal
1874 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1876 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1879 * m16.igen: Implement MIPS16 instructions.
1881 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1882 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1883 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1884 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1885 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1886 bodies of corresponding code from 32 bit insn to these. Also used
1887 by MIPS16 versions of functions.
1889 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1890 (IMEM16): Drop NR argument from macro.
1892 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1894 * Makefile.in (SIM_OBJS): Add sim-main.o.
1896 * sim-main.h (address_translation, load_memory, store_memory,
1897 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1899 (pr_addr, pr_uword64): Declare.
1900 (sim-main.c): Include when H_REVEALS_MODULE_P.
1902 * interp.c (address_translation, load_memory, store_memory,
1903 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1905 * sim-main.c: To here. Fix compilation problems.
1907 * configure.in: Enable inlining.
1908 * configure: Re-config.
1910 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1912 * configure: Regenerated to track ../common/aclocal.m4 changes.
1914 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1916 * mips.igen: Include tx.igen.
1917 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1918 * tx.igen: New file, contains MADD and MADDU.
1920 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1921 the hardwired constant `7'.
1922 (store_memory): Ditto.
1923 (LOADDRMASK): Move definition to sim-main.h.
1925 mips.igen (MTC0): Enable for r3900.
1928 mips.igen (do_load_byte): Delete.
1929 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1930 do_store_right): New functions.
1931 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1933 configure.in: Let the tx39 use igen again.
1936 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1938 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1939 not an address sized quantity. Return zero for cache sizes.
1941 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1943 * mips.igen (r3900): r3900 does not support 64 bit integer
1946 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1948 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1950 * configure : Rebuild.
1952 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1954 * configure: Regenerated to track ../common/aclocal.m4 changes.
1956 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1958 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1960 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1962 * configure: Regenerated to track ../common/aclocal.m4 changes.
1963 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1965 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1967 * configure: Regenerated to track ../common/aclocal.m4 changes.
1969 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1971 * interp.c (Max, Min): Comment out functions. Not yet used.
1973 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * configure: Regenerated to track ../common/aclocal.m4 changes.
1977 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1979 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1980 configurable settings for stand-alone simulator.
1982 * configure.in: Added X11 search, just in case.
1984 * configure: Regenerated.
1986 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1988 * interp.c (sim_write, sim_read, load_memory, store_memory):
1989 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1991 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1993 * sim-main.h (GETFCC): Return an unsigned value.
1995 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1997 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1998 (DADD): Result destination is RD not RT.
2000 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2002 * sim-main.h (HIACCESS, LOACCESS): Always define.
2004 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2006 * interp.c (sim_info): Delete.
2008 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2010 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2011 (mips_option_handler): New argument `cpu'.
2012 (sim_open): Update call to sim_add_option_table.
2014 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2016 * mips.igen (CxC1): Add tracing.
2018 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2020 * sim-main.h (Max, Min): Declare.
2022 * interp.c (Max, Min): New functions.
2024 * mips.igen (BC1): Add tracing.
2026 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2028 * interp.c Added memory map for stack in vr4100
2030 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2032 * interp.c (load_memory): Add missing "break"'s.
2034 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2036 * interp.c (sim_store_register, sim_fetch_register): Pass in
2037 length parameter. Return -1.
2039 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2041 * interp.c: Added hardware init hook, fixed warnings.
2043 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2045 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2047 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2049 * interp.c (ifetch16): New function.
2051 * sim-main.h (IMEM32): Rename IMEM.
2052 (IMEM16_IMMED): Define.
2054 (DELAY_SLOT): Update.
2056 * m16run.c (sim_engine_run): New file.
2058 * m16.igen: All instructions except LB.
2059 (LB): Call do_load_byte.
2060 * mips.igen (do_load_byte): New function.
2061 (LB): Call do_load_byte.
2063 * mips.igen: Move spec for insn bit size and high bit from here.
2064 * Makefile.in (tmp-igen, tmp-m16): To here.
2066 * m16.dc: New file, decode mips16 instructions.
2068 * Makefile.in (SIM_NO_ALL): Define.
2069 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2071 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2073 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2074 point unit to 32 bit registers.
2075 * configure: Re-generate.
2077 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2079 * configure.in (sim_use_gen): Make IGEN the default simulator
2080 generator for generic 32 and 64 bit mips targets.
2081 * configure: Re-generate.
2083 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2085 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2088 * interp.c (sim_fetch_register, sim_store_register): Read/write
2089 FGR from correct location.
2090 (sim_open): Set size of FGR's according to
2091 WITH_TARGET_FLOATING_POINT_BITSIZE.
2093 * sim-main.h (FGR): Store floating point registers in a separate
2096 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2098 * configure: Regenerated to track ../common/aclocal.m4 changes.
2100 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2102 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2104 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2106 * interp.c (pending_tick): New function. Deliver pending writes.
2108 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2109 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2110 it can handle mixed sized quantites and single bits.
2112 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2114 * interp.c (oengine.h): Do not include when building with IGEN.
2115 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2116 (sim_info): Ditto for PROCESSOR_64BIT.
2117 (sim_monitor): Replace ut_reg with unsigned_word.
2118 (*): Ditto for t_reg.
2119 (LOADDRMASK): Define.
2120 (sim_open): Remove defunct check that host FP is IEEE compliant,
2121 using software to emulate floating point.
2122 (value_fpr, ...): Always compile, was conditional on HASFPU.
2124 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2126 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2129 * interp.c (SD, CPU): Define.
2130 (mips_option_handler): Set flags in each CPU.
2131 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2132 (sim_close): Do not clear STATE, deleted anyway.
2133 (sim_write, sim_read): Assume CPU zero's vm should be used for
2135 (sim_create_inferior): Set the PC for all processors.
2136 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2138 (mips16_entry): Pass correct nr of args to store_word, load_word.
2139 (ColdReset): Cold reset all cpu's.
2140 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2141 (sim_monitor, load_memory, store_memory, signal_exception): Use
2142 `CPU' instead of STATE_CPU.
2145 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2148 * sim-main.h (signal_exception): Add sim_cpu arg.
2149 (SignalException*): Pass both SD and CPU to signal_exception.
2150 * interp.c (signal_exception): Update.
2152 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2154 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2155 address_translation): Ditto
2156 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2158 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2160 * configure: Regenerated to track ../common/aclocal.m4 changes.
2162 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2164 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2166 * mips.igen (model): Map processor names onto BFD name.
2168 * sim-main.h (CPU_CIA): Delete.
2169 (SET_CIA, GET_CIA): Define
2171 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2173 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2176 * configure.in (default_endian): Configure a big-endian simulator
2178 * configure: Re-generate.
2180 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2182 * configure: Regenerated to track ../common/aclocal.m4 changes.
2184 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2186 * interp.c (sim_monitor): Handle Densan monitor outbyte
2187 and inbyte functions.
2189 1997-12-29 Felix Lee <flee@cygnus.com>
2191 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2193 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2195 * Makefile.in (tmp-igen): Arrange for $zero to always be
2196 reset to zero after every instruction.
2198 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2200 * configure: Regenerated to track ../common/aclocal.m4 changes.
2203 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2205 * mips.igen (MSUB): Fix to work like MADD.
2206 * gencode.c (MSUB): Similarly.
2208 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2210 * configure: Regenerated to track ../common/aclocal.m4 changes.
2212 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2214 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2216 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2218 * sim-main.h (sim-fpu.h): Include.
2220 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2221 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2222 using host independant sim_fpu module.
2224 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2226 * interp.c (signal_exception): Report internal errors with SIGABRT
2229 * sim-main.h (C0_CONFIG): New register.
2230 (signal.h): No longer include.
2232 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2234 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2236 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2238 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2240 * mips.igen: Tag vr5000 instructions.
2241 (ANDI): Was missing mipsIV model, fix assembler syntax.
2242 (do_c_cond_fmt): New function.
2243 (C.cond.fmt): Handle mips I-III which do not support CC field
2245 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2246 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2248 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2249 vr5000 which saves LO in a GPR separatly.
2251 * configure.in (enable-sim-igen): For vr5000, select vr5000
2252 specific instructions.
2253 * configure: Re-generate.
2255 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2257 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2259 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2260 fmt_uninterpreted_64 bit cases to switch. Convert to
2263 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2265 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2266 as specified in IV3.2 spec.
2267 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2269 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2271 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2272 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2273 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2274 PENDING_FILL versions of instructions. Simplify.
2276 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2278 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2280 (MTHI, MFHI): Disable code checking HI-LO.
2282 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2284 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2286 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2288 * gencode.c (build_mips16_operands): Replace IPC with cia.
2290 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2291 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2293 (UndefinedResult): Replace function with macro/function
2295 (sim_engine_run): Don't save PC in IPC.
2297 * sim-main.h (IPC): Delete.
2300 * interp.c (signal_exception, store_word, load_word,
2301 address_translation, load_memory, store_memory, cache_op,
2302 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2303 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2304 current instruction address - cia - argument.
2305 (sim_read, sim_write): Call address_translation directly.
2306 (sim_engine_run): Rename variable vaddr to cia.
2307 (signal_exception): Pass cia to sim_monitor
2309 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2310 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2311 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2313 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2314 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2317 * interp.c (signal_exception): Pass restart address to
2320 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2321 idecode.o): Add dependency.
2323 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2325 (DELAY_SLOT): Update NIA not PC with branch address.
2326 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2328 * mips.igen: Use CIA not PC in branch calculations.
2329 (illegal): Call SignalException.
2330 (BEQ, ADDIU): Fix assembler.
2332 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2334 * m16.igen (JALX): Was missing.
2336 * configure.in (enable-sim-igen): New configuration option.
2337 * configure: Re-generate.
2339 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2341 * interp.c (load_memory, store_memory): Delete parameter RAW.
2342 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2343 bypassing {load,store}_memory.
2345 * sim-main.h (ByteSwapMem): Delete definition.
2347 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2349 * interp.c (sim_do_command, sim_commands): Delete mips specific
2350 commands. Handled by module sim-options.
2352 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2353 (WITH_MODULO_MEMORY): Define.
2355 * interp.c (sim_info): Delete code printing memory size.
2357 * interp.c (mips_size): Nee sim_size, delete function.
2359 (monitor, monitor_base, monitor_size): Delete global variables.
2360 (sim_open, sim_close): Delete code creating monitor and other
2361 memory regions. Use sim-memopts module, via sim_do_commandf, to
2362 manage memory regions.
2363 (load_memory, store_memory): Use sim-core for memory model.
2365 * interp.c (address_translation): Delete all memory map code
2366 except line forcing 32 bit addresses.
2368 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2370 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2373 * interp.c (logfh, logfile): Delete globals.
2374 (sim_open, sim_close): Delete code opening & closing log file.
2375 (mips_option_handler): Delete -l and -n options.
2376 (OPTION mips_options): Ditto.
2378 * interp.c (OPTION mips_options): Rename option trace to dinero.
2379 (mips_option_handler): Update.
2381 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2383 * interp.c (fetch_str): New function.
2384 (sim_monitor): Rewrite using sim_read & sim_write.
2385 (sim_open): Check magic number.
2386 (sim_open): Write monitor vectors into memory using sim_write.
2387 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2388 (sim_read, sim_write): Simplify - transfer data one byte at a
2390 (load_memory, store_memory): Clarify meaning of parameter RAW.
2392 * sim-main.h (isHOST): Defete definition.
2393 (isTARGET): Mark as depreciated.
2394 (address_translation): Delete parameter HOST.
2396 * interp.c (address_translation): Delete parameter HOST.
2398 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2402 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2403 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2405 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2407 * mips.igen: Add model filter field to records.
2409 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2411 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2413 interp.c (sim_engine_run): Do not compile function sim_engine_run
2414 when WITH_IGEN == 1.
2416 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2417 target architecture.
2419 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2420 igen. Replace with configuration variables sim_igen_flags /
2423 * m16.igen: New file. Copy mips16 insns here.
2424 * mips.igen: From here.
2426 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2428 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2430 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2432 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2434 * gencode.c (build_instruction): Follow sim_write's lead in using
2435 BigEndianMem instead of !ByteSwapMem.
2437 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2439 * configure.in (sim_gen): Dependent on target, select type of
2440 generator. Always select old style generator.
2442 configure: Re-generate.
2444 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2446 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2447 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2448 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2449 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2450 SIM_@sim_gen@_*, set by autoconf.
2452 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2454 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2456 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2457 CURRENT_FLOATING_POINT instead.
2459 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2460 (address_translation): Raise exception InstructionFetch when
2461 translation fails and isINSTRUCTION.
2463 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2464 sim_engine_run): Change type of of vaddr and paddr to
2466 (address_translation, prefetch, load_memory, store_memory,
2467 cache_op): Change type of vAddr and pAddr to address_word.
2469 * gencode.c (build_instruction): Change type of vaddr and paddr to
2472 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2474 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2475 macro to obtain result of ALU op.
2477 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2479 * interp.c (sim_info): Call profile_print.
2481 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2483 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2485 * sim-main.h (WITH_PROFILE): Do not define, defined in
2486 common/sim-config.h. Use sim-profile module.
2487 (simPROFILE): Delete defintion.
2489 * interp.c (PROFILE): Delete definition.
2490 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2491 (sim_close): Delete code writing profile histogram.
2492 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2494 (sim_engine_run): Delete code profiling the PC.
2496 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2498 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2500 * interp.c (sim_monitor): Make register pointers of type
2503 * sim-main.h: Make registers of type unsigned_word not
2506 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2508 * interp.c (sync_operation): Rename from SyncOperation, make
2509 global, add SD argument.
2510 (prefetch): Rename from Prefetch, make global, add SD argument.
2511 (decode_coproc): Make global.
2513 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2515 * gencode.c (build_instruction): Generate DecodeCoproc not
2516 decode_coproc calls.
2518 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2519 (SizeFGR): Move to sim-main.h
2520 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2521 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2522 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2524 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2525 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2526 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2527 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2528 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2529 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2531 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2533 (sim-alu.h): Include.
2534 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2535 (sim_cia): Typedef to instruction_address.
2537 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2539 * Makefile.in (interp.o): Rename generated file engine.c to
2544 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2546 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2548 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2550 * gencode.c (build_instruction): For "FPSQRT", output correct
2551 number of arguments to Recip.
2553 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2555 * Makefile.in (interp.o): Depends on sim-main.h
2557 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2559 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2560 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2561 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2562 STATE, DSSTATE): Define
2563 (GPR, FGRIDX, ..): Define.
2565 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2566 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2567 (GPR, FGRIDX, ...): Delete macros.
2569 * interp.c: Update names to match defines from sim-main.h
2571 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2573 * interp.c (sim_monitor): Add SD argument.
2574 (sim_warning): Delete. Replace calls with calls to
2576 (sim_error): Delete. Replace calls with sim_io_error.
2577 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2578 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2579 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2581 (mips_size): Rename from sim_size. Add SD argument.
2583 * interp.c (simulator): Delete global variable.
2584 (callback): Delete global variable.
2585 (mips_option_handler, sim_open, sim_write, sim_read,
2586 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2587 sim_size,sim_monitor): Use sim_io_* not callback->*.
2588 (sim_open): ZALLOC simulator struct.
2589 (PROFILE): Do not define.
2591 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2593 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2594 support.h with corresponding code.
2596 * sim-main.h (word64, uword64), support.h: Move definition to
2598 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2601 * Makefile.in: Update dependencies
2602 * interp.c: Do not include.
2604 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2606 * interp.c (address_translation, load_memory, store_memory,
2607 cache_op): Rename to from AddressTranslation et.al., make global,
2610 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2613 * interp.c (SignalException): Rename to signal_exception, make
2616 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2618 * sim-main.h (SignalException, SignalExceptionInterrupt,
2619 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2620 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2621 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2624 * interp.c, support.h: Use.
2626 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2628 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2629 to value_fpr / store_fpr. Add SD argument.
2630 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2631 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2633 * sim-main.h (ValueFPR, StoreFPR): Define.
2635 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2637 * interp.c (sim_engine_run): Check consistency between configure
2638 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2641 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2642 (mips_fpu): Configure WITH_FLOATING_POINT.
2643 (mips_endian): Configure WITH_TARGET_ENDIAN.
2644 * configure: Update.
2646 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2648 * configure: Regenerated to track ../common/aclocal.m4 changes.
2650 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2652 * configure: Regenerated.
2654 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2656 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2658 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2660 * gencode.c (print_igen_insn_models): Assume certain architectures
2661 include all mips* instructions.
2662 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2665 * Makefile.in (tmp.igen): Add target. Generate igen input from
2668 * gencode.c (FEATURE_IGEN): Define.
2669 (main): Add --igen option. Generate output in igen format.
2670 (process_instructions): Format output according to igen option.
2671 (print_igen_insn_format): New function.
2672 (print_igen_insn_models): New function.
2673 (process_instructions): Only issue warnings and ignore
2674 instructions when no FEATURE_IGEN.
2676 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2678 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2681 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2683 * configure: Regenerated to track ../common/aclocal.m4 changes.
2685 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2688 SIM_RESERVED_BITS): Delete, moved to common.
2689 (SIM_EXTRA_CFLAGS): Update.
2691 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2693 * configure.in: Configure non-strict memory alignment.
2694 * configure: Regenerated to track ../common/aclocal.m4 changes.
2696 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2698 * configure: Regenerated to track ../common/aclocal.m4 changes.
2700 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2702 * gencode.c (SDBBP,DERET): Added (3900) insns.
2703 (RFE): Turn on for 3900.
2704 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2705 (dsstate): Made global.
2706 (SUBTARGET_R3900): Added.
2707 (CANCELDELAYSLOT): New.
2708 (SignalException): Ignore SystemCall rather than ignore and
2709 terminate. Add DebugBreakPoint handling.
2710 (decode_coproc): New insns RFE, DERET; and new registers Debug
2711 and DEPC protected by SUBTARGET_R3900.
2712 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2714 * Makefile.in,configure.in: Add mips subtarget option.
2715 * configure: Update.
2717 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2719 * gencode.c: Add r3900 (tx39).
2722 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2724 * gencode.c (build_instruction): Don't need to subtract 4 for
2727 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2729 * interp.c: Correct some HASFPU problems.
2731 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2733 * configure: Regenerated to track ../common/aclocal.m4 changes.
2735 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2737 * interp.c (mips_options): Fix samples option short form, should
2740 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2742 * interp.c (sim_info): Enable info code. Was just returning.
2744 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2749 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2751 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2753 (build_instruction): Ditto for LL.
2755 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2757 * configure: Regenerated to track ../common/aclocal.m4 changes.
2759 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2761 * configure: Regenerated to track ../common/aclocal.m4 changes.
2764 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2766 * interp.c (sim_open): Add call to sim_analyze_program, update
2769 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2771 * interp.c (sim_kill): Delete.
2772 (sim_create_inferior): Add ABFD argument. Set PC from same.
2773 (sim_load): Move code initializing trap handlers from here.
2774 (sim_open): To here.
2775 (sim_load): Delete, use sim-hload.c.
2777 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2779 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2781 * configure: Regenerated to track ../common/aclocal.m4 changes.
2784 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2786 * interp.c (sim_open): Add ABFD argument.
2787 (sim_load): Move call to sim_config from here.
2788 (sim_open): To here. Check return status.
2790 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2792 * gencode.c (build_instruction): Two arg MADD should
2793 not assign result to $0.
2795 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2797 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2798 * sim/mips/configure.in: Regenerate.
2800 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2802 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2803 signed8, unsigned8 et.al. types.
2805 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2806 hosts when selecting subreg.
2808 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2810 * interp.c (sim_engine_run): Reset the ZERO register to zero
2811 regardless of FEATURE_WARN_ZERO.
2812 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2814 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2816 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2817 (SignalException): For BreakPoints ignore any mode bits and just
2819 (SignalException): Always set the CAUSE register.
2821 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2823 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2824 exception has been taken.
2826 * interp.c: Implement the ERET and mt/f sr instructions.
2828 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2830 * interp.c (SignalException): Don't bother restarting an
2833 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2835 * interp.c (SignalException): Really take an interrupt.
2836 (interrupt_event): Only deliver interrupts when enabled.
2838 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2840 * interp.c (sim_info): Only print info when verbose.
2841 (sim_info) Use sim_io_printf for output.
2843 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2845 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2848 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2850 * interp.c (sim_do_command): Check for common commands if a
2851 simulator specific command fails.
2853 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2855 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2856 and simBE when DEBUG is defined.
2858 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2860 * interp.c (interrupt_event): New function. Pass exception event
2861 onto exception handler.
2863 * configure.in: Check for stdlib.h.
2864 * configure: Regenerate.
2866 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2867 variable declaration.
2868 (build_instruction): Initialize memval1.
2869 (build_instruction): Add UNUSED attribute to byte, bigend,
2871 (build_operands): Ditto.
2873 * interp.c: Fix GCC warnings.
2874 (sim_get_quit_code): Delete.
2876 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2877 * Makefile.in: Ditto.
2878 * configure: Re-generate.
2880 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2882 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2884 * interp.c (mips_option_handler): New function parse argumes using
2886 (myname): Replace with STATE_MY_NAME.
2887 (sim_open): Delete check for host endianness - performed by
2889 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2890 (sim_open): Move much of the initialization from here.
2891 (sim_load): To here. After the image has been loaded and
2893 (sim_open): Move ColdReset from here.
2894 (sim_create_inferior): To here.
2895 (sim_open): Make FP check less dependant on host endianness.
2897 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2899 * interp.c (sim_set_callbacks): Delete.
2901 * interp.c (membank, membank_base, membank_size): Replace with
2902 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2903 (sim_open): Remove call to callback->init. gdb/run do this.
2907 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2909 * interp.c (big_endian_p): Delete, replaced by
2910 current_target_byte_order.
2912 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2914 * interp.c (host_read_long, host_read_word, host_swap_word,
2915 host_swap_long): Delete. Using common sim-endian.
2916 (sim_fetch_register, sim_store_register): Use H2T.
2917 (pipeline_ticks): Delete. Handled by sim-events.
2919 (sim_engine_run): Update.
2921 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2923 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2925 (SignalException): To here. Signal using sim_engine_halt.
2926 (sim_stop_reason): Delete, moved to common.
2928 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2930 * interp.c (sim_open): Add callback argument.
2931 (sim_set_callbacks): Delete SIM_DESC argument.
2934 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2936 * Makefile.in (SIM_OBJS): Add common modules.
2938 * interp.c (sim_set_callbacks): Also set SD callback.
2939 (set_endianness, xfer_*, swap_*): Delete.
2940 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2941 Change to functions using sim-endian macros.
2942 (control_c, sim_stop): Delete, use common version.
2943 (simulate): Convert into.
2944 (sim_engine_run): This function.
2945 (sim_resume): Delete.
2947 * interp.c (simulation): New variable - the simulator object.
2948 (sim_kind): Delete global - merged into simulation.
2949 (sim_load): Cleanup. Move PC assignment from here.
2950 (sim_create_inferior): To here.
2952 * sim-main.h: New file.
2953 * interp.c (sim-main.h): Include.
2955 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2957 * configure: Regenerated to track ../common/aclocal.m4 changes.
2959 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2961 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2963 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2965 * gencode.c (build_instruction): DIV instructions: check
2966 for division by zero and integer overflow before using
2967 host's division operation.
2969 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2971 * Makefile.in (SIM_OBJS): Add sim-load.o.
2972 * interp.c: #include bfd.h.
2973 (target_byte_order): Delete.
2974 (sim_kind, myname, big_endian_p): New static locals.
2975 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2976 after argument parsing. Recognize -E arg, set endianness accordingly.
2977 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2978 load file into simulator. Set PC from bfd.
2979 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2980 (set_endianness): Use big_endian_p instead of target_byte_order.
2982 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2984 * interp.c (sim_size): Delete prototype - conflicts with
2985 definition in remote-sim.h. Correct definition.
2987 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2989 * configure: Regenerated to track ../common/aclocal.m4 changes.
2992 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2994 * interp.c (sim_open): New arg `kind'.
2996 * configure: Regenerated to track ../common/aclocal.m4 changes.
2998 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3000 * configure: Regenerated to track ../common/aclocal.m4 changes.
3002 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3004 * interp.c (sim_open): Set optind to 0 before calling getopt.
3006 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3008 * configure: Regenerated to track ../common/aclocal.m4 changes.
3010 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3012 * interp.c : Replace uses of pr_addr with pr_uword64
3013 where the bit length is always 64 independent of SIM_ADDR.
3014 (pr_uword64) : added.
3016 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3018 * configure: Re-generate.
3020 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3022 * configure: Regenerate to track ../common/aclocal.m4 changes.
3024 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3026 * interp.c (sim_open): New SIM_DESC result. Argument is now
3028 (other sim_*): New SIM_DESC argument.
3030 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3032 * interp.c: Fix printing of addresses for non-64-bit targets.
3033 (pr_addr): Add function to print address based on size.
3035 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3037 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3039 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3041 * gencode.c (build_mips16_operands): Correct computation of base
3042 address for extended PC relative instruction.
3044 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3046 * interp.c (mips16_entry): Add support for floating point cases.
3047 (SignalException): Pass floating point cases to mips16_entry.
3048 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3050 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3052 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3053 and then set the state to fmt_uninterpreted.
3054 (COP_SW): Temporarily set the state to fmt_word while calling
3057 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3059 * gencode.c (build_instruction): The high order may be set in the
3060 comparison flags at any ISA level, not just ISA 4.
3062 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3064 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3065 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3066 * configure.in: sinclude ../common/aclocal.m4.
3067 * configure: Regenerated.
3069 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3071 * configure: Rebuild after change to aclocal.m4.
3073 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3075 * configure configure.in Makefile.in: Update to new configure
3076 scheme which is more compatible with WinGDB builds.
3077 * configure.in: Improve comment on how to run autoconf.
3078 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3079 * Makefile.in: Use autoconf substitution to install common
3082 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3084 * gencode.c (build_instruction): Use BigEndianCPU instead of
3087 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3089 * interp.c (sim_monitor): Make output to stdout visible in
3090 wingdb's I/O log window.
3092 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3094 * support.h: Undo previous change to SIGTRAP
3097 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3099 * interp.c (store_word, load_word): New static functions.
3100 (mips16_entry): New static function.
3101 (SignalException): Look for mips16 entry and exit instructions.
3102 (simulate): Use the correct index when setting fpr_state after
3103 doing a pending move.
3105 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3107 * interp.c: Fix byte-swapping code throughout to work on
3108 both little- and big-endian hosts.
3110 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3112 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3113 with gdb/config/i386/xm-windows.h.
3115 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3117 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3118 that messes up arithmetic shifts.
3120 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3122 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3123 SIGTRAP and SIGQUIT for _WIN32.
3125 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3127 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3128 force a 64 bit multiplication.
3129 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3130 destination register is 0, since that is the default mips16 nop
3133 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3135 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3136 (build_endian_shift): Don't check proc64.
3137 (build_instruction): Always set memval to uword64. Cast op2 to
3138 uword64 when shifting it left in memory instructions. Always use
3139 the same code for stores--don't special case proc64.
3141 * gencode.c (build_mips16_operands): Fix base PC value for PC
3143 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3145 * interp.c (simJALDELAYSLOT): Define.
3146 (JALDELAYSLOT): Define.
3147 (INDELAYSLOT, INJALDELAYSLOT): Define.
3148 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3150 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3152 * interp.c (sim_open): add flush_cache as a PMON routine
3153 (sim_monitor): handle flush_cache by ignoring it
3155 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3157 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3159 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3160 (BigEndianMem): Rename to ByteSwapMem and change sense.
3161 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3162 BigEndianMem references to !ByteSwapMem.
3163 (set_endianness): New function, with prototype.
3164 (sim_open): Call set_endianness.
3165 (sim_info): Use simBE instead of BigEndianMem.
3166 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3167 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3168 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3169 ifdefs, keeping the prototype declaration.
3170 (swap_word): Rewrite correctly.
3171 (ColdReset): Delete references to CONFIG. Delete endianness related
3172 code; moved to set_endianness.
3174 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3176 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3177 * interp.c (CHECKHILO): Define away.
3178 (simSIGINT): New macro.
3179 (membank_size): Increase from 1MB to 2MB.
3180 (control_c): New function.
3181 (sim_resume): Rename parameter signal to signal_number. Add local
3182 variable prev. Call signal before and after simulate.
3183 (sim_stop_reason): Add simSIGINT support.
3184 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3186 (sim_warning): Delete call to SignalException. Do call printf_filtered
3188 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3189 a call to sim_warning.
3191 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3193 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3194 16 bit instructions.
3196 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3198 Add support for mips16 (16 bit MIPS implementation):
3199 * gencode.c (inst_type): Add mips16 instruction encoding types.
3200 (GETDATASIZEINSN): Define.
3201 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3202 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3204 (MIPS16_DECODE): New table, for mips16 instructions.
3205 (bitmap_val): New static function.
3206 (struct mips16_op): Define.
3207 (mips16_op_table): New table, for mips16 operands.
3208 (build_mips16_operands): New static function.
3209 (process_instructions): If PC is odd, decode a mips16
3210 instruction. Break out instruction handling into new
3211 build_instruction function.
3212 (build_instruction): New static function, broken out of
3213 process_instructions. Check modifiers rather than flags for SHIFT
3214 bit count and m[ft]{hi,lo} direction.
3215 (usage): Pass program name to fprintf.
3216 (main): Remove unused variable this_option_optind. Change
3217 ``*loptarg++'' to ``loptarg++''.
3218 (my_strtoul): Parenthesize && within ||.
3219 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3220 (simulate): If PC is odd, fetch a 16 bit instruction, and
3221 increment PC by 2 rather than 4.
3222 * configure.in: Add case for mips16*-*-*.
3223 * configure: Rebuild.
3225 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3227 * interp.c: Allow -t to enable tracing in standalone simulator.
3228 Fix garbage output in trace file and error messages.
3230 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3232 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3233 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3234 * configure.in: Simplify using macros in ../common/aclocal.m4.
3235 * configure: Regenerated.
3236 * tconfig.in: New file.
3238 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3240 * interp.c: Fix bugs in 64-bit port.
3241 Use ansi function declarations for msvc compiler.
3242 Initialize and test file pointer in trace code.
3243 Prevent duplicate definition of LAST_EMED_REGNUM.
3245 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3247 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3249 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3251 * interp.c (SignalException): Check for explicit terminating
3253 * gencode.c: Pass instruction value through SignalException()
3254 calls for Trap, Breakpoint and Syscall.
3256 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3258 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3259 only used on those hosts that provide it.
3260 * configure.in: Add sqrt() to list of functions to be checked for.
3261 * config.in: Re-generated.
3262 * configure: Re-generated.
3264 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3266 * gencode.c (process_instructions): Call build_endian_shift when
3267 expanding STORE RIGHT, to fix swr.
3268 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3269 clear the high bits.
3270 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3271 Fix float to int conversions to produce signed values.
3273 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3275 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3276 (process_instructions): Correct handling of nor instruction.
3277 Correct shift count for 32 bit shift instructions. Correct sign
3278 extension for arithmetic shifts to not shift the number of bits in
3279 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3280 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3282 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3283 It's OK to have a mult follow a mult. What's not OK is to have a
3284 mult follow an mfhi.
3285 (Convert): Comment out incorrect rounding code.
3287 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3289 * interp.c (sim_monitor): Improved monitor printf
3290 simulation. Tidied up simulator warnings, and added "--log" option
3291 for directing warning message output.
3292 * gencode.c: Use sim_warning() rather than WARNING macro.
3294 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3296 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3297 getopt1.o, rather than on gencode.c. Link objects together.
3298 Don't link against -liberty.
3299 (gencode.o, getopt.o, getopt1.o): New targets.
3300 * gencode.c: Include <ctype.h> and "ansidecl.h".
3301 (AND): Undefine after including "ansidecl.h".
3302 (ULONG_MAX): Define if not defined.
3303 (OP_*): Don't define macros; now defined in opcode/mips.h.
3304 (main): Call my_strtoul rather than strtoul.
3305 (my_strtoul): New static function.
3307 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3309 * gencode.c (process_instructions): Generate word64 and uword64
3310 instead of `long long' and `unsigned long long' data types.
3311 * interp.c: #include sysdep.h to get signals, and define default
3313 * (Convert): Work around for Visual-C++ compiler bug with type
3315 * support.h: Make things compile under Visual-C++ by using
3316 __int64 instead of `long long'. Change many refs to long long
3317 into word64/uword64 typedefs.
3319 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3321 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3322 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3324 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3325 (AC_PROG_INSTALL): Added.
3326 (AC_PROG_CC): Moved to before configure.host call.
3327 * configure: Rebuilt.
3329 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3331 * configure.in: Define @SIMCONF@ depending on mips target.
3332 * configure: Rebuild.
3333 * Makefile.in (run): Add @SIMCONF@ to control simulator
3335 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3336 * interp.c: Remove some debugging, provide more detailed error
3337 messages, update memory accesses to use LOADDRMASK.
3339 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3341 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3342 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3344 * configure: Rebuild.
3345 * config.in: New file, generated by autoheader.
3346 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3347 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3348 HAVE_ANINT and HAVE_AINT, as appropriate.
3349 * Makefile.in (run): Use @LIBS@ rather than -lm.
3350 (interp.o): Depend upon config.h.
3351 (Makefile): Just rebuild Makefile.
3352 (clean): Remove stamp-h.
3353 (mostlyclean): Make the same as clean, not as distclean.
3354 (config.h, stamp-h): New targets.
3356 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3358 * interp.c (ColdReset): Fix boolean test. Make all simulator
3361 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3363 * interp.c (xfer_direct_word, xfer_direct_long,
3364 swap_direct_word, swap_direct_long, xfer_big_word,
3365 xfer_big_long, xfer_little_word, xfer_little_long,
3366 swap_word,swap_long): Added.
3367 * interp.c (ColdReset): Provide function indirection to
3368 host<->simulated_target transfer routines.
3369 * interp.c (sim_store_register, sim_fetch_register): Updated to
3370 make use of indirected transfer routines.
3372 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3374 * gencode.c (process_instructions): Ensure FP ABS instruction
3376 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3377 system call support.
3379 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3381 * interp.c (sim_do_command): Complain if callback structure not
3384 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3386 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3387 support for Sun hosts.
3388 * Makefile.in (gencode): Ensure the host compiler and libraries
3389 used for cross-hosted build.
3391 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3393 * interp.c, gencode.c: Some more (TODO) tidying.
3395 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3397 * gencode.c, interp.c: Replaced explicit long long references with
3398 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3399 * support.h (SET64LO, SET64HI): Macros added.
3401 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3403 * configure: Regenerate with autoconf 2.7.
3405 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3407 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3408 * support.h: Remove superfluous "1" from #if.
3409 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3411 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3413 * interp.c (StoreFPR): Control UndefinedResult() call on
3414 WARN_RESULT manifest.
3416 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3418 * gencode.c: Tidied instruction decoding, and added FP instruction
3421 * interp.c: Added dineroIII, and BSD profiling support. Also
3422 run-time FP handling.
3424 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3426 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3427 gencode.c, interp.c, support.h: created.
projects / external / binutils.git / blob