1 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
3 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
4 (load_word): Call SIM_CORE_SIGNAL hook on error.
5 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
6 starting. For exception dispatching, pass PC instead of NULL_CIA.
7 (decode_coproc): Use COP0_BADVADDR to store faulting address.
8 * sim-main.h (COP0_BADVADDR): Define.
9 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
10 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
11 (_sim_cpu): Add exc_* fields to store register value snapshots.
12 * mips.igen (*): Replace memory-related SignalException* calls
13 with references to SIM_CORE_SIGNAL hook.
15 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
17 * sim-main.c (*): Minor warning cleanups.
19 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
21 * m16.igen (DADDIU5): Correct type-o.
23 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
25 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
29 1998-12-17 Gavin Romig-Koch <gavin@cygnus.com>
31 * vr4run.c (sim_engine_run): Enable the 4111.
34 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
36 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
38 (interp.o): Add dependency on itable.h
39 (oengine.c, gencode): Delete remaining references.
40 (BUILT_SRC_FROM_GEN): Clean up.
42 (SIM_HACK_ALL): Define.
43 (hack, libhack.a): Do not build.
46 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
49 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
50 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
52 * configure.in (mips64vr4xxx): Switch to using the HACK
53 generator. Set TARGET_ENABLE_FR.
54 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
55 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
56 Drop the "64" qualifier to get the HACK generator working.
57 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
58 Add vr4121 where necessary.
59 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
60 qualifier to get the hack generator working.
61 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
63 (DSLLV): Use do_dsllv.
66 (DSRLV): Use do_dsrlv.
67 (BC1): Move *vr4100,*vr4111, and *vr4121 to get the HACK
69 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
70 get the HACK generator working.
71 * vr.igen: Add *vr4320 where missing.
72 (MACC) Rename to get the HACK generator working.
73 (DMACC,MACCS,DMACCS): Add the 64.
76 1998-12-14 Gavin Romig-Koch <gavin@cygnus.com>
78 * vr.igen (Low32Bits): Add vr4320.
81 1998-12-14 Gavin Romig-Koch <gavin@cygnus.com>
83 * configure.in: Add support for 5xxx and "el".
87 1998-12-13 Gavin Romig-Koch <gavin@cygnus.com>
89 * configure.in,mips.igen,vr.igen: Add vr4121.
93 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
96 * configure.in (mips64vr4xxx): Enable TARGET_ENABLE_FR.
97 Set mips_fpu, and mips_fpu_bitsize.
98 Set sim_gen, and sim_igen_machine.
102 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
103 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
105 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
107 * mips/interp.c (DEBUG): Cleanups.
109 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
111 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
112 (tx3904sio_tickle): fflush after a stdout character output.
114 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
116 * interp.c (sim_close): Uninstall modules.
119 Tue Dec 1 18:40:30 1998 Andrew Cagney <cagney@b1.cygnus.com>
121 * sky-libvpe.c (FCmp): Abort when no result.
124 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
126 * sim-main.h, interp.c (sim_monitor): Change to global
129 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
131 * configure.in (vr4100): Only include vr4100 instructions in
133 * configure: Re-generate.
134 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
136 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
138 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
139 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
142 * configure.in (sim_default_gen, sim_use_gen): Replace with
144 (--enable-sim-igen): Delete config option. Always using IGEN.
145 * configure: Re-generate.
147 * Makefile.in (gencode): Kill, kill, kill.
150 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
152 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
153 bit mips16 igen simulator.
154 * configure: Re-generate.
156 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
157 as part of vr4100 ISA.
158 * vr.igen: Mark all instructions as 64 bit only.
160 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
162 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
166 Mon Nov 23 16:51:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
168 * configure.in (tx19): Reconize target mips-tx19-elf.
169 * configure: Re-generate.
172 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
174 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
175 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
176 * configure: Re-generate.
178 * m16.igen (BREAK): Define breakpoint instruction.
179 (JALX32): Mark instruction as mips16 and not r3900.
180 * mips.igen (C.cond.fmt): Fix typo in instruction format.
182 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
185 Mon Nov 16 11:44:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
187 * r5900.igen (CVT.W.S): Always round towards zero.
190 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
192 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
193 insn as a debug breakpoint.
195 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
197 (PENDING_SCHED): Clean up trace statement.
198 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
199 (PENDING_FILL): Delay write by only one cycle.
200 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
202 * sim-main.c (pending_tick): Clean up trace statements. Add trace
204 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
206 (pending_tick): Move incrementing of index to FOR statement.
207 (pending_tick): Only update PENDING_OUT after a write has occured.
209 * configure.in: Add explicit mips-lsi-* target. Use gencode to
211 * configure: Re-generate.
213 * interp.c (sim_engine_run OLD): Delete explicit call to
214 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
217 Wed Nov 11 16:53:57 1998 Andrew Cagney <cagney@b1.cygnus.com>
219 * r5900.igen (RSQRT): Set both I/SI and D/SD when div-0.
221 Thu Nov 5 10:29:42 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
223 * r5900.igen (r59fp_opdiv): Correct erroneous FGR[FD] reference.
225 Thu Nov 5 19:40:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
227 * r5900.igen (DIV): Do not clear clear SO/SU when already set.
229 * r5900.igen (RSQRT.S): Do not compute 1/srqt(abs(T)) when T
230 negative, compute S/sqrt(abs(T)) instead. Correctly set FCSR
233 * r5900.igen (RSQRT.S): Handle overflow/underflow better. Check
235 (r59fp_store): Clarify "bad value" abort messages.
238 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
240 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
241 interrupt level number to match changed SignalExceptionInterrupt
245 Thu Oct 29 12:47:46 1998 Frank Ch. Eigler <fche@cygnus.com>
247 * sim-main.c (tlb_try_match): Include physical address in
248 scratchpad non-mapping warning.
252 Thu Oct 29 11:06:30 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
254 * r5900.igen: Fix PSRLVW, MULTU1, PADSBH instructions,
255 as per customer patch.
258 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
260 * interp.c: #include "itable.h" if WITH_IGEN.
261 (get_insn_name): New function.
262 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
263 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
266 Tue Sep 22 10:35:37 1998 Frank Ch. Eigler <fche@cygnus.com>
268 * sim-main.c (tlb_try_match): Specially match virtual
269 pages mapped to scratchpad RAM, an unimplemented feature.
273 Fri Sep 18 11:31:16 1998 Frank Ch. Eigler <fche@cygnus.com>
275 * r5900.igen (prot3w): Correct rotation sequence; patch
279 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
281 * configure: Rebuilt to inhale new common/aclocal.m4.
284 Thu Sep 10 11:50:54 1998 Doug Evans <devans@canuck.cygnus.com>
286 * r5900.igen (plzcw): Make `i' signed.
288 Wed Sep 9 15:02:10 1998 Doug Evans <devans@canuck.cygnus.com>
290 * sim-main.h (COP0_COUNT,COP0_COMPARE,status_IM7): New macros.
291 * sky-engine.c (cpu_issue): Increment COP0_COUNT and signal an
292 interrupt if == COP0_COMPARE and interrupt masks/enables allow it.
293 * interp.c (signal_exception, sky version): Handle INT 2.
295 Wed Sep 9 11:28:20 1998 Ron Unrau <runrau@cygnus.com>
297 * sim-main.h: track COP0 registers
298 * interp.c (sim_{fetch,store}_register): read/write COP0 registers
300 Fri Sep 4 10:37:57 1998 Frank Ch. Eigler <fche@cygnus.com>
302 * r5900.igen (mtsab): Correct typo in input register.
304 * sim-main.h (TMP_*): New macros for accessing local 128-bit
305 temporary for multimedia instructions.
306 * r5900.igen (*): Convert most instructions to use new TMP
307 macros to store output result during computation.
310 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
312 * dv-tx3904sio.c: Include sim-assert.h.
314 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
316 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
317 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
318 Reorganize target-specific sim-hardware checks.
319 * configure: rebuilt.
320 * interp.c (sim_open): For tx39 target boards, set
321 OPERATING_ENVIRONMENT, add tx3904sio devices.
322 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
323 ROM executables. Install dv-sockser into sim-modules list.
325 * dv-tx3904irc.c: Compiler warning clean-up.
326 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
327 frequent hw-trace messages.
330 Tue Aug 11 13:52:16 1998 Frank Ch. Eigler <fche@cygnus.com>
332 * interp.c (signal_exception): Set IP3 bit in CAUSE on
336 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
338 * vr.igen (MulAcc): Identify as a vr4100 specific function.
340 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
342 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
345 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
346 * mips.igen: Define vr4100 model. Include vr.igen.
347 start-sanitize-cygnus
348 * vr5400.igen: Move instructions to vr.igen
349 * Makefile.in (IGEN_INCLUDE): Remove vr5400.igen.
351 start-sanitize-vr4320
352 * vr4320.igen: Move instructions to vr.igen.
353 * Makefile.in (IGEN_INCLUDE): Remove vr5320.igen.
357 Fri Jul 24 16:01:03 1998 Ian Carmichael <iancarm@cygnus.com>
359 * interp.c (MONITOR_SIZE): Make 1MB monitor for SKY.
360 * mips.igen (BREAK): Fix 0xffff2 monitor call. Slightly less
361 confusing message if not enough --load-next options appear.
363 * sky-pke.h (VUx_MEMx_SRCADDR_START): Move to 0x19800000 range.
364 * sim-main.c (GDB_COMM_AREA): Move to 0x19810000.
365 * sky-gdb.c (init_fifo_bp_cache): Use VIO_BASE when reading GDB area.
366 (resume_handler): Same.
367 (suspend_handler): Same.
369 Wed Jul 22 13:04:13 1998 Frank Ch. Eigler <fche@cygnus.com>
371 * mips.igen (break): Implement LOAD_INSTRUCTION ("break 0xffff1")
372 to trigger multi-phase load.
374 * sim-main.c: Include sim-assert.h for ASSERT macro.
375 * sim-main.h (PRINTF_INSTRUCTION): Correct bit pattern for
378 Tue Jul 21 18:37:36 1998 Ian Carmichael <iancarm@cygnus.com>
381 * interp.c (sim_open): Initialize TLB.
382 * interp.c (signal_exceptions): New 5900 handling.
383 * r5900.igen (TLBWR, TLBWI, TLBR, TLBP): Make these work.
384 * sim-main.c (tlb_try_match, tlb_lookup): New functions.
385 (address_translation): Use the TLB.
386 * sim-main.h (r4000_tlb_entry_t): New type.
387 (TLB_*): New constants.
388 (COP0_*): New register names.
390 Sky character I/O device.
391 * sky-psio.c: New file.
392 * sky-psio.h: New file.
393 * Makefile.in: Add sky-psio.o.
397 Tue Jul 14 16:10:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
399 * r5900.igen (r59fp_overflow): Replace argument ANS with argument
402 (r59fp_store): Update calls.
403 (DIV.S): Compute 0/0 sign from inputs. Ditto for X/0.
406 start-sanitize-branchbug4011
407 Mon Jun 29 09:31:27 1998 Gavin Koch <gavin@cygnus.com>
409 * interp.c (OPTION_BRANCH_BUG_4011): Add.
410 (mips_option_handler): Handle OPTION_BRANCH_BUG_4011.
411 (mips_options): Define the option.
412 * mips.igen (check_4011_branch_bug): New.
413 (mark_4011_branch_bug): New.
414 (all branch insn): Call mark_branch_bug, and check_branch_bug.
415 * sim-main.h (branchbug4011_option, branchbug4011_last_target,
416 branchbug4011_last_cia, BRANCHBUG4011_OPTION,
417 BRANCHBUG4011_LAST_TARGET, BRANCHBUG4011_LAST_CIA,
418 check_branch_bug, mark_branch_bug): Define.
420 end-sanitize-branchbug4011
421 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
423 * mips.igen (check_mf_hilo): Correct check.
426 Fri Jun 19 14:44:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
428 * sim-main.h (NR_COP0_GPR, COP0_GPR, cop0_gpr, NR_COP0_BP,
429 COP0_BP, cop0_bp, NR_COP0_P, COP0_P, cop0_p): Add 32 COP0 general
430 purpose registers, add 8 COP0 break-point registers, add 64 COP0
431 performance registers.
433 * interp.c (decode_coproc): Accept any MTC0/MFC0, MTBP/MFBP, MTP*
434 MFP* instructions. Just transfer value to/from corresponding
437 * r5900.igen (BC0F, BC0FL, BC0T, BC0TL): Implement, assume COP0
438 status is always true.
439 (CACHE, TLBP, TPGWI, TLBWR): Treat as NOP.
440 (EI, DI): Set/clear Status-EIE bit.
444 Fri Jun 19 14:44:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
446 * mips.igen (BC0F, BC0FL, BC0T, BC0TL): Move to sky code to
450 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
453 * sky-vu.c (vu0_read_cop2_register, vu0_write_cop2_register): Call
455 * sky-gdb.c: Include "sim-assert.h".
458 * sim-main.h (interrupt_event): Add prototype.
460 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
461 register_ptr, register_value.
462 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
464 * sim-main.h (tracefh): Make extern.
466 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
468 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
469 Reduce unnecessarily high timer event frequency.
470 * dv-tx3904cpu.c: Ditto for interrupt event.
473 Tue Jun 16 14:12:09 1998 Frank Ch. Eigler <fche@cygnus.com>
475 * interp.c (decode_coproc): Removed COP2 branches.
476 * r5900.igen: Moved COP2 branch instructions here.
477 * mips.igen: Restricted COPz == COP2 bit pattern to
478 exclude COP2 branches.
481 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
483 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
485 (interrupt_event): Made non-static.
487 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
488 interchange of configuration values for external vs. internal
491 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
493 * mips.igen (BREAK): Moved code to here for
494 simulator-reserved break instructions.
495 * gencode.c (build_instruction): Ditto.
496 * interp.c (signal_exception): Code moved from here. Non-
497 reserved instructions now use exception vector, rather
499 * sim-main.h: Moved magic constants to here.
501 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
503 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
504 register upon non-zero interrupt event level, clear upon zero
506 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
507 by passing zero event value.
508 (*_io_{read,write}_buffer): Endianness fixes.
509 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
510 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
512 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
513 serial I/O and timer module at base address 0xFFFF0000.
515 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
517 * mips.igen (SWC1) : Correct the handling of ReverseEndian
520 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
522 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
526 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
528 * dv-tx3904tmr.c: New file - implements tx3904 timer.
529 * dv-tx3904{irc,cpu}.c: Mild reformatting.
530 * configure.in: Include tx3904tmr in hw_device list.
531 * configure: Rebuilt.
532 * interp.c (sim_open): Instantiate three timer instances.
533 Fix address typo of tx3904irc instance.
536 Thu Jun 4 16:47:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
538 * mips.igen (check_mt_hilo): 2.1 of r5900 spec stalls for HILO.
539 Select corresponding check_mt_hilo function.
540 (check_mult_hilo, check_div_hilo, check_mf_hilo, check_mt_hilo):
543 * r5900.igen (check_mult_hilo_hi1lo1, check_div_hilo_hi1lo1): Mark
547 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
549 * interp.c (signal_exception): SystemCall exception now uses
550 the exception vector.
552 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
554 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
558 Mon Jun 1 10:28:25 1998 Jeffrey A Law (law@cygnus.com)
560 * r5900.igen (rsqrt.s): Update based on r5900 ISA manual version 2.1.
564 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
566 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
568 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
570 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
572 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
573 sim-main.h. Declare a struct hw_descriptor instead of struct
574 hw_device_descriptor.
576 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
578 * mips.igen (do_store_left, do_load_left): Compute nr of left and
579 right bits and then re-align left hand bytes to correct byte
580 lanes. Fix incorrect computation in do_store_left when loading
581 bytes from second word.
583 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
585 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
586 * interp.c (sim_open): Only create a device tree when HW is
589 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
590 * interp.c (signal_exception): Ditto.
592 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
594 * gencode.c: Mark BEGEZALL as LIKELY.
596 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
598 * sim-main.h (ALU32_END): Sign extend 32 bit results.
599 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
602 Thu May 21 17:15:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
604 * interp.c (sim_fetch_register): Convert internal r5900 regs to
608 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
610 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
611 modules. Recognize TX39 target with "mips*tx39" pattern.
612 * configure: Rebuilt.
613 * sim-main.h (*): Added many macros defining bits in
614 TX39 control registers.
615 (SignalInterrupt): Send actual PC instead of NULL.
616 (SignalNMIReset): New exception type.
617 * interp.c (board): New variable for future use to identify
618 a particular board being simulated.
619 (mips_option_handler,mips_options): Added "--board" option.
620 (interrupt_event): Send actual PC.
621 (sim_open): Make memory layout conditional on board setting.
622 (signal_exception): Initial implementation of hardware interrupt
623 handling. Accept another break instruction variant for simulator
625 (decode_coproc): Implement RFE instruction for TX39.
626 (mips.igen): Decode RFE instruction as such.
627 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
628 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
629 bbegin to implement memory map.
630 * dv-tx3904cpu.c: New file.
631 * dv-tx3904irc.c: New file.
633 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
635 * mips.igen (check_mt_hilo): Create a separate r3900 version.
638 Wed May 13 14:27:53 1998 Gavin Koch <gavin@cygnus.com>
640 * r5900.igen: Replace the calls and the definition of the
641 function check_op_hilo_hi1lo1 with the pair
642 check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
645 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
647 * tx.igen (madd,maddu): Replace calls to check_op_hilo
648 with calls to check_div_hilo.
650 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
652 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
653 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
654 Add special r3900 version of do_mult_hilo.
655 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
656 with calls to check_mult_hilo.
657 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
658 with calls to check_div_hilo.
660 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
662 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
663 Document a replacement.
665 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
667 * interp.c (sim_monitor): Make mon_printf work.
669 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
671 * sim-main.h (INSN_NAME): New arg `cpu'.
674 Thu Apr 30 18:51:26 1998 Andrew Cagney <cagney@b1.cygnus.com>
676 * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
681 Wed Apr 29 22:54:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
683 * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
684 * r5900.igen (r59fp_overflow): Use.
686 * r5900.igen (r59fp_op3): Rename to
687 (r59fp_mula): This, delete opm argument.
688 (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
689 (r59fp_mula): Overflowing product propogates through to result.
690 (r59fp_mula): ACC to the MAX propogates to result.
691 (r59fp_mula): Underflow during multiply only sets SU.
694 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
696 * configure: Regenerated to track ../common/aclocal.m4 changes.
698 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
700 * configure: Regenerated to track ../common/aclocal.m4 changes.
703 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
705 * acconfig.h: New file.
706 * configure.in: Reverted change of Apr 24; use sinclude again.
708 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
710 * configure: Regenerated to track ../common/aclocal.m4 changes.
713 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
715 * configure.in: Don't call sinclude.
717 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
719 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
721 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
723 * mips.igen (ERET): Implement.
725 * interp.c (decode_coproc): Return sign-extended EPC.
727 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
729 * interp.c (signal_exception): Do not ignore Trap.
730 (signal_exception): On TRAP, restart at exception address.
731 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
732 (signal_exception): Update.
733 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
734 so that TRAP instructions are caught.
736 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
738 * sim-main.h (struct hilo_access, struct hilo_history): Define,
739 contains HI/LO access history.
740 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
741 (HIACCESS, LOACCESS): Delete, replace with
742 (HIHISTORY, LOHISTORY): New macros.
743 (start-sanitize-r5900):
744 (struct sim_5900_cpu): Make hi1access, lo1access of type
746 (HI1ACCESS, LO1ACCESS): Delete, replace with
747 (HI1HISTORY, LO1HISTORY): New macros.
748 (end-sanitize-r5900):
749 (CHECKHILO): Delete all, moved to mips.igen
751 * gencode.c (build_instruction): Do not generate checks for
752 correct HI/LO register usage.
754 * interp.c (old_engine_run): Delete checks for correct HI/LO
757 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
758 check_mf_cycles): New functions.
759 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
760 do_divu, domultx, do_mult, do_multu): Use.
762 * tx.igen ("madd", "maddu"): Use.
763 (start-sanitize-r5900):
765 r5900.igen: Update all HI/LO checks.
766 ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
767 "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
768 ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
769 "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
770 "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
772 (end-sanitize-r5900):
775 Mon Apr 20 18:39:47 1998 Frank Ch. Eigler <fche@cygnus.com>
777 * interp.c (decode_coproc): Correct CMFC2/QMTC2
780 * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
781 instead of a single 128-bit access.
785 Fri Apr 17 14:50:39 1998 Frank Ch. Eigler <fche@cygnus.com>
787 * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
788 * interp.c (cop_[ls]q): Fixes corresponding to above.
792 Thu Apr 16 15:24:14 1998 Frank Ch. Eigler <fche@cygnus.com>
794 * interp.c (decode_coproc): Adapt COP2 micro interlock to
795 clarified specs. Reset "M" bit; exit also on "E" bit.
799 Thu Apr 16 10:40:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
801 * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
802 * mips.igen (CFC1, CTC1): R5900 des not use generic version.
804 * r5900.igen (r59fp_unpack): New function.
805 (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
806 RSQRT.S, SQRT.S): Use.
807 (r59fp_zero): New function.
808 (r59fp_overflow): Generate r5900 specific overflow value.
809 (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
811 (CVT.S.W, CVT.W.S): Exchange implementations.
813 * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
817 Thu Apr 16 09:14:44 1998 Andrew Cagney <cagney@b1.cygnus.com>
819 * configure.in (tx19, sim_use_gen): Switch to igen.
820 * configure: Re-build.
824 Wed Apr 15 12:41:18 1998 Frank Ch. Eigler <fche@cygnus.com>
826 * interp.c (decode_coproc): Make COP2 branch code compile after
827 igen signature changes.
830 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
832 * mips.igen (DSRAV): Use function do_dsrav.
833 (SRAV): Use new function do_srav.
835 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
836 (B): Sign extend 11 bit immediate.
837 (EXT-B*): Shift 16 bit immediate left by 1.
838 (ADDIU*): Don't sign extend immediate value.
840 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
842 * m16run.c (sim_engine_run): Restore CIA after handling an event.
845 * mips.igen (mtc0): Valid tx19 instruction.
848 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
851 * mips.igen (delayslot32, nullify_next_insn): New functions.
852 (m16.igen): Always include.
853 (do_*): Add more tracing.
855 * m16.igen (delayslot16): Add NIA argument, could be called by a
856 32 bit MIPS16 instruction.
858 * interp.c (ifetch16): Move function from here.
859 * sim-main.c (ifetch16): To here.
861 * sim-main.c (ifetch16, ifetch32): Update to match current
862 implementations of LH, LW.
863 (signal_exception): Don't print out incorrect hex value of illegal
866 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
868 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
871 * m16.igen: Implement MIPS16 instructions.
873 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
874 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
875 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
876 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
877 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
878 bodies of corresponding code from 32 bit insn to these. Also used
879 by MIPS16 versions of functions.
881 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
882 (IMEM16): Drop NR argument from macro.
885 Mon Apr 13 16:28:52 1998 Frank Ch. Eigler <fche@cygnus.com>
887 * interp.c (decode_coproc): Add proper 1000000 bit-string at top
888 of VU lower instruction.
892 Thu Apr 9 16:38:23 1998 Frank Ch. Eigler <fche@cygnus.com>
894 * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
897 * sim-main.h: Removed attempt at allowing 128-bit access.
901 Wed Apr 8 18:12:13 1998 Frank Ch. Eigler <fche@cygnus.com>
903 * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
905 * interp.c (decode_coproc): Refer to VU CIA as a "special"
906 register, not as a "misc" register. Aha. Add activity
907 assertions after VCALLMS* instructions.
911 Tue Apr 7 18:32:49 1998 Frank Ch. Eigler <fche@cygnus.com>
913 * interp.c (decode_coproc): Do not apply superfluous E (end) flag
914 to upper code of generated VU instruction.
918 Mon Apr 6 19:55:56 1998 Frank Ch. Eigler <fche@cygnus.com>
920 * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
922 * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
925 * r5900.igen (SQC2): Thinko.
929 Sun Apr 5 12:05:44 1998 Frank Ch. Eigler <fche@cygnus.com>
931 * interp.c (*): Adapt code to merged VU device & state structs.
932 (decode_coproc): Execute COP2 each macroinstruction without
933 pipelining, by stepping VU to completion state. Adapted to
934 read_vu_*_reg style of register access.
936 * mips.igen ([SL]QC2): Removed these COP2 instructions.
938 * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
940 * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
943 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
945 * Makefile.in (SIM_OBJS): Add sim-main.o.
947 * sim-main.h (address_translation, load_memory, store_memory,
948 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
950 (pr_addr, pr_uword64): Declare.
951 (sim-main.c): Include when H_REVEALS_MODULE_P.
953 * interp.c (address_translation, load_memory, store_memory,
954 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
956 * sim-main.c: To here. Fix compilation problems.
958 * configure.in: Enable inlining.
959 * configure: Re-config.
961 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
963 * configure: Regenerated to track ../common/aclocal.m4 changes.
965 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
967 * mips.igen: Include tx.igen.
968 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
969 * tx.igen: New file, contains MADD and MADDU.
971 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
972 the hardwired constant `7'.
973 (store_memory): Ditto.
974 (LOADDRMASK): Move definition to sim-main.h.
976 mips.igen (MTC0): Enable for r3900.
979 mips.igen (do_load_byte): Delete.
980 (do_load, do_store, do_load_left, do_load_write, do_store_left,
981 do_store_right): New functions.
982 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
984 configure.in: Let the tx39 use igen again.
987 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
989 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
990 not an address sized quantity. Return zero for cache sizes.
992 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
994 * mips.igen (r3900): r3900 does not support 64 bit integer
998 Wed Apr 1 08:20:31 1998 Frank Ch. Eigler <fche@cygnus.com>
1000 * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
1004 Mon Mar 30 18:41:43 1998 Frank Ch. Eigler <fche@cygnus.com>
1006 * interp.c (decode_coproc): Continuing COP2 work.
1007 (cop_[ls]q): Make sky-target-only.
1009 * sim-main.h (COP_[LS]Q): Make sky-target-only.
1011 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1013 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1015 * configure : Rebuild.
1018 Sun Mar 29 17:50:11 Frank Ch. Eigler <fche@cygnus.com>
1020 * interp.c (decode_coproc): Added a missing TARGET_SKY check
1021 around COP2 implementation skeleton.
1025 Fri Mar 27 16:19:29 1998 Frank Ch. Eigler <fche@cygnus.com>
1027 * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
1029 * interp.c (sim_{load,store}_register): Use new vu[01]_device
1030 static to access VU registers.
1031 (decode_coproc): Added skeleton of sky COP2 (VU) instruction
1032 decoding. Work in progress.
1034 * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
1035 overlapping/redundant bit pattern.
1036 (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in
1039 * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
1042 * interp.c (cop_lq, cop_sq): New functions for future 128-bit
1043 access to coprocessor registers.
1045 * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
1047 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1049 * configure: Regenerated to track ../common/aclocal.m4 changes.
1051 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1053 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1055 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1057 * configure: Regenerated to track ../common/aclocal.m4 changes.
1058 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1060 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1062 * configure: Regenerated to track ../common/aclocal.m4 changes.
1064 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1066 * interp.c (Max, Min): Comment out functions. Not yet used.
1068 start-sanitize-vr4320
1069 Wed Mar 25 10:04:13 1998 Andrew Cagney <cagney@b1.cygnus.com>
1071 * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
1074 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1076 * configure: Regenerated to track ../common/aclocal.m4 changes.
1078 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1080 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1081 configurable settings for stand-alone simulator.
1084 * configure.in: Added --with-sim-gpu2 option to specify path of
1085 sky GPU2 library. Triggers -DSKY_GPU2 for sky-gpuif.c, and
1086 links/compiles stand-alone simulator with this library.
1088 * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
1090 * configure.in: Added X11 search, just in case.
1092 * configure: Regenerated.
1094 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1096 * interp.c (sim_write, sim_read, load_memory, store_memory):
1097 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1099 start-sanitize-vr4320
1100 Tue Mar 10 10:32:22 1998 Gavin Koch <gavin@cygnus.com>
1102 * vr4320.igen (clz,dclz) : Added.
1103 (dmac): Replaced 99, with LO.
1106 start-sanitize-cygnus
1107 Fri Mar 6 08:30:58 1998 Andrew Cagney <cagney@b1.cygnus.com>
1109 * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
1112 start-sanitize-vr4320
1113 Tue Mar 3 11:56:29 1998 Gavin Koch <gavin@cygnus.com>
1115 * vr4320.igen: New file.
1116 * Makefile.in (vr4320.igen) : Added.
1117 * configure.in (mips64vr4320-*-*): Added.
1118 * configure : Rebuilt.
1119 * mips.igen : Correct the bfd-names in the mips-ISA model entries.
1120 Add the vr4320 model entry and mark the vr4320 insn as necessary.
1123 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1125 * sim-main.h (GETFCC): Return an unsigned value.
1127 start-sanitize-r5900
1128 * r5900.igen: Use an unsigned array index variable `i'.
1129 (QFSRV): Ditto for variable bytes.
1132 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1134 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1135 (DADD): Result destination is RD not RT.
1137 start-sanitize-r5900
1138 * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
1139 (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
1143 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1145 * sim-main.h (HIACCESS, LOACCESS): Always define.
1147 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1149 * interp.c (sim_info): Delete.
1151 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1153 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1154 (mips_option_handler): New argument `cpu'.
1155 (sim_open): Update call to sim_add_option_table.
1157 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1159 * mips.igen (CxC1): Add tracing.
1161 start-sanitize-r5900
1162 Wed Feb 25 13:59:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1164 * r5900.igen (StoreFP): Delete.
1165 (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
1167 (rsqrt.s, sqrt.s): Implement.
1168 (r59cond): New function.
1169 (C.COND.S): Call r59cond in assembler line.
1170 (cvt.w.s, cvt.s.w): Implement.
1172 * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
1175 * sim-main.h: Define an enum of r5900 FCSR bit fields.
1178 start-sanitize-r5900
1179 Tue Feb 24 14:44:18 1998 Andrew Cagney <cagney@b1.cygnus.com>
1181 * r5900.igen: Add tracing to all p* instructions.
1183 Tue Feb 24 02:47:33 1998 Andrew Cagney <cagney@b1.cygnus.com>
1185 * interp.c (sim_store_register, sim_fetch_register): Pull swifty
1186 to get gdb talking to re-aranged sim_cpu register structure.
1189 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1191 * sim-main.h (Max, Min): Declare.
1193 * interp.c (Max, Min): New functions.
1195 * mips.igen (BC1): Add tracing.
1197 start-sanitize-cygnus
1198 Fri Feb 20 16:27:17 1998 Andrew Cagney <cagney@b1.cygnus.com>
1200 * mdmx.igen: Tag all functions as requiring either with mdmx or
1204 start-sanitize-r5900
1205 Fri Feb 20 15:55:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1207 * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
1209 (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
1211 * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
1213 * r5900.igen: Rewrite.
1215 * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
1217 (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
1218 Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
1221 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1223 * interp.c Added memory map for stack in vr4100
1225 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1227 * interp.c (load_memory): Add missing "break"'s.
1229 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1231 * interp.c (sim_store_register, sim_fetch_register): Pass in
1232 length parameter. Return -1.
1234 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1236 * interp.c: Added hardware init hook, fixed warnings.
1238 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1240 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1242 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1244 * interp.c (ifetch16): New function.
1246 * sim-main.h (IMEM32): Rename IMEM.
1247 (IMEM16_IMMED): Define.
1249 (DELAY_SLOT): Update.
1251 * m16run.c (sim_engine_run): New file.
1253 * m16.igen: All instructions except LB.
1254 (LB): Call do_load_byte.
1255 * mips.igen (do_load_byte): New function.
1256 (LB): Call do_load_byte.
1258 * mips.igen: Move spec for insn bit size and high bit from here.
1259 * Makefile.in (tmp-igen, tmp-m16): To here.
1261 * m16.dc: New file, decode mips16 instructions.
1263 * Makefile.in (SIM_NO_ALL): Define.
1264 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1267 * m16.igen: Mark all mips16 insns as being part of the tx19 insn
1271 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1273 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1274 point unit to 32 bit registers.
1275 * configure: Re-generate.
1277 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1279 * configure.in (sim_use_gen): Make IGEN the default simulator
1280 generator for generic 32 and 64 bit mips targets.
1281 * configure: Re-generate.
1283 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1285 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1288 * interp.c (sim_fetch_register, sim_store_register): Read/write
1289 FGR from correct location.
1290 (sim_open): Set size of FGR's according to
1291 WITH_TARGET_FLOATING_POINT_BITSIZE.
1293 * sim-main.h (FGR): Store floating point registers in a separate
1296 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1298 * configure: Regenerated to track ../common/aclocal.m4 changes.
1300 start-sanitize-cygnus
1301 * mdmx.igen: Mark all instructions as 64bit/fp specific.
1304 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1306 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1308 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1310 * interp.c (pending_tick): New function. Deliver pending writes.
1312 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1313 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1314 it can handle mixed sized quantites and single bits.
1316 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1318 * interp.c (oengine.h): Do not include when building with IGEN.
1319 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1320 (sim_info): Ditto for PROCESSOR_64BIT.
1321 (sim_monitor): Replace ut_reg with unsigned_word.
1322 (*): Ditto for t_reg.
1323 (LOADDRMASK): Define.
1324 (sim_open): Remove defunct check that host FP is IEEE compliant,
1325 using software to emulate floating point.
1326 (value_fpr, ...): Always compile, was conditional on HASFPU.
1328 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1330 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1333 * interp.c (SD, CPU): Define.
1334 (mips_option_handler): Set flags in each CPU.
1335 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1336 (sim_close): Do not clear STATE, deleted anyway.
1337 (sim_write, sim_read): Assume CPU zero's vm should be used for
1339 (sim_create_inferior): Set the PC for all processors.
1340 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1342 (mips16_entry): Pass correct nr of args to store_word, load_word.
1343 (ColdReset): Cold reset all cpu's.
1344 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1345 (sim_monitor, load_memory, store_memory, signal_exception): Use
1346 `CPU' instead of STATE_CPU.
1349 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1352 * sim-main.h (signal_exception): Add sim_cpu arg.
1353 (SignalException*): Pass both SD and CPU to signal_exception.
1354 * interp.c (signal_exception): Update.
1356 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1358 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1359 address_translation): Ditto
1360 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1362 start-sanitize-cygnus
1363 * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
1365 (ByteAlign): Use StoreFPR, pass args in correct order.
1368 start-sanitize-r5900
1369 Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1371 * configure.in (sim_igen_filter): For r5900, configure as SMP.
1374 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1376 * configure: Regenerated to track ../common/aclocal.m4 changes.
1378 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1380 start-sanitize-r5900
1381 * configure.in (sim_igen_filter): For r5900, use igen.
1382 * configure: Re-generate.
1385 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1387 * mips.igen (model): Map processor names onto BFD name.
1389 * sim-main.h (CPU_CIA): Delete.
1390 (SET_CIA, GET_CIA): Define
1392 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1394 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1397 * configure.in (default_endian): Configure a big-endian simulator
1399 * configure: Re-generate.
1401 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1403 * configure: Regenerated to track ../common/aclocal.m4 changes.
1405 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1407 * interp.c (sim_monitor): Handle Densan monitor outbyte
1408 and inbyte functions.
1410 1997-12-29 Felix Lee <flee@cygnus.com>
1412 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1414 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1416 * Makefile.in (tmp-igen): Arrange for $zero to always be
1417 reset to zero after every instruction.
1419 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1421 * configure: Regenerated to track ../common/aclocal.m4 changes.
1424 start-sanitize-cygnus
1425 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1427 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
1430 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
1432 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
1433 vr5400 with the vr5000 as the default.
1436 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1438 * mips.igen (MSUB): Fix to work like MADD.
1439 * gencode.c (MSUB): Similarly.
1441 start-sanitize-cygnus
1442 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
1444 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
1448 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1450 * configure: Regenerated to track ../common/aclocal.m4 changes.
1452 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1454 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1456 start-sanitize-cygnus
1457 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
1458 (value_cc, store_cc): Implement.
1460 * sim-main.h: Add 8*3*8 bit accumulator.
1462 * vr5400.igen: Move mdmx instructins from here
1463 * mdmx.igen: To here - new file. Add/fix missing instructions.
1464 * mips.igen: Include mdmx.igen.
1465 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1468 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1470 * sim-main.h (sim-fpu.h): Include.
1472 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1473 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1474 using host independant sim_fpu module.
1476 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1478 * interp.c (signal_exception): Report internal errors with SIGABRT
1481 * sim-main.h (C0_CONFIG): New register.
1482 (signal.h): No longer include.
1484 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1486 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1488 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1490 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1492 * mips.igen: Tag vr5000 instructions.
1493 (ANDI): Was missing mipsIV model, fix assembler syntax.
1494 (do_c_cond_fmt): New function.
1495 (C.cond.fmt): Handle mips I-III which do not support CC field
1497 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1498 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1500 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1501 vr5000 which saves LO in a GPR separatly.
1503 * configure.in (enable-sim-igen): For vr5000, select vr5000
1504 specific instructions.
1505 * configure: Re-generate.
1507 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1509 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1511 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1512 fmt_uninterpreted_64 bit cases to switch. Convert to
1515 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1517 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1518 as specified in IV3.2 spec.
1519 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1521 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1523 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1524 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1525 (start-sanitize-r5900):
1526 (LWXC1, SWXC1): Delete from r5900 instruction set.
1527 (end-sanitize-r5900):
1528 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1529 PENDING_FILL versions of instructions. Simplify.
1531 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1533 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1535 (MTHI, MFHI): Disable code checking HI-LO.
1537 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1539 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1541 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1543 * gencode.c (build_mips16_operands): Replace IPC with cia.
1545 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1546 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1548 (UndefinedResult): Replace function with macro/function
1550 (sim_engine_run): Don't save PC in IPC.
1552 * sim-main.h (IPC): Delete.
1554 start-sanitize-cygnus
1555 * vr5400.igen (vr): Add missing cia argument to value_fpr.
1556 (do_select): Rename function select.
1559 * interp.c (signal_exception, store_word, load_word,
1560 address_translation, load_memory, store_memory, cache_op,
1561 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1562 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1563 current instruction address - cia - argument.
1564 (sim_read, sim_write): Call address_translation directly.
1565 (sim_engine_run): Rename variable vaddr to cia.
1566 (signal_exception): Pass cia to sim_monitor
1568 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1569 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1570 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1572 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1573 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1576 * interp.c (signal_exception): Pass restart address to
1579 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1580 idecode.o): Add dependency.
1582 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1584 (DELAY_SLOT): Update NIA not PC with branch address.
1585 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1587 * mips.igen: Use CIA not PC in branch calculations.
1588 (illegal): Call SignalException.
1589 (BEQ, ADDIU): Fix assembler.
1591 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1593 * m16.igen (JALX): Was missing.
1595 * configure.in (enable-sim-igen): New configuration option.
1596 * configure: Re-generate.
1598 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1600 * interp.c (load_memory, store_memory): Delete parameter RAW.
1601 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1602 bypassing {load,store}_memory.
1604 * sim-main.h (ByteSwapMem): Delete definition.
1606 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1608 * interp.c (sim_do_command, sim_commands): Delete mips specific
1609 commands. Handled by module sim-options.
1611 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1612 (WITH_MODULO_MEMORY): Define.
1614 * interp.c (sim_info): Delete code printing memory size.
1616 * interp.c (mips_size): Nee sim_size, delete function.
1618 (monitor, monitor_base, monitor_size): Delete global variables.
1619 (sim_open, sim_close): Delete code creating monitor and other
1620 memory regions. Use sim-memopts module, via sim_do_commandf, to
1621 manage memory regions.
1622 (load_memory, store_memory): Use sim-core for memory model.
1624 * interp.c (address_translation): Delete all memory map code
1625 except line forcing 32 bit addresses.
1627 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1629 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1632 * interp.c (logfh, logfile): Delete globals.
1633 (sim_open, sim_close): Delete code opening & closing log file.
1634 (mips_option_handler): Delete -l and -n options.
1635 (OPTION mips_options): Ditto.
1637 * interp.c (OPTION mips_options): Rename option trace to dinero.
1638 (mips_option_handler): Update.
1640 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1642 * interp.c (fetch_str): New function.
1643 (sim_monitor): Rewrite using sim_read & sim_write.
1644 (sim_open): Check magic number.
1645 (sim_open): Write monitor vectors into memory using sim_write.
1646 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1647 (sim_read, sim_write): Simplify - transfer data one byte at a
1649 (load_memory, store_memory): Clarify meaning of parameter RAW.
1651 * sim-main.h (isHOST): Defete definition.
1652 (isTARGET): Mark as depreciated.
1653 (address_translation): Delete parameter HOST.
1655 * interp.c (address_translation): Delete parameter HOST.
1658 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
1660 * gencode.c: Add tx49 configury and insns.
1661 * configure.in: Add tx49 configury.
1662 * configure: Update.
1665 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1669 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1670 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1672 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1674 * mips.igen: Add model filter field to records.
1676 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1678 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1680 interp.c (sim_engine_run): Do not compile function sim_engine_run
1681 when WITH_IGEN == 1.
1683 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1684 target architecture.
1686 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1687 igen. Replace with configuration variables sim_igen_flags /
1690 start-sanitize-r5900
1691 * r5900.igen: New file. Copy r5900 insns here.
1693 start-sanitize-cygnus
1694 * vr5400.igen: New file.
1696 * m16.igen: New file. Copy mips16 insns here.
1697 * mips.igen: From here.
1699 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1701 start-sanitize-cygnus
1702 * mips.igen: Tag all mipsIV instructions with vr5400 model.
1704 * configure.in: Add mips64vr5400 target.
1705 * configure: Re-generate.
1708 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1710 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1712 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1714 * gencode.c (build_instruction): Follow sim_write's lead in using
1715 BigEndianMem instead of !ByteSwapMem.
1717 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1719 * configure.in (sim_gen): Dependent on target, select type of
1720 generator. Always select old style generator.
1722 configure: Re-generate.
1724 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1726 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1727 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1728 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1729 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1730 SIM_@sim_gen@_*, set by autoconf.
1732 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1734 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1736 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1737 CURRENT_FLOATING_POINT instead.
1739 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1740 (address_translation): Raise exception InstructionFetch when
1741 translation fails and isINSTRUCTION.
1743 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1744 sim_engine_run): Change type of of vaddr and paddr to
1746 (address_translation, prefetch, load_memory, store_memory,
1747 cache_op): Change type of vAddr and pAddr to address_word.
1749 * gencode.c (build_instruction): Change type of vaddr and paddr to
1752 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1754 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1755 macro to obtain result of ALU op.
1757 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1759 * interp.c (sim_info): Call profile_print.
1761 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1763 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1765 * sim-main.h (WITH_PROFILE): Do not define, defined in
1766 common/sim-config.h. Use sim-profile module.
1767 (simPROFILE): Delete defintion.
1769 * interp.c (PROFILE): Delete definition.
1770 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1771 (sim_close): Delete code writing profile histogram.
1772 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1774 (sim_engine_run): Delete code profiling the PC.
1776 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1778 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1780 * interp.c (sim_monitor): Make register pointers of type
1783 * sim-main.h: Make registers of type unsigned_word not
1786 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1788 start-sanitize-r5900
1789 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1790 ...): Move to sim-main.h
1793 * interp.c (sync_operation): Rename from SyncOperation, make
1794 global, add SD argument.
1795 (prefetch): Rename from Prefetch, make global, add SD argument.
1796 (decode_coproc): Make global.
1798 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1800 * gencode.c (build_instruction): Generate DecodeCoproc not
1801 decode_coproc calls.
1803 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1804 (SizeFGR): Move to sim-main.h
1805 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1806 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1807 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1809 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1810 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1811 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1812 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1813 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1814 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1816 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1818 (sim-alu.h): Include.
1819 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1820 (sim_cia): Typedef to instruction_address.
1822 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1824 * Makefile.in (interp.o): Rename generated file engine.c to
1829 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1831 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1833 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1835 * gencode.c (build_instruction): For "FPSQRT", output correct
1836 number of arguments to Recip.
1838 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1840 * Makefile.in (interp.o): Depends on sim-main.h
1842 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1844 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1845 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1846 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1847 STATE, DSSTATE): Define
1848 (GPR, FGRIDX, ..): Define.
1850 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1851 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1852 (GPR, FGRIDX, ...): Delete macros.
1854 * interp.c: Update names to match defines from sim-main.h
1856 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1858 * interp.c (sim_monitor): Add SD argument.
1859 (sim_warning): Delete. Replace calls with calls to
1861 (sim_error): Delete. Replace calls with sim_io_error.
1862 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1863 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1864 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1866 (mips_size): Rename from sim_size. Add SD argument.
1868 * interp.c (simulator): Delete global variable.
1869 (callback): Delete global variable.
1870 (mips_option_handler, sim_open, sim_write, sim_read,
1871 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1872 sim_size,sim_monitor): Use sim_io_* not callback->*.
1873 (sim_open): ZALLOC simulator struct.
1874 (PROFILE): Do not define.
1876 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1878 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1879 support.h with corresponding code.
1881 * sim-main.h (word64, uword64), support.h: Move definition to
1883 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1886 * Makefile.in: Update dependencies
1887 * interp.c: Do not include.
1889 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1891 * interp.c (address_translation, load_memory, store_memory,
1892 cache_op): Rename to from AddressTranslation et.al., make global,
1895 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1898 * interp.c (SignalException): Rename to signal_exception, make
1901 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1903 * sim-main.h (SignalException, SignalExceptionInterrupt,
1904 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1905 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1906 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1909 * interp.c, support.h: Use.
1911 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1913 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1914 to value_fpr / store_fpr. Add SD argument.
1915 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1916 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1918 * sim-main.h (ValueFPR, StoreFPR): Define.
1920 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1922 * interp.c (sim_engine_run): Check consistency between configure
1923 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1926 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1927 (mips_fpu): Configure WITH_FLOATING_POINT.
1928 (mips_endian): Configure WITH_TARGET_ENDIAN.
1929 * configure: Update.
1931 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1933 * configure: Regenerated to track ../common/aclocal.m4 changes.
1935 start-sanitize-r5900
1936 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1938 * interp.c (MAX_REG): Allow up-to 128 registers.
1939 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1940 (REGISTER_SA): Ditto.
1941 (sim_open): Initialize register_widths for r5900 specific
1943 (sim_fetch_register, sim_store_register): Check for request of
1944 r5900 specific SA register. Check for request for hi 64 bits of
1945 r5900 specific registers.
1948 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1950 * configure: Regenerated.
1952 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1954 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1956 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1958 * gencode.c (print_igen_insn_models): Assume certain architectures
1959 include all mips* instructions.
1960 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1963 * Makefile.in (tmp.igen): Add target. Generate igen input from
1966 * gencode.c (FEATURE_IGEN): Define.
1967 (main): Add --igen option. Generate output in igen format.
1968 (process_instructions): Format output according to igen option.
1969 (print_igen_insn_format): New function.
1970 (print_igen_insn_models): New function.
1971 (process_instructions): Only issue warnings and ignore
1972 instructions when no FEATURE_IGEN.
1974 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1976 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1979 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1981 * configure: Regenerated to track ../common/aclocal.m4 changes.
1983 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1985 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1986 SIM_RESERVED_BITS): Delete, moved to common.
1987 (SIM_EXTRA_CFLAGS): Update.
1989 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1991 * configure.in: Configure non-strict memory alignment.
1992 * configure: Regenerated to track ../common/aclocal.m4 changes.
1994 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1996 * configure: Regenerated to track ../common/aclocal.m4 changes.
1998 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2000 * gencode.c (SDBBP,DERET): Added (3900) insns.
2001 (RFE): Turn on for 3900.
2002 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2003 (dsstate): Made global.
2004 (SUBTARGET_R3900): Added.
2005 (CANCELDELAYSLOT): New.
2006 (SignalException): Ignore SystemCall rather than ignore and
2007 terminate. Add DebugBreakPoint handling.
2008 (decode_coproc): New insns RFE, DERET; and new registers Debug
2009 and DEPC protected by SUBTARGET_R3900.
2010 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2012 * Makefile.in,configure.in: Add mips subtarget option.
2013 * configure: Update.
2015 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2017 * gencode.c: Add r3900 (tx39).
2020 * gencode.c: Fix some configuration problems by improving
2021 the relationship between tx19 and tx39.
2024 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2026 * gencode.c (build_instruction): Don't need to subtract 4 for
2029 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2031 * interp.c: Correct some HASFPU problems.
2033 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2035 * configure: Regenerated to track ../common/aclocal.m4 changes.
2037 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2039 * interp.c (mips_options): Fix samples option short form, should
2042 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2044 * interp.c (sim_info): Enable info code. Was just returning.
2046 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2048 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2051 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2053 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2055 (build_instruction): Ditto for LL.
2058 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
2060 * mips/configure.in, mips/gencode: Add tx19/r1900.
2063 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2065 * configure: Regenerated to track ../common/aclocal.m4 changes.
2067 start-sanitize-r5900
2068 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
2070 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
2071 for overflow due to ABS of MININT, set result to MAXINT.
2072 (build_instruction): For "psrlvw", signextend bit 31.
2075 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2077 * configure: Regenerated to track ../common/aclocal.m4 changes.
2080 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2082 * interp.c (sim_open): Add call to sim_analyze_program, update
2085 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2087 * interp.c (sim_kill): Delete.
2088 (sim_create_inferior): Add ABFD argument. Set PC from same.
2089 (sim_load): Move code initializing trap handlers from here.
2090 (sim_open): To here.
2091 (sim_load): Delete, use sim-hload.c.
2093 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2095 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2097 * configure: Regenerated to track ../common/aclocal.m4 changes.
2100 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2102 * interp.c (sim_open): Add ABFD argument.
2103 (sim_load): Move call to sim_config from here.
2104 (sim_open): To here. Check return status.
2106 start-sanitize-r5900
2107 * gencode.c (build_instruction): Do not define x8000000000000000,
2108 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
2111 start-sanitize-r5900
2112 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2114 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
2115 "pdivuw" check for overflow due to signed divide by -1.
2118 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2120 * gencode.c (build_instruction): Two arg MADD should
2121 not assign result to $0.
2123 start-sanitize-r5900
2124 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
2126 * gencode.c (build_instruction): For "ppac5" use unsigned
2127 arrithmetic so that the sign bit doesn't smear when right shifted.
2128 (build_instruction): For "pdiv" perform sign extension when
2129 storing results in HI and LO.
2130 (build_instructions): For "pdiv" and "pdivbw" check for
2132 (build_instruction): For "pmfhl.slw" update hi part of dest
2133 register as well as low part.
2134 (build_instruction): For "pmfhl" portably handle long long values.
2135 (build_instruction): For "pmfhl.sh" correctly negative values.
2136 Store half words 2 and three in the correct place.
2137 (build_instruction): For "psllvw", sign extend value after shift.
2140 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2142 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2143 * sim/mips/configure.in: Regenerate.
2145 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2147 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2148 signed8, unsigned8 et.al. types.
2150 start-sanitize-r5900
2151 * gencode.c (build_instruction): For PMULTU* do not sign extend
2152 registers. Make generated code easier to debug.
2155 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2156 hosts when selecting subreg.
2158 start-sanitize-r5900
2159 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
2161 * gencode.c (type_for_data_len): For 32bit operations concerned
2162 with overflow, perform op using 64bits.
2163 (build_instruction): For PADD, always compute operation using type
2164 returned by type_for_data_len.
2165 (build_instruction): For PSUBU, when overflow, saturate to zero as
2169 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2171 start-sanitize-r5900
2172 * gencode.c (build_instruction): Handle "pext5" according to
2173 version 1.95 of the r5900 ISA.
2175 * gencode.c (build_instruction): Handle "ppac5" according to
2176 version 1.95 of the r5900 ISA.
2179 * interp.c (sim_engine_run): Reset the ZERO register to zero
2180 regardless of FEATURE_WARN_ZERO.
2181 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2183 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2185 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2186 (SignalException): For BreakPoints ignore any mode bits and just
2188 (SignalException): Always set the CAUSE register.
2190 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2192 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2193 exception has been taken.
2195 * interp.c: Implement the ERET and mt/f sr instructions.
2197 start-sanitize-r5900
2198 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
2200 * gencode.c (build_instruction): For paddu, extract unsigned
2203 * gencode.c (build_instruction): Saturate padds instead of padd
2207 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2209 * interp.c (SignalException): Don't bother restarting an
2212 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2214 * interp.c (SignalException): Really take an interrupt.
2215 (interrupt_event): Only deliver interrupts when enabled.
2217 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2219 * interp.c (sim_info): Only print info when verbose.
2220 (sim_info) Use sim_io_printf for output.
2222 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2224 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2227 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2229 * interp.c (sim_do_command): Check for common commands if a
2230 simulator specific command fails.
2232 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2234 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2235 and simBE when DEBUG is defined.
2237 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2239 * interp.c (interrupt_event): New function. Pass exception event
2240 onto exception handler.
2242 * configure.in: Check for stdlib.h.
2243 * configure: Regenerate.
2245 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2246 variable declaration.
2247 (build_instruction): Initialize memval1.
2248 (build_instruction): Add UNUSED attribute to byte, bigend,
2250 (build_operands): Ditto.
2252 * interp.c: Fix GCC warnings.
2253 (sim_get_quit_code): Delete.
2255 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2256 * Makefile.in: Ditto.
2257 * configure: Re-generate.
2259 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2261 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2263 * interp.c (mips_option_handler): New function parse argumes using
2265 (myname): Replace with STATE_MY_NAME.
2266 (sim_open): Delete check for host endianness - performed by
2268 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2269 (sim_open): Move much of the initialization from here.
2270 (sim_load): To here. After the image has been loaded and
2272 (sim_open): Move ColdReset from here.
2273 (sim_create_inferior): To here.
2274 (sim_open): Make FP check less dependant on host endianness.
2276 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2278 * interp.c (sim_set_callbacks): Delete.
2280 * interp.c (membank, membank_base, membank_size): Replace with
2281 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2282 (sim_open): Remove call to callback->init. gdb/run do this.
2286 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2288 * interp.c (big_endian_p): Delete, replaced by
2289 current_target_byte_order.
2291 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2293 * interp.c (host_read_long, host_read_word, host_swap_word,
2294 host_swap_long): Delete. Using common sim-endian.
2295 (sim_fetch_register, sim_store_register): Use H2T.
2296 (pipeline_ticks): Delete. Handled by sim-events.
2298 (sim_engine_run): Update.
2300 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2302 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2304 (SignalException): To here. Signal using sim_engine_halt.
2305 (sim_stop_reason): Delete, moved to common.
2307 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2309 * interp.c (sim_open): Add callback argument.
2310 (sim_set_callbacks): Delete SIM_DESC argument.
2313 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2315 * Makefile.in (SIM_OBJS): Add common modules.
2317 * interp.c (sim_set_callbacks): Also set SD callback.
2318 (set_endianness, xfer_*, swap_*): Delete.
2319 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2320 Change to functions using sim-endian macros.
2321 (control_c, sim_stop): Delete, use common version.
2322 (simulate): Convert into.
2323 (sim_engine_run): This function.
2324 (sim_resume): Delete.
2326 * interp.c (simulation): New variable - the simulator object.
2327 (sim_kind): Delete global - merged into simulation.
2328 (sim_load): Cleanup. Move PC assignment from here.
2329 (sim_create_inferior): To here.
2331 * sim-main.h: New file.
2332 * interp.c (sim-main.h): Include.
2334 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2336 * configure: Regenerated to track ../common/aclocal.m4 changes.
2338 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2340 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2342 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2344 * gencode.c (build_instruction): DIV instructions: check
2345 for division by zero and integer overflow before using
2346 host's division operation.
2348 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2350 * Makefile.in (SIM_OBJS): Add sim-load.o.
2351 * interp.c: #include bfd.h.
2352 (target_byte_order): Delete.
2353 (sim_kind, myname, big_endian_p): New static locals.
2354 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2355 after argument parsing. Recognize -E arg, set endianness accordingly.
2356 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2357 load file into simulator. Set PC from bfd.
2358 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2359 (set_endianness): Use big_endian_p instead of target_byte_order.
2361 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2363 * interp.c (sim_size): Delete prototype - conflicts with
2364 definition in remote-sim.h. Correct definition.
2366 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2368 * configure: Regenerated to track ../common/aclocal.m4 changes.
2371 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2373 * interp.c (sim_open): New arg `kind'.
2375 * configure: Regenerated to track ../common/aclocal.m4 changes.
2377 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2379 * configure: Regenerated to track ../common/aclocal.m4 changes.
2381 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2383 * interp.c (sim_open): Set optind to 0 before calling getopt.
2385 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2387 * configure: Regenerated to track ../common/aclocal.m4 changes.
2389 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2391 * interp.c : Replace uses of pr_addr with pr_uword64
2392 where the bit length is always 64 independent of SIM_ADDR.
2393 (pr_uword64) : added.
2395 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2397 * configure: Re-generate.
2399 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2401 * configure: Regenerate to track ../common/aclocal.m4 changes.
2403 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2405 * interp.c (sim_open): New SIM_DESC result. Argument is now
2407 (other sim_*): New SIM_DESC argument.
2409 start-sanitize-r5900
2410 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
2412 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
2413 Change values to avoid overloading DOUBLEWORD which is tested
2415 * gencode.c: reinstate "offending code".
2418 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2420 * interp.c: Fix printing of addresses for non-64-bit targets.
2421 (pr_addr): Add function to print address based on size.
2422 start-sanitize-r5900
2423 * gencode.c: #ifdef out offending code until a permanent fix
2424 can be added. Code is causing build errors for non-5900 mips targets.
2427 start-sanitize-r5900
2428 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
2430 * gencode.c (process_instructions): Correct test for ISA dependent
2431 architecture bits in isa field of MIPS_DECODE.
2434 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2436 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2438 start-sanitize-r5900
2439 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
2441 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
2445 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2447 * gencode.c (build_mips16_operands): Correct computation of base
2448 address for extended PC relative instruction.
2450 start-sanitize-r5900
2451 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
2453 * Makefile.in, configure, configure.in, gencode.c,
2454 interp.c, support.h: add r5900.
2457 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2459 * interp.c (mips16_entry): Add support for floating point cases.
2460 (SignalException): Pass floating point cases to mips16_entry.
2461 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2463 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2465 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2466 and then set the state to fmt_uninterpreted.
2467 (COP_SW): Temporarily set the state to fmt_word while calling
2470 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2472 * gencode.c (build_instruction): The high order may be set in the
2473 comparison flags at any ISA level, not just ISA 4.
2475 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2477 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2478 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2479 * configure.in: sinclude ../common/aclocal.m4.
2480 * configure: Regenerated.
2482 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2484 * configure: Rebuild after change to aclocal.m4.
2486 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2488 * configure configure.in Makefile.in: Update to new configure
2489 scheme which is more compatible with WinGDB builds.
2490 * configure.in: Improve comment on how to run autoconf.
2491 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2492 * Makefile.in: Use autoconf substitution to install common
2495 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2497 * gencode.c (build_instruction): Use BigEndianCPU instead of
2500 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2502 * interp.c (sim_monitor): Make output to stdout visible in
2503 wingdb's I/O log window.
2505 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2507 * support.h: Undo previous change to SIGTRAP
2510 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2512 * interp.c (store_word, load_word): New static functions.
2513 (mips16_entry): New static function.
2514 (SignalException): Look for mips16 entry and exit instructions.
2515 (simulate): Use the correct index when setting fpr_state after
2516 doing a pending move.
2518 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2520 * interp.c: Fix byte-swapping code throughout to work on
2521 both little- and big-endian hosts.
2523 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2525 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2526 with gdb/config/i386/xm-windows.h.
2528 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2530 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2531 that messes up arithmetic shifts.
2533 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2535 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2536 SIGTRAP and SIGQUIT for _WIN32.
2538 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2540 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2541 force a 64 bit multiplication.
2542 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2543 destination register is 0, since that is the default mips16 nop
2546 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2548 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2549 (build_endian_shift): Don't check proc64.
2550 (build_instruction): Always set memval to uword64. Cast op2 to
2551 uword64 when shifting it left in memory instructions. Always use
2552 the same code for stores--don't special case proc64.
2554 * gencode.c (build_mips16_operands): Fix base PC value for PC
2556 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2558 * interp.c (simJALDELAYSLOT): Define.
2559 (JALDELAYSLOT): Define.
2560 (INDELAYSLOT, INJALDELAYSLOT): Define.
2561 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2563 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2565 * interp.c (sim_open): add flush_cache as a PMON routine
2566 (sim_monitor): handle flush_cache by ignoring it
2568 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2570 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2572 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2573 (BigEndianMem): Rename to ByteSwapMem and change sense.
2574 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2575 BigEndianMem references to !ByteSwapMem.
2576 (set_endianness): New function, with prototype.
2577 (sim_open): Call set_endianness.
2578 (sim_info): Use simBE instead of BigEndianMem.
2579 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2580 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2581 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2582 ifdefs, keeping the prototype declaration.
2583 (swap_word): Rewrite correctly.
2584 (ColdReset): Delete references to CONFIG. Delete endianness related
2585 code; moved to set_endianness.
2587 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2589 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2590 * interp.c (CHECKHILO): Define away.
2591 (simSIGINT): New macro.
2592 (membank_size): Increase from 1MB to 2MB.
2593 (control_c): New function.
2594 (sim_resume): Rename parameter signal to signal_number. Add local
2595 variable prev. Call signal before and after simulate.
2596 (sim_stop_reason): Add simSIGINT support.
2597 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2599 (sim_warning): Delete call to SignalException. Do call printf_filtered
2601 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2602 a call to sim_warning.
2604 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2606 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2607 16 bit instructions.
2609 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2611 Add support for mips16 (16 bit MIPS implementation):
2612 * gencode.c (inst_type): Add mips16 instruction encoding types.
2613 (GETDATASIZEINSN): Define.
2614 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2615 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2617 (MIPS16_DECODE): New table, for mips16 instructions.
2618 (bitmap_val): New static function.
2619 (struct mips16_op): Define.
2620 (mips16_op_table): New table, for mips16 operands.
2621 (build_mips16_operands): New static function.
2622 (process_instructions): If PC is odd, decode a mips16
2623 instruction. Break out instruction handling into new
2624 build_instruction function.
2625 (build_instruction): New static function, broken out of
2626 process_instructions. Check modifiers rather than flags for SHIFT
2627 bit count and m[ft]{hi,lo} direction.
2628 (usage): Pass program name to fprintf.
2629 (main): Remove unused variable this_option_optind. Change
2630 ``*loptarg++'' to ``loptarg++''.
2631 (my_strtoul): Parenthesize && within ||.
2632 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2633 (simulate): If PC is odd, fetch a 16 bit instruction, and
2634 increment PC by 2 rather than 4.
2635 * configure.in: Add case for mips16*-*-*.
2636 * configure: Rebuild.
2638 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2640 * interp.c: Allow -t to enable tracing in standalone simulator.
2641 Fix garbage output in trace file and error messages.
2643 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2645 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2646 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2647 * configure.in: Simplify using macros in ../common/aclocal.m4.
2648 * configure: Regenerated.
2649 * tconfig.in: New file.
2651 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2653 * interp.c: Fix bugs in 64-bit port.
2654 Use ansi function declarations for msvc compiler.
2655 Initialize and test file pointer in trace code.
2656 Prevent duplicate definition of LAST_EMED_REGNUM.
2658 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2660 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2662 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2664 * interp.c (SignalException): Check for explicit terminating
2666 * gencode.c: Pass instruction value through SignalException()
2667 calls for Trap, Breakpoint and Syscall.
2669 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2671 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2672 only used on those hosts that provide it.
2673 * configure.in: Add sqrt() to list of functions to be checked for.
2674 * config.in: Re-generated.
2675 * configure: Re-generated.
2677 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2679 * gencode.c (process_instructions): Call build_endian_shift when
2680 expanding STORE RIGHT, to fix swr.
2681 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2682 clear the high bits.
2683 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2684 Fix float to int conversions to produce signed values.
2686 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2688 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2689 (process_instructions): Correct handling of nor instruction.
2690 Correct shift count for 32 bit shift instructions. Correct sign
2691 extension for arithmetic shifts to not shift the number of bits in
2692 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2693 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2695 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2696 It's OK to have a mult follow a mult. What's not OK is to have a
2697 mult follow an mfhi.
2698 (Convert): Comment out incorrect rounding code.
2700 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2702 * interp.c (sim_monitor): Improved monitor printf
2703 simulation. Tidied up simulator warnings, and added "--log" option
2704 for directing warning message output.
2705 * gencode.c: Use sim_warning() rather than WARNING macro.
2707 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2709 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2710 getopt1.o, rather than on gencode.c. Link objects together.
2711 Don't link against -liberty.
2712 (gencode.o, getopt.o, getopt1.o): New targets.
2713 * gencode.c: Include <ctype.h> and "ansidecl.h".
2714 (AND): Undefine after including "ansidecl.h".
2715 (ULONG_MAX): Define if not defined.
2716 (OP_*): Don't define macros; now defined in opcode/mips.h.
2717 (main): Call my_strtoul rather than strtoul.
2718 (my_strtoul): New static function.
2720 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2722 * gencode.c (process_instructions): Generate word64 and uword64
2723 instead of `long long' and `unsigned long long' data types.
2724 * interp.c: #include sysdep.h to get signals, and define default
2726 * (Convert): Work around for Visual-C++ compiler bug with type
2728 * support.h: Make things compile under Visual-C++ by using
2729 __int64 instead of `long long'. Change many refs to long long
2730 into word64/uword64 typedefs.
2732 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2734 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2735 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2737 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2738 (AC_PROG_INSTALL): Added.
2739 (AC_PROG_CC): Moved to before configure.host call.
2740 * configure: Rebuilt.
2742 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2744 * configure.in: Define @SIMCONF@ depending on mips target.
2745 * configure: Rebuild.
2746 * Makefile.in (run): Add @SIMCONF@ to control simulator
2748 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2749 * interp.c: Remove some debugging, provide more detailed error
2750 messages, update memory accesses to use LOADDRMASK.
2752 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2754 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2755 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2757 * configure: Rebuild.
2758 * config.in: New file, generated by autoheader.
2759 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2760 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2761 HAVE_ANINT and HAVE_AINT, as appropriate.
2762 * Makefile.in (run): Use @LIBS@ rather than -lm.
2763 (interp.o): Depend upon config.h.
2764 (Makefile): Just rebuild Makefile.
2765 (clean): Remove stamp-h.
2766 (mostlyclean): Make the same as clean, not as distclean.
2767 (config.h, stamp-h): New targets.
2769 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2771 * interp.c (ColdReset): Fix boolean test. Make all simulator
2774 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2776 * interp.c (xfer_direct_word, xfer_direct_long,
2777 swap_direct_word, swap_direct_long, xfer_big_word,
2778 xfer_big_long, xfer_little_word, xfer_little_long,
2779 swap_word,swap_long): Added.
2780 * interp.c (ColdReset): Provide function indirection to
2781 host<->simulated_target transfer routines.
2782 * interp.c (sim_store_register, sim_fetch_register): Updated to
2783 make use of indirected transfer routines.
2785 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2787 * gencode.c (process_instructions): Ensure FP ABS instruction
2789 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2790 system call support.
2792 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2794 * interp.c (sim_do_command): Complain if callback structure not
2797 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2799 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2800 support for Sun hosts.
2801 * Makefile.in (gencode): Ensure the host compiler and libraries
2802 used for cross-hosted build.
2804 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2806 * interp.c, gencode.c: Some more (TODO) tidying.
2808 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2810 * gencode.c, interp.c: Replaced explicit long long references with
2811 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2812 * support.h (SET64LO, SET64HI): Macros added.
2814 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2816 * configure: Regenerate with autoconf 2.7.
2818 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2820 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2821 * support.h: Remove superfluous "1" from #if.
2822 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2824 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2826 * interp.c (StoreFPR): Control UndefinedResult() call on
2827 WARN_RESULT manifest.
2829 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2831 * gencode.c: Tidied instruction decoding, and added FP instruction
2834 * interp.c: Added dineroIII, and BSD profiling support. Also
2835 run-time FP handling.
2837 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2839 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2840 gencode.c, interp.c, support.h: created.
projects / external / binutils.git / blob