1 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
3 * interp.c (ColdReset): Call PENDING_INVALIDATE.
5 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
7 * interp.c (pending_tick): New function. Deliver pending writes.
9 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
10 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
11 it can handle mixed sized quantites and single bits.
13 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
15 * interp.c (oengine.h): Do not include when building with IGEN.
16 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
17 (sim_info): Ditto for PROCESSOR_64BIT.
18 (sim_monitor): Replace ut_reg with unsigned_word.
21 (sim_open): Remove defunct check that host FP is IEEE compliant,
22 using software to emulate floating point.
23 (value_fpr, ...): Always compile, was conditional on HASFPU.
25 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
27 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
30 * interp.c (SD, CPU): Define.
31 (mips_option_handler): Set flags in each CPU.
32 (interrupt_event): Assume CPU 0 is the one being iterrupted.
33 (sim_close): Do not clear STATE, deleted anyway.
34 (sim_write, sim_read): Assume CPU zero's vm should be used for
36 (sim_create_inferior): Set the PC for all processors.
37 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
39 (mips16_entry): Pass correct nr of args to store_word, load_word.
40 (ColdReset): Cold reset all cpu's.
41 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
42 (sim_monitor, load_memory, store_memory, signal_exception): Use
43 `CPU' instead of STATE_CPU.
46 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
49 * sim-main.h (signal_exception): Add sim_cpu arg.
50 (SignalException*): Pass both SD and CPU to signal_exception.
51 * interp.c (signal_exception): Update.
53 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
55 (sync_operation, prefetch, cache_op, store_memory, load_memory,
56 address_translation): Ditto
57 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
60 * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
62 (ByteAlign): Use StoreFPR, pass args in correct order.
66 Sun Feb 1 10:59:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
68 * configure.in (sim_igen_filter): For r5900, configure as SMP.
71 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
73 * configure: Regenerated to track ../common/aclocal.m4 changes.
75 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
78 * configure.in (sim_igen_filter): For r5900, use igen.
79 * configure: Re-generate.
82 * interp.c (sim_engine_run): Add `nr_cpus' argument.
84 * mips.igen (model): Map processor names onto BFD name.
86 * sim-main.h (CPU_CIA): Delete.
87 (SET_CIA, GET_CIA): Define
89 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
91 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
94 * configure.in (default_endian): Configure a big-endian simulator
96 * configure: Re-generate.
98 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
100 * configure: Regenerated to track ../common/aclocal.m4 changes.
102 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
104 * interp.c (sim_monitor): Handle Densan monitor outbyte
105 and inbyte functions.
107 1997-12-29 Felix Lee <flee@cygnus.com>
109 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
111 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
113 * Makefile.in (tmp-igen): Arrange for $zero to always be
114 reset to zero after every instruction.
116 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
118 * configure: Regenerated to track ../common/aclocal.m4 changes.
121 start-sanitize-vr5400
122 Sat Dec 13 15:18:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
124 * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
128 start-sanitize-vr5400
129 Fri Dec 12 12:26:07 1997 Jeffrey A Law (law@cygnus.com)
131 * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
132 vr5400 with the vr5000 as the default.
135 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
137 * mips.igen (MSUB): Fix to work like MADD.
138 * gencode.c (MSUB): Similarly.
140 start-sanitize-vr5400
141 Tue Dec 9 12:02:12 1997 Andrew Cagney <cagney@b1.cygnus.com>
143 * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
147 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
149 * configure: Regenerated to track ../common/aclocal.m4 changes.
151 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
153 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
155 start-sanitize-vr5400
156 * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
157 (value_cc, store_cc): Implement.
159 * sim-main.h: Add 8*3*8 bit accumulator.
161 * vr5400.igen: Move mdmx instructins from here
162 * mdmx.igen: To here - new file. Add/fix missing instructions.
163 * mips.igen: Include mdmx.igen.
164 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
167 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
169 * sim-main.h (sim-fpu.h): Include.
171 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
172 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
173 using host independant sim_fpu module.
175 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
177 * interp.c (signal_exception): Report internal errors with SIGABRT
180 * sim-main.h (C0_CONFIG): New register.
181 (signal.h): No longer include.
183 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
185 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
187 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
189 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
191 * mips.igen: Tag vr5000 instructions.
192 (ANDI): Was missing mipsIV model, fix assembler syntax.
193 (do_c_cond_fmt): New function.
194 (C.cond.fmt): Handle mips I-III which do not support CC field
196 (bc1): Handle mips IV which do not have a delaed FCC separatly.
197 (SDR): Mask paddr when BigEndianMem, not the converse as specified
199 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
200 vr5000 which saves LO in a GPR separatly.
202 * configure.in (enable-sim-igen): For vr5000, select vr5000
203 specific instructions.
204 * configure: Re-generate.
206 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
208 * Makefile.in (SIM_OBJS): Add sim-fpu module.
210 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
211 fmt_uninterpreted_64 bit cases to switch. Convert to
214 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
216 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
217 as specified in IV3.2 spec.
218 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
220 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
222 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
223 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
224 (start-sanitize-r5900):
225 (LWXC1, SWXC1): Delete from r5900 instruction set.
226 (end-sanitize-r5900):
227 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
228 PENDING_FILL versions of instructions. Simplify.
230 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
232 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
234 (MTHI, MFHI): Disable code checking HI-LO.
236 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
238 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
240 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
242 * gencode.c (build_mips16_operands): Replace IPC with cia.
244 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
245 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
247 (UndefinedResult): Replace function with macro/function
249 (sim_engine_run): Don't save PC in IPC.
251 * sim-main.h (IPC): Delete.
253 start-sanitize-vr5400
254 * vr5400.igen (vr): Add missing cia argument to value_fpr.
255 (do_select): Rename function select.
258 * interp.c (signal_exception, store_word, load_word,
259 address_translation, load_memory, store_memory, cache_op,
260 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
261 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
262 current instruction address - cia - argument.
263 (sim_read, sim_write): Call address_translation directly.
264 (sim_engine_run): Rename variable vaddr to cia.
265 (signal_exception): Pass cia to sim_monitor
267 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
268 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
269 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
271 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
272 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
275 * interp.c (signal_exception): Pass restart address to
278 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
279 idecode.o): Add dependency.
281 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
283 (DELAY_SLOT): Update NIA not PC with branch address.
284 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
286 * mips.igen: Use CIA not PC in branch calculations.
287 (illegal): Call SignalException.
288 (BEQ, ADDIU): Fix assembler.
290 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
292 * m16.igen (JALX): Was missing.
294 * configure.in (enable-sim-igen): New configuration option.
295 * configure: Re-generate.
297 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
299 * interp.c (load_memory, store_memory): Delete parameter RAW.
300 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
301 bypassing {load,store}_memory.
303 * sim-main.h (ByteSwapMem): Delete definition.
305 * Makefile.in (SIM_OBJS): Add sim-memopt module.
307 * interp.c (sim_do_command, sim_commands): Delete mips specific
308 commands. Handled by module sim-options.
310 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
311 (WITH_MODULO_MEMORY): Define.
313 * interp.c (sim_info): Delete code printing memory size.
315 * interp.c (mips_size): Nee sim_size, delete function.
317 (monitor, monitor_base, monitor_size): Delete global variables.
318 (sim_open, sim_close): Delete code creating monitor and other
319 memory regions. Use sim-memopts module, via sim_do_commandf, to
320 manage memory regions.
321 (load_memory, store_memory): Use sim-core for memory model.
323 * interp.c (address_translation): Delete all memory map code
324 except line forcing 32 bit addresses.
326 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
328 * sim-main.h (WITH_TRACE): Delete definition. Enables common
331 * interp.c (logfh, logfile): Delete globals.
332 (sim_open, sim_close): Delete code opening & closing log file.
333 (mips_option_handler): Delete -l and -n options.
334 (OPTION mips_options): Ditto.
336 * interp.c (OPTION mips_options): Rename option trace to dinero.
337 (mips_option_handler): Update.
339 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
341 * interp.c (fetch_str): New function.
342 (sim_monitor): Rewrite using sim_read & sim_write.
343 (sim_open): Check magic number.
344 (sim_open): Write monitor vectors into memory using sim_write.
345 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
346 (sim_read, sim_write): Simplify - transfer data one byte at a
348 (load_memory, store_memory): Clarify meaning of parameter RAW.
350 * sim-main.h (isHOST): Defete definition.
351 (isTARGET): Mark as depreciated.
352 (address_translation): Delete parameter HOST.
354 * interp.c (address_translation): Delete parameter HOST.
357 Wed Oct 29 14:21:32 1997 Gavin Koch <gavin@cygnus.com>
359 * gencode.c: Add tx49 configury and insns.
360 * configure.in: Add tx49 configury.
364 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
368 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
369 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
371 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
373 * mips.igen: Add model filter field to records.
375 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
377 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
379 interp.c (sim_engine_run): Do not compile function sim_engine_run
382 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
385 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
386 igen. Replace with configuration variables sim_igen_flags /
390 * r5900.igen: New file. Copy r5900 insns here.
392 start-sanitize-vr5400
393 * vr5400.igen: New file.
395 * m16.igen: New file. Copy mips16 insns here.
396 * mips.igen: From here.
398 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
400 start-sanitize-vr5400
401 * mips.igen: Tag all mipsIV instructions with vr5400 model.
403 * configure.in: Add mips64vr5400 target.
404 * configure: Re-generate.
407 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
409 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
411 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
413 * gencode.c (build_instruction): Follow sim_write's lead in using
414 BigEndianMem instead of !ByteSwapMem.
416 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
418 * configure.in (sim_gen): Dependent on target, select type of
419 generator. Always select old style generator.
421 configure: Re-generate.
423 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
425 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
426 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
427 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
428 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
429 SIM_@sim_gen@_*, set by autoconf.
431 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
433 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
435 * interp.c (ColdReset): Remove #ifdef HASFPU, check
436 CURRENT_FLOATING_POINT instead.
438 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
439 (address_translation): Raise exception InstructionFetch when
440 translation fails and isINSTRUCTION.
442 * interp.c (sim_open, sim_write, sim_monitor, store_word,
443 sim_engine_run): Change type of of vaddr and paddr to
445 (address_translation, prefetch, load_memory, store_memory,
446 cache_op): Change type of vAddr and pAddr to address_word.
448 * gencode.c (build_instruction): Change type of vaddr and paddr to
451 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
453 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
454 macro to obtain result of ALU op.
456 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
458 * interp.c (sim_info): Call profile_print.
460 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
462 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
464 * sim-main.h (WITH_PROFILE): Do not define, defined in
465 common/sim-config.h. Use sim-profile module.
466 (simPROFILE): Delete defintion.
468 * interp.c (PROFILE): Delete definition.
469 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
470 (sim_close): Delete code writing profile histogram.
471 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
473 (sim_engine_run): Delete code profiling the PC.
475 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
477 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
479 * interp.c (sim_monitor): Make register pointers of type
482 * sim-main.h: Make registers of type unsigned_word not
485 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
488 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
489 ...): Move to sim-main.h
492 * interp.c (sync_operation): Rename from SyncOperation, make
493 global, add SD argument.
494 (prefetch): Rename from Prefetch, make global, add SD argument.
495 (decode_coproc): Make global.
497 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
499 * gencode.c (build_instruction): Generate DecodeCoproc not
502 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
503 (SizeFGR): Move to sim-main.h
504 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
505 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
506 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
508 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
509 FP_RM_TOMINF, GETRM): Move to sim-main.h.
510 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
511 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
512 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
513 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
515 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
517 (sim-alu.h): Include.
518 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
519 (sim_cia): Typedef to instruction_address.
521 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
523 * Makefile.in (interp.o): Rename generated file engine.c to
528 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
530 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
532 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
534 * gencode.c (build_instruction): For "FPSQRT", output correct
535 number of arguments to Recip.
537 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
539 * Makefile.in (interp.o): Depends on sim-main.h
541 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
543 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
544 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
545 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
546 STATE, DSSTATE): Define
547 (GPR, FGRIDX, ..): Define.
549 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
550 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
551 (GPR, FGRIDX, ...): Delete macros.
553 * interp.c: Update names to match defines from sim-main.h
555 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
557 * interp.c (sim_monitor): Add SD argument.
558 (sim_warning): Delete. Replace calls with calls to
560 (sim_error): Delete. Replace calls with sim_io_error.
561 (open_trace, writeout32, writeout16, getnum): Add SD argument.
562 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
563 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
565 (mips_size): Rename from sim_size. Add SD argument.
567 * interp.c (simulator): Delete global variable.
568 (callback): Delete global variable.
569 (mips_option_handler, sim_open, sim_write, sim_read,
570 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
571 sim_size,sim_monitor): Use sim_io_* not callback->*.
572 (sim_open): ZALLOC simulator struct.
573 (PROFILE): Do not define.
575 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
577 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
578 support.h with corresponding code.
580 * sim-main.h (word64, uword64), support.h: Move definition to
582 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
585 * Makefile.in: Update dependencies
586 * interp.c: Do not include.
588 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
590 * interp.c (address_translation, load_memory, store_memory,
591 cache_op): Rename to from AddressTranslation et.al., make global,
594 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
597 * interp.c (SignalException): Rename to signal_exception, make
600 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
602 * sim-main.h (SignalException, SignalExceptionInterrupt,
603 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
604 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
605 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
608 * interp.c, support.h: Use.
610 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
612 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
613 to value_fpr / store_fpr. Add SD argument.
614 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
615 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
617 * sim-main.h (ValueFPR, StoreFPR): Define.
619 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
621 * interp.c (sim_engine_run): Check consistency between configure
622 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
625 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
626 (mips_fpu): Configure WITH_FLOATING_POINT.
627 (mips_endian): Configure WITH_TARGET_ENDIAN.
630 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
632 * configure: Regenerated to track ../common/aclocal.m4 changes.
635 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
637 * interp.c (MAX_REG): Allow up-to 128 registers.
638 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
639 (REGISTER_SA): Ditto.
640 (sim_open): Initialize register_widths for r5900 specific
642 (sim_fetch_register, sim_store_register): Check for request of
643 r5900 specific SA register. Check for request for hi 64 bits of
644 r5900 specific registers.
647 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
649 * configure: Regenerated.
651 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
653 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
655 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
657 * gencode.c (print_igen_insn_models): Assume certain architectures
658 include all mips* instructions.
659 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
662 * Makefile.in (tmp.igen): Add target. Generate igen input from
665 * gencode.c (FEATURE_IGEN): Define.
666 (main): Add --igen option. Generate output in igen format.
667 (process_instructions): Format output according to igen option.
668 (print_igen_insn_format): New function.
669 (print_igen_insn_models): New function.
670 (process_instructions): Only issue warnings and ignore
671 instructions when no FEATURE_IGEN.
673 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
675 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
678 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
680 * configure: Regenerated to track ../common/aclocal.m4 changes.
682 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
684 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
685 SIM_RESERVED_BITS): Delete, moved to common.
686 (SIM_EXTRA_CFLAGS): Update.
688 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
690 * configure.in: Configure non-strict memory alignment.
691 * configure: Regenerated to track ../common/aclocal.m4 changes.
693 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
695 * configure: Regenerated to track ../common/aclocal.m4 changes.
697 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
699 * gencode.c (SDBBP,DERET): Added (3900) insns.
700 (RFE): Turn on for 3900.
701 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
702 (dsstate): Made global.
703 (SUBTARGET_R3900): Added.
704 (CANCELDELAYSLOT): New.
705 (SignalException): Ignore SystemCall rather than ignore and
706 terminate. Add DebugBreakPoint handling.
707 (decode_coproc): New insns RFE, DERET; and new registers Debug
708 and DEPC protected by SUBTARGET_R3900.
709 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
711 * Makefile.in,configure.in: Add mips subtarget option.
714 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
716 * gencode.c: Add r3900 (tx39).
719 * gencode.c: Fix some configuration problems by improving
720 the relationship between tx19 and tx39.
723 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
725 * gencode.c (build_instruction): Don't need to subtract 4 for
728 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
730 * interp.c: Correct some HASFPU problems.
732 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
734 * configure: Regenerated to track ../common/aclocal.m4 changes.
736 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
738 * interp.c (mips_options): Fix samples option short form, should
741 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
743 * interp.c (sim_info): Enable info code. Was just returning.
745 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
747 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
750 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
752 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
754 (build_instruction): Ditto for LL.
757 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
759 * mips/configure.in, mips/gencode: Add tx19/r1900.
762 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
764 * configure: Regenerated to track ../common/aclocal.m4 changes.
767 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
769 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
770 for overflow due to ABS of MININT, set result to MAXINT.
771 (build_instruction): For "psrlvw", signextend bit 31.
774 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
776 * configure: Regenerated to track ../common/aclocal.m4 changes.
779 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
781 * interp.c (sim_open): Add call to sim_analyze_program, update
784 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
786 * interp.c (sim_kill): Delete.
787 (sim_create_inferior): Add ABFD argument. Set PC from same.
788 (sim_load): Move code initializing trap handlers from here.
790 (sim_load): Delete, use sim-hload.c.
792 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
794 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
796 * configure: Regenerated to track ../common/aclocal.m4 changes.
799 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
801 * interp.c (sim_open): Add ABFD argument.
802 (sim_load): Move call to sim_config from here.
803 (sim_open): To here. Check return status.
806 * gencode.c (build_instruction): Do not define x8000000000000000,
807 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
811 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
813 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
814 "pdivuw" check for overflow due to signed divide by -1.
817 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
819 * gencode.c (build_instruction): Two arg MADD should
820 not assign result to $0.
823 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
825 * gencode.c (build_instruction): For "ppac5" use unsigned
826 arrithmetic so that the sign bit doesn't smear when right shifted.
827 (build_instruction): For "pdiv" perform sign extension when
828 storing results in HI and LO.
829 (build_instructions): For "pdiv" and "pdivbw" check for
831 (build_instruction): For "pmfhl.slw" update hi part of dest
832 register as well as low part.
833 (build_instruction): For "pmfhl" portably handle long long values.
834 (build_instruction): For "pmfhl.sh" correctly negative values.
835 Store half words 2 and three in the correct place.
836 (build_instruction): For "psllvw", sign extend value after shift.
839 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
841 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
842 * sim/mips/configure.in: Regenerate.
844 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
846 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
847 signed8, unsigned8 et.al. types.
850 * gencode.c (build_instruction): For PMULTU* do not sign extend
851 registers. Make generated code easier to debug.
854 * interp.c (SUB_REG_FETCH): Handle both little and big endian
855 hosts when selecting subreg.
858 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
860 * gencode.c (type_for_data_len): For 32bit operations concerned
861 with overflow, perform op using 64bits.
862 (build_instruction): For PADD, always compute operation using type
863 returned by type_for_data_len.
864 (build_instruction): For PSUBU, when overflow, saturate to zero as
868 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
871 * gencode.c (build_instruction): Handle "pext5" according to
872 version 1.95 of the r5900 ISA.
874 * gencode.c (build_instruction): Handle "ppac5" according to
875 version 1.95 of the r5900 ISA.
878 * interp.c (sim_engine_run): Reset the ZERO register to zero
879 regardless of FEATURE_WARN_ZERO.
880 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
882 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
884 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
885 (SignalException): For BreakPoints ignore any mode bits and just
887 (SignalException): Always set the CAUSE register.
889 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
891 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
892 exception has been taken.
894 * interp.c: Implement the ERET and mt/f sr instructions.
897 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
899 * gencode.c (build_instruction): For paddu, extract unsigned
902 * gencode.c (build_instruction): Saturate padds instead of padd
906 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
908 * interp.c (SignalException): Don't bother restarting an
911 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
913 * interp.c (SignalException): Really take an interrupt.
914 (interrupt_event): Only deliver interrupts when enabled.
916 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
918 * interp.c (sim_info): Only print info when verbose.
919 (sim_info) Use sim_io_printf for output.
921 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
923 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
926 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
928 * interp.c (sim_do_command): Check for common commands if a
929 simulator specific command fails.
931 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
933 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
934 and simBE when DEBUG is defined.
936 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
938 * interp.c (interrupt_event): New function. Pass exception event
939 onto exception handler.
941 * configure.in: Check for stdlib.h.
942 * configure: Regenerate.
944 * gencode.c (build_instruction): Add UNUSED attribute to tempS
945 variable declaration.
946 (build_instruction): Initialize memval1.
947 (build_instruction): Add UNUSED attribute to byte, bigend,
949 (build_operands): Ditto.
951 * interp.c: Fix GCC warnings.
952 (sim_get_quit_code): Delete.
954 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
955 * Makefile.in: Ditto.
956 * configure: Re-generate.
958 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
960 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
962 * interp.c (mips_option_handler): New function parse argumes using
964 (myname): Replace with STATE_MY_NAME.
965 (sim_open): Delete check for host endianness - performed by
967 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
968 (sim_open): Move much of the initialization from here.
969 (sim_load): To here. After the image has been loaded and
971 (sim_open): Move ColdReset from here.
972 (sim_create_inferior): To here.
973 (sim_open): Make FP check less dependant on host endianness.
975 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
977 * interp.c (sim_set_callbacks): Delete.
979 * interp.c (membank, membank_base, membank_size): Replace with
980 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
981 (sim_open): Remove call to callback->init. gdb/run do this.
985 * sim-main.h (SIM_HAVE_FLATMEM): Define.
987 * interp.c (big_endian_p): Delete, replaced by
988 current_target_byte_order.
990 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
992 * interp.c (host_read_long, host_read_word, host_swap_word,
993 host_swap_long): Delete. Using common sim-endian.
994 (sim_fetch_register, sim_store_register): Use H2T.
995 (pipeline_ticks): Delete. Handled by sim-events.
997 (sim_engine_run): Update.
999 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1001 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1003 (SignalException): To here. Signal using sim_engine_halt.
1004 (sim_stop_reason): Delete, moved to common.
1006 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1008 * interp.c (sim_open): Add callback argument.
1009 (sim_set_callbacks): Delete SIM_DESC argument.
1012 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1014 * Makefile.in (SIM_OBJS): Add common modules.
1016 * interp.c (sim_set_callbacks): Also set SD callback.
1017 (set_endianness, xfer_*, swap_*): Delete.
1018 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1019 Change to functions using sim-endian macros.
1020 (control_c, sim_stop): Delete, use common version.
1021 (simulate): Convert into.
1022 (sim_engine_run): This function.
1023 (sim_resume): Delete.
1025 * interp.c (simulation): New variable - the simulator object.
1026 (sim_kind): Delete global - merged into simulation.
1027 (sim_load): Cleanup. Move PC assignment from here.
1028 (sim_create_inferior): To here.
1030 * sim-main.h: New file.
1031 * interp.c (sim-main.h): Include.
1033 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1035 * configure: Regenerated to track ../common/aclocal.m4 changes.
1037 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1039 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1041 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1043 * gencode.c (build_instruction): DIV instructions: check
1044 for division by zero and integer overflow before using
1045 host's division operation.
1047 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1049 * Makefile.in (SIM_OBJS): Add sim-load.o.
1050 * interp.c: #include bfd.h.
1051 (target_byte_order): Delete.
1052 (sim_kind, myname, big_endian_p): New static locals.
1053 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1054 after argument parsing. Recognize -E arg, set endianness accordingly.
1055 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1056 load file into simulator. Set PC from bfd.
1057 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1058 (set_endianness): Use big_endian_p instead of target_byte_order.
1060 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1062 * interp.c (sim_size): Delete prototype - conflicts with
1063 definition in remote-sim.h. Correct definition.
1065 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1067 * configure: Regenerated to track ../common/aclocal.m4 changes.
1070 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1072 * interp.c (sim_open): New arg `kind'.
1074 * configure: Regenerated to track ../common/aclocal.m4 changes.
1076 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1078 * configure: Regenerated to track ../common/aclocal.m4 changes.
1080 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1082 * interp.c (sim_open): Set optind to 0 before calling getopt.
1084 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1086 * configure: Regenerated to track ../common/aclocal.m4 changes.
1088 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1090 * interp.c : Replace uses of pr_addr with pr_uword64
1091 where the bit length is always 64 independent of SIM_ADDR.
1092 (pr_uword64) : added.
1094 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1096 * configure: Re-generate.
1098 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1100 * configure: Regenerate to track ../common/aclocal.m4 changes.
1102 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1104 * interp.c (sim_open): New SIM_DESC result. Argument is now
1106 (other sim_*): New SIM_DESC argument.
1108 start-sanitize-r5900
1109 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
1111 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1112 Change values to avoid overloading DOUBLEWORD which is tested
1114 * gencode.c: reinstate "offending code".
1117 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1119 * interp.c: Fix printing of addresses for non-64-bit targets.
1120 (pr_addr): Add function to print address based on size.
1121 start-sanitize-r5900
1122 * gencode.c: #ifdef out offending code until a permanent fix
1123 can be added. Code is causing build errors for non-5900 mips targets.
1126 start-sanitize-r5900
1127 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
1129 * gencode.c (process_instructions): Correct test for ISA dependent
1130 architecture bits in isa field of MIPS_DECODE.
1133 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1135 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1137 start-sanitize-r5900
1138 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
1140 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1144 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1146 * gencode.c (build_mips16_operands): Correct computation of base
1147 address for extended PC relative instruction.
1149 start-sanitize-r5900
1150 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
1152 * Makefile.in, configure, configure.in, gencode.c,
1153 interp.c, support.h: add r5900.
1156 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
1158 * interp.c (mips16_entry): Add support for floating point cases.
1159 (SignalException): Pass floating point cases to mips16_entry.
1160 (ValueFPR): Don't restrict fmt_single and fmt_word to even
1162 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
1164 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1165 and then set the state to fmt_uninterpreted.
1166 (COP_SW): Temporarily set the state to fmt_word while calling
1169 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
1171 * gencode.c (build_instruction): The high order may be set in the
1172 comparison flags at any ISA level, not just ISA 4.
1174 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
1176 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1177 COMMON_{PRE,POST}_CONFIG_FRAG instead.
1178 * configure.in: sinclude ../common/aclocal.m4.
1179 * configure: Regenerated.
1181 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
1183 * configure: Rebuild after change to aclocal.m4.
1185 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
1187 * configure configure.in Makefile.in: Update to new configure
1188 scheme which is more compatible with WinGDB builds.
1189 * configure.in: Improve comment on how to run autoconf.
1190 * configure: Re-run autoconf to get new ../common/aclocal.m4.
1191 * Makefile.in: Use autoconf substitution to install common
1194 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
1196 * gencode.c (build_instruction): Use BigEndianCPU instead of
1199 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
1201 * interp.c (sim_monitor): Make output to stdout visible in
1202 wingdb's I/O log window.
1204 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
1206 * support.h: Undo previous change to SIGTRAP
1209 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
1211 * interp.c (store_word, load_word): New static functions.
1212 (mips16_entry): New static function.
1213 (SignalException): Look for mips16 entry and exit instructions.
1214 (simulate): Use the correct index when setting fpr_state after
1215 doing a pending move.
1217 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
1219 * interp.c: Fix byte-swapping code throughout to work on
1220 both little- and big-endian hosts.
1222 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
1224 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1225 with gdb/config/i386/xm-windows.h.
1227 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
1229 * gencode.c (build_instruction): Work around MSVC++ code gen bug
1230 that messes up arithmetic shifts.
1232 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
1234 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
1235 SIGTRAP and SIGQUIT for _WIN32.
1237 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
1239 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1240 force a 64 bit multiplication.
1241 (build_instruction) [OR]: In mips16 mode, don't do anything if the
1242 destination register is 0, since that is the default mips16 nop
1245 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
1247 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1248 (build_endian_shift): Don't check proc64.
1249 (build_instruction): Always set memval to uword64. Cast op2 to
1250 uword64 when shifting it left in memory instructions. Always use
1251 the same code for stores--don't special case proc64.
1253 * gencode.c (build_mips16_operands): Fix base PC value for PC
1255 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1257 * interp.c (simJALDELAYSLOT): Define.
1258 (JALDELAYSLOT): Define.
1259 (INDELAYSLOT, INJALDELAYSLOT): Define.
1260 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1262 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
1264 * interp.c (sim_open): add flush_cache as a PMON routine
1265 (sim_monitor): handle flush_cache by ignoring it
1267 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
1269 * gencode.c (build_instruction): Use !ByteSwapMem instead of
1271 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1272 (BigEndianMem): Rename to ByteSwapMem and change sense.
1273 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1274 BigEndianMem references to !ByteSwapMem.
1275 (set_endianness): New function, with prototype.
1276 (sim_open): Call set_endianness.
1277 (sim_info): Use simBE instead of BigEndianMem.
1278 (xfer_direct_word, xfer_direct_long, swap_direct_word,
1279 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1280 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1281 ifdefs, keeping the prototype declaration.
1282 (swap_word): Rewrite correctly.
1283 (ColdReset): Delete references to CONFIG. Delete endianness related
1284 code; moved to set_endianness.
1286 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
1288 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1289 * interp.c (CHECKHILO): Define away.
1290 (simSIGINT): New macro.
1291 (membank_size): Increase from 1MB to 2MB.
1292 (control_c): New function.
1293 (sim_resume): Rename parameter signal to signal_number. Add local
1294 variable prev. Call signal before and after simulate.
1295 (sim_stop_reason): Add simSIGINT support.
1296 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1298 (sim_warning): Delete call to SignalException. Do call printf_filtered
1300 (AddressTranslation): Add #ifdef DEBUG around debugging message and
1301 a call to sim_warning.
1303 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
1305 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1306 16 bit instructions.
1308 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
1310 Add support for mips16 (16 bit MIPS implementation):
1311 * gencode.c (inst_type): Add mips16 instruction encoding types.
1312 (GETDATASIZEINSN): Define.
1313 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
1314 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
1316 (MIPS16_DECODE): New table, for mips16 instructions.
1317 (bitmap_val): New static function.
1318 (struct mips16_op): Define.
1319 (mips16_op_table): New table, for mips16 operands.
1320 (build_mips16_operands): New static function.
1321 (process_instructions): If PC is odd, decode a mips16
1322 instruction. Break out instruction handling into new
1323 build_instruction function.
1324 (build_instruction): New static function, broken out of
1325 process_instructions. Check modifiers rather than flags for SHIFT
1326 bit count and m[ft]{hi,lo} direction.
1327 (usage): Pass program name to fprintf.
1328 (main): Remove unused variable this_option_optind. Change
1329 ``*loptarg++'' to ``loptarg++''.
1330 (my_strtoul): Parenthesize && within ||.
1331 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1332 (simulate): If PC is odd, fetch a 16 bit instruction, and
1333 increment PC by 2 rather than 4.
1334 * configure.in: Add case for mips16*-*-*.
1335 * configure: Rebuild.
1337 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
1339 * interp.c: Allow -t to enable tracing in standalone simulator.
1340 Fix garbage output in trace file and error messages.
1342 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
1344 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1345 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1346 * configure.in: Simplify using macros in ../common/aclocal.m4.
1347 * configure: Regenerated.
1348 * tconfig.in: New file.
1350 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
1352 * interp.c: Fix bugs in 64-bit port.
1353 Use ansi function declarations for msvc compiler.
1354 Initialize and test file pointer in trace code.
1355 Prevent duplicate definition of LAST_EMED_REGNUM.
1357 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
1359 * interp.c (xfer_big_long): Prevent unwanted sign extension.
1361 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
1363 * interp.c (SignalException): Check for explicit terminating
1365 * gencode.c: Pass instruction value through SignalException()
1366 calls for Trap, Breakpoint and Syscall.
1368 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1370 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1371 only used on those hosts that provide it.
1372 * configure.in: Add sqrt() to list of functions to be checked for.
1373 * config.in: Re-generated.
1374 * configure: Re-generated.
1376 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1378 * gencode.c (process_instructions): Call build_endian_shift when
1379 expanding STORE RIGHT, to fix swr.
1380 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1381 clear the high bits.
1382 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1383 Fix float to int conversions to produce signed values.
1385 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1387 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1388 (process_instructions): Correct handling of nor instruction.
1389 Correct shift count for 32 bit shift instructions. Correct sign
1390 extension for arithmetic shifts to not shift the number of bits in
1391 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1392 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1394 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1395 It's OK to have a mult follow a mult. What's not OK is to have a
1396 mult follow an mfhi.
1397 (Convert): Comment out incorrect rounding code.
1399 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1401 * interp.c (sim_monitor): Improved monitor printf
1402 simulation. Tidied up simulator warnings, and added "--log" option
1403 for directing warning message output.
1404 * gencode.c: Use sim_warning() rather than WARNING macro.
1406 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1408 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1409 getopt1.o, rather than on gencode.c. Link objects together.
1410 Don't link against -liberty.
1411 (gencode.o, getopt.o, getopt1.o): New targets.
1412 * gencode.c: Include <ctype.h> and "ansidecl.h".
1413 (AND): Undefine after including "ansidecl.h".
1414 (ULONG_MAX): Define if not defined.
1415 (OP_*): Don't define macros; now defined in opcode/mips.h.
1416 (main): Call my_strtoul rather than strtoul.
1417 (my_strtoul): New static function.
1419 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1421 * gencode.c (process_instructions): Generate word64 and uword64
1422 instead of `long long' and `unsigned long long' data types.
1423 * interp.c: #include sysdep.h to get signals, and define default
1425 * (Convert): Work around for Visual-C++ compiler bug with type
1427 * support.h: Make things compile under Visual-C++ by using
1428 __int64 instead of `long long'. Change many refs to long long
1429 into word64/uword64 typedefs.
1431 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1433 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1434 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1436 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1437 (AC_PROG_INSTALL): Added.
1438 (AC_PROG_CC): Moved to before configure.host call.
1439 * configure: Rebuilt.
1441 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1443 * configure.in: Define @SIMCONF@ depending on mips target.
1444 * configure: Rebuild.
1445 * Makefile.in (run): Add @SIMCONF@ to control simulator
1447 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1448 * interp.c: Remove some debugging, provide more detailed error
1449 messages, update memory accesses to use LOADDRMASK.
1451 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1453 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1454 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1456 * configure: Rebuild.
1457 * config.in: New file, generated by autoheader.
1458 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1459 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1460 HAVE_ANINT and HAVE_AINT, as appropriate.
1461 * Makefile.in (run): Use @LIBS@ rather than -lm.
1462 (interp.o): Depend upon config.h.
1463 (Makefile): Just rebuild Makefile.
1464 (clean): Remove stamp-h.
1465 (mostlyclean): Make the same as clean, not as distclean.
1466 (config.h, stamp-h): New targets.
1468 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1470 * interp.c (ColdReset): Fix boolean test. Make all simulator
1473 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1475 * interp.c (xfer_direct_word, xfer_direct_long,
1476 swap_direct_word, swap_direct_long, xfer_big_word,
1477 xfer_big_long, xfer_little_word, xfer_little_long,
1478 swap_word,swap_long): Added.
1479 * interp.c (ColdReset): Provide function indirection to
1480 host<->simulated_target transfer routines.
1481 * interp.c (sim_store_register, sim_fetch_register): Updated to
1482 make use of indirected transfer routines.
1484 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1486 * gencode.c (process_instructions): Ensure FP ABS instruction
1488 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1489 system call support.
1491 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1493 * interp.c (sim_do_command): Complain if callback structure not
1496 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1498 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1499 support for Sun hosts.
1500 * Makefile.in (gencode): Ensure the host compiler and libraries
1501 used for cross-hosted build.
1503 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1505 * interp.c, gencode.c: Some more (TODO) tidying.
1507 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1509 * gencode.c, interp.c: Replaced explicit long long references with
1510 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1511 * support.h (SET64LO, SET64HI): Macros added.
1513 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1515 * configure: Regenerate with autoconf 2.7.
1517 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1519 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1520 * support.h: Remove superfluous "1" from #if.
1521 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1523 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1525 * interp.c (StoreFPR): Control UndefinedResult() call on
1526 WARN_RESULT manifest.
1528 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1530 * gencode.c: Tidied instruction decoding, and added FP instruction
1533 * interp.c: Added dineroIII, and BSD profiling support. Also
1534 run-time FP handling.
1536 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1538 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1539 gencode.c, interp.c, support.h: created.