1 2016-01-10 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
4 * configure: Regenerate.
6 2016-01-10 Mike Frysinger <vapier@gentoo.org>
8 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
9 * configure: Regenerate.
11 2016-01-10 Mike Frysinger <vapier@gentoo.org>
13 * configure: Regenerate.
15 2016-01-10 Mike Frysinger <vapier@gentoo.org>
17 * configure: Regenerate.
19 2016-01-09 Mike Frysinger <vapier@gentoo.org>
21 * config.in, configure: Regenerate.
23 2016-01-06 Mike Frysinger <vapier@gentoo.org>
25 * interp.c (sim_open): Mark argv const.
26 (sim_create_inferior): Mark argv and env const.
28 2016-01-04 Mike Frysinger <vapier@gentoo.org>
30 * configure: Regenerate.
32 2016-01-03 Mike Frysinger <vapier@gentoo.org>
34 * interp.c (sim_open): Update sim_parse_args comment.
36 2016-01-03 Mike Frysinger <vapier@gentoo.org>
38 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
39 * configure: Regenerate.
41 2016-01-02 Mike Frysinger <vapier@gentoo.org>
43 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
44 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
45 * configure: Regenerate.
46 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
48 2016-01-02 Mike Frysinger <vapier@gentoo.org>
50 * dv-tx3904cpu.c (CPU, SD): Delete.
52 2015-12-30 Mike Frysinger <vapier@gentoo.org>
54 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
55 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
56 (sim_store_register): Rename to ...
57 (mips_reg_store): ... this. Delete local cpu var.
58 Update sim_io_eprintf calls.
59 (sim_fetch_register): Rename to ...
60 (mips_reg_fetch): ... this. Delete local cpu var.
61 Update sim_io_eprintf calls.
63 2015-12-27 Mike Frysinger <vapier@gentoo.org>
65 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
67 2015-12-26 Mike Frysinger <vapier@gentoo.org>
69 * config.in, configure: Regenerate.
71 2015-12-26 Mike Frysinger <vapier@gentoo.org>
73 * interp.c (sim_write, sim_read): Delete.
74 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
75 (load_word): Likewise.
76 * micromips.igen (cache): Likewise.
77 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
78 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
79 do_store_left, do_store_right, do_load_double, do_store_double):
81 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
83 * sim-main.c (address_translation, prefetch): Delete.
84 (ifetch32, ifetch16): Delete call to AddressTranslation and set
86 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
87 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
88 (LoadMemory, StoreMemory): Delete CCA arg.
90 2015-12-24 Mike Frysinger <vapier@gentoo.org>
92 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
93 * configure: Regenerated.
95 2015-12-24 Mike Frysinger <vapier@gentoo.org>
97 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
100 2015-12-24 Mike Frysinger <vapier@gentoo.org>
102 * tconfig.h (SIM_HANDLES_LMA): Delete.
104 2015-12-24 Mike Frysinger <vapier@gentoo.org>
106 * sim-main.h (WITH_WATCHPOINTS): Delete.
108 2015-12-24 Mike Frysinger <vapier@gentoo.org>
110 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
112 2015-12-24 Mike Frysinger <vapier@gentoo.org>
114 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
116 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
118 * micromips.igen (process_isa_mode): Fix left shift of negative
121 2015-11-17 Mike Frysinger <vapier@gentoo.org>
123 * sim-main.h (WITH_MODULO_MEMORY): Delete.
125 2015-11-15 Mike Frysinger <vapier@gentoo.org>
127 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
129 2015-11-14 Mike Frysinger <vapier@gentoo.org>
131 * interp.c (sim_close): Rename to ...
132 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
134 * sim-main.h (mips_sim_close): Declare.
135 (SIM_CLOSE_HOOK): Define.
137 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
138 Ali Lown <ali.lown@imgtec.com>
140 * Makefile.in (tmp-micromips): New rule.
141 (tmp-mach-multi): Add support for micromips.
142 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
143 that works for both mips64 and micromips64.
144 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
146 Add build support for micromips.
147 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
148 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
149 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
150 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
151 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
152 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
153 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
154 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
155 Refactored instruction code to use these functions.
156 * dsp2.igen: Refactored instruction code to use the new functions.
157 * interp.c (decode_coproc): Refactored to work with any instruction
159 (isa_mode): New variable
160 (RSVD_INSTRUCTION): Changed to 0x00000039.
161 * m16.igen (BREAK16): Refactored instruction to use do_break16.
162 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
163 * micromips.dc: New file.
164 * micromips.igen: New file.
165 * micromips16.dc: New file.
166 * micromipsdsp.igen: New file.
167 * micromipsrun.c: New file.
168 * mips.igen (do_swc1): Changed to work with any instruction encoding.
169 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
170 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
171 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
172 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
173 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
174 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
175 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
176 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
177 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
178 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
179 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
180 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
181 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
182 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
183 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
184 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
185 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
186 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
188 Refactored instruction code to use these functions.
189 (RSVD): Changed to use new reserved instruction.
190 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
191 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
192 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
193 do_store_double): Added micromips32 and micromips64 models.
194 Added include for micromips.igen and micromipsdsp.igen
195 Add micromips32 and micromips64 models.
196 (DecodeCoproc): Updated to use new macro definition.
197 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
198 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
199 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
200 Refactored instruction code to use these functions.
201 * sim-main.h (CP0_operation): New enum.
202 (DecodeCoproc): Updated macro.
203 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
204 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
205 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
206 ISA_MODE_MICROMIPS): New defines.
207 (sim_state): Add isa_mode field.
209 2015-06-23 Mike Frysinger <vapier@gentoo.org>
211 * configure: Regenerate.
213 2015-06-12 Mike Frysinger <vapier@gentoo.org>
215 * configure.ac: Change configure.in to configure.ac.
216 * configure: Regenerate.
218 2015-06-12 Mike Frysinger <vapier@gentoo.org>
220 * configure: Regenerate.
222 2015-06-12 Mike Frysinger <vapier@gentoo.org>
224 * interp.c [TRACE]: Delete.
225 (TRACE): Change to WITH_TRACE_ANY_P.
226 [!WITH_TRACE_ANY_P] (open_trace): Define.
227 (mips_option_handler, open_trace, sim_close, dotrace):
228 Change defined(TRACE) to WITH_TRACE_ANY_P.
229 (sim_open): Delete TRACE ifdef check.
230 * sim-main.c (load_memory): Delete TRACE ifdef check.
231 (store_memory): Likewise.
232 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
233 [!WITH_TRACE_ANY_P] (dotrace): Define.
235 2015-04-18 Mike Frysinger <vapier@gentoo.org>
237 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
240 2015-04-18 Mike Frysinger <vapier@gentoo.org>
242 * sim-main.h (SIM_CPU): Delete.
244 2015-04-18 Mike Frysinger <vapier@gentoo.org>
246 * sim-main.h (sim_cia): Delete.
248 2015-04-17 Mike Frysinger <vapier@gentoo.org>
250 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
252 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
253 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
254 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
255 CIA_SET to CPU_PC_SET.
256 * sim-main.h (CIA_GET, CIA_SET): Delete.
258 2015-04-15 Mike Frysinger <vapier@gentoo.org>
260 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
261 * sim-main.h (STATE_CPU): Delete.
263 2015-04-13 Mike Frysinger <vapier@gentoo.org>
265 * configure: Regenerate.
267 2015-04-13 Mike Frysinger <vapier@gentoo.org>
269 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
270 * interp.c (mips_pc_get, mips_pc_set): New functions.
271 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
272 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
273 (sim_pc_get): Delete.
274 * sim-main.h (SIM_CPU): Define.
275 (struct sim_state): Change cpu to an array of pointers.
278 2015-04-13 Mike Frysinger <vapier@gentoo.org>
280 * interp.c (mips_option_handler, open_trace, sim_close,
281 sim_write, sim_read, sim_store_register, sim_fetch_register,
282 sim_create_inferior, pr_addr, pr_uword64): Convert old style
284 (sim_open): Convert old style prototype. Change casts with
285 sim_write to unsigned char *.
286 (fetch_str): Change null to unsigned char, and change cast to
288 (sim_monitor): Change c & ch to unsigned char. Change cast to
291 2015-04-12 Mike Frysinger <vapier@gentoo.org>
293 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
295 2015-04-06 Mike Frysinger <vapier@gentoo.org>
297 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
299 2015-04-01 Mike Frysinger <vapier@gentoo.org>
301 * tconfig.h (SIM_HAVE_PROFILE): Delete.
303 2015-03-31 Mike Frysinger <vapier@gentoo.org>
305 * config.in, configure: Regenerate.
307 2015-03-24 Mike Frysinger <vapier@gentoo.org>
309 * interp.c (sim_pc_get): New function.
311 2015-03-24 Mike Frysinger <vapier@gentoo.org>
313 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
314 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
316 2015-03-24 Mike Frysinger <vapier@gentoo.org>
318 * configure: Regenerate.
320 2015-03-23 Mike Frysinger <vapier@gentoo.org>
322 * configure: Regenerate.
324 2015-03-23 Mike Frysinger <vapier@gentoo.org>
326 * configure: Regenerate.
327 * configure.ac (mips_extra_objs): Delete.
328 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
329 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
331 2015-03-23 Mike Frysinger <vapier@gentoo.org>
333 * configure: Regenerate.
334 * configure.ac: Delete sim_hw checks for dv-sockser.
336 2015-03-16 Mike Frysinger <vapier@gentoo.org>
338 * config.in, configure: Regenerate.
339 * tconfig.in: Rename file ...
340 * tconfig.h: ... here.
342 2015-03-15 Mike Frysinger <vapier@gentoo.org>
344 * tconfig.in: Delete includes.
345 [HAVE_DV_SOCKSER]: Delete.
347 2015-03-14 Mike Frysinger <vapier@gentoo.org>
349 * Makefile.in (SIM_RUN_OBJS): Delete.
351 2015-03-14 Mike Frysinger <vapier@gentoo.org>
353 * configure.ac (AC_CHECK_HEADERS): Delete.
354 * aclocal.m4, configure: Regenerate.
356 2014-08-19 Alan Modra <amodra@gmail.com>
358 * configure: Regenerate.
360 2014-08-15 Roland McGrath <mcgrathr@google.com>
362 * configure: Regenerate.
363 * config.in: Regenerate.
365 2014-03-04 Mike Frysinger <vapier@gentoo.org>
367 * configure: Regenerate.
369 2013-09-23 Alan Modra <amodra@gmail.com>
371 * configure: Regenerate.
373 2013-06-03 Mike Frysinger <vapier@gentoo.org>
375 * aclocal.m4, configure: Regenerate.
377 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
379 * configure: Rebuild.
381 2013-03-26 Mike Frysinger <vapier@gentoo.org>
383 * configure: Regenerate.
385 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
387 * configure.ac: Address use of dv-sockser.o.
388 * tconfig.in: Conditionalize use of dv_sockser_install.
389 * configure: Regenerated.
390 * config.in: Regenerated.
392 2012-10-04 Chao-ying Fu <fu@mips.com>
393 Steve Ellcey <sellcey@mips.com>
395 * mips/mips3264r2.igen (rdhwr): New.
397 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
399 * configure.ac: Always link against dv-sockser.o.
400 * configure: Regenerate.
402 2012-06-15 Joel Brobecker <brobecker@adacore.com>
404 * config.in, configure: Regenerate.
406 2012-05-18 Nick Clifton <nickc@redhat.com>
409 * interp.c: Include config.h before system header files.
411 2012-03-24 Mike Frysinger <vapier@gentoo.org>
413 * aclocal.m4, config.in, configure: Regenerate.
415 2011-12-03 Mike Frysinger <vapier@gentoo.org>
417 * aclocal.m4: New file.
418 * configure: Regenerate.
420 2011-10-19 Mike Frysinger <vapier@gentoo.org>
422 * configure: Regenerate after common/acinclude.m4 update.
424 2011-10-17 Mike Frysinger <vapier@gentoo.org>
426 * configure.ac: Change include to common/acinclude.m4.
428 2011-10-17 Mike Frysinger <vapier@gentoo.org>
430 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
431 call. Replace common.m4 include with SIM_AC_COMMON.
432 * configure: Regenerate.
434 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
436 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
438 (tmp-mach-multi): Exit early when igen fails.
440 2011-07-05 Mike Frysinger <vapier@gentoo.org>
442 * interp.c (sim_do_command): Delete.
444 2011-02-14 Mike Frysinger <vapier@gentoo.org>
446 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
447 (tx3904sio_fifo_reset): Likewise.
448 * interp.c (sim_monitor): Likewise.
450 2010-04-14 Mike Frysinger <vapier@gentoo.org>
452 * interp.c (sim_write): Add const to buffer arg.
454 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
456 * interp.c: Don't include sysdep.h
458 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
460 * configure: Regenerate.
462 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
464 * config.in: Regenerate.
465 * configure: Likewise.
467 * configure: Regenerate.
469 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
471 * configure: Regenerate to track ../common/common.m4 changes.
474 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
475 Daniel Jacobowitz <dan@codesourcery.com>
476 Joseph Myers <joseph@codesourcery.com>
478 * configure: Regenerate.
480 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
482 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
483 that unconditionally allows fmt_ps.
484 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
485 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
486 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
487 filter from 64,f to 32,f.
488 (PREFX): Change filter from 64 to 32.
489 (LDXC1, LUXC1): Provide separate mips32r2 implementations
490 that use do_load_double instead of do_load. Make both LUXC1
491 versions unpredictable if SizeFGR () != 64.
492 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
493 instead of do_store. Remove unused variable. Make both SUXC1
494 versions unpredictable if SizeFGR () != 64.
496 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
498 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
499 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
500 shifts for that case.
502 2007-09-04 Nick Clifton <nickc@redhat.com>
504 * interp.c (options enum): Add OPTION_INFO_MEMORY.
505 (display_mem_info): New static variable.
506 (mips_option_handler): Handle OPTION_INFO_MEMORY.
507 (mips_options): Add info-memory and memory-info.
508 (sim_open): After processing the command line and board
509 specification, check display_mem_info. If it is set then
510 call the real handler for the --memory-info command line
513 2007-08-24 Joel Brobecker <brobecker@adacore.com>
515 * configure.ac: Change license of multi-run.c to GPL version 3.
516 * configure: Regenerate.
518 2007-06-28 Richard Sandiford <richard@codesourcery.com>
520 * configure.ac, configure: Revert last patch.
522 2007-06-26 Richard Sandiford <richard@codesourcery.com>
524 * configure.ac (sim_mipsisa3264_configs): New variable.
525 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
526 every configuration support all four targets, using the triplet to
527 determine the default.
528 * configure: Regenerate.
530 2007-06-25 Richard Sandiford <richard@codesourcery.com>
532 * Makefile.in (m16run.o): New rule.
534 2007-05-15 Thiemo Seufer <ths@mips.com>
536 * mips3264r2.igen (DSHD): Fix compile warning.
538 2007-05-14 Thiemo Seufer <ths@mips.com>
540 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
541 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
542 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
543 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
546 2007-03-01 Thiemo Seufer <ths@mips.com>
548 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
551 2007-02-20 Thiemo Seufer <ths@mips.com>
553 * dsp.igen: Update copyright notice.
554 * dsp2.igen: Fix copyright notice.
556 2007-02-20 Thiemo Seufer <ths@mips.com>
557 Chao-Ying Fu <fu@mips.com>
559 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
560 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
561 Add dsp2 to sim_igen_machine.
562 * configure: Regenerate.
563 * dsp.igen (do_ph_op): Add MUL support when op = 2.
564 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
565 (mulq_rs.ph): Use do_ph_mulq.
566 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
567 * mips.igen: Add dsp2 model and include dsp2.igen.
568 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
569 for *mips32r2, *mips64r2, *dsp.
570 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
571 for *mips32r2, *mips64r2, *dsp2.
572 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
574 2007-02-19 Thiemo Seufer <ths@mips.com>
575 Nigel Stephens <nigel@mips.com>
577 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
578 jumps with hazard barrier.
580 2007-02-19 Thiemo Seufer <ths@mips.com>
581 Nigel Stephens <nigel@mips.com>
583 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
584 after each call to sim_io_write.
586 2007-02-19 Thiemo Seufer <ths@mips.com>
587 Nigel Stephens <nigel@mips.com>
589 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
590 supported by this simulator.
591 (decode_coproc): Recognise additional CP0 Config registers
594 2007-02-19 Thiemo Seufer <ths@mips.com>
595 Nigel Stephens <nigel@mips.com>
596 David Ung <davidu@mips.com>
598 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
599 uninterpreted formats. If fmt is one of the uninterpreted types
600 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
601 fmt_word, and fmt_uninterpreted_64 like fmt_long.
602 (store_fpr): When writing an invalid odd register, set the
603 matching even register to fmt_unknown, not the following register.
604 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
605 the the memory window at offset 0 set by --memory-size command
607 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
609 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
611 (sim_monitor): When returning the memory size to the MIPS
612 application, use the value in STATE_MEM_SIZE, not an arbitrary
614 (cop_lw): Don' mess around with FPR_STATE, just pass
615 fmt_uninterpreted_32 to StoreFPR.
617 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
619 * mips.igen (not_word_value): Single version for mips32, mips64
622 2007-02-19 Thiemo Seufer <ths@mips.com>
623 Nigel Stephens <nigel@mips.com>
625 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
628 2007-02-17 Thiemo Seufer <ths@mips.com>
630 * configure.ac (mips*-sde-elf*): Move in front of generic machine
632 * configure: Regenerate.
634 2007-02-17 Thiemo Seufer <ths@mips.com>
636 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
637 Add mdmx to sim_igen_machine.
638 (mipsisa64*-*-*): Likewise. Remove dsp.
639 (mipsisa32*-*-*): Remove dsp.
640 * configure: Regenerate.
642 2007-02-13 Thiemo Seufer <ths@mips.com>
644 * configure.ac: Add mips*-sde-elf* target.
645 * configure: Regenerate.
647 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
649 * acconfig.h: Remove.
650 * config.in, configure: Regenerate.
652 2006-11-07 Thiemo Seufer <ths@mips.com>
654 * dsp.igen (do_w_op): Fix compiler warning.
656 2006-08-29 Thiemo Seufer <ths@mips.com>
657 David Ung <davidu@mips.com>
659 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
661 * configure: Regenerate.
662 * mips.igen (model): Add smartmips.
663 (MADDU): Increment ACX if carry.
664 (do_mult): Clear ACX.
665 (ROR,RORV): Add smartmips.
666 (include): Include smartmips.igen.
667 * sim-main.h (ACX): Set to REGISTERS[89].
668 * smartmips.igen: New file.
670 2006-08-29 Thiemo Seufer <ths@mips.com>
671 David Ung <davidu@mips.com>
673 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
674 mips3264r2.igen. Add missing dependency rules.
675 * m16e.igen: Support for mips16e save/restore instructions.
677 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
679 * configure: Regenerated.
681 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
683 * configure: Regenerated.
685 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
687 * configure: Regenerated.
689 2006-05-15 Chao-ying Fu <fu@mips.com>
691 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
693 2006-04-18 Nick Clifton <nickc@redhat.com>
695 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
698 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
700 * configure: Regenerate.
702 2005-12-14 Chao-ying Fu <fu@mips.com>
704 * Makefile.in (SIM_OBJS): Add dsp.o.
705 (dsp.o): New dependency.
706 (IGEN_INCLUDE): Add dsp.igen.
707 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
708 mipsisa64*-*-*): Add dsp to sim_igen_machine.
709 * configure: Regenerate.
710 * mips.igen: Add dsp model and include dsp.igen.
711 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
712 because these instructions are extended in DSP ASE.
713 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
714 adding 6 DSP accumulator registers and 1 DSP control register.
715 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
716 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
717 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
718 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
719 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
720 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
721 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
722 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
723 DSPCR_CCOND_SMASK): New define.
724 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
725 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
727 2005-07-08 Ian Lance Taylor <ian@airs.com>
729 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
731 2005-06-16 David Ung <davidu@mips.com>
732 Nigel Stephens <nigel@mips.com>
734 * mips.igen: New mips16e model and include m16e.igen.
735 (check_u64): Add mips16e tag.
736 * m16e.igen: New file for MIPS16e instructions.
737 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
738 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
740 * configure: Regenerate.
742 2005-05-26 David Ung <davidu@mips.com>
744 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
745 tags to all instructions which are applicable to the new ISAs.
746 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
748 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
750 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
752 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
753 * configure: Regenerate.
755 2005-03-23 Mark Kettenis <kettenis@gnu.org>
757 * configure: Regenerate.
759 2005-01-14 Andrew Cagney <cagney@gnu.org>
761 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
762 explicit call to AC_CONFIG_HEADER.
763 * configure: Regenerate.
765 2005-01-12 Andrew Cagney <cagney@gnu.org>
767 * configure.ac: Update to use ../common/common.m4.
768 * configure: Re-generate.
770 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
772 * configure: Regenerated to track ../common/aclocal.m4 changes.
774 2005-01-07 Andrew Cagney <cagney@gnu.org>
776 * configure.ac: Rename configure.in, require autoconf 2.59.
777 * configure: Re-generate.
779 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
781 * configure: Regenerate for ../common/aclocal.m4 update.
783 2004-09-24 Monika Chaddha <monika@acmet.com>
785 Committed by Andrew Cagney.
786 * m16.igen (CMP, CMPI): Fix assembler.
788 2004-08-18 Chris Demetriou <cgd@broadcom.com>
790 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
791 * configure: Regenerate.
793 2004-06-25 Chris Demetriou <cgd@broadcom.com>
795 * configure.in (sim_m16_machine): Include mipsIII.
796 * configure: Regenerate.
798 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
800 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
802 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
804 2004-04-10 Chris Demetriou <cgd@broadcom.com>
806 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
808 2004-04-09 Chris Demetriou <cgd@broadcom.com>
810 * mips.igen (check_fmt): Remove.
811 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
812 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
813 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
814 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
815 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
816 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
817 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
818 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
819 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
820 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
822 2004-04-09 Chris Demetriou <cgd@broadcom.com>
824 * sb1.igen (check_sbx): New function.
825 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
827 2004-03-29 Chris Demetriou <cgd@broadcom.com>
828 Richard Sandiford <rsandifo@redhat.com>
830 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
831 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
832 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
833 separate implementations for mipsIV and mipsV. Use new macros to
834 determine whether the restrictions apply.
836 2004-01-19 Chris Demetriou <cgd@broadcom.com>
838 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
839 (check_mult_hilo): Improve comments.
840 (check_div_hilo): Likewise. Also, fork off a new version
841 to handle mips32/mips64 (since there are no hazards to check
844 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
846 * mips.igen (do_dmultx): Fix check for negative operands.
848 2003-05-16 Ian Lance Taylor <ian@airs.com>
850 * Makefile.in (SHELL): Make sure this is defined.
851 (various): Use $(SHELL) whenever we invoke move-if-change.
853 2003-05-03 Chris Demetriou <cgd@broadcom.com>
855 * cp1.c: Tweak attribution slightly.
858 * mdmx.igen: Likewise.
859 * mips3d.igen: Likewise.
860 * sb1.igen: Likewise.
862 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
864 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
867 2003-02-27 Andrew Cagney <cagney@redhat.com>
869 * interp.c (sim_open): Rename _bfd to bfd.
870 (sim_create_inferior): Ditto.
872 2003-01-14 Chris Demetriou <cgd@broadcom.com>
874 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
876 2003-01-14 Chris Demetriou <cgd@broadcom.com>
878 * mips.igen (EI, DI): Remove.
880 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
882 * Makefile.in (tmp-run-multi): Fix mips16 filter.
884 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
885 Andrew Cagney <ac131313@redhat.com>
886 Gavin Romig-Koch <gavin@redhat.com>
887 Graydon Hoare <graydon@redhat.com>
888 Aldy Hernandez <aldyh@redhat.com>
889 Dave Brolley <brolley@redhat.com>
890 Chris Demetriou <cgd@broadcom.com>
892 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
893 (sim_mach_default): New variable.
894 (mips64vr-*-*, mips64vrel-*-*): New configurations.
895 Add a new simulator generator, MULTI.
896 * configure: Regenerate.
897 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
898 (multi-run.o): New dependency.
899 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
900 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
901 (tmp-multi): Combine them.
902 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
903 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
904 (distclean-extra): New rule.
905 * sim-main.h: Include bfd.h.
906 (MIPS_MACH): New macro.
907 * mips.igen (vr4120, vr5400, vr5500): New models.
908 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
909 * vr.igen: Replace with new version.
911 2003-01-04 Chris Demetriou <cgd@broadcom.com>
913 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
914 * configure: Regenerate.
916 2002-12-31 Chris Demetriou <cgd@broadcom.com>
918 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
919 * mips.igen: Remove all invocations of check_branch_bug and
922 2002-12-16 Chris Demetriou <cgd@broadcom.com>
924 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
926 2002-07-30 Chris Demetriou <cgd@broadcom.com>
928 * mips.igen (do_load_double, do_store_double): New functions.
929 (LDC1, SDC1): Rename to...
930 (LDC1b, SDC1b): respectively.
931 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
933 2002-07-29 Michael Snyder <msnyder@redhat.com>
935 * cp1.c (fp_recip2): Modify initialization expression so that
936 GCC will recognize it as constant.
938 2002-06-18 Chris Demetriou <cgd@broadcom.com>
940 * mdmx.c (SD_): Delete.
941 (Unpredictable): Re-define, for now, to directly invoke
942 unpredictable_action().
943 (mdmx_acc_op): Fix error in .ob immediate handling.
945 2002-06-18 Andrew Cagney <cagney@redhat.com>
947 * interp.c (sim_firmware_command): Initialize `address'.
949 2002-06-16 Andrew Cagney <ac131313@redhat.com>
951 * configure: Regenerated to track ../common/aclocal.m4 changes.
953 2002-06-14 Chris Demetriou <cgd@broadcom.com>
954 Ed Satterthwaite <ehs@broadcom.com>
956 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
957 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
958 * mips.igen: Include mips3d.igen.
959 (mips3d): New model name for MIPS-3D ASE instructions.
960 (CVT.W.fmt): Don't use this instruction for word (source) format
962 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
963 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
964 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
965 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
966 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
967 (RSquareRoot1, RSquareRoot2): New macros.
968 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
969 (fp_rsqrt2): New functions.
970 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
971 * configure: Regenerate.
973 2002-06-13 Chris Demetriou <cgd@broadcom.com>
974 Ed Satterthwaite <ehs@broadcom.com>
976 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
977 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
978 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
979 (convert): Note that this function is not used for paired-single
981 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
982 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
983 (check_fmt_p): Enable paired-single support.
984 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
985 (PUU.PS): New instructions.
986 (CVT.S.fmt): Don't use this instruction for paired-single format
988 * sim-main.h (FP_formats): New value 'fmt_ps.'
989 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
990 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
992 2002-06-12 Chris Demetriou <cgd@broadcom.com>
994 * mips.igen: Fix formatting of function calls in
997 2002-06-12 Chris Demetriou <cgd@broadcom.com>
999 * mips.igen (MOVN, MOVZ): Trace result.
1000 (TNEI): Print "tnei" as the opcode name in traces.
1001 (CEIL.W): Add disassembly string for traces.
1002 (RSQRT.fmt): Make location of disassembly string consistent
1003 with other instructions.
1005 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1007 * mips.igen (X): Delete unused function.
1009 2002-06-08 Andrew Cagney <cagney@redhat.com>
1011 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1013 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1014 Ed Satterthwaite <ehs@broadcom.com>
1016 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1017 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1018 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1019 (fp_nmsub): New prototypes.
1020 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1021 (NegMultiplySub): New defines.
1022 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1023 (MADD.D, MADD.S): Replace with...
1024 (MADD.fmt): New instruction.
1025 (MSUB.D, MSUB.S): Replace with...
1026 (MSUB.fmt): New instruction.
1027 (NMADD.D, NMADD.S): Replace with...
1028 (NMADD.fmt): New instruction.
1029 (NMSUB.D, MSUB.S): Replace with...
1030 (NMSUB.fmt): New instruction.
1032 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1033 Ed Satterthwaite <ehs@broadcom.com>
1035 * cp1.c: Fix more comment spelling and formatting.
1036 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1037 (denorm_mode): New function.
1038 (fpu_unary, fpu_binary): Round results after operation, collect
1039 status from rounding operations, and update the FCSR.
1040 (convert): Collect status from integer conversions and rounding
1041 operations, and update the FCSR. Adjust NaN values that result
1042 from conversions. Convert to use sim_io_eprintf rather than
1043 fprintf, and remove some debugging code.
1044 * cp1.h (fenr_FS): New define.
1046 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1048 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1049 rounding mode to sim FP rounding mode flag conversion code into...
1050 (rounding_mode): New function.
1052 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1054 * cp1.c: Clean up formatting of a few comments.
1055 (value_fpr): Reformat switch statement.
1057 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1058 Ed Satterthwaite <ehs@broadcom.com>
1061 * sim-main.h: Include cp1.h.
1062 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1063 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1064 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1065 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1066 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1067 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1068 * cp1.c: Don't include sim-fpu.h; already included by
1069 sim-main.h. Clean up formatting of some comments.
1070 (NaN, Equal, Less): Remove.
1071 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1072 (fp_cmp): New functions.
1073 * mips.igen (do_c_cond_fmt): Remove.
1074 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1075 Compare. Add result tracing.
1076 (CxC1): Remove, replace with...
1077 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1078 (DMxC1): Remove, replace with...
1079 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1080 (MxC1): Remove, replace with...
1081 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1083 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1085 * sim-main.h (FGRIDX): Remove, replace all uses with...
1086 (FGR_BASE): New macro.
1087 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1088 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1089 (NR_FGR, FGR): Likewise.
1090 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1091 * mips.igen: Likewise.
1093 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1095 * cp1.c: Add an FSF Copyright notice to this file.
1097 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1098 Ed Satterthwaite <ehs@broadcom.com>
1100 * cp1.c (Infinity): Remove.
1101 * sim-main.h (Infinity): Likewise.
1103 * cp1.c (fp_unary, fp_binary): New functions.
1104 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1105 (fp_sqrt): New functions, implemented in terms of the above.
1106 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1107 (Recip, SquareRoot): Remove (replaced by functions above).
1108 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1109 (fp_recip, fp_sqrt): New prototypes.
1110 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1111 (Recip, SquareRoot): Replace prototypes with #defines which
1112 invoke the functions above.
1114 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1116 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1117 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1118 file, remove PARAMS from prototypes.
1119 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1120 simulator state arguments.
1121 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1122 pass simulator state arguments.
1123 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1124 (store_fpr, convert): Remove 'sd' argument.
1125 (value_fpr): Likewise. Convert to use 'SD' instead.
1127 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1129 * cp1.c (Min, Max): Remove #if 0'd functions.
1130 * sim-main.h (Min, Max): Remove.
1132 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1134 * cp1.c: fix formatting of switch case and default labels.
1135 * interp.c: Likewise.
1136 * sim-main.c: Likewise.
1138 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1140 * cp1.c: Clean up comments which describe FP formats.
1141 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1143 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1144 Ed Satterthwaite <ehs@broadcom.com>
1146 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1147 Broadcom SiByte SB-1 processor configurations.
1148 * configure: Regenerate.
1149 * sb1.igen: New file.
1150 * mips.igen: Include sb1.igen.
1152 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1153 * mdmx.igen: Add "sb1" model to all appropriate functions and
1155 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1156 (ob_func, ob_acc): Reference the above.
1157 (qh_acc): Adjust to keep the same size as ob_acc.
1158 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1159 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1161 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1163 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1165 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1166 Ed Satterthwaite <ehs@broadcom.com>
1168 * mips.igen (mdmx): New (pseudo-)model.
1169 * mdmx.c, mdmx.igen: New files.
1170 * Makefile.in (SIM_OBJS): Add mdmx.o.
1171 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1173 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1174 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1175 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1176 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1177 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1178 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1179 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1180 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1181 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1182 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1183 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1184 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1185 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1186 (qh_fmtsel): New macros.
1187 (_sim_cpu): New member "acc".
1188 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1189 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1191 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1193 * interp.c: Use 'deprecated' rather than 'depreciated.'
1194 * sim-main.h: Likewise.
1196 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1198 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1199 which wouldn't compile anyway.
1200 * sim-main.h (unpredictable_action): New function prototype.
1201 (Unpredictable): Define to call igen function unpredictable().
1202 (NotWordValue): New macro to call igen function not_word_value().
1203 (UndefinedResult): Remove.
1204 * interp.c (undefined_result): Remove.
1205 (unpredictable_action): New function.
1206 * mips.igen (not_word_value, unpredictable): New functions.
1207 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1208 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1209 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1210 NotWordValue() to check for unpredictable inputs, then
1211 Unpredictable() to handle them.
1213 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1215 * mips.igen: Fix formatting of calls to Unpredictable().
1217 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1219 * interp.c (sim_open): Revert previous change.
1221 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1223 * interp.c (sim_open): Disable chunk of code that wrote code in
1224 vector table entries.
1226 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1228 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1229 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1232 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1234 * cp1.c: Fix many formatting issues.
1236 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1238 * cp1.c (fpu_format_name): New function to replace...
1239 (DOFMT): This. Delete, and update all callers.
1240 (fpu_rounding_mode_name): New function to replace...
1241 (RMMODE): This. Delete, and update all callers.
1243 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1245 * interp.c: Move FPU support routines from here to...
1246 * cp1.c: Here. New file.
1247 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1248 (cp1.o): New target.
1250 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1252 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1253 * mips.igen (mips32, mips64): New models, add to all instructions
1254 and functions as appropriate.
1255 (loadstore_ea, check_u64): New variant for model mips64.
1256 (check_fmt_p): New variant for models mipsV and mips64, remove
1257 mipsV model marking fro other variant.
1260 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1261 for mips32 and mips64.
1262 (DCLO, DCLZ): New instructions for mips64.
1264 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1266 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1267 immediate or code as a hex value with the "%#lx" format.
1268 (ANDI): Likewise, and fix printed instruction name.
1270 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1272 * sim-main.h (UndefinedResult, Unpredictable): New macros
1273 which currently do nothing.
1275 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1277 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1278 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1279 (status_CU3): New definitions.
1281 * sim-main.h (ExceptionCause): Add new values for MIPS32
1282 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1283 for DebugBreakPoint and NMIReset to note their status in
1285 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1286 (SignalExceptionCacheErr): New exception macros.
1288 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1290 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1291 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1293 (SignalExceptionCoProcessorUnusable): Take as argument the
1294 unusable coprocessor number.
1296 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1298 * mips.igen: Fix formatting of all SignalException calls.
1300 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1302 * sim-main.h (SIGNEXTEND): Remove.
1304 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1306 * mips.igen: Remove gencode comment from top of file, fix
1307 spelling in another comment.
1309 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1311 * mips.igen (check_fmt, check_fmt_p): New functions to check
1312 whether specific floating point formats are usable.
1313 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1314 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1315 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1316 Use the new functions.
1317 (do_c_cond_fmt): Remove format checks...
1318 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1320 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1322 * mips.igen: Fix formatting of check_fpu calls.
1324 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1326 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1328 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen: Remove whitespace at end of lines.
1332 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1334 * mips.igen (loadstore_ea): New function to do effective
1335 address calculations.
1336 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1337 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1338 CACHE): Use loadstore_ea to do effective address computations.
1340 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1342 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1343 * mips.igen (LL, CxC1, MxC1): Likewise.
1345 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1347 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1348 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1349 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1350 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1351 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1352 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1353 Don't split opcode fields by hand, use the opcode field values
1356 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1358 * mips.igen (do_divu): Fix spacing.
1360 * mips.igen (do_dsllv): Move to be right before DSLLV,
1361 to match the rest of the do_<shift> functions.
1363 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1365 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1366 DSRL32, do_dsrlv): Trace inputs and results.
1368 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1370 * mips.igen (CACHE): Provide instruction-printing string.
1372 * interp.c (signal_exception): Comment tokens after #endif.
1374 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1376 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1377 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1378 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1379 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1380 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1381 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1382 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1383 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1385 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1387 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1388 instruction-printing string.
1389 (LWU): Use '64' as the filter flag.
1391 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1393 * mips.igen (SDXC1): Fix instruction-printing string.
1395 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1397 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1398 filter flags "32,f".
1400 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1402 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1405 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1407 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1408 add a comma) so that it more closely match the MIPS ISA
1409 documentation opcode partitioning.
1410 (PREF): Put useful names on opcode fields, and include
1411 instruction-printing string.
1413 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1415 * mips.igen (check_u64): New function which in the future will
1416 check whether 64-bit instructions are usable and signal an
1417 exception if not. Currently a no-op.
1418 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1419 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1420 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1421 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1423 * mips.igen (check_fpu): New function which in the future will
1424 check whether FPU instructions are usable and signal an exception
1425 if not. Currently a no-op.
1426 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1427 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1428 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1429 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1430 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1431 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1432 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1433 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1435 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1437 * mips.igen (do_load_left, do_load_right): Move to be immediately
1439 (do_store_left, do_store_right): Move to be immediately following
1442 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1444 * mips.igen (mipsV): New model name. Also, add it to
1445 all instructions and functions where it is appropriate.
1447 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1449 * mips.igen: For all functions and instructions, list model
1450 names that support that instruction one per line.
1452 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1454 * mips.igen: Add some additional comments about supported
1455 models, and about which instructions go where.
1456 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1457 order as is used in the rest of the file.
1459 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1461 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1462 indicating that ALU32_END or ALU64_END are there to check
1464 (DADD): Likewise, but also remove previous comment about
1467 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1469 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1470 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1471 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1472 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1473 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1474 fields (i.e., add and move commas) so that they more closely
1475 match the MIPS ISA documentation opcode partitioning.
1477 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1479 * mips.igen (ADDI): Print immediate value.
1480 (BREAK): Print code.
1481 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1482 (SLL): Print "nop" specially, and don't run the code
1483 that does the shift for the "nop" case.
1485 2001-11-17 Fred Fish <fnf@redhat.com>
1487 * sim-main.h (float_operation): Move enum declaration outside
1488 of _sim_cpu struct declaration.
1490 2001-04-12 Jim Blandy <jimb@redhat.com>
1492 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1493 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1495 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1496 PENDING_FILL, and you can get the intended effect gracefully by
1497 calling PENDING_SCHED directly.
1499 2001-02-23 Ben Elliston <bje@redhat.com>
1501 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1502 already defined elsewhere.
1504 2001-02-19 Ben Elliston <bje@redhat.com>
1506 * sim-main.h (sim_monitor): Return an int.
1507 * interp.c (sim_monitor): Add return values.
1508 (signal_exception): Handle error conditions from sim_monitor.
1510 2001-02-08 Ben Elliston <bje@redhat.com>
1512 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1513 (store_memory): Likewise, pass cia to sim_core_write*.
1515 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1517 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1518 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1520 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1522 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1523 * Makefile.in: Don't delete *.igen when cleaning directory.
1525 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1527 * m16.igen (break): Call SignalException not sim_engine_halt.
1529 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1531 From Jason Eckhardt:
1532 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1534 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1536 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1538 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1540 * mips.igen (do_dmultx): Fix typo.
1542 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1544 * configure: Regenerated to track ../common/aclocal.m4 changes.
1546 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1548 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1550 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1552 * sim-main.h (GPR_CLEAR): Define macro.
1554 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1556 * interp.c (decode_coproc): Output long using %lx and not %s.
1558 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1560 * interp.c (sim_open): Sort & extend dummy memory regions for
1561 --board=jmr3904 for eCos.
1563 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1565 * configure: Regenerated.
1567 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1569 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1570 calls, conditional on the simulator being in verbose mode.
1572 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1574 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1575 cache don't get ReservedInstruction traps.
1577 1999-11-29 Mark Salter <msalter@cygnus.com>
1579 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1580 to clear status bits in sdisr register. This is how the hardware works.
1582 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1583 being used by cygmon.
1585 1999-11-11 Andrew Haley <aph@cygnus.com>
1587 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1590 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1592 * mips.igen (MULT): Correct previous mis-applied patch.
1594 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1596 * mips.igen (delayslot32): Handle sequence like
1597 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1598 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1599 (MULT): Actually pass the third register...
1601 1999-09-03 Mark Salter <msalter@cygnus.com>
1603 * interp.c (sim_open): Added more memory aliases for additional
1604 hardware being touched by cygmon on jmr3904 board.
1606 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1608 * configure: Regenerated to track ../common/aclocal.m4 changes.
1610 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1612 * interp.c (sim_store_register): Handle case where client - GDB -
1613 specifies that a 4 byte register is 8 bytes in size.
1614 (sim_fetch_register): Ditto.
1616 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1618 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1619 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1620 (idt_monitor_base): Base address for IDT monitor traps.
1621 (pmon_monitor_base): Ditto for PMON.
1622 (lsipmon_monitor_base): Ditto for LSI PMON.
1623 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1624 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1625 (sim_firmware_command): New function.
1626 (mips_option_handler): Call it for OPTION_FIRMWARE.
1627 (sim_open): Allocate memory for idt_monitor region. If "--board"
1628 option was given, add no monitor by default. Add BREAK hooks only if
1629 monitors are also there.
1631 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1633 * interp.c (sim_monitor): Flush output before reading input.
1635 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1637 * tconfig.in (SIM_HANDLES_LMA): Always define.
1639 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1641 From Mark Salter <msalter@cygnus.com>:
1642 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1643 (sim_open): Add setup for BSP board.
1645 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1647 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1648 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1649 them as unimplemented.
1651 1999-05-08 Felix Lee <flee@cygnus.com>
1653 * configure: Regenerated to track ../common/aclocal.m4 changes.
1655 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1657 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1659 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1661 * configure.in: Any mips64vr5*-*-* target should have
1662 -DTARGET_ENABLE_FR=1.
1663 (default_endian): Any mips64vr*el-*-* target should default to
1665 * configure: Re-generate.
1667 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1669 * mips.igen (ldl): Extend from _16_, not 32.
1671 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1673 * interp.c (sim_store_register): Force registers written to by GDB
1674 into an un-interpreted state.
1676 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1678 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1679 CPU, start periodic background I/O polls.
1680 (tx3904sio_poll): New function: periodic I/O poller.
1682 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1684 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1686 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1688 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1691 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1693 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1694 (load_word): Call SIM_CORE_SIGNAL hook on error.
1695 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1696 starting. For exception dispatching, pass PC instead of NULL_CIA.
1697 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1698 * sim-main.h (COP0_BADVADDR): Define.
1699 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1700 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1701 (_sim_cpu): Add exc_* fields to store register value snapshots.
1702 * mips.igen (*): Replace memory-related SignalException* calls
1703 with references to SIM_CORE_SIGNAL hook.
1705 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1707 * sim-main.c (*): Minor warning cleanups.
1709 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1711 * m16.igen (DADDIU5): Correct type-o.
1713 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1715 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1718 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1720 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1722 (interp.o): Add dependency on itable.h
1723 (oengine.c, gencode): Delete remaining references.
1724 (BUILT_SRC_FROM_GEN): Clean up.
1726 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1729 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1730 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1731 tmp-run-hack) : New.
1732 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1733 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1734 Drop the "64" qualifier to get the HACK generator working.
1735 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1736 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1737 qualifier to get the hack generator working.
1738 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1739 (DSLL): Use do_dsll.
1740 (DSLLV): Use do_dsllv.
1741 (DSRA): Use do_dsra.
1742 (DSRL): Use do_dsrl.
1743 (DSRLV): Use do_dsrlv.
1744 (BC1): Move *vr4100 to get the HACK generator working.
1745 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1746 get the HACK generator working.
1747 (MACC) Rename to get the HACK generator working.
1748 (DMACC,MACCS,DMACCS): Add the 64.
1750 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1752 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1753 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1755 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1757 * mips/interp.c (DEBUG): Cleanups.
1759 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1761 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1762 (tx3904sio_tickle): fflush after a stdout character output.
1764 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1766 * interp.c (sim_close): Uninstall modules.
1768 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1770 * sim-main.h, interp.c (sim_monitor): Change to global
1773 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1775 * configure.in (vr4100): Only include vr4100 instructions in
1777 * configure: Re-generate.
1778 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1780 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1782 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1783 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1786 * configure.in (sim_default_gen, sim_use_gen): Replace with
1788 (--enable-sim-igen): Delete config option. Always using IGEN.
1789 * configure: Re-generate.
1791 * Makefile.in (gencode): Kill, kill, kill.
1794 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1796 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1797 bit mips16 igen simulator.
1798 * configure: Re-generate.
1800 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1801 as part of vr4100 ISA.
1802 * vr.igen: Mark all instructions as 64 bit only.
1804 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1806 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1809 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1811 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1812 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1813 * configure: Re-generate.
1815 * m16.igen (BREAK): Define breakpoint instruction.
1816 (JALX32): Mark instruction as mips16 and not r3900.
1817 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1819 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1821 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1823 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1824 insn as a debug breakpoint.
1826 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1828 (PENDING_SCHED): Clean up trace statement.
1829 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1830 (PENDING_FILL): Delay write by only one cycle.
1831 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1833 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1835 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1837 (pending_tick): Move incrementing of index to FOR statement.
1838 (pending_tick): Only update PENDING_OUT after a write has occured.
1840 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1842 * configure: Re-generate.
1844 * interp.c (sim_engine_run OLD): Delete explicit call to
1845 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1847 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1849 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1850 interrupt level number to match changed SignalExceptionInterrupt
1853 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1855 * interp.c: #include "itable.h" if WITH_IGEN.
1856 (get_insn_name): New function.
1857 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1858 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1860 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1862 * configure: Rebuilt to inhale new common/aclocal.m4.
1864 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1866 * dv-tx3904sio.c: Include sim-assert.h.
1868 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1870 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1871 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1872 Reorganize target-specific sim-hardware checks.
1873 * configure: rebuilt.
1874 * interp.c (sim_open): For tx39 target boards, set
1875 OPERATING_ENVIRONMENT, add tx3904sio devices.
1876 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1877 ROM executables. Install dv-sockser into sim-modules list.
1879 * dv-tx3904irc.c: Compiler warning clean-up.
1880 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1881 frequent hw-trace messages.
1883 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1885 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1887 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1889 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1891 * vr.igen: New file.
1892 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1893 * mips.igen: Define vr4100 model. Include vr.igen.
1894 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1896 * mips.igen (check_mf_hilo): Correct check.
1898 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1900 * sim-main.h (interrupt_event): Add prototype.
1902 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1903 register_ptr, register_value.
1904 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1906 * sim-main.h (tracefh): Make extern.
1908 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1910 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1911 Reduce unnecessarily high timer event frequency.
1912 * dv-tx3904cpu.c: Ditto for interrupt event.
1914 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1916 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1918 (interrupt_event): Made non-static.
1920 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1921 interchange of configuration values for external vs. internal
1924 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1926 * mips.igen (BREAK): Moved code to here for
1927 simulator-reserved break instructions.
1928 * gencode.c (build_instruction): Ditto.
1929 * interp.c (signal_exception): Code moved from here. Non-
1930 reserved instructions now use exception vector, rather
1932 * sim-main.h: Moved magic constants to here.
1934 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1936 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1937 register upon non-zero interrupt event level, clear upon zero
1939 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1940 by passing zero event value.
1941 (*_io_{read,write}_buffer): Endianness fixes.
1942 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1943 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1945 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1946 serial I/O and timer module at base address 0xFFFF0000.
1948 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1950 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1953 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1955 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1957 * configure: Update.
1959 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1961 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1962 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1963 * configure.in: Include tx3904tmr in hw_device list.
1964 * configure: Rebuilt.
1965 * interp.c (sim_open): Instantiate three timer instances.
1966 Fix address typo of tx3904irc instance.
1968 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1970 * interp.c (signal_exception): SystemCall exception now uses
1971 the exception vector.
1973 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1975 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1978 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1980 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1982 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1984 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1986 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1987 sim-main.h. Declare a struct hw_descriptor instead of struct
1988 hw_device_descriptor.
1990 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1992 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1993 right bits and then re-align left hand bytes to correct byte
1994 lanes. Fix incorrect computation in do_store_left when loading
1995 bytes from second word.
1997 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1999 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2000 * interp.c (sim_open): Only create a device tree when HW is
2003 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2004 * interp.c (signal_exception): Ditto.
2006 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2008 * gencode.c: Mark BEGEZALL as LIKELY.
2010 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2012 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2013 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2015 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2017 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2018 modules. Recognize TX39 target with "mips*tx39" pattern.
2019 * configure: Rebuilt.
2020 * sim-main.h (*): Added many macros defining bits in
2021 TX39 control registers.
2022 (SignalInterrupt): Send actual PC instead of NULL.
2023 (SignalNMIReset): New exception type.
2024 * interp.c (board): New variable for future use to identify
2025 a particular board being simulated.
2026 (mips_option_handler,mips_options): Added "--board" option.
2027 (interrupt_event): Send actual PC.
2028 (sim_open): Make memory layout conditional on board setting.
2029 (signal_exception): Initial implementation of hardware interrupt
2030 handling. Accept another break instruction variant for simulator
2032 (decode_coproc): Implement RFE instruction for TX39.
2033 (mips.igen): Decode RFE instruction as such.
2034 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2035 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2036 bbegin to implement memory map.
2037 * dv-tx3904cpu.c: New file.
2038 * dv-tx3904irc.c: New file.
2040 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2042 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2044 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2046 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2047 with calls to check_div_hilo.
2049 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2051 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2052 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2053 Add special r3900 version of do_mult_hilo.
2054 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2055 with calls to check_mult_hilo.
2056 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2057 with calls to check_div_hilo.
2059 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2061 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2062 Document a replacement.
2064 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2066 * interp.c (sim_monitor): Make mon_printf work.
2068 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2070 * sim-main.h (INSN_NAME): New arg `cpu'.
2072 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2074 * configure: Regenerated to track ../common/aclocal.m4 changes.
2076 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2078 * configure: Regenerated to track ../common/aclocal.m4 changes.
2081 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2083 * acconfig.h: New file.
2084 * configure.in: Reverted change of Apr 24; use sinclude again.
2086 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2088 * configure: Regenerated to track ../common/aclocal.m4 changes.
2091 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2093 * configure.in: Don't call sinclude.
2095 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2097 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2099 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2101 * mips.igen (ERET): Implement.
2103 * interp.c (decode_coproc): Return sign-extended EPC.
2105 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2107 * interp.c (signal_exception): Do not ignore Trap.
2108 (signal_exception): On TRAP, restart at exception address.
2109 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2110 (signal_exception): Update.
2111 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2112 so that TRAP instructions are caught.
2114 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2116 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2117 contains HI/LO access history.
2118 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2119 (HIACCESS, LOACCESS): Delete, replace with
2120 (HIHISTORY, LOHISTORY): New macros.
2121 (CHECKHILO): Delete all, moved to mips.igen
2123 * gencode.c (build_instruction): Do not generate checks for
2124 correct HI/LO register usage.
2126 * interp.c (old_engine_run): Delete checks for correct HI/LO
2129 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2130 check_mf_cycles): New functions.
2131 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2132 do_divu, domultx, do_mult, do_multu): Use.
2134 * tx.igen ("madd", "maddu"): Use.
2136 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2138 * mips.igen (DSRAV): Use function do_dsrav.
2139 (SRAV): Use new function do_srav.
2141 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2142 (B): Sign extend 11 bit immediate.
2143 (EXT-B*): Shift 16 bit immediate left by 1.
2144 (ADDIU*): Don't sign extend immediate value.
2146 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2150 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2153 * mips.igen (delayslot32, nullify_next_insn): New functions.
2154 (m16.igen): Always include.
2155 (do_*): Add more tracing.
2157 * m16.igen (delayslot16): Add NIA argument, could be called by a
2158 32 bit MIPS16 instruction.
2160 * interp.c (ifetch16): Move function from here.
2161 * sim-main.c (ifetch16): To here.
2163 * sim-main.c (ifetch16, ifetch32): Update to match current
2164 implementations of LH, LW.
2165 (signal_exception): Don't print out incorrect hex value of illegal
2168 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2170 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2173 * m16.igen: Implement MIPS16 instructions.
2175 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2176 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2177 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2178 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2179 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2180 bodies of corresponding code from 32 bit insn to these. Also used
2181 by MIPS16 versions of functions.
2183 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2184 (IMEM16): Drop NR argument from macro.
2186 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2188 * Makefile.in (SIM_OBJS): Add sim-main.o.
2190 * sim-main.h (address_translation, load_memory, store_memory,
2191 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2193 (pr_addr, pr_uword64): Declare.
2194 (sim-main.c): Include when H_REVEALS_MODULE_P.
2196 * interp.c (address_translation, load_memory, store_memory,
2197 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2199 * sim-main.c: To here. Fix compilation problems.
2201 * configure.in: Enable inlining.
2202 * configure: Re-config.
2204 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2206 * configure: Regenerated to track ../common/aclocal.m4 changes.
2208 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2210 * mips.igen: Include tx.igen.
2211 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2212 * tx.igen: New file, contains MADD and MADDU.
2214 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2215 the hardwired constant `7'.
2216 (store_memory): Ditto.
2217 (LOADDRMASK): Move definition to sim-main.h.
2219 mips.igen (MTC0): Enable for r3900.
2222 mips.igen (do_load_byte): Delete.
2223 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2224 do_store_right): New functions.
2225 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2227 configure.in: Let the tx39 use igen again.
2230 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2232 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2233 not an address sized quantity. Return zero for cache sizes.
2235 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2237 * mips.igen (r3900): r3900 does not support 64 bit integer
2240 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2242 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2244 * configure : Rebuild.
2246 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2248 * configure: Regenerated to track ../common/aclocal.m4 changes.
2250 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2252 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2254 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2256 * configure: Regenerated to track ../common/aclocal.m4 changes.
2257 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2259 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2261 * configure: Regenerated to track ../common/aclocal.m4 changes.
2263 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2265 * interp.c (Max, Min): Comment out functions. Not yet used.
2267 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2269 * configure: Regenerated to track ../common/aclocal.m4 changes.
2271 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2273 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2274 configurable settings for stand-alone simulator.
2276 * configure.in: Added X11 search, just in case.
2278 * configure: Regenerated.
2280 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2282 * interp.c (sim_write, sim_read, load_memory, store_memory):
2283 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2285 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2287 * sim-main.h (GETFCC): Return an unsigned value.
2289 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2291 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2292 (DADD): Result destination is RD not RT.
2294 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2296 * sim-main.h (HIACCESS, LOACCESS): Always define.
2298 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2300 * interp.c (sim_info): Delete.
2302 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2304 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2305 (mips_option_handler): New argument `cpu'.
2306 (sim_open): Update call to sim_add_option_table.
2308 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2310 * mips.igen (CxC1): Add tracing.
2312 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2314 * sim-main.h (Max, Min): Declare.
2316 * interp.c (Max, Min): New functions.
2318 * mips.igen (BC1): Add tracing.
2320 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2322 * interp.c Added memory map for stack in vr4100
2324 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2326 * interp.c (load_memory): Add missing "break"'s.
2328 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2330 * interp.c (sim_store_register, sim_fetch_register): Pass in
2331 length parameter. Return -1.
2333 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2335 * interp.c: Added hardware init hook, fixed warnings.
2337 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2339 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2341 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2343 * interp.c (ifetch16): New function.
2345 * sim-main.h (IMEM32): Rename IMEM.
2346 (IMEM16_IMMED): Define.
2348 (DELAY_SLOT): Update.
2350 * m16run.c (sim_engine_run): New file.
2352 * m16.igen: All instructions except LB.
2353 (LB): Call do_load_byte.
2354 * mips.igen (do_load_byte): New function.
2355 (LB): Call do_load_byte.
2357 * mips.igen: Move spec for insn bit size and high bit from here.
2358 * Makefile.in (tmp-igen, tmp-m16): To here.
2360 * m16.dc: New file, decode mips16 instructions.
2362 * Makefile.in (SIM_NO_ALL): Define.
2363 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2365 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2367 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2368 point unit to 32 bit registers.
2369 * configure: Re-generate.
2371 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2373 * configure.in (sim_use_gen): Make IGEN the default simulator
2374 generator for generic 32 and 64 bit mips targets.
2375 * configure: Re-generate.
2377 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2379 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2382 * interp.c (sim_fetch_register, sim_store_register): Read/write
2383 FGR from correct location.
2384 (sim_open): Set size of FGR's according to
2385 WITH_TARGET_FLOATING_POINT_BITSIZE.
2387 * sim-main.h (FGR): Store floating point registers in a separate
2390 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2392 * configure: Regenerated to track ../common/aclocal.m4 changes.
2394 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2396 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2398 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2400 * interp.c (pending_tick): New function. Deliver pending writes.
2402 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2403 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2404 it can handle mixed sized quantites and single bits.
2406 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2408 * interp.c (oengine.h): Do not include when building with IGEN.
2409 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2410 (sim_info): Ditto for PROCESSOR_64BIT.
2411 (sim_monitor): Replace ut_reg with unsigned_word.
2412 (*): Ditto for t_reg.
2413 (LOADDRMASK): Define.
2414 (sim_open): Remove defunct check that host FP is IEEE compliant,
2415 using software to emulate floating point.
2416 (value_fpr, ...): Always compile, was conditional on HASFPU.
2418 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2420 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2423 * interp.c (SD, CPU): Define.
2424 (mips_option_handler): Set flags in each CPU.
2425 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2426 (sim_close): Do not clear STATE, deleted anyway.
2427 (sim_write, sim_read): Assume CPU zero's vm should be used for
2429 (sim_create_inferior): Set the PC for all processors.
2430 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2432 (mips16_entry): Pass correct nr of args to store_word, load_word.
2433 (ColdReset): Cold reset all cpu's.
2434 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2435 (sim_monitor, load_memory, store_memory, signal_exception): Use
2436 `CPU' instead of STATE_CPU.
2439 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2442 * sim-main.h (signal_exception): Add sim_cpu arg.
2443 (SignalException*): Pass both SD and CPU to signal_exception.
2444 * interp.c (signal_exception): Update.
2446 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2448 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2449 address_translation): Ditto
2450 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2452 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2454 * configure: Regenerated to track ../common/aclocal.m4 changes.
2456 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2458 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2460 * mips.igen (model): Map processor names onto BFD name.
2462 * sim-main.h (CPU_CIA): Delete.
2463 (SET_CIA, GET_CIA): Define
2465 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2467 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2470 * configure.in (default_endian): Configure a big-endian simulator
2472 * configure: Re-generate.
2474 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2476 * configure: Regenerated to track ../common/aclocal.m4 changes.
2478 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2480 * interp.c (sim_monitor): Handle Densan monitor outbyte
2481 and inbyte functions.
2483 1997-12-29 Felix Lee <flee@cygnus.com>
2485 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2487 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2489 * Makefile.in (tmp-igen): Arrange for $zero to always be
2490 reset to zero after every instruction.
2492 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2494 * configure: Regenerated to track ../common/aclocal.m4 changes.
2497 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2499 * mips.igen (MSUB): Fix to work like MADD.
2500 * gencode.c (MSUB): Similarly.
2502 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2504 * configure: Regenerated to track ../common/aclocal.m4 changes.
2506 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2508 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2510 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2512 * sim-main.h (sim-fpu.h): Include.
2514 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2515 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2516 using host independant sim_fpu module.
2518 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2520 * interp.c (signal_exception): Report internal errors with SIGABRT
2523 * sim-main.h (C0_CONFIG): New register.
2524 (signal.h): No longer include.
2526 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2528 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2530 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2532 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2534 * mips.igen: Tag vr5000 instructions.
2535 (ANDI): Was missing mipsIV model, fix assembler syntax.
2536 (do_c_cond_fmt): New function.
2537 (C.cond.fmt): Handle mips I-III which do not support CC field
2539 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2540 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2542 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2543 vr5000 which saves LO in a GPR separatly.
2545 * configure.in (enable-sim-igen): For vr5000, select vr5000
2546 specific instructions.
2547 * configure: Re-generate.
2549 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2551 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2553 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2554 fmt_uninterpreted_64 bit cases to switch. Convert to
2557 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2559 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2560 as specified in IV3.2 spec.
2561 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2563 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2565 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2566 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2567 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2568 PENDING_FILL versions of instructions. Simplify.
2570 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2572 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2574 (MTHI, MFHI): Disable code checking HI-LO.
2576 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2578 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2580 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2582 * gencode.c (build_mips16_operands): Replace IPC with cia.
2584 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2585 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2587 (UndefinedResult): Replace function with macro/function
2589 (sim_engine_run): Don't save PC in IPC.
2591 * sim-main.h (IPC): Delete.
2594 * interp.c (signal_exception, store_word, load_word,
2595 address_translation, load_memory, store_memory, cache_op,
2596 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2597 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2598 current instruction address - cia - argument.
2599 (sim_read, sim_write): Call address_translation directly.
2600 (sim_engine_run): Rename variable vaddr to cia.
2601 (signal_exception): Pass cia to sim_monitor
2603 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2604 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2605 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2607 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2608 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2611 * interp.c (signal_exception): Pass restart address to
2614 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2615 idecode.o): Add dependency.
2617 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2619 (DELAY_SLOT): Update NIA not PC with branch address.
2620 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2622 * mips.igen: Use CIA not PC in branch calculations.
2623 (illegal): Call SignalException.
2624 (BEQ, ADDIU): Fix assembler.
2626 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2628 * m16.igen (JALX): Was missing.
2630 * configure.in (enable-sim-igen): New configuration option.
2631 * configure: Re-generate.
2633 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2635 * interp.c (load_memory, store_memory): Delete parameter RAW.
2636 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2637 bypassing {load,store}_memory.
2639 * sim-main.h (ByteSwapMem): Delete definition.
2641 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2643 * interp.c (sim_do_command, sim_commands): Delete mips specific
2644 commands. Handled by module sim-options.
2646 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2647 (WITH_MODULO_MEMORY): Define.
2649 * interp.c (sim_info): Delete code printing memory size.
2651 * interp.c (mips_size): Nee sim_size, delete function.
2653 (monitor, monitor_base, monitor_size): Delete global variables.
2654 (sim_open, sim_close): Delete code creating monitor and other
2655 memory regions. Use sim-memopts module, via sim_do_commandf, to
2656 manage memory regions.
2657 (load_memory, store_memory): Use sim-core for memory model.
2659 * interp.c (address_translation): Delete all memory map code
2660 except line forcing 32 bit addresses.
2662 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2664 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2667 * interp.c (logfh, logfile): Delete globals.
2668 (sim_open, sim_close): Delete code opening & closing log file.
2669 (mips_option_handler): Delete -l and -n options.
2670 (OPTION mips_options): Ditto.
2672 * interp.c (OPTION mips_options): Rename option trace to dinero.
2673 (mips_option_handler): Update.
2675 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2677 * interp.c (fetch_str): New function.
2678 (sim_monitor): Rewrite using sim_read & sim_write.
2679 (sim_open): Check magic number.
2680 (sim_open): Write monitor vectors into memory using sim_write.
2681 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2682 (sim_read, sim_write): Simplify - transfer data one byte at a
2684 (load_memory, store_memory): Clarify meaning of parameter RAW.
2686 * sim-main.h (isHOST): Defete definition.
2687 (isTARGET): Mark as depreciated.
2688 (address_translation): Delete parameter HOST.
2690 * interp.c (address_translation): Delete parameter HOST.
2692 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2696 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2697 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2699 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2701 * mips.igen: Add model filter field to records.
2703 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2705 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2707 interp.c (sim_engine_run): Do not compile function sim_engine_run
2708 when WITH_IGEN == 1.
2710 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2711 target architecture.
2713 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2714 igen. Replace with configuration variables sim_igen_flags /
2717 * m16.igen: New file. Copy mips16 insns here.
2718 * mips.igen: From here.
2720 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2722 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2724 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2726 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2728 * gencode.c (build_instruction): Follow sim_write's lead in using
2729 BigEndianMem instead of !ByteSwapMem.
2731 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2733 * configure.in (sim_gen): Dependent on target, select type of
2734 generator. Always select old style generator.
2736 configure: Re-generate.
2738 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2740 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2741 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2742 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2743 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2744 SIM_@sim_gen@_*, set by autoconf.
2746 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2748 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2750 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2751 CURRENT_FLOATING_POINT instead.
2753 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2754 (address_translation): Raise exception InstructionFetch when
2755 translation fails and isINSTRUCTION.
2757 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2758 sim_engine_run): Change type of of vaddr and paddr to
2760 (address_translation, prefetch, load_memory, store_memory,
2761 cache_op): Change type of vAddr and pAddr to address_word.
2763 * gencode.c (build_instruction): Change type of vaddr and paddr to
2766 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2768 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2769 macro to obtain result of ALU op.
2771 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2773 * interp.c (sim_info): Call profile_print.
2775 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2777 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2779 * sim-main.h (WITH_PROFILE): Do not define, defined in
2780 common/sim-config.h. Use sim-profile module.
2781 (simPROFILE): Delete defintion.
2783 * interp.c (PROFILE): Delete definition.
2784 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2785 (sim_close): Delete code writing profile histogram.
2786 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2788 (sim_engine_run): Delete code profiling the PC.
2790 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2792 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2794 * interp.c (sim_monitor): Make register pointers of type
2797 * sim-main.h: Make registers of type unsigned_word not
2800 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2802 * interp.c (sync_operation): Rename from SyncOperation, make
2803 global, add SD argument.
2804 (prefetch): Rename from Prefetch, make global, add SD argument.
2805 (decode_coproc): Make global.
2807 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2809 * gencode.c (build_instruction): Generate DecodeCoproc not
2810 decode_coproc calls.
2812 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2813 (SizeFGR): Move to sim-main.h
2814 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2815 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2816 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2818 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2819 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2820 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2821 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2822 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2823 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2825 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2827 (sim-alu.h): Include.
2828 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2829 (sim_cia): Typedef to instruction_address.
2831 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2833 * Makefile.in (interp.o): Rename generated file engine.c to
2838 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2840 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2842 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2844 * gencode.c (build_instruction): For "FPSQRT", output correct
2845 number of arguments to Recip.
2847 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2849 * Makefile.in (interp.o): Depends on sim-main.h
2851 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2853 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2854 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2855 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2856 STATE, DSSTATE): Define
2857 (GPR, FGRIDX, ..): Define.
2859 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2860 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2861 (GPR, FGRIDX, ...): Delete macros.
2863 * interp.c: Update names to match defines from sim-main.h
2865 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * interp.c (sim_monitor): Add SD argument.
2868 (sim_warning): Delete. Replace calls with calls to
2870 (sim_error): Delete. Replace calls with sim_io_error.
2871 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2872 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2873 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2875 (mips_size): Rename from sim_size. Add SD argument.
2877 * interp.c (simulator): Delete global variable.
2878 (callback): Delete global variable.
2879 (mips_option_handler, sim_open, sim_write, sim_read,
2880 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2881 sim_size,sim_monitor): Use sim_io_* not callback->*.
2882 (sim_open): ZALLOC simulator struct.
2883 (PROFILE): Do not define.
2885 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2887 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2888 support.h with corresponding code.
2890 * sim-main.h (word64, uword64), support.h: Move definition to
2892 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2895 * Makefile.in: Update dependencies
2896 * interp.c: Do not include.
2898 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2900 * interp.c (address_translation, load_memory, store_memory,
2901 cache_op): Rename to from AddressTranslation et.al., make global,
2904 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2907 * interp.c (SignalException): Rename to signal_exception, make
2910 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2912 * sim-main.h (SignalException, SignalExceptionInterrupt,
2913 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2914 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2915 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2918 * interp.c, support.h: Use.
2920 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2922 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2923 to value_fpr / store_fpr. Add SD argument.
2924 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2925 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2927 * sim-main.h (ValueFPR, StoreFPR): Define.
2929 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2931 * interp.c (sim_engine_run): Check consistency between configure
2932 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2935 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2936 (mips_fpu): Configure WITH_FLOATING_POINT.
2937 (mips_endian): Configure WITH_TARGET_ENDIAN.
2938 * configure: Update.
2940 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2942 * configure: Regenerated to track ../common/aclocal.m4 changes.
2944 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2946 * configure: Regenerated.
2948 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2950 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2952 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2954 * gencode.c (print_igen_insn_models): Assume certain architectures
2955 include all mips* instructions.
2956 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2959 * Makefile.in (tmp.igen): Add target. Generate igen input from
2962 * gencode.c (FEATURE_IGEN): Define.
2963 (main): Add --igen option. Generate output in igen format.
2964 (process_instructions): Format output according to igen option.
2965 (print_igen_insn_format): New function.
2966 (print_igen_insn_models): New function.
2967 (process_instructions): Only issue warnings and ignore
2968 instructions when no FEATURE_IGEN.
2970 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2972 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2975 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2977 * configure: Regenerated to track ../common/aclocal.m4 changes.
2979 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2981 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2982 SIM_RESERVED_BITS): Delete, moved to common.
2983 (SIM_EXTRA_CFLAGS): Update.
2985 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2987 * configure.in: Configure non-strict memory alignment.
2988 * configure: Regenerated to track ../common/aclocal.m4 changes.
2990 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2992 * configure: Regenerated to track ../common/aclocal.m4 changes.
2994 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2996 * gencode.c (SDBBP,DERET): Added (3900) insns.
2997 (RFE): Turn on for 3900.
2998 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2999 (dsstate): Made global.
3000 (SUBTARGET_R3900): Added.
3001 (CANCELDELAYSLOT): New.
3002 (SignalException): Ignore SystemCall rather than ignore and
3003 terminate. Add DebugBreakPoint handling.
3004 (decode_coproc): New insns RFE, DERET; and new registers Debug
3005 and DEPC protected by SUBTARGET_R3900.
3006 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3008 * Makefile.in,configure.in: Add mips subtarget option.
3009 * configure: Update.
3011 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3013 * gencode.c: Add r3900 (tx39).
3016 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3018 * gencode.c (build_instruction): Don't need to subtract 4 for
3021 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3023 * interp.c: Correct some HASFPU problems.
3025 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3027 * configure: Regenerated to track ../common/aclocal.m4 changes.
3029 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3031 * interp.c (mips_options): Fix samples option short form, should
3034 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3036 * interp.c (sim_info): Enable info code. Was just returning.
3038 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3040 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3043 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3045 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3047 (build_instruction): Ditto for LL.
3049 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3051 * configure: Regenerated to track ../common/aclocal.m4 changes.
3053 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3055 * configure: Regenerated to track ../common/aclocal.m4 changes.
3058 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3060 * interp.c (sim_open): Add call to sim_analyze_program, update
3063 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3065 * interp.c (sim_kill): Delete.
3066 (sim_create_inferior): Add ABFD argument. Set PC from same.
3067 (sim_load): Move code initializing trap handlers from here.
3068 (sim_open): To here.
3069 (sim_load): Delete, use sim-hload.c.
3071 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3073 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3075 * configure: Regenerated to track ../common/aclocal.m4 changes.
3078 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3080 * interp.c (sim_open): Add ABFD argument.
3081 (sim_load): Move call to sim_config from here.
3082 (sim_open): To here. Check return status.
3084 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3086 * gencode.c (build_instruction): Two arg MADD should
3087 not assign result to $0.
3089 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3091 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3092 * sim/mips/configure.in: Regenerate.
3094 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3096 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3097 signed8, unsigned8 et.al. types.
3099 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3100 hosts when selecting subreg.
3102 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3104 * interp.c (sim_engine_run): Reset the ZERO register to zero
3105 regardless of FEATURE_WARN_ZERO.
3106 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3108 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3110 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3111 (SignalException): For BreakPoints ignore any mode bits and just
3113 (SignalException): Always set the CAUSE register.
3115 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3117 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3118 exception has been taken.
3120 * interp.c: Implement the ERET and mt/f sr instructions.
3122 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3124 * interp.c (SignalException): Don't bother restarting an
3127 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3129 * interp.c (SignalException): Really take an interrupt.
3130 (interrupt_event): Only deliver interrupts when enabled.
3132 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3134 * interp.c (sim_info): Only print info when verbose.
3135 (sim_info) Use sim_io_printf for output.
3137 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3139 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3142 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3144 * interp.c (sim_do_command): Check for common commands if a
3145 simulator specific command fails.
3147 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3149 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3150 and simBE when DEBUG is defined.
3152 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3154 * interp.c (interrupt_event): New function. Pass exception event
3155 onto exception handler.
3157 * configure.in: Check for stdlib.h.
3158 * configure: Regenerate.
3160 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3161 variable declaration.
3162 (build_instruction): Initialize memval1.
3163 (build_instruction): Add UNUSED attribute to byte, bigend,
3165 (build_operands): Ditto.
3167 * interp.c: Fix GCC warnings.
3168 (sim_get_quit_code): Delete.
3170 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3171 * Makefile.in: Ditto.
3172 * configure: Re-generate.
3174 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3176 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3178 * interp.c (mips_option_handler): New function parse argumes using
3180 (myname): Replace with STATE_MY_NAME.
3181 (sim_open): Delete check for host endianness - performed by
3183 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3184 (sim_open): Move much of the initialization from here.
3185 (sim_load): To here. After the image has been loaded and
3187 (sim_open): Move ColdReset from here.
3188 (sim_create_inferior): To here.
3189 (sim_open): Make FP check less dependant on host endianness.
3191 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3193 * interp.c (sim_set_callbacks): Delete.
3195 * interp.c (membank, membank_base, membank_size): Replace with
3196 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3197 (sim_open): Remove call to callback->init. gdb/run do this.
3201 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3203 * interp.c (big_endian_p): Delete, replaced by
3204 current_target_byte_order.
3206 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3208 * interp.c (host_read_long, host_read_word, host_swap_word,
3209 host_swap_long): Delete. Using common sim-endian.
3210 (sim_fetch_register, sim_store_register): Use H2T.
3211 (pipeline_ticks): Delete. Handled by sim-events.
3213 (sim_engine_run): Update.
3215 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3217 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3219 (SignalException): To here. Signal using sim_engine_halt.
3220 (sim_stop_reason): Delete, moved to common.
3222 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3224 * interp.c (sim_open): Add callback argument.
3225 (sim_set_callbacks): Delete SIM_DESC argument.
3228 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3230 * Makefile.in (SIM_OBJS): Add common modules.
3232 * interp.c (sim_set_callbacks): Also set SD callback.
3233 (set_endianness, xfer_*, swap_*): Delete.
3234 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3235 Change to functions using sim-endian macros.
3236 (control_c, sim_stop): Delete, use common version.
3237 (simulate): Convert into.
3238 (sim_engine_run): This function.
3239 (sim_resume): Delete.
3241 * interp.c (simulation): New variable - the simulator object.
3242 (sim_kind): Delete global - merged into simulation.
3243 (sim_load): Cleanup. Move PC assignment from here.
3244 (sim_create_inferior): To here.
3246 * sim-main.h: New file.
3247 * interp.c (sim-main.h): Include.
3249 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3251 * configure: Regenerated to track ../common/aclocal.m4 changes.
3253 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3255 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3257 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3259 * gencode.c (build_instruction): DIV instructions: check
3260 for division by zero and integer overflow before using
3261 host's division operation.
3263 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3265 * Makefile.in (SIM_OBJS): Add sim-load.o.
3266 * interp.c: #include bfd.h.
3267 (target_byte_order): Delete.
3268 (sim_kind, myname, big_endian_p): New static locals.
3269 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3270 after argument parsing. Recognize -E arg, set endianness accordingly.
3271 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3272 load file into simulator. Set PC from bfd.
3273 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3274 (set_endianness): Use big_endian_p instead of target_byte_order.
3276 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3278 * interp.c (sim_size): Delete prototype - conflicts with
3279 definition in remote-sim.h. Correct definition.
3281 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3283 * configure: Regenerated to track ../common/aclocal.m4 changes.
3286 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3288 * interp.c (sim_open): New arg `kind'.
3290 * configure: Regenerated to track ../common/aclocal.m4 changes.
3292 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3294 * configure: Regenerated to track ../common/aclocal.m4 changes.
3296 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3298 * interp.c (sim_open): Set optind to 0 before calling getopt.
3300 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3302 * configure: Regenerated to track ../common/aclocal.m4 changes.
3304 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3306 * interp.c : Replace uses of pr_addr with pr_uword64
3307 where the bit length is always 64 independent of SIM_ADDR.
3308 (pr_uword64) : added.
3310 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3312 * configure: Re-generate.
3314 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3316 * configure: Regenerate to track ../common/aclocal.m4 changes.
3318 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3320 * interp.c (sim_open): New SIM_DESC result. Argument is now
3322 (other sim_*): New SIM_DESC argument.
3324 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3326 * interp.c: Fix printing of addresses for non-64-bit targets.
3327 (pr_addr): Add function to print address based on size.
3329 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3331 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3333 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3335 * gencode.c (build_mips16_operands): Correct computation of base
3336 address for extended PC relative instruction.
3338 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3340 * interp.c (mips16_entry): Add support for floating point cases.
3341 (SignalException): Pass floating point cases to mips16_entry.
3342 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3344 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3346 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3347 and then set the state to fmt_uninterpreted.
3348 (COP_SW): Temporarily set the state to fmt_word while calling
3351 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3353 * gencode.c (build_instruction): The high order may be set in the
3354 comparison flags at any ISA level, not just ISA 4.
3356 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3358 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3359 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3360 * configure.in: sinclude ../common/aclocal.m4.
3361 * configure: Regenerated.
3363 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3365 * configure: Rebuild after change to aclocal.m4.
3367 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3369 * configure configure.in Makefile.in: Update to new configure
3370 scheme which is more compatible with WinGDB builds.
3371 * configure.in: Improve comment on how to run autoconf.
3372 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3373 * Makefile.in: Use autoconf substitution to install common
3376 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3378 * gencode.c (build_instruction): Use BigEndianCPU instead of
3381 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3383 * interp.c (sim_monitor): Make output to stdout visible in
3384 wingdb's I/O log window.
3386 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3388 * support.h: Undo previous change to SIGTRAP
3391 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3393 * interp.c (store_word, load_word): New static functions.
3394 (mips16_entry): New static function.
3395 (SignalException): Look for mips16 entry and exit instructions.
3396 (simulate): Use the correct index when setting fpr_state after
3397 doing a pending move.
3399 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3401 * interp.c: Fix byte-swapping code throughout to work on
3402 both little- and big-endian hosts.
3404 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3406 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3407 with gdb/config/i386/xm-windows.h.
3409 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3411 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3412 that messes up arithmetic shifts.
3414 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3416 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3417 SIGTRAP and SIGQUIT for _WIN32.
3419 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3421 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3422 force a 64 bit multiplication.
3423 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3424 destination register is 0, since that is the default mips16 nop
3427 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3429 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3430 (build_endian_shift): Don't check proc64.
3431 (build_instruction): Always set memval to uword64. Cast op2 to
3432 uword64 when shifting it left in memory instructions. Always use
3433 the same code for stores--don't special case proc64.
3435 * gencode.c (build_mips16_operands): Fix base PC value for PC
3437 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3439 * interp.c (simJALDELAYSLOT): Define.
3440 (JALDELAYSLOT): Define.
3441 (INDELAYSLOT, INJALDELAYSLOT): Define.
3442 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3444 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3446 * interp.c (sim_open): add flush_cache as a PMON routine
3447 (sim_monitor): handle flush_cache by ignoring it
3449 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3451 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3453 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3454 (BigEndianMem): Rename to ByteSwapMem and change sense.
3455 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3456 BigEndianMem references to !ByteSwapMem.
3457 (set_endianness): New function, with prototype.
3458 (sim_open): Call set_endianness.
3459 (sim_info): Use simBE instead of BigEndianMem.
3460 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3461 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3462 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3463 ifdefs, keeping the prototype declaration.
3464 (swap_word): Rewrite correctly.
3465 (ColdReset): Delete references to CONFIG. Delete endianness related
3466 code; moved to set_endianness.
3468 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3470 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3471 * interp.c (CHECKHILO): Define away.
3472 (simSIGINT): New macro.
3473 (membank_size): Increase from 1MB to 2MB.
3474 (control_c): New function.
3475 (sim_resume): Rename parameter signal to signal_number. Add local
3476 variable prev. Call signal before and after simulate.
3477 (sim_stop_reason): Add simSIGINT support.
3478 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3480 (sim_warning): Delete call to SignalException. Do call printf_filtered
3482 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3483 a call to sim_warning.
3485 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3487 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3488 16 bit instructions.
3490 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3492 Add support for mips16 (16 bit MIPS implementation):
3493 * gencode.c (inst_type): Add mips16 instruction encoding types.
3494 (GETDATASIZEINSN): Define.
3495 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3496 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3498 (MIPS16_DECODE): New table, for mips16 instructions.
3499 (bitmap_val): New static function.
3500 (struct mips16_op): Define.
3501 (mips16_op_table): New table, for mips16 operands.
3502 (build_mips16_operands): New static function.
3503 (process_instructions): If PC is odd, decode a mips16
3504 instruction. Break out instruction handling into new
3505 build_instruction function.
3506 (build_instruction): New static function, broken out of
3507 process_instructions. Check modifiers rather than flags for SHIFT
3508 bit count and m[ft]{hi,lo} direction.
3509 (usage): Pass program name to fprintf.
3510 (main): Remove unused variable this_option_optind. Change
3511 ``*loptarg++'' to ``loptarg++''.
3512 (my_strtoul): Parenthesize && within ||.
3513 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3514 (simulate): If PC is odd, fetch a 16 bit instruction, and
3515 increment PC by 2 rather than 4.
3516 * configure.in: Add case for mips16*-*-*.
3517 * configure: Rebuild.
3519 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3521 * interp.c: Allow -t to enable tracing in standalone simulator.
3522 Fix garbage output in trace file and error messages.
3524 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3526 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3527 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3528 * configure.in: Simplify using macros in ../common/aclocal.m4.
3529 * configure: Regenerated.
3530 * tconfig.in: New file.
3532 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3534 * interp.c: Fix bugs in 64-bit port.
3535 Use ansi function declarations for msvc compiler.
3536 Initialize and test file pointer in trace code.
3537 Prevent duplicate definition of LAST_EMED_REGNUM.
3539 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3541 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3543 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3545 * interp.c (SignalException): Check for explicit terminating
3547 * gencode.c: Pass instruction value through SignalException()
3548 calls for Trap, Breakpoint and Syscall.
3550 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3552 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3553 only used on those hosts that provide it.
3554 * configure.in: Add sqrt() to list of functions to be checked for.
3555 * config.in: Re-generated.
3556 * configure: Re-generated.
3558 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3560 * gencode.c (process_instructions): Call build_endian_shift when
3561 expanding STORE RIGHT, to fix swr.
3562 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3563 clear the high bits.
3564 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3565 Fix float to int conversions to produce signed values.
3567 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3569 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3570 (process_instructions): Correct handling of nor instruction.
3571 Correct shift count for 32 bit shift instructions. Correct sign
3572 extension for arithmetic shifts to not shift the number of bits in
3573 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3574 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3576 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3577 It's OK to have a mult follow a mult. What's not OK is to have a
3578 mult follow an mfhi.
3579 (Convert): Comment out incorrect rounding code.
3581 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3583 * interp.c (sim_monitor): Improved monitor printf
3584 simulation. Tidied up simulator warnings, and added "--log" option
3585 for directing warning message output.
3586 * gencode.c: Use sim_warning() rather than WARNING macro.
3588 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3590 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3591 getopt1.o, rather than on gencode.c. Link objects together.
3592 Don't link against -liberty.
3593 (gencode.o, getopt.o, getopt1.o): New targets.
3594 * gencode.c: Include <ctype.h> and "ansidecl.h".
3595 (AND): Undefine after including "ansidecl.h".
3596 (ULONG_MAX): Define if not defined.
3597 (OP_*): Don't define macros; now defined in opcode/mips.h.
3598 (main): Call my_strtoul rather than strtoul.
3599 (my_strtoul): New static function.
3601 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3603 * gencode.c (process_instructions): Generate word64 and uword64
3604 instead of `long long' and `unsigned long long' data types.
3605 * interp.c: #include sysdep.h to get signals, and define default
3607 * (Convert): Work around for Visual-C++ compiler bug with type
3609 * support.h: Make things compile under Visual-C++ by using
3610 __int64 instead of `long long'. Change many refs to long long
3611 into word64/uword64 typedefs.
3613 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3615 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3616 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3618 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3619 (AC_PROG_INSTALL): Added.
3620 (AC_PROG_CC): Moved to before configure.host call.
3621 * configure: Rebuilt.
3623 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3625 * configure.in: Define @SIMCONF@ depending on mips target.
3626 * configure: Rebuild.
3627 * Makefile.in (run): Add @SIMCONF@ to control simulator
3629 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3630 * interp.c: Remove some debugging, provide more detailed error
3631 messages, update memory accesses to use LOADDRMASK.
3633 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3635 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3636 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3638 * configure: Rebuild.
3639 * config.in: New file, generated by autoheader.
3640 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3641 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3642 HAVE_ANINT and HAVE_AINT, as appropriate.
3643 * Makefile.in (run): Use @LIBS@ rather than -lm.
3644 (interp.o): Depend upon config.h.
3645 (Makefile): Just rebuild Makefile.
3646 (clean): Remove stamp-h.
3647 (mostlyclean): Make the same as clean, not as distclean.
3648 (config.h, stamp-h): New targets.
3650 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3652 * interp.c (ColdReset): Fix boolean test. Make all simulator
3655 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3657 * interp.c (xfer_direct_word, xfer_direct_long,
3658 swap_direct_word, swap_direct_long, xfer_big_word,
3659 xfer_big_long, xfer_little_word, xfer_little_long,
3660 swap_word,swap_long): Added.
3661 * interp.c (ColdReset): Provide function indirection to
3662 host<->simulated_target transfer routines.
3663 * interp.c (sim_store_register, sim_fetch_register): Updated to
3664 make use of indirected transfer routines.
3666 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3668 * gencode.c (process_instructions): Ensure FP ABS instruction
3670 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3671 system call support.
3673 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3675 * interp.c (sim_do_command): Complain if callback structure not
3678 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3680 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3681 support for Sun hosts.
3682 * Makefile.in (gencode): Ensure the host compiler and libraries
3683 used for cross-hosted build.
3685 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3687 * interp.c, gencode.c: Some more (TODO) tidying.
3689 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3691 * gencode.c, interp.c: Replaced explicit long long references with
3692 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3693 * support.h (SET64LO, SET64HI): Macros added.
3695 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3697 * configure: Regenerate with autoconf 2.7.
3699 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3701 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3702 * support.h: Remove superfluous "1" from #if.
3703 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3705 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3707 * interp.c (StoreFPR): Control UndefinedResult() call on
3708 WARN_RESULT manifest.
3710 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3712 * gencode.c: Tidied instruction decoding, and added FP instruction
3715 * interp.c: Added dineroIII, and BSD profiling support. Also
3716 run-time FP handling.
3718 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3720 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3721 gencode.c, interp.c, support.h: created.