1 2015-12-30 Mike Frysinger <vapier@gentoo.org>
3 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
4 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
5 (sim_store_register): Rename to ...
6 (mips_reg_store): ... this. Delete local cpu var.
7 Update sim_io_eprintf calls.
8 (sim_fetch_register): Rename to ...
9 (mips_reg_fetch): ... this. Delete local cpu var.
10 Update sim_io_eprintf calls.
12 2015-12-27 Mike Frysinger <vapier@gentoo.org>
14 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
16 2015-12-26 Mike Frysinger <vapier@gentoo.org>
18 * config.in, configure: Regenerate.
20 2015-12-26 Mike Frysinger <vapier@gentoo.org>
22 * interp.c (sim_write, sim_read): Delete.
23 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
24 (load_word): Likewise.
25 * micromips.igen (cache): Likewise.
26 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
27 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
28 do_store_left, do_store_right, do_load_double, do_store_double):
30 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
32 * sim-main.c (address_translation, prefetch): Delete.
33 (ifetch32, ifetch16): Delete call to AddressTranslation and set
35 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
36 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
37 (LoadMemory, StoreMemory): Delete CCA arg.
39 2015-12-24 Mike Frysinger <vapier@gentoo.org>
41 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
42 * configure: Regenerated.
44 2015-12-24 Mike Frysinger <vapier@gentoo.org>
46 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
49 2015-12-24 Mike Frysinger <vapier@gentoo.org>
51 * tconfig.h (SIM_HANDLES_LMA): Delete.
53 2015-12-24 Mike Frysinger <vapier@gentoo.org>
55 * sim-main.h (WITH_WATCHPOINTS): Delete.
57 2015-12-24 Mike Frysinger <vapier@gentoo.org>
59 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
61 2015-12-24 Mike Frysinger <vapier@gentoo.org>
63 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
65 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
67 * micromips.igen (process_isa_mode): Fix left shift of negative
70 2015-11-17 Mike Frysinger <vapier@gentoo.org>
72 * sim-main.h (WITH_MODULO_MEMORY): Delete.
74 2015-11-15 Mike Frysinger <vapier@gentoo.org>
76 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
78 2015-11-14 Mike Frysinger <vapier@gentoo.org>
80 * interp.c (sim_close): Rename to ...
81 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
83 * sim-main.h (mips_sim_close): Declare.
84 (SIM_CLOSE_HOOK): Define.
86 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
87 Ali Lown <ali.lown@imgtec.com>
89 * Makefile.in (tmp-micromips): New rule.
90 (tmp-mach-multi): Add support for micromips.
91 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
92 that works for both mips64 and micromips64.
93 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
95 Add build support for micromips.
96 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
97 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
98 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
99 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
100 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
101 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
102 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
103 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
104 Refactored instruction code to use these functions.
105 * dsp2.igen: Refactored instruction code to use the new functions.
106 * interp.c (decode_coproc): Refactored to work with any instruction
108 (isa_mode): New variable
109 (RSVD_INSTRUCTION): Changed to 0x00000039.
110 * m16.igen (BREAK16): Refactored instruction to use do_break16.
111 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
112 * micromips.dc: New file.
113 * micromips.igen: New file.
114 * micromips16.dc: New file.
115 * micromipsdsp.igen: New file.
116 * micromipsrun.c: New file.
117 * mips.igen (do_swc1): Changed to work with any instruction encoding.
118 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
119 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
120 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
121 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
122 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
123 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
124 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
125 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
126 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
127 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
128 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
129 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
130 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
131 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
132 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
133 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
134 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
135 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
137 Refactored instruction code to use these functions.
138 (RSVD): Changed to use new reserved instruction.
139 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
140 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
141 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
142 do_store_double): Added micromips32 and micromips64 models.
143 Added include for micromips.igen and micromipsdsp.igen
144 Add micromips32 and micromips64 models.
145 (DecodeCoproc): Updated to use new macro definition.
146 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
147 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
148 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
149 Refactored instruction code to use these functions.
150 * sim-main.h (CP0_operation): New enum.
151 (DecodeCoproc): Updated macro.
152 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
153 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
154 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
155 ISA_MODE_MICROMIPS): New defines.
156 (sim_state): Add isa_mode field.
158 2015-06-23 Mike Frysinger <vapier@gentoo.org>
160 * configure: Regenerate.
162 2015-06-12 Mike Frysinger <vapier@gentoo.org>
164 * configure.ac: Change configure.in to configure.ac.
165 * configure: Regenerate.
167 2015-06-12 Mike Frysinger <vapier@gentoo.org>
169 * configure: Regenerate.
171 2015-06-12 Mike Frysinger <vapier@gentoo.org>
173 * interp.c [TRACE]: Delete.
174 (TRACE): Change to WITH_TRACE_ANY_P.
175 [!WITH_TRACE_ANY_P] (open_trace): Define.
176 (mips_option_handler, open_trace, sim_close, dotrace):
177 Change defined(TRACE) to WITH_TRACE_ANY_P.
178 (sim_open): Delete TRACE ifdef check.
179 * sim-main.c (load_memory): Delete TRACE ifdef check.
180 (store_memory): Likewise.
181 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
182 [!WITH_TRACE_ANY_P] (dotrace): Define.
184 2015-04-18 Mike Frysinger <vapier@gentoo.org>
186 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
189 2015-04-18 Mike Frysinger <vapier@gentoo.org>
191 * sim-main.h (SIM_CPU): Delete.
193 2015-04-18 Mike Frysinger <vapier@gentoo.org>
195 * sim-main.h (sim_cia): Delete.
197 2015-04-17 Mike Frysinger <vapier@gentoo.org>
199 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
201 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
202 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
203 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
204 CIA_SET to CPU_PC_SET.
205 * sim-main.h (CIA_GET, CIA_SET): Delete.
207 2015-04-15 Mike Frysinger <vapier@gentoo.org>
209 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
210 * sim-main.h (STATE_CPU): Delete.
212 2015-04-13 Mike Frysinger <vapier@gentoo.org>
214 * configure: Regenerate.
216 2015-04-13 Mike Frysinger <vapier@gentoo.org>
218 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
219 * interp.c (mips_pc_get, mips_pc_set): New functions.
220 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
221 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
222 (sim_pc_get): Delete.
223 * sim-main.h (SIM_CPU): Define.
224 (struct sim_state): Change cpu to an array of pointers.
227 2015-04-13 Mike Frysinger <vapier@gentoo.org>
229 * interp.c (mips_option_handler, open_trace, sim_close,
230 sim_write, sim_read, sim_store_register, sim_fetch_register,
231 sim_create_inferior, pr_addr, pr_uword64): Convert old style
233 (sim_open): Convert old style prototype. Change casts with
234 sim_write to unsigned char *.
235 (fetch_str): Change null to unsigned char, and change cast to
237 (sim_monitor): Change c & ch to unsigned char. Change cast to
240 2015-04-12 Mike Frysinger <vapier@gentoo.org>
242 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
244 2015-04-06 Mike Frysinger <vapier@gentoo.org>
246 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
248 2015-04-01 Mike Frysinger <vapier@gentoo.org>
250 * tconfig.h (SIM_HAVE_PROFILE): Delete.
252 2015-03-31 Mike Frysinger <vapier@gentoo.org>
254 * config.in, configure: Regenerate.
256 2015-03-24 Mike Frysinger <vapier@gentoo.org>
258 * interp.c (sim_pc_get): New function.
260 2015-03-24 Mike Frysinger <vapier@gentoo.org>
262 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
263 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
265 2015-03-24 Mike Frysinger <vapier@gentoo.org>
267 * configure: Regenerate.
269 2015-03-23 Mike Frysinger <vapier@gentoo.org>
271 * configure: Regenerate.
273 2015-03-23 Mike Frysinger <vapier@gentoo.org>
275 * configure: Regenerate.
276 * configure.ac (mips_extra_objs): Delete.
277 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
278 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
280 2015-03-23 Mike Frysinger <vapier@gentoo.org>
282 * configure: Regenerate.
283 * configure.ac: Delete sim_hw checks for dv-sockser.
285 2015-03-16 Mike Frysinger <vapier@gentoo.org>
287 * config.in, configure: Regenerate.
288 * tconfig.in: Rename file ...
289 * tconfig.h: ... here.
291 2015-03-15 Mike Frysinger <vapier@gentoo.org>
293 * tconfig.in: Delete includes.
294 [HAVE_DV_SOCKSER]: Delete.
296 2015-03-14 Mike Frysinger <vapier@gentoo.org>
298 * Makefile.in (SIM_RUN_OBJS): Delete.
300 2015-03-14 Mike Frysinger <vapier@gentoo.org>
302 * configure.ac (AC_CHECK_HEADERS): Delete.
303 * aclocal.m4, configure: Regenerate.
305 2014-08-19 Alan Modra <amodra@gmail.com>
307 * configure: Regenerate.
309 2014-08-15 Roland McGrath <mcgrathr@google.com>
311 * configure: Regenerate.
312 * config.in: Regenerate.
314 2014-03-04 Mike Frysinger <vapier@gentoo.org>
316 * configure: Regenerate.
318 2013-09-23 Alan Modra <amodra@gmail.com>
320 * configure: Regenerate.
322 2013-06-03 Mike Frysinger <vapier@gentoo.org>
324 * aclocal.m4, configure: Regenerate.
326 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
328 * configure: Rebuild.
330 2013-03-26 Mike Frysinger <vapier@gentoo.org>
332 * configure: Regenerate.
334 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
336 * configure.ac: Address use of dv-sockser.o.
337 * tconfig.in: Conditionalize use of dv_sockser_install.
338 * configure: Regenerated.
339 * config.in: Regenerated.
341 2012-10-04 Chao-ying Fu <fu@mips.com>
342 Steve Ellcey <sellcey@mips.com>
344 * mips/mips3264r2.igen (rdhwr): New.
346 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
348 * configure.ac: Always link against dv-sockser.o.
349 * configure: Regenerate.
351 2012-06-15 Joel Brobecker <brobecker@adacore.com>
353 * config.in, configure: Regenerate.
355 2012-05-18 Nick Clifton <nickc@redhat.com>
358 * interp.c: Include config.h before system header files.
360 2012-03-24 Mike Frysinger <vapier@gentoo.org>
362 * aclocal.m4, config.in, configure: Regenerate.
364 2011-12-03 Mike Frysinger <vapier@gentoo.org>
366 * aclocal.m4: New file.
367 * configure: Regenerate.
369 2011-10-19 Mike Frysinger <vapier@gentoo.org>
371 * configure: Regenerate after common/acinclude.m4 update.
373 2011-10-17 Mike Frysinger <vapier@gentoo.org>
375 * configure.ac: Change include to common/acinclude.m4.
377 2011-10-17 Mike Frysinger <vapier@gentoo.org>
379 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
380 call. Replace common.m4 include with SIM_AC_COMMON.
381 * configure: Regenerate.
383 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
385 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
387 (tmp-mach-multi): Exit early when igen fails.
389 2011-07-05 Mike Frysinger <vapier@gentoo.org>
391 * interp.c (sim_do_command): Delete.
393 2011-02-14 Mike Frysinger <vapier@gentoo.org>
395 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
396 (tx3904sio_fifo_reset): Likewise.
397 * interp.c (sim_monitor): Likewise.
399 2010-04-14 Mike Frysinger <vapier@gentoo.org>
401 * interp.c (sim_write): Add const to buffer arg.
403 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
405 * interp.c: Don't include sysdep.h
407 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
409 * configure: Regenerate.
411 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
413 * config.in: Regenerate.
414 * configure: Likewise.
416 * configure: Regenerate.
418 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
420 * configure: Regenerate to track ../common/common.m4 changes.
423 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
424 Daniel Jacobowitz <dan@codesourcery.com>
425 Joseph Myers <joseph@codesourcery.com>
427 * configure: Regenerate.
429 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
431 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
432 that unconditionally allows fmt_ps.
433 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
434 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
435 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
436 filter from 64,f to 32,f.
437 (PREFX): Change filter from 64 to 32.
438 (LDXC1, LUXC1): Provide separate mips32r2 implementations
439 that use do_load_double instead of do_load. Make both LUXC1
440 versions unpredictable if SizeFGR () != 64.
441 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
442 instead of do_store. Remove unused variable. Make both SUXC1
443 versions unpredictable if SizeFGR () != 64.
445 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
447 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
448 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
449 shifts for that case.
451 2007-09-04 Nick Clifton <nickc@redhat.com>
453 * interp.c (options enum): Add OPTION_INFO_MEMORY.
454 (display_mem_info): New static variable.
455 (mips_option_handler): Handle OPTION_INFO_MEMORY.
456 (mips_options): Add info-memory and memory-info.
457 (sim_open): After processing the command line and board
458 specification, check display_mem_info. If it is set then
459 call the real handler for the --memory-info command line
462 2007-08-24 Joel Brobecker <brobecker@adacore.com>
464 * configure.ac: Change license of multi-run.c to GPL version 3.
465 * configure: Regenerate.
467 2007-06-28 Richard Sandiford <richard@codesourcery.com>
469 * configure.ac, configure: Revert last patch.
471 2007-06-26 Richard Sandiford <richard@codesourcery.com>
473 * configure.ac (sim_mipsisa3264_configs): New variable.
474 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
475 every configuration support all four targets, using the triplet to
476 determine the default.
477 * configure: Regenerate.
479 2007-06-25 Richard Sandiford <richard@codesourcery.com>
481 * Makefile.in (m16run.o): New rule.
483 2007-05-15 Thiemo Seufer <ths@mips.com>
485 * mips3264r2.igen (DSHD): Fix compile warning.
487 2007-05-14 Thiemo Seufer <ths@mips.com>
489 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
490 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
491 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
492 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
495 2007-03-01 Thiemo Seufer <ths@mips.com>
497 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
500 2007-02-20 Thiemo Seufer <ths@mips.com>
502 * dsp.igen: Update copyright notice.
503 * dsp2.igen: Fix copyright notice.
505 2007-02-20 Thiemo Seufer <ths@mips.com>
506 Chao-Ying Fu <fu@mips.com>
508 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
509 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
510 Add dsp2 to sim_igen_machine.
511 * configure: Regenerate.
512 * dsp.igen (do_ph_op): Add MUL support when op = 2.
513 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
514 (mulq_rs.ph): Use do_ph_mulq.
515 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
516 * mips.igen: Add dsp2 model and include dsp2.igen.
517 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
518 for *mips32r2, *mips64r2, *dsp.
519 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
520 for *mips32r2, *mips64r2, *dsp2.
521 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
523 2007-02-19 Thiemo Seufer <ths@mips.com>
524 Nigel Stephens <nigel@mips.com>
526 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
527 jumps with hazard barrier.
529 2007-02-19 Thiemo Seufer <ths@mips.com>
530 Nigel Stephens <nigel@mips.com>
532 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
533 after each call to sim_io_write.
535 2007-02-19 Thiemo Seufer <ths@mips.com>
536 Nigel Stephens <nigel@mips.com>
538 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
539 supported by this simulator.
540 (decode_coproc): Recognise additional CP0 Config registers
543 2007-02-19 Thiemo Seufer <ths@mips.com>
544 Nigel Stephens <nigel@mips.com>
545 David Ung <davidu@mips.com>
547 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
548 uninterpreted formats. If fmt is one of the uninterpreted types
549 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
550 fmt_word, and fmt_uninterpreted_64 like fmt_long.
551 (store_fpr): When writing an invalid odd register, set the
552 matching even register to fmt_unknown, not the following register.
553 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
554 the the memory window at offset 0 set by --memory-size command
556 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
558 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
560 (sim_monitor): When returning the memory size to the MIPS
561 application, use the value in STATE_MEM_SIZE, not an arbitrary
563 (cop_lw): Don' mess around with FPR_STATE, just pass
564 fmt_uninterpreted_32 to StoreFPR.
566 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
568 * mips.igen (not_word_value): Single version for mips32, mips64
571 2007-02-19 Thiemo Seufer <ths@mips.com>
572 Nigel Stephens <nigel@mips.com>
574 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
577 2007-02-17 Thiemo Seufer <ths@mips.com>
579 * configure.ac (mips*-sde-elf*): Move in front of generic machine
581 * configure: Regenerate.
583 2007-02-17 Thiemo Seufer <ths@mips.com>
585 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
586 Add mdmx to sim_igen_machine.
587 (mipsisa64*-*-*): Likewise. Remove dsp.
588 (mipsisa32*-*-*): Remove dsp.
589 * configure: Regenerate.
591 2007-02-13 Thiemo Seufer <ths@mips.com>
593 * configure.ac: Add mips*-sde-elf* target.
594 * configure: Regenerate.
596 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
598 * acconfig.h: Remove.
599 * config.in, configure: Regenerate.
601 2006-11-07 Thiemo Seufer <ths@mips.com>
603 * dsp.igen (do_w_op): Fix compiler warning.
605 2006-08-29 Thiemo Seufer <ths@mips.com>
606 David Ung <davidu@mips.com>
608 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
610 * configure: Regenerate.
611 * mips.igen (model): Add smartmips.
612 (MADDU): Increment ACX if carry.
613 (do_mult): Clear ACX.
614 (ROR,RORV): Add smartmips.
615 (include): Include smartmips.igen.
616 * sim-main.h (ACX): Set to REGISTERS[89].
617 * smartmips.igen: New file.
619 2006-08-29 Thiemo Seufer <ths@mips.com>
620 David Ung <davidu@mips.com>
622 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
623 mips3264r2.igen. Add missing dependency rules.
624 * m16e.igen: Support for mips16e save/restore instructions.
626 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
628 * configure: Regenerated.
630 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
632 * configure: Regenerated.
634 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
636 * configure: Regenerated.
638 2006-05-15 Chao-ying Fu <fu@mips.com>
640 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
642 2006-04-18 Nick Clifton <nickc@redhat.com>
644 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
647 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
649 * configure: Regenerate.
651 2005-12-14 Chao-ying Fu <fu@mips.com>
653 * Makefile.in (SIM_OBJS): Add dsp.o.
654 (dsp.o): New dependency.
655 (IGEN_INCLUDE): Add dsp.igen.
656 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
657 mipsisa64*-*-*): Add dsp to sim_igen_machine.
658 * configure: Regenerate.
659 * mips.igen: Add dsp model and include dsp.igen.
660 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
661 because these instructions are extended in DSP ASE.
662 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
663 adding 6 DSP accumulator registers and 1 DSP control register.
664 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
665 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
666 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
667 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
668 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
669 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
670 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
671 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
672 DSPCR_CCOND_SMASK): New define.
673 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
674 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
676 2005-07-08 Ian Lance Taylor <ian@airs.com>
678 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
680 2005-06-16 David Ung <davidu@mips.com>
681 Nigel Stephens <nigel@mips.com>
683 * mips.igen: New mips16e model and include m16e.igen.
684 (check_u64): Add mips16e tag.
685 * m16e.igen: New file for MIPS16e instructions.
686 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
687 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
689 * configure: Regenerate.
691 2005-05-26 David Ung <davidu@mips.com>
693 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
694 tags to all instructions which are applicable to the new ISAs.
695 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
697 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
699 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
701 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
702 * configure: Regenerate.
704 2005-03-23 Mark Kettenis <kettenis@gnu.org>
706 * configure: Regenerate.
708 2005-01-14 Andrew Cagney <cagney@gnu.org>
710 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
711 explicit call to AC_CONFIG_HEADER.
712 * configure: Regenerate.
714 2005-01-12 Andrew Cagney <cagney@gnu.org>
716 * configure.ac: Update to use ../common/common.m4.
717 * configure: Re-generate.
719 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
721 * configure: Regenerated to track ../common/aclocal.m4 changes.
723 2005-01-07 Andrew Cagney <cagney@gnu.org>
725 * configure.ac: Rename configure.in, require autoconf 2.59.
726 * configure: Re-generate.
728 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
730 * configure: Regenerate for ../common/aclocal.m4 update.
732 2004-09-24 Monika Chaddha <monika@acmet.com>
734 Committed by Andrew Cagney.
735 * m16.igen (CMP, CMPI): Fix assembler.
737 2004-08-18 Chris Demetriou <cgd@broadcom.com>
739 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
740 * configure: Regenerate.
742 2004-06-25 Chris Demetriou <cgd@broadcom.com>
744 * configure.in (sim_m16_machine): Include mipsIII.
745 * configure: Regenerate.
747 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
749 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
751 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
753 2004-04-10 Chris Demetriou <cgd@broadcom.com>
755 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
757 2004-04-09 Chris Demetriou <cgd@broadcom.com>
759 * mips.igen (check_fmt): Remove.
760 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
761 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
762 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
763 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
764 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
765 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
766 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
767 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
768 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
769 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
771 2004-04-09 Chris Demetriou <cgd@broadcom.com>
773 * sb1.igen (check_sbx): New function.
774 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
776 2004-03-29 Chris Demetriou <cgd@broadcom.com>
777 Richard Sandiford <rsandifo@redhat.com>
779 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
780 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
781 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
782 separate implementations for mipsIV and mipsV. Use new macros to
783 determine whether the restrictions apply.
785 2004-01-19 Chris Demetriou <cgd@broadcom.com>
787 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
788 (check_mult_hilo): Improve comments.
789 (check_div_hilo): Likewise. Also, fork off a new version
790 to handle mips32/mips64 (since there are no hazards to check
793 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
795 * mips.igen (do_dmultx): Fix check for negative operands.
797 2003-05-16 Ian Lance Taylor <ian@airs.com>
799 * Makefile.in (SHELL): Make sure this is defined.
800 (various): Use $(SHELL) whenever we invoke move-if-change.
802 2003-05-03 Chris Demetriou <cgd@broadcom.com>
804 * cp1.c: Tweak attribution slightly.
807 * mdmx.igen: Likewise.
808 * mips3d.igen: Likewise.
809 * sb1.igen: Likewise.
811 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
813 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
816 2003-02-27 Andrew Cagney <cagney@redhat.com>
818 * interp.c (sim_open): Rename _bfd to bfd.
819 (sim_create_inferior): Ditto.
821 2003-01-14 Chris Demetriou <cgd@broadcom.com>
823 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
825 2003-01-14 Chris Demetriou <cgd@broadcom.com>
827 * mips.igen (EI, DI): Remove.
829 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
831 * Makefile.in (tmp-run-multi): Fix mips16 filter.
833 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
834 Andrew Cagney <ac131313@redhat.com>
835 Gavin Romig-Koch <gavin@redhat.com>
836 Graydon Hoare <graydon@redhat.com>
837 Aldy Hernandez <aldyh@redhat.com>
838 Dave Brolley <brolley@redhat.com>
839 Chris Demetriou <cgd@broadcom.com>
841 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
842 (sim_mach_default): New variable.
843 (mips64vr-*-*, mips64vrel-*-*): New configurations.
844 Add a new simulator generator, MULTI.
845 * configure: Regenerate.
846 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
847 (multi-run.o): New dependency.
848 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
849 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
850 (tmp-multi): Combine them.
851 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
852 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
853 (distclean-extra): New rule.
854 * sim-main.h: Include bfd.h.
855 (MIPS_MACH): New macro.
856 * mips.igen (vr4120, vr5400, vr5500): New models.
857 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
858 * vr.igen: Replace with new version.
860 2003-01-04 Chris Demetriou <cgd@broadcom.com>
862 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
863 * configure: Regenerate.
865 2002-12-31 Chris Demetriou <cgd@broadcom.com>
867 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
868 * mips.igen: Remove all invocations of check_branch_bug and
871 2002-12-16 Chris Demetriou <cgd@broadcom.com>
873 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
875 2002-07-30 Chris Demetriou <cgd@broadcom.com>
877 * mips.igen (do_load_double, do_store_double): New functions.
878 (LDC1, SDC1): Rename to...
879 (LDC1b, SDC1b): respectively.
880 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
882 2002-07-29 Michael Snyder <msnyder@redhat.com>
884 * cp1.c (fp_recip2): Modify initialization expression so that
885 GCC will recognize it as constant.
887 2002-06-18 Chris Demetriou <cgd@broadcom.com>
889 * mdmx.c (SD_): Delete.
890 (Unpredictable): Re-define, for now, to directly invoke
891 unpredictable_action().
892 (mdmx_acc_op): Fix error in .ob immediate handling.
894 2002-06-18 Andrew Cagney <cagney@redhat.com>
896 * interp.c (sim_firmware_command): Initialize `address'.
898 2002-06-16 Andrew Cagney <ac131313@redhat.com>
900 * configure: Regenerated to track ../common/aclocal.m4 changes.
902 2002-06-14 Chris Demetriou <cgd@broadcom.com>
903 Ed Satterthwaite <ehs@broadcom.com>
905 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
906 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
907 * mips.igen: Include mips3d.igen.
908 (mips3d): New model name for MIPS-3D ASE instructions.
909 (CVT.W.fmt): Don't use this instruction for word (source) format
911 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
912 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
913 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
914 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
915 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
916 (RSquareRoot1, RSquareRoot2): New macros.
917 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
918 (fp_rsqrt2): New functions.
919 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
920 * configure: Regenerate.
922 2002-06-13 Chris Demetriou <cgd@broadcom.com>
923 Ed Satterthwaite <ehs@broadcom.com>
925 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
926 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
927 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
928 (convert): Note that this function is not used for paired-single
930 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
931 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
932 (check_fmt_p): Enable paired-single support.
933 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
934 (PUU.PS): New instructions.
935 (CVT.S.fmt): Don't use this instruction for paired-single format
937 * sim-main.h (FP_formats): New value 'fmt_ps.'
938 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
939 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
941 2002-06-12 Chris Demetriou <cgd@broadcom.com>
943 * mips.igen: Fix formatting of function calls in
946 2002-06-12 Chris Demetriou <cgd@broadcom.com>
948 * mips.igen (MOVN, MOVZ): Trace result.
949 (TNEI): Print "tnei" as the opcode name in traces.
950 (CEIL.W): Add disassembly string for traces.
951 (RSQRT.fmt): Make location of disassembly string consistent
952 with other instructions.
954 2002-06-12 Chris Demetriou <cgd@broadcom.com>
956 * mips.igen (X): Delete unused function.
958 2002-06-08 Andrew Cagney <cagney@redhat.com>
960 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
962 2002-06-07 Chris Demetriou <cgd@broadcom.com>
963 Ed Satterthwaite <ehs@broadcom.com>
965 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
966 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
967 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
968 (fp_nmsub): New prototypes.
969 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
970 (NegMultiplySub): New defines.
971 * mips.igen (RSQRT.fmt): Use RSquareRoot().
972 (MADD.D, MADD.S): Replace with...
973 (MADD.fmt): New instruction.
974 (MSUB.D, MSUB.S): Replace with...
975 (MSUB.fmt): New instruction.
976 (NMADD.D, NMADD.S): Replace with...
977 (NMADD.fmt): New instruction.
978 (NMSUB.D, MSUB.S): Replace with...
979 (NMSUB.fmt): New instruction.
981 2002-06-07 Chris Demetriou <cgd@broadcom.com>
982 Ed Satterthwaite <ehs@broadcom.com>
984 * cp1.c: Fix more comment spelling and formatting.
985 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
986 (denorm_mode): New function.
987 (fpu_unary, fpu_binary): Round results after operation, collect
988 status from rounding operations, and update the FCSR.
989 (convert): Collect status from integer conversions and rounding
990 operations, and update the FCSR. Adjust NaN values that result
991 from conversions. Convert to use sim_io_eprintf rather than
992 fprintf, and remove some debugging code.
993 * cp1.h (fenr_FS): New define.
995 2002-06-07 Chris Demetriou <cgd@broadcom.com>
997 * cp1.c (convert): Remove unusable debugging code, and move MIPS
998 rounding mode to sim FP rounding mode flag conversion code into...
999 (rounding_mode): New function.
1001 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1003 * cp1.c: Clean up formatting of a few comments.
1004 (value_fpr): Reformat switch statement.
1006 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1007 Ed Satterthwaite <ehs@broadcom.com>
1010 * sim-main.h: Include cp1.h.
1011 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1012 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1013 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1014 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1015 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1016 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1017 * cp1.c: Don't include sim-fpu.h; already included by
1018 sim-main.h. Clean up formatting of some comments.
1019 (NaN, Equal, Less): Remove.
1020 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1021 (fp_cmp): New functions.
1022 * mips.igen (do_c_cond_fmt): Remove.
1023 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1024 Compare. Add result tracing.
1025 (CxC1): Remove, replace with...
1026 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1027 (DMxC1): Remove, replace with...
1028 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1029 (MxC1): Remove, replace with...
1030 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1032 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1034 * sim-main.h (FGRIDX): Remove, replace all uses with...
1035 (FGR_BASE): New macro.
1036 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1037 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1038 (NR_FGR, FGR): Likewise.
1039 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1040 * mips.igen: Likewise.
1042 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1044 * cp1.c: Add an FSF Copyright notice to this file.
1046 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1047 Ed Satterthwaite <ehs@broadcom.com>
1049 * cp1.c (Infinity): Remove.
1050 * sim-main.h (Infinity): Likewise.
1052 * cp1.c (fp_unary, fp_binary): New functions.
1053 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1054 (fp_sqrt): New functions, implemented in terms of the above.
1055 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1056 (Recip, SquareRoot): Remove (replaced by functions above).
1057 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1058 (fp_recip, fp_sqrt): New prototypes.
1059 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1060 (Recip, SquareRoot): Replace prototypes with #defines which
1061 invoke the functions above.
1063 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1065 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1066 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1067 file, remove PARAMS from prototypes.
1068 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1069 simulator state arguments.
1070 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1071 pass simulator state arguments.
1072 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1073 (store_fpr, convert): Remove 'sd' argument.
1074 (value_fpr): Likewise. Convert to use 'SD' instead.
1076 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1078 * cp1.c (Min, Max): Remove #if 0'd functions.
1079 * sim-main.h (Min, Max): Remove.
1081 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1083 * cp1.c: fix formatting of switch case and default labels.
1084 * interp.c: Likewise.
1085 * sim-main.c: Likewise.
1087 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1089 * cp1.c: Clean up comments which describe FP formats.
1090 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1092 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1093 Ed Satterthwaite <ehs@broadcom.com>
1095 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1096 Broadcom SiByte SB-1 processor configurations.
1097 * configure: Regenerate.
1098 * sb1.igen: New file.
1099 * mips.igen: Include sb1.igen.
1101 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1102 * mdmx.igen: Add "sb1" model to all appropriate functions and
1104 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1105 (ob_func, ob_acc): Reference the above.
1106 (qh_acc): Adjust to keep the same size as ob_acc.
1107 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1108 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1110 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1112 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1114 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1115 Ed Satterthwaite <ehs@broadcom.com>
1117 * mips.igen (mdmx): New (pseudo-)model.
1118 * mdmx.c, mdmx.igen: New files.
1119 * Makefile.in (SIM_OBJS): Add mdmx.o.
1120 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1122 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1123 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1124 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1125 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1126 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1127 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1128 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1129 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1130 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1131 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1132 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1133 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1134 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1135 (qh_fmtsel): New macros.
1136 (_sim_cpu): New member "acc".
1137 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1138 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1140 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1142 * interp.c: Use 'deprecated' rather than 'depreciated.'
1143 * sim-main.h: Likewise.
1145 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1147 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1148 which wouldn't compile anyway.
1149 * sim-main.h (unpredictable_action): New function prototype.
1150 (Unpredictable): Define to call igen function unpredictable().
1151 (NotWordValue): New macro to call igen function not_word_value().
1152 (UndefinedResult): Remove.
1153 * interp.c (undefined_result): Remove.
1154 (unpredictable_action): New function.
1155 * mips.igen (not_word_value, unpredictable): New functions.
1156 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1157 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1158 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1159 NotWordValue() to check for unpredictable inputs, then
1160 Unpredictable() to handle them.
1162 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1164 * mips.igen: Fix formatting of calls to Unpredictable().
1166 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1168 * interp.c (sim_open): Revert previous change.
1170 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1172 * interp.c (sim_open): Disable chunk of code that wrote code in
1173 vector table entries.
1175 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1177 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1178 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1181 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1183 * cp1.c: Fix many formatting issues.
1185 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1187 * cp1.c (fpu_format_name): New function to replace...
1188 (DOFMT): This. Delete, and update all callers.
1189 (fpu_rounding_mode_name): New function to replace...
1190 (RMMODE): This. Delete, and update all callers.
1192 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1194 * interp.c: Move FPU support routines from here to...
1195 * cp1.c: Here. New file.
1196 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1197 (cp1.o): New target.
1199 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1201 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1202 * mips.igen (mips32, mips64): New models, add to all instructions
1203 and functions as appropriate.
1204 (loadstore_ea, check_u64): New variant for model mips64.
1205 (check_fmt_p): New variant for models mipsV and mips64, remove
1206 mipsV model marking fro other variant.
1209 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1210 for mips32 and mips64.
1211 (DCLO, DCLZ): New instructions for mips64.
1213 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1215 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1216 immediate or code as a hex value with the "%#lx" format.
1217 (ANDI): Likewise, and fix printed instruction name.
1219 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1221 * sim-main.h (UndefinedResult, Unpredictable): New macros
1222 which currently do nothing.
1224 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1226 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1227 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1228 (status_CU3): New definitions.
1230 * sim-main.h (ExceptionCause): Add new values for MIPS32
1231 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1232 for DebugBreakPoint and NMIReset to note their status in
1234 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1235 (SignalExceptionCacheErr): New exception macros.
1237 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1239 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1240 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1242 (SignalExceptionCoProcessorUnusable): Take as argument the
1243 unusable coprocessor number.
1245 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1247 * mips.igen: Fix formatting of all SignalException calls.
1249 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1251 * sim-main.h (SIGNEXTEND): Remove.
1253 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1255 * mips.igen: Remove gencode comment from top of file, fix
1256 spelling in another comment.
1258 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1260 * mips.igen (check_fmt, check_fmt_p): New functions to check
1261 whether specific floating point formats are usable.
1262 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1263 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1264 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1265 Use the new functions.
1266 (do_c_cond_fmt): Remove format checks...
1267 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1269 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1271 * mips.igen: Fix formatting of check_fpu calls.
1273 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1275 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1277 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1279 * mips.igen: Remove whitespace at end of lines.
1281 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1283 * mips.igen (loadstore_ea): New function to do effective
1284 address calculations.
1285 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1286 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1287 CACHE): Use loadstore_ea to do effective address computations.
1289 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1291 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1292 * mips.igen (LL, CxC1, MxC1): Likewise.
1294 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1296 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1297 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1298 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1299 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1300 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1301 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1302 Don't split opcode fields by hand, use the opcode field values
1305 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1307 * mips.igen (do_divu): Fix spacing.
1309 * mips.igen (do_dsllv): Move to be right before DSLLV,
1310 to match the rest of the do_<shift> functions.
1312 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1314 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1315 DSRL32, do_dsrlv): Trace inputs and results.
1317 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1319 * mips.igen (CACHE): Provide instruction-printing string.
1321 * interp.c (signal_exception): Comment tokens after #endif.
1323 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1325 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1326 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1327 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1328 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1329 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1330 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1331 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1332 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1334 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1336 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1337 instruction-printing string.
1338 (LWU): Use '64' as the filter flag.
1340 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1342 * mips.igen (SDXC1): Fix instruction-printing string.
1344 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1346 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1347 filter flags "32,f".
1349 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1351 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1354 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1356 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1357 add a comma) so that it more closely match the MIPS ISA
1358 documentation opcode partitioning.
1359 (PREF): Put useful names on opcode fields, and include
1360 instruction-printing string.
1362 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1364 * mips.igen (check_u64): New function which in the future will
1365 check whether 64-bit instructions are usable and signal an
1366 exception if not. Currently a no-op.
1367 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1368 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1369 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1370 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1372 * mips.igen (check_fpu): New function which in the future will
1373 check whether FPU instructions are usable and signal an exception
1374 if not. Currently a no-op.
1375 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1376 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1377 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1378 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1379 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1380 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1381 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1382 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1384 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1386 * mips.igen (do_load_left, do_load_right): Move to be immediately
1388 (do_store_left, do_store_right): Move to be immediately following
1391 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1393 * mips.igen (mipsV): New model name. Also, add it to
1394 all instructions and functions where it is appropriate.
1396 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1398 * mips.igen: For all functions and instructions, list model
1399 names that support that instruction one per line.
1401 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1403 * mips.igen: Add some additional comments about supported
1404 models, and about which instructions go where.
1405 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1406 order as is used in the rest of the file.
1408 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1410 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1411 indicating that ALU32_END or ALU64_END are there to check
1413 (DADD): Likewise, but also remove previous comment about
1416 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1418 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1419 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1420 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1421 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1422 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1423 fields (i.e., add and move commas) so that they more closely
1424 match the MIPS ISA documentation opcode partitioning.
1426 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1428 * mips.igen (ADDI): Print immediate value.
1429 (BREAK): Print code.
1430 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1431 (SLL): Print "nop" specially, and don't run the code
1432 that does the shift for the "nop" case.
1434 2001-11-17 Fred Fish <fnf@redhat.com>
1436 * sim-main.h (float_operation): Move enum declaration outside
1437 of _sim_cpu struct declaration.
1439 2001-04-12 Jim Blandy <jimb@redhat.com>
1441 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1442 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1444 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1445 PENDING_FILL, and you can get the intended effect gracefully by
1446 calling PENDING_SCHED directly.
1448 2001-02-23 Ben Elliston <bje@redhat.com>
1450 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1451 already defined elsewhere.
1453 2001-02-19 Ben Elliston <bje@redhat.com>
1455 * sim-main.h (sim_monitor): Return an int.
1456 * interp.c (sim_monitor): Add return values.
1457 (signal_exception): Handle error conditions from sim_monitor.
1459 2001-02-08 Ben Elliston <bje@redhat.com>
1461 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1462 (store_memory): Likewise, pass cia to sim_core_write*.
1464 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1466 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1467 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1469 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1471 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1472 * Makefile.in: Don't delete *.igen when cleaning directory.
1474 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1476 * m16.igen (break): Call SignalException not sim_engine_halt.
1478 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1480 From Jason Eckhardt:
1481 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1483 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1485 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1487 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1489 * mips.igen (do_dmultx): Fix typo.
1491 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1493 * configure: Regenerated to track ../common/aclocal.m4 changes.
1495 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1497 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1499 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1501 * sim-main.h (GPR_CLEAR): Define macro.
1503 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1505 * interp.c (decode_coproc): Output long using %lx and not %s.
1507 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1509 * interp.c (sim_open): Sort & extend dummy memory regions for
1510 --board=jmr3904 for eCos.
1512 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1514 * configure: Regenerated.
1516 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1518 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1519 calls, conditional on the simulator being in verbose mode.
1521 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1523 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1524 cache don't get ReservedInstruction traps.
1526 1999-11-29 Mark Salter <msalter@cygnus.com>
1528 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1529 to clear status bits in sdisr register. This is how the hardware works.
1531 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1532 being used by cygmon.
1534 1999-11-11 Andrew Haley <aph@cygnus.com>
1536 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1539 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1541 * mips.igen (MULT): Correct previous mis-applied patch.
1543 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1545 * mips.igen (delayslot32): Handle sequence like
1546 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1547 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1548 (MULT): Actually pass the third register...
1550 1999-09-03 Mark Salter <msalter@cygnus.com>
1552 * interp.c (sim_open): Added more memory aliases for additional
1553 hardware being touched by cygmon on jmr3904 board.
1555 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1557 * configure: Regenerated to track ../common/aclocal.m4 changes.
1559 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1561 * interp.c (sim_store_register): Handle case where client - GDB -
1562 specifies that a 4 byte register is 8 bytes in size.
1563 (sim_fetch_register): Ditto.
1565 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1567 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1568 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1569 (idt_monitor_base): Base address for IDT monitor traps.
1570 (pmon_monitor_base): Ditto for PMON.
1571 (lsipmon_monitor_base): Ditto for LSI PMON.
1572 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1573 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1574 (sim_firmware_command): New function.
1575 (mips_option_handler): Call it for OPTION_FIRMWARE.
1576 (sim_open): Allocate memory for idt_monitor region. If "--board"
1577 option was given, add no monitor by default. Add BREAK hooks only if
1578 monitors are also there.
1580 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1582 * interp.c (sim_monitor): Flush output before reading input.
1584 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1586 * tconfig.in (SIM_HANDLES_LMA): Always define.
1588 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1590 From Mark Salter <msalter@cygnus.com>:
1591 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1592 (sim_open): Add setup for BSP board.
1594 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1596 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1597 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1598 them as unimplemented.
1600 1999-05-08 Felix Lee <flee@cygnus.com>
1602 * configure: Regenerated to track ../common/aclocal.m4 changes.
1604 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1606 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1608 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1610 * configure.in: Any mips64vr5*-*-* target should have
1611 -DTARGET_ENABLE_FR=1.
1612 (default_endian): Any mips64vr*el-*-* target should default to
1614 * configure: Re-generate.
1616 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1618 * mips.igen (ldl): Extend from _16_, not 32.
1620 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1622 * interp.c (sim_store_register): Force registers written to by GDB
1623 into an un-interpreted state.
1625 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1627 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1628 CPU, start periodic background I/O polls.
1629 (tx3904sio_poll): New function: periodic I/O poller.
1631 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1633 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1635 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1637 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1640 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1642 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1643 (load_word): Call SIM_CORE_SIGNAL hook on error.
1644 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1645 starting. For exception dispatching, pass PC instead of NULL_CIA.
1646 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1647 * sim-main.h (COP0_BADVADDR): Define.
1648 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1649 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1650 (_sim_cpu): Add exc_* fields to store register value snapshots.
1651 * mips.igen (*): Replace memory-related SignalException* calls
1652 with references to SIM_CORE_SIGNAL hook.
1654 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1656 * sim-main.c (*): Minor warning cleanups.
1658 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1660 * m16.igen (DADDIU5): Correct type-o.
1662 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1664 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1667 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1669 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1671 (interp.o): Add dependency on itable.h
1672 (oengine.c, gencode): Delete remaining references.
1673 (BUILT_SRC_FROM_GEN): Clean up.
1675 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1678 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1679 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1680 tmp-run-hack) : New.
1681 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1682 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1683 Drop the "64" qualifier to get the HACK generator working.
1684 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1685 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1686 qualifier to get the hack generator working.
1687 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1688 (DSLL): Use do_dsll.
1689 (DSLLV): Use do_dsllv.
1690 (DSRA): Use do_dsra.
1691 (DSRL): Use do_dsrl.
1692 (DSRLV): Use do_dsrlv.
1693 (BC1): Move *vr4100 to get the HACK generator working.
1694 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1695 get the HACK generator working.
1696 (MACC) Rename to get the HACK generator working.
1697 (DMACC,MACCS,DMACCS): Add the 64.
1699 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1701 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1702 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1704 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1706 * mips/interp.c (DEBUG): Cleanups.
1708 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1710 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1711 (tx3904sio_tickle): fflush after a stdout character output.
1713 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1715 * interp.c (sim_close): Uninstall modules.
1717 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1719 * sim-main.h, interp.c (sim_monitor): Change to global
1722 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1724 * configure.in (vr4100): Only include vr4100 instructions in
1726 * configure: Re-generate.
1727 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1729 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1731 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1732 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1735 * configure.in (sim_default_gen, sim_use_gen): Replace with
1737 (--enable-sim-igen): Delete config option. Always using IGEN.
1738 * configure: Re-generate.
1740 * Makefile.in (gencode): Kill, kill, kill.
1743 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1745 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1746 bit mips16 igen simulator.
1747 * configure: Re-generate.
1749 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1750 as part of vr4100 ISA.
1751 * vr.igen: Mark all instructions as 64 bit only.
1753 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1755 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1758 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1760 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1761 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1762 * configure: Re-generate.
1764 * m16.igen (BREAK): Define breakpoint instruction.
1765 (JALX32): Mark instruction as mips16 and not r3900.
1766 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1768 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1770 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1772 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1773 insn as a debug breakpoint.
1775 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1777 (PENDING_SCHED): Clean up trace statement.
1778 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1779 (PENDING_FILL): Delay write by only one cycle.
1780 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1782 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1784 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1786 (pending_tick): Move incrementing of index to FOR statement.
1787 (pending_tick): Only update PENDING_OUT after a write has occured.
1789 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1791 * configure: Re-generate.
1793 * interp.c (sim_engine_run OLD): Delete explicit call to
1794 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1796 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1798 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1799 interrupt level number to match changed SignalExceptionInterrupt
1802 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1804 * interp.c: #include "itable.h" if WITH_IGEN.
1805 (get_insn_name): New function.
1806 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1807 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1809 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1811 * configure: Rebuilt to inhale new common/aclocal.m4.
1813 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1815 * dv-tx3904sio.c: Include sim-assert.h.
1817 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1819 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1820 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1821 Reorganize target-specific sim-hardware checks.
1822 * configure: rebuilt.
1823 * interp.c (sim_open): For tx39 target boards, set
1824 OPERATING_ENVIRONMENT, add tx3904sio devices.
1825 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1826 ROM executables. Install dv-sockser into sim-modules list.
1828 * dv-tx3904irc.c: Compiler warning clean-up.
1829 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1830 frequent hw-trace messages.
1832 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1834 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1836 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1838 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1840 * vr.igen: New file.
1841 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1842 * mips.igen: Define vr4100 model. Include vr.igen.
1843 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1845 * mips.igen (check_mf_hilo): Correct check.
1847 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1849 * sim-main.h (interrupt_event): Add prototype.
1851 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1852 register_ptr, register_value.
1853 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1855 * sim-main.h (tracefh): Make extern.
1857 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1859 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1860 Reduce unnecessarily high timer event frequency.
1861 * dv-tx3904cpu.c: Ditto for interrupt event.
1863 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1865 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1867 (interrupt_event): Made non-static.
1869 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1870 interchange of configuration values for external vs. internal
1873 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1875 * mips.igen (BREAK): Moved code to here for
1876 simulator-reserved break instructions.
1877 * gencode.c (build_instruction): Ditto.
1878 * interp.c (signal_exception): Code moved from here. Non-
1879 reserved instructions now use exception vector, rather
1881 * sim-main.h: Moved magic constants to here.
1883 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1885 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1886 register upon non-zero interrupt event level, clear upon zero
1888 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1889 by passing zero event value.
1890 (*_io_{read,write}_buffer): Endianness fixes.
1891 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1892 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1894 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1895 serial I/O and timer module at base address 0xFFFF0000.
1897 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1899 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1902 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1904 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1906 * configure: Update.
1908 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1910 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1911 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1912 * configure.in: Include tx3904tmr in hw_device list.
1913 * configure: Rebuilt.
1914 * interp.c (sim_open): Instantiate three timer instances.
1915 Fix address typo of tx3904irc instance.
1917 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1919 * interp.c (signal_exception): SystemCall exception now uses
1920 the exception vector.
1922 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1924 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1927 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1929 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1931 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1935 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1936 sim-main.h. Declare a struct hw_descriptor instead of struct
1937 hw_device_descriptor.
1939 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1941 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1942 right bits and then re-align left hand bytes to correct byte
1943 lanes. Fix incorrect computation in do_store_left when loading
1944 bytes from second word.
1946 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1948 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1949 * interp.c (sim_open): Only create a device tree when HW is
1952 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1953 * interp.c (signal_exception): Ditto.
1955 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1957 * gencode.c: Mark BEGEZALL as LIKELY.
1959 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1961 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1962 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1964 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1966 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1967 modules. Recognize TX39 target with "mips*tx39" pattern.
1968 * configure: Rebuilt.
1969 * sim-main.h (*): Added many macros defining bits in
1970 TX39 control registers.
1971 (SignalInterrupt): Send actual PC instead of NULL.
1972 (SignalNMIReset): New exception type.
1973 * interp.c (board): New variable for future use to identify
1974 a particular board being simulated.
1975 (mips_option_handler,mips_options): Added "--board" option.
1976 (interrupt_event): Send actual PC.
1977 (sim_open): Make memory layout conditional on board setting.
1978 (signal_exception): Initial implementation of hardware interrupt
1979 handling. Accept another break instruction variant for simulator
1981 (decode_coproc): Implement RFE instruction for TX39.
1982 (mips.igen): Decode RFE instruction as such.
1983 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1984 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1985 bbegin to implement memory map.
1986 * dv-tx3904cpu.c: New file.
1987 * dv-tx3904irc.c: New file.
1989 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1991 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1993 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1995 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1996 with calls to check_div_hilo.
1998 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2000 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2001 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2002 Add special r3900 version of do_mult_hilo.
2003 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2004 with calls to check_mult_hilo.
2005 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2006 with calls to check_div_hilo.
2008 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2010 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2011 Document a replacement.
2013 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2015 * interp.c (sim_monitor): Make mon_printf work.
2017 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2019 * sim-main.h (INSN_NAME): New arg `cpu'.
2021 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2023 * configure: Regenerated to track ../common/aclocal.m4 changes.
2025 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2027 * configure: Regenerated to track ../common/aclocal.m4 changes.
2030 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2032 * acconfig.h: New file.
2033 * configure.in: Reverted change of Apr 24; use sinclude again.
2035 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2037 * configure: Regenerated to track ../common/aclocal.m4 changes.
2040 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2042 * configure.in: Don't call sinclude.
2044 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2046 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2048 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2050 * mips.igen (ERET): Implement.
2052 * interp.c (decode_coproc): Return sign-extended EPC.
2054 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2056 * interp.c (signal_exception): Do not ignore Trap.
2057 (signal_exception): On TRAP, restart at exception address.
2058 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2059 (signal_exception): Update.
2060 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2061 so that TRAP instructions are caught.
2063 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2065 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2066 contains HI/LO access history.
2067 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2068 (HIACCESS, LOACCESS): Delete, replace with
2069 (HIHISTORY, LOHISTORY): New macros.
2070 (CHECKHILO): Delete all, moved to mips.igen
2072 * gencode.c (build_instruction): Do not generate checks for
2073 correct HI/LO register usage.
2075 * interp.c (old_engine_run): Delete checks for correct HI/LO
2078 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2079 check_mf_cycles): New functions.
2080 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2081 do_divu, domultx, do_mult, do_multu): Use.
2083 * tx.igen ("madd", "maddu"): Use.
2085 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2087 * mips.igen (DSRAV): Use function do_dsrav.
2088 (SRAV): Use new function do_srav.
2090 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2091 (B): Sign extend 11 bit immediate.
2092 (EXT-B*): Shift 16 bit immediate left by 1.
2093 (ADDIU*): Don't sign extend immediate value.
2095 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2097 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2099 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2102 * mips.igen (delayslot32, nullify_next_insn): New functions.
2103 (m16.igen): Always include.
2104 (do_*): Add more tracing.
2106 * m16.igen (delayslot16): Add NIA argument, could be called by a
2107 32 bit MIPS16 instruction.
2109 * interp.c (ifetch16): Move function from here.
2110 * sim-main.c (ifetch16): To here.
2112 * sim-main.c (ifetch16, ifetch32): Update to match current
2113 implementations of LH, LW.
2114 (signal_exception): Don't print out incorrect hex value of illegal
2117 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2119 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2122 * m16.igen: Implement MIPS16 instructions.
2124 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2125 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2126 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2127 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2128 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2129 bodies of corresponding code from 32 bit insn to these. Also used
2130 by MIPS16 versions of functions.
2132 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2133 (IMEM16): Drop NR argument from macro.
2135 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2137 * Makefile.in (SIM_OBJS): Add sim-main.o.
2139 * sim-main.h (address_translation, load_memory, store_memory,
2140 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2142 (pr_addr, pr_uword64): Declare.
2143 (sim-main.c): Include when H_REVEALS_MODULE_P.
2145 * interp.c (address_translation, load_memory, store_memory,
2146 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2148 * sim-main.c: To here. Fix compilation problems.
2150 * configure.in: Enable inlining.
2151 * configure: Re-config.
2153 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2155 * configure: Regenerated to track ../common/aclocal.m4 changes.
2157 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2159 * mips.igen: Include tx.igen.
2160 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2161 * tx.igen: New file, contains MADD and MADDU.
2163 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2164 the hardwired constant `7'.
2165 (store_memory): Ditto.
2166 (LOADDRMASK): Move definition to sim-main.h.
2168 mips.igen (MTC0): Enable for r3900.
2171 mips.igen (do_load_byte): Delete.
2172 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2173 do_store_right): New functions.
2174 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2176 configure.in: Let the tx39 use igen again.
2179 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2181 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2182 not an address sized quantity. Return zero for cache sizes.
2184 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2186 * mips.igen (r3900): r3900 does not support 64 bit integer
2189 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2191 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2193 * configure : Rebuild.
2195 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2197 * configure: Regenerated to track ../common/aclocal.m4 changes.
2199 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2201 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2203 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2205 * configure: Regenerated to track ../common/aclocal.m4 changes.
2206 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2208 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2210 * configure: Regenerated to track ../common/aclocal.m4 changes.
2212 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2214 * interp.c (Max, Min): Comment out functions. Not yet used.
2216 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2218 * configure: Regenerated to track ../common/aclocal.m4 changes.
2220 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2222 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2223 configurable settings for stand-alone simulator.
2225 * configure.in: Added X11 search, just in case.
2227 * configure: Regenerated.
2229 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2231 * interp.c (sim_write, sim_read, load_memory, store_memory):
2232 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2234 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2236 * sim-main.h (GETFCC): Return an unsigned value.
2238 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2240 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2241 (DADD): Result destination is RD not RT.
2243 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2245 * sim-main.h (HIACCESS, LOACCESS): Always define.
2247 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2249 * interp.c (sim_info): Delete.
2251 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2253 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2254 (mips_option_handler): New argument `cpu'.
2255 (sim_open): Update call to sim_add_option_table.
2257 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2259 * mips.igen (CxC1): Add tracing.
2261 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2263 * sim-main.h (Max, Min): Declare.
2265 * interp.c (Max, Min): New functions.
2267 * mips.igen (BC1): Add tracing.
2269 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2271 * interp.c Added memory map for stack in vr4100
2273 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2275 * interp.c (load_memory): Add missing "break"'s.
2277 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2279 * interp.c (sim_store_register, sim_fetch_register): Pass in
2280 length parameter. Return -1.
2282 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2284 * interp.c: Added hardware init hook, fixed warnings.
2286 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2288 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2290 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2292 * interp.c (ifetch16): New function.
2294 * sim-main.h (IMEM32): Rename IMEM.
2295 (IMEM16_IMMED): Define.
2297 (DELAY_SLOT): Update.
2299 * m16run.c (sim_engine_run): New file.
2301 * m16.igen: All instructions except LB.
2302 (LB): Call do_load_byte.
2303 * mips.igen (do_load_byte): New function.
2304 (LB): Call do_load_byte.
2306 * mips.igen: Move spec for insn bit size and high bit from here.
2307 * Makefile.in (tmp-igen, tmp-m16): To here.
2309 * m16.dc: New file, decode mips16 instructions.
2311 * Makefile.in (SIM_NO_ALL): Define.
2312 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2314 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2316 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2317 point unit to 32 bit registers.
2318 * configure: Re-generate.
2320 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2322 * configure.in (sim_use_gen): Make IGEN the default simulator
2323 generator for generic 32 and 64 bit mips targets.
2324 * configure: Re-generate.
2326 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2328 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2331 * interp.c (sim_fetch_register, sim_store_register): Read/write
2332 FGR from correct location.
2333 (sim_open): Set size of FGR's according to
2334 WITH_TARGET_FLOATING_POINT_BITSIZE.
2336 * sim-main.h (FGR): Store floating point registers in a separate
2339 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2341 * configure: Regenerated to track ../common/aclocal.m4 changes.
2343 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2345 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2347 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2349 * interp.c (pending_tick): New function. Deliver pending writes.
2351 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2352 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2353 it can handle mixed sized quantites and single bits.
2355 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2357 * interp.c (oengine.h): Do not include when building with IGEN.
2358 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2359 (sim_info): Ditto for PROCESSOR_64BIT.
2360 (sim_monitor): Replace ut_reg with unsigned_word.
2361 (*): Ditto for t_reg.
2362 (LOADDRMASK): Define.
2363 (sim_open): Remove defunct check that host FP is IEEE compliant,
2364 using software to emulate floating point.
2365 (value_fpr, ...): Always compile, was conditional on HASFPU.
2367 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2369 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2372 * interp.c (SD, CPU): Define.
2373 (mips_option_handler): Set flags in each CPU.
2374 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2375 (sim_close): Do not clear STATE, deleted anyway.
2376 (sim_write, sim_read): Assume CPU zero's vm should be used for
2378 (sim_create_inferior): Set the PC for all processors.
2379 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2381 (mips16_entry): Pass correct nr of args to store_word, load_word.
2382 (ColdReset): Cold reset all cpu's.
2383 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2384 (sim_monitor, load_memory, store_memory, signal_exception): Use
2385 `CPU' instead of STATE_CPU.
2388 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2391 * sim-main.h (signal_exception): Add sim_cpu arg.
2392 (SignalException*): Pass both SD and CPU to signal_exception.
2393 * interp.c (signal_exception): Update.
2395 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2397 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2398 address_translation): Ditto
2399 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2401 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2403 * configure: Regenerated to track ../common/aclocal.m4 changes.
2405 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2407 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2409 * mips.igen (model): Map processor names onto BFD name.
2411 * sim-main.h (CPU_CIA): Delete.
2412 (SET_CIA, GET_CIA): Define
2414 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2416 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2419 * configure.in (default_endian): Configure a big-endian simulator
2421 * configure: Re-generate.
2423 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2425 * configure: Regenerated to track ../common/aclocal.m4 changes.
2427 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2429 * interp.c (sim_monitor): Handle Densan monitor outbyte
2430 and inbyte functions.
2432 1997-12-29 Felix Lee <flee@cygnus.com>
2434 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2436 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2438 * Makefile.in (tmp-igen): Arrange for $zero to always be
2439 reset to zero after every instruction.
2441 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2443 * configure: Regenerated to track ../common/aclocal.m4 changes.
2446 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2448 * mips.igen (MSUB): Fix to work like MADD.
2449 * gencode.c (MSUB): Similarly.
2451 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2453 * configure: Regenerated to track ../common/aclocal.m4 changes.
2455 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2457 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2459 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2461 * sim-main.h (sim-fpu.h): Include.
2463 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2464 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2465 using host independant sim_fpu module.
2467 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2469 * interp.c (signal_exception): Report internal errors with SIGABRT
2472 * sim-main.h (C0_CONFIG): New register.
2473 (signal.h): No longer include.
2475 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2477 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2479 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2481 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2483 * mips.igen: Tag vr5000 instructions.
2484 (ANDI): Was missing mipsIV model, fix assembler syntax.
2485 (do_c_cond_fmt): New function.
2486 (C.cond.fmt): Handle mips I-III which do not support CC field
2488 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2489 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2491 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2492 vr5000 which saves LO in a GPR separatly.
2494 * configure.in (enable-sim-igen): For vr5000, select vr5000
2495 specific instructions.
2496 * configure: Re-generate.
2498 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2500 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2502 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2503 fmt_uninterpreted_64 bit cases to switch. Convert to
2506 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2508 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2509 as specified in IV3.2 spec.
2510 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2512 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2514 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2515 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2516 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2517 PENDING_FILL versions of instructions. Simplify.
2519 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2521 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2523 (MTHI, MFHI): Disable code checking HI-LO.
2525 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2527 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2529 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2531 * gencode.c (build_mips16_operands): Replace IPC with cia.
2533 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2534 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2536 (UndefinedResult): Replace function with macro/function
2538 (sim_engine_run): Don't save PC in IPC.
2540 * sim-main.h (IPC): Delete.
2543 * interp.c (signal_exception, store_word, load_word,
2544 address_translation, load_memory, store_memory, cache_op,
2545 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2546 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2547 current instruction address - cia - argument.
2548 (sim_read, sim_write): Call address_translation directly.
2549 (sim_engine_run): Rename variable vaddr to cia.
2550 (signal_exception): Pass cia to sim_monitor
2552 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2553 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2554 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2556 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2557 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2560 * interp.c (signal_exception): Pass restart address to
2563 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2564 idecode.o): Add dependency.
2566 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2568 (DELAY_SLOT): Update NIA not PC with branch address.
2569 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2571 * mips.igen: Use CIA not PC in branch calculations.
2572 (illegal): Call SignalException.
2573 (BEQ, ADDIU): Fix assembler.
2575 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2577 * m16.igen (JALX): Was missing.
2579 * configure.in (enable-sim-igen): New configuration option.
2580 * configure: Re-generate.
2582 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2584 * interp.c (load_memory, store_memory): Delete parameter RAW.
2585 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2586 bypassing {load,store}_memory.
2588 * sim-main.h (ByteSwapMem): Delete definition.
2590 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2592 * interp.c (sim_do_command, sim_commands): Delete mips specific
2593 commands. Handled by module sim-options.
2595 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2596 (WITH_MODULO_MEMORY): Define.
2598 * interp.c (sim_info): Delete code printing memory size.
2600 * interp.c (mips_size): Nee sim_size, delete function.
2602 (monitor, monitor_base, monitor_size): Delete global variables.
2603 (sim_open, sim_close): Delete code creating monitor and other
2604 memory regions. Use sim-memopts module, via sim_do_commandf, to
2605 manage memory regions.
2606 (load_memory, store_memory): Use sim-core for memory model.
2608 * interp.c (address_translation): Delete all memory map code
2609 except line forcing 32 bit addresses.
2611 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2613 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2616 * interp.c (logfh, logfile): Delete globals.
2617 (sim_open, sim_close): Delete code opening & closing log file.
2618 (mips_option_handler): Delete -l and -n options.
2619 (OPTION mips_options): Ditto.
2621 * interp.c (OPTION mips_options): Rename option trace to dinero.
2622 (mips_option_handler): Update.
2624 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2626 * interp.c (fetch_str): New function.
2627 (sim_monitor): Rewrite using sim_read & sim_write.
2628 (sim_open): Check magic number.
2629 (sim_open): Write monitor vectors into memory using sim_write.
2630 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2631 (sim_read, sim_write): Simplify - transfer data one byte at a
2633 (load_memory, store_memory): Clarify meaning of parameter RAW.
2635 * sim-main.h (isHOST): Defete definition.
2636 (isTARGET): Mark as depreciated.
2637 (address_translation): Delete parameter HOST.
2639 * interp.c (address_translation): Delete parameter HOST.
2641 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2645 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2646 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2648 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2650 * mips.igen: Add model filter field to records.
2652 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2654 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2656 interp.c (sim_engine_run): Do not compile function sim_engine_run
2657 when WITH_IGEN == 1.
2659 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2660 target architecture.
2662 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2663 igen. Replace with configuration variables sim_igen_flags /
2666 * m16.igen: New file. Copy mips16 insns here.
2667 * mips.igen: From here.
2669 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2671 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2673 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2675 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2677 * gencode.c (build_instruction): Follow sim_write's lead in using
2678 BigEndianMem instead of !ByteSwapMem.
2680 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2682 * configure.in (sim_gen): Dependent on target, select type of
2683 generator. Always select old style generator.
2685 configure: Re-generate.
2687 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2689 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2690 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2691 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2692 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2693 SIM_@sim_gen@_*, set by autoconf.
2695 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2697 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2699 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2700 CURRENT_FLOATING_POINT instead.
2702 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2703 (address_translation): Raise exception InstructionFetch when
2704 translation fails and isINSTRUCTION.
2706 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2707 sim_engine_run): Change type of of vaddr and paddr to
2709 (address_translation, prefetch, load_memory, store_memory,
2710 cache_op): Change type of vAddr and pAddr to address_word.
2712 * gencode.c (build_instruction): Change type of vaddr and paddr to
2715 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2717 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2718 macro to obtain result of ALU op.
2720 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2722 * interp.c (sim_info): Call profile_print.
2724 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2728 * sim-main.h (WITH_PROFILE): Do not define, defined in
2729 common/sim-config.h. Use sim-profile module.
2730 (simPROFILE): Delete defintion.
2732 * interp.c (PROFILE): Delete definition.
2733 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2734 (sim_close): Delete code writing profile histogram.
2735 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2737 (sim_engine_run): Delete code profiling the PC.
2739 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2743 * interp.c (sim_monitor): Make register pointers of type
2746 * sim-main.h: Make registers of type unsigned_word not
2749 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2751 * interp.c (sync_operation): Rename from SyncOperation, make
2752 global, add SD argument.
2753 (prefetch): Rename from Prefetch, make global, add SD argument.
2754 (decode_coproc): Make global.
2756 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2758 * gencode.c (build_instruction): Generate DecodeCoproc not
2759 decode_coproc calls.
2761 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2762 (SizeFGR): Move to sim-main.h
2763 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2764 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2765 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2767 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2768 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2769 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2770 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2771 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2772 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2774 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2776 (sim-alu.h): Include.
2777 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2778 (sim_cia): Typedef to instruction_address.
2780 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2782 * Makefile.in (interp.o): Rename generated file engine.c to
2787 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2789 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2791 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * gencode.c (build_instruction): For "FPSQRT", output correct
2794 number of arguments to Recip.
2796 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * Makefile.in (interp.o): Depends on sim-main.h
2800 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2802 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2803 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2804 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2805 STATE, DSSTATE): Define
2806 (GPR, FGRIDX, ..): Define.
2808 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2809 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2810 (GPR, FGRIDX, ...): Delete macros.
2812 * interp.c: Update names to match defines from sim-main.h
2814 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2816 * interp.c (sim_monitor): Add SD argument.
2817 (sim_warning): Delete. Replace calls with calls to
2819 (sim_error): Delete. Replace calls with sim_io_error.
2820 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2821 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2822 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2824 (mips_size): Rename from sim_size. Add SD argument.
2826 * interp.c (simulator): Delete global variable.
2827 (callback): Delete global variable.
2828 (mips_option_handler, sim_open, sim_write, sim_read,
2829 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2830 sim_size,sim_monitor): Use sim_io_* not callback->*.
2831 (sim_open): ZALLOC simulator struct.
2832 (PROFILE): Do not define.
2834 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2836 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2837 support.h with corresponding code.
2839 * sim-main.h (word64, uword64), support.h: Move definition to
2841 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2844 * Makefile.in: Update dependencies
2845 * interp.c: Do not include.
2847 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2849 * interp.c (address_translation, load_memory, store_memory,
2850 cache_op): Rename to from AddressTranslation et.al., make global,
2853 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2856 * interp.c (SignalException): Rename to signal_exception, make
2859 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2861 * sim-main.h (SignalException, SignalExceptionInterrupt,
2862 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2863 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2864 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2867 * interp.c, support.h: Use.
2869 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2871 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2872 to value_fpr / store_fpr. Add SD argument.
2873 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2874 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2876 * sim-main.h (ValueFPR, StoreFPR): Define.
2878 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2880 * interp.c (sim_engine_run): Check consistency between configure
2881 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2884 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2885 (mips_fpu): Configure WITH_FLOATING_POINT.
2886 (mips_endian): Configure WITH_TARGET_ENDIAN.
2887 * configure: Update.
2889 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2891 * configure: Regenerated to track ../common/aclocal.m4 changes.
2893 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2895 * configure: Regenerated.
2897 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2899 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2901 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2903 * gencode.c (print_igen_insn_models): Assume certain architectures
2904 include all mips* instructions.
2905 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2908 * Makefile.in (tmp.igen): Add target. Generate igen input from
2911 * gencode.c (FEATURE_IGEN): Define.
2912 (main): Add --igen option. Generate output in igen format.
2913 (process_instructions): Format output according to igen option.
2914 (print_igen_insn_format): New function.
2915 (print_igen_insn_models): New function.
2916 (process_instructions): Only issue warnings and ignore
2917 instructions when no FEATURE_IGEN.
2919 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2921 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2924 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2926 * configure: Regenerated to track ../common/aclocal.m4 changes.
2928 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2930 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2931 SIM_RESERVED_BITS): Delete, moved to common.
2932 (SIM_EXTRA_CFLAGS): Update.
2934 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2936 * configure.in: Configure non-strict memory alignment.
2937 * configure: Regenerated to track ../common/aclocal.m4 changes.
2939 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2941 * configure: Regenerated to track ../common/aclocal.m4 changes.
2943 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2945 * gencode.c (SDBBP,DERET): Added (3900) insns.
2946 (RFE): Turn on for 3900.
2947 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2948 (dsstate): Made global.
2949 (SUBTARGET_R3900): Added.
2950 (CANCELDELAYSLOT): New.
2951 (SignalException): Ignore SystemCall rather than ignore and
2952 terminate. Add DebugBreakPoint handling.
2953 (decode_coproc): New insns RFE, DERET; and new registers Debug
2954 and DEPC protected by SUBTARGET_R3900.
2955 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2957 * Makefile.in,configure.in: Add mips subtarget option.
2958 * configure: Update.
2960 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2962 * gencode.c: Add r3900 (tx39).
2965 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2967 * gencode.c (build_instruction): Don't need to subtract 4 for
2970 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2972 * interp.c: Correct some HASFPU problems.
2974 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2976 * configure: Regenerated to track ../common/aclocal.m4 changes.
2978 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2980 * interp.c (mips_options): Fix samples option short form, should
2983 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2985 * interp.c (sim_info): Enable info code. Was just returning.
2987 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2989 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2992 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2994 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2996 (build_instruction): Ditto for LL.
2998 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3000 * configure: Regenerated to track ../common/aclocal.m4 changes.
3002 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3004 * configure: Regenerated to track ../common/aclocal.m4 changes.
3007 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3009 * interp.c (sim_open): Add call to sim_analyze_program, update
3012 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3014 * interp.c (sim_kill): Delete.
3015 (sim_create_inferior): Add ABFD argument. Set PC from same.
3016 (sim_load): Move code initializing trap handlers from here.
3017 (sim_open): To here.
3018 (sim_load): Delete, use sim-hload.c.
3020 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3022 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3024 * configure: Regenerated to track ../common/aclocal.m4 changes.
3027 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3029 * interp.c (sim_open): Add ABFD argument.
3030 (sim_load): Move call to sim_config from here.
3031 (sim_open): To here. Check return status.
3033 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3035 * gencode.c (build_instruction): Two arg MADD should
3036 not assign result to $0.
3038 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3040 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3041 * sim/mips/configure.in: Regenerate.
3043 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3045 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3046 signed8, unsigned8 et.al. types.
3048 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3049 hosts when selecting subreg.
3051 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3053 * interp.c (sim_engine_run): Reset the ZERO register to zero
3054 regardless of FEATURE_WARN_ZERO.
3055 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3057 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3059 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3060 (SignalException): For BreakPoints ignore any mode bits and just
3062 (SignalException): Always set the CAUSE register.
3064 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3066 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3067 exception has been taken.
3069 * interp.c: Implement the ERET and mt/f sr instructions.
3071 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3073 * interp.c (SignalException): Don't bother restarting an
3076 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3078 * interp.c (SignalException): Really take an interrupt.
3079 (interrupt_event): Only deliver interrupts when enabled.
3081 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3083 * interp.c (sim_info): Only print info when verbose.
3084 (sim_info) Use sim_io_printf for output.
3086 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3088 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3091 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3093 * interp.c (sim_do_command): Check for common commands if a
3094 simulator specific command fails.
3096 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3098 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3099 and simBE when DEBUG is defined.
3101 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3103 * interp.c (interrupt_event): New function. Pass exception event
3104 onto exception handler.
3106 * configure.in: Check for stdlib.h.
3107 * configure: Regenerate.
3109 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3110 variable declaration.
3111 (build_instruction): Initialize memval1.
3112 (build_instruction): Add UNUSED attribute to byte, bigend,
3114 (build_operands): Ditto.
3116 * interp.c: Fix GCC warnings.
3117 (sim_get_quit_code): Delete.
3119 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3120 * Makefile.in: Ditto.
3121 * configure: Re-generate.
3123 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3125 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3127 * interp.c (mips_option_handler): New function parse argumes using
3129 (myname): Replace with STATE_MY_NAME.
3130 (sim_open): Delete check for host endianness - performed by
3132 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3133 (sim_open): Move much of the initialization from here.
3134 (sim_load): To here. After the image has been loaded and
3136 (sim_open): Move ColdReset from here.
3137 (sim_create_inferior): To here.
3138 (sim_open): Make FP check less dependant on host endianness.
3140 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3142 * interp.c (sim_set_callbacks): Delete.
3144 * interp.c (membank, membank_base, membank_size): Replace with
3145 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3146 (sim_open): Remove call to callback->init. gdb/run do this.
3150 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3152 * interp.c (big_endian_p): Delete, replaced by
3153 current_target_byte_order.
3155 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3157 * interp.c (host_read_long, host_read_word, host_swap_word,
3158 host_swap_long): Delete. Using common sim-endian.
3159 (sim_fetch_register, sim_store_register): Use H2T.
3160 (pipeline_ticks): Delete. Handled by sim-events.
3162 (sim_engine_run): Update.
3164 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3166 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3168 (SignalException): To here. Signal using sim_engine_halt.
3169 (sim_stop_reason): Delete, moved to common.
3171 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3173 * interp.c (sim_open): Add callback argument.
3174 (sim_set_callbacks): Delete SIM_DESC argument.
3177 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3179 * Makefile.in (SIM_OBJS): Add common modules.
3181 * interp.c (sim_set_callbacks): Also set SD callback.
3182 (set_endianness, xfer_*, swap_*): Delete.
3183 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3184 Change to functions using sim-endian macros.
3185 (control_c, sim_stop): Delete, use common version.
3186 (simulate): Convert into.
3187 (sim_engine_run): This function.
3188 (sim_resume): Delete.
3190 * interp.c (simulation): New variable - the simulator object.
3191 (sim_kind): Delete global - merged into simulation.
3192 (sim_load): Cleanup. Move PC assignment from here.
3193 (sim_create_inferior): To here.
3195 * sim-main.h: New file.
3196 * interp.c (sim-main.h): Include.
3198 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3200 * configure: Regenerated to track ../common/aclocal.m4 changes.
3202 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3204 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3206 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3208 * gencode.c (build_instruction): DIV instructions: check
3209 for division by zero and integer overflow before using
3210 host's division operation.
3212 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3214 * Makefile.in (SIM_OBJS): Add sim-load.o.
3215 * interp.c: #include bfd.h.
3216 (target_byte_order): Delete.
3217 (sim_kind, myname, big_endian_p): New static locals.
3218 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3219 after argument parsing. Recognize -E arg, set endianness accordingly.
3220 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3221 load file into simulator. Set PC from bfd.
3222 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3223 (set_endianness): Use big_endian_p instead of target_byte_order.
3225 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3227 * interp.c (sim_size): Delete prototype - conflicts with
3228 definition in remote-sim.h. Correct definition.
3230 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3232 * configure: Regenerated to track ../common/aclocal.m4 changes.
3235 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3237 * interp.c (sim_open): New arg `kind'.
3239 * configure: Regenerated to track ../common/aclocal.m4 changes.
3241 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3243 * configure: Regenerated to track ../common/aclocal.m4 changes.
3245 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3247 * interp.c (sim_open): Set optind to 0 before calling getopt.
3249 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3251 * configure: Regenerated to track ../common/aclocal.m4 changes.
3253 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3255 * interp.c : Replace uses of pr_addr with pr_uword64
3256 where the bit length is always 64 independent of SIM_ADDR.
3257 (pr_uword64) : added.
3259 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3261 * configure: Re-generate.
3263 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3265 * configure: Regenerate to track ../common/aclocal.m4 changes.
3267 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3269 * interp.c (sim_open): New SIM_DESC result. Argument is now
3271 (other sim_*): New SIM_DESC argument.
3273 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3275 * interp.c: Fix printing of addresses for non-64-bit targets.
3276 (pr_addr): Add function to print address based on size.
3278 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3280 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3282 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3284 * gencode.c (build_mips16_operands): Correct computation of base
3285 address for extended PC relative instruction.
3287 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3289 * interp.c (mips16_entry): Add support for floating point cases.
3290 (SignalException): Pass floating point cases to mips16_entry.
3291 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3293 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3295 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3296 and then set the state to fmt_uninterpreted.
3297 (COP_SW): Temporarily set the state to fmt_word while calling
3300 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3302 * gencode.c (build_instruction): The high order may be set in the
3303 comparison flags at any ISA level, not just ISA 4.
3305 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3307 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3308 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3309 * configure.in: sinclude ../common/aclocal.m4.
3310 * configure: Regenerated.
3312 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3314 * configure: Rebuild after change to aclocal.m4.
3316 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3318 * configure configure.in Makefile.in: Update to new configure
3319 scheme which is more compatible with WinGDB builds.
3320 * configure.in: Improve comment on how to run autoconf.
3321 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3322 * Makefile.in: Use autoconf substitution to install common
3325 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3327 * gencode.c (build_instruction): Use BigEndianCPU instead of
3330 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3332 * interp.c (sim_monitor): Make output to stdout visible in
3333 wingdb's I/O log window.
3335 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3337 * support.h: Undo previous change to SIGTRAP
3340 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3342 * interp.c (store_word, load_word): New static functions.
3343 (mips16_entry): New static function.
3344 (SignalException): Look for mips16 entry and exit instructions.
3345 (simulate): Use the correct index when setting fpr_state after
3346 doing a pending move.
3348 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3350 * interp.c: Fix byte-swapping code throughout to work on
3351 both little- and big-endian hosts.
3353 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3355 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3356 with gdb/config/i386/xm-windows.h.
3358 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3360 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3361 that messes up arithmetic shifts.
3363 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3365 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3366 SIGTRAP and SIGQUIT for _WIN32.
3368 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3370 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3371 force a 64 bit multiplication.
3372 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3373 destination register is 0, since that is the default mips16 nop
3376 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3378 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3379 (build_endian_shift): Don't check proc64.
3380 (build_instruction): Always set memval to uword64. Cast op2 to
3381 uword64 when shifting it left in memory instructions. Always use
3382 the same code for stores--don't special case proc64.
3384 * gencode.c (build_mips16_operands): Fix base PC value for PC
3386 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3388 * interp.c (simJALDELAYSLOT): Define.
3389 (JALDELAYSLOT): Define.
3390 (INDELAYSLOT, INJALDELAYSLOT): Define.
3391 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3393 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3395 * interp.c (sim_open): add flush_cache as a PMON routine
3396 (sim_monitor): handle flush_cache by ignoring it
3398 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3400 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3402 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3403 (BigEndianMem): Rename to ByteSwapMem and change sense.
3404 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3405 BigEndianMem references to !ByteSwapMem.
3406 (set_endianness): New function, with prototype.
3407 (sim_open): Call set_endianness.
3408 (sim_info): Use simBE instead of BigEndianMem.
3409 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3410 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3411 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3412 ifdefs, keeping the prototype declaration.
3413 (swap_word): Rewrite correctly.
3414 (ColdReset): Delete references to CONFIG. Delete endianness related
3415 code; moved to set_endianness.
3417 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3419 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3420 * interp.c (CHECKHILO): Define away.
3421 (simSIGINT): New macro.
3422 (membank_size): Increase from 1MB to 2MB.
3423 (control_c): New function.
3424 (sim_resume): Rename parameter signal to signal_number. Add local
3425 variable prev. Call signal before and after simulate.
3426 (sim_stop_reason): Add simSIGINT support.
3427 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3429 (sim_warning): Delete call to SignalException. Do call printf_filtered
3431 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3432 a call to sim_warning.
3434 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3436 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3437 16 bit instructions.
3439 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3441 Add support for mips16 (16 bit MIPS implementation):
3442 * gencode.c (inst_type): Add mips16 instruction encoding types.
3443 (GETDATASIZEINSN): Define.
3444 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3445 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3447 (MIPS16_DECODE): New table, for mips16 instructions.
3448 (bitmap_val): New static function.
3449 (struct mips16_op): Define.
3450 (mips16_op_table): New table, for mips16 operands.
3451 (build_mips16_operands): New static function.
3452 (process_instructions): If PC is odd, decode a mips16
3453 instruction. Break out instruction handling into new
3454 build_instruction function.
3455 (build_instruction): New static function, broken out of
3456 process_instructions. Check modifiers rather than flags for SHIFT
3457 bit count and m[ft]{hi,lo} direction.
3458 (usage): Pass program name to fprintf.
3459 (main): Remove unused variable this_option_optind. Change
3460 ``*loptarg++'' to ``loptarg++''.
3461 (my_strtoul): Parenthesize && within ||.
3462 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3463 (simulate): If PC is odd, fetch a 16 bit instruction, and
3464 increment PC by 2 rather than 4.
3465 * configure.in: Add case for mips16*-*-*.
3466 * configure: Rebuild.
3468 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3470 * interp.c: Allow -t to enable tracing in standalone simulator.
3471 Fix garbage output in trace file and error messages.
3473 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3475 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3476 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3477 * configure.in: Simplify using macros in ../common/aclocal.m4.
3478 * configure: Regenerated.
3479 * tconfig.in: New file.
3481 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3483 * interp.c: Fix bugs in 64-bit port.
3484 Use ansi function declarations for msvc compiler.
3485 Initialize and test file pointer in trace code.
3486 Prevent duplicate definition of LAST_EMED_REGNUM.
3488 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3490 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3492 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3494 * interp.c (SignalException): Check for explicit terminating
3496 * gencode.c: Pass instruction value through SignalException()
3497 calls for Trap, Breakpoint and Syscall.
3499 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3501 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3502 only used on those hosts that provide it.
3503 * configure.in: Add sqrt() to list of functions to be checked for.
3504 * config.in: Re-generated.
3505 * configure: Re-generated.
3507 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3509 * gencode.c (process_instructions): Call build_endian_shift when
3510 expanding STORE RIGHT, to fix swr.
3511 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3512 clear the high bits.
3513 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3514 Fix float to int conversions to produce signed values.
3516 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3518 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3519 (process_instructions): Correct handling of nor instruction.
3520 Correct shift count for 32 bit shift instructions. Correct sign
3521 extension for arithmetic shifts to not shift the number of bits in
3522 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3523 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3525 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3526 It's OK to have a mult follow a mult. What's not OK is to have a
3527 mult follow an mfhi.
3528 (Convert): Comment out incorrect rounding code.
3530 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3532 * interp.c (sim_monitor): Improved monitor printf
3533 simulation. Tidied up simulator warnings, and added "--log" option
3534 for directing warning message output.
3535 * gencode.c: Use sim_warning() rather than WARNING macro.
3537 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3539 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3540 getopt1.o, rather than on gencode.c. Link objects together.
3541 Don't link against -liberty.
3542 (gencode.o, getopt.o, getopt1.o): New targets.
3543 * gencode.c: Include <ctype.h> and "ansidecl.h".
3544 (AND): Undefine after including "ansidecl.h".
3545 (ULONG_MAX): Define if not defined.
3546 (OP_*): Don't define macros; now defined in opcode/mips.h.
3547 (main): Call my_strtoul rather than strtoul.
3548 (my_strtoul): New static function.
3550 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3552 * gencode.c (process_instructions): Generate word64 and uword64
3553 instead of `long long' and `unsigned long long' data types.
3554 * interp.c: #include sysdep.h to get signals, and define default
3556 * (Convert): Work around for Visual-C++ compiler bug with type
3558 * support.h: Make things compile under Visual-C++ by using
3559 __int64 instead of `long long'. Change many refs to long long
3560 into word64/uword64 typedefs.
3562 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3564 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3565 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3567 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3568 (AC_PROG_INSTALL): Added.
3569 (AC_PROG_CC): Moved to before configure.host call.
3570 * configure: Rebuilt.
3572 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3574 * configure.in: Define @SIMCONF@ depending on mips target.
3575 * configure: Rebuild.
3576 * Makefile.in (run): Add @SIMCONF@ to control simulator
3578 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3579 * interp.c: Remove some debugging, provide more detailed error
3580 messages, update memory accesses to use LOADDRMASK.
3582 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3584 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3585 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3587 * configure: Rebuild.
3588 * config.in: New file, generated by autoheader.
3589 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3590 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3591 HAVE_ANINT and HAVE_AINT, as appropriate.
3592 * Makefile.in (run): Use @LIBS@ rather than -lm.
3593 (interp.o): Depend upon config.h.
3594 (Makefile): Just rebuild Makefile.
3595 (clean): Remove stamp-h.
3596 (mostlyclean): Make the same as clean, not as distclean.
3597 (config.h, stamp-h): New targets.
3599 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3601 * interp.c (ColdReset): Fix boolean test. Make all simulator
3604 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3606 * interp.c (xfer_direct_word, xfer_direct_long,
3607 swap_direct_word, swap_direct_long, xfer_big_word,
3608 xfer_big_long, xfer_little_word, xfer_little_long,
3609 swap_word,swap_long): Added.
3610 * interp.c (ColdReset): Provide function indirection to
3611 host<->simulated_target transfer routines.
3612 * interp.c (sim_store_register, sim_fetch_register): Updated to
3613 make use of indirected transfer routines.
3615 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3617 * gencode.c (process_instructions): Ensure FP ABS instruction
3619 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3620 system call support.
3622 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3624 * interp.c (sim_do_command): Complain if callback structure not
3627 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3629 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3630 support for Sun hosts.
3631 * Makefile.in (gencode): Ensure the host compiler and libraries
3632 used for cross-hosted build.
3634 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3636 * interp.c, gencode.c: Some more (TODO) tidying.
3638 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3640 * gencode.c, interp.c: Replaced explicit long long references with
3641 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3642 * support.h (SET64LO, SET64HI): Macros added.
3644 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3646 * configure: Regenerate with autoconf 2.7.
3648 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3650 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3651 * support.h: Remove superfluous "1" from #if.
3652 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3654 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3656 * interp.c (StoreFPR): Control UndefinedResult() call on
3657 WARN_RESULT manifest.
3659 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3661 * gencode.c: Tidied instruction decoding, and added FP instruction
3664 * interp.c: Added dineroIII, and BSD profiling support. Also
3665 run-time FP handling.
3667 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3669 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3670 gencode.c, interp.c, support.h: created.
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