1 2015-04-13 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2015-04-13 Mike Frysinger <vapier@gentoo.org>
7 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
8 * interp.c (mips_pc_get, mips_pc_set): New functions.
9 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
10 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
12 * sim-main.h (SIM_CPU): Define.
13 (struct sim_state): Change cpu to an array of pointers.
16 2015-04-13 Mike Frysinger <vapier@gentoo.org>
18 * interp.c (mips_option_handler, open_trace, sim_close,
19 sim_write, sim_read, sim_store_register, sim_fetch_register,
20 sim_create_inferior, pr_addr, pr_uword64): Convert old style
22 (sim_open): Convert old style prototype. Change casts with
23 sim_write to unsigned char *.
24 (fetch_str): Change null to unsigned char, and change cast to
26 (sim_monitor): Change c & ch to unsigned char. Change cast to
29 2015-04-12 Mike Frysinger <vapier@gentoo.org>
31 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
33 2015-04-06 Mike Frysinger <vapier@gentoo.org>
35 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
37 2015-04-01 Mike Frysinger <vapier@gentoo.org>
39 * tconfig.h (SIM_HAVE_PROFILE): Delete.
41 2015-03-31 Mike Frysinger <vapier@gentoo.org>
43 * config.in, configure: Regenerate.
45 2015-03-24 Mike Frysinger <vapier@gentoo.org>
47 * interp.c (sim_pc_get): New function.
49 2015-03-24 Mike Frysinger <vapier@gentoo.org>
51 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
52 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
54 2015-03-24 Mike Frysinger <vapier@gentoo.org>
56 * configure: Regenerate.
58 2015-03-23 Mike Frysinger <vapier@gentoo.org>
60 * configure: Regenerate.
62 2015-03-23 Mike Frysinger <vapier@gentoo.org>
64 * configure: Regenerate.
65 * configure.ac (mips_extra_objs): Delete.
66 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
67 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
69 2015-03-23 Mike Frysinger <vapier@gentoo.org>
71 * configure: Regenerate.
72 * configure.ac: Delete sim_hw checks for dv-sockser.
74 2015-03-16 Mike Frysinger <vapier@gentoo.org>
76 * config.in, configure: Regenerate.
77 * tconfig.in: Rename file ...
78 * tconfig.h: ... here.
80 2015-03-15 Mike Frysinger <vapier@gentoo.org>
82 * tconfig.in: Delete includes.
83 [HAVE_DV_SOCKSER]: Delete.
85 2015-03-14 Mike Frysinger <vapier@gentoo.org>
87 * Makefile.in (SIM_RUN_OBJS): Delete.
89 2015-03-14 Mike Frysinger <vapier@gentoo.org>
91 * configure.ac (AC_CHECK_HEADERS): Delete.
92 * aclocal.m4, configure: Regenerate.
94 2014-08-19 Alan Modra <amodra@gmail.com>
96 * configure: Regenerate.
98 2014-08-15 Roland McGrath <mcgrathr@google.com>
100 * configure: Regenerate.
101 * config.in: Regenerate.
103 2014-03-04 Mike Frysinger <vapier@gentoo.org>
105 * configure: Regenerate.
107 2013-09-23 Alan Modra <amodra@gmail.com>
109 * configure: Regenerate.
111 2013-06-03 Mike Frysinger <vapier@gentoo.org>
113 * aclocal.m4, configure: Regenerate.
115 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
117 * configure: Rebuild.
119 2013-03-26 Mike Frysinger <vapier@gentoo.org>
121 * configure: Regenerate.
123 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
125 * configure.ac: Address use of dv-sockser.o.
126 * tconfig.in: Conditionalize use of dv_sockser_install.
127 * configure: Regenerated.
128 * config.in: Regenerated.
130 2012-10-04 Chao-ying Fu <fu@mips.com>
131 Steve Ellcey <sellcey@mips.com>
133 * mips/mips3264r2.igen (rdhwr): New.
135 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
137 * configure.ac: Always link against dv-sockser.o.
138 * configure: Regenerate.
140 2012-06-15 Joel Brobecker <brobecker@adacore.com>
142 * config.in, configure: Regenerate.
144 2012-05-18 Nick Clifton <nickc@redhat.com>
147 * interp.c: Include config.h before system header files.
149 2012-03-24 Mike Frysinger <vapier@gentoo.org>
151 * aclocal.m4, config.in, configure: Regenerate.
153 2011-12-03 Mike Frysinger <vapier@gentoo.org>
155 * aclocal.m4: New file.
156 * configure: Regenerate.
158 2011-10-19 Mike Frysinger <vapier@gentoo.org>
160 * configure: Regenerate after common/acinclude.m4 update.
162 2011-10-17 Mike Frysinger <vapier@gentoo.org>
164 * configure.ac: Change include to common/acinclude.m4.
166 2011-10-17 Mike Frysinger <vapier@gentoo.org>
168 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
169 call. Replace common.m4 include with SIM_AC_COMMON.
170 * configure: Regenerate.
172 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
174 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
176 (tmp-mach-multi): Exit early when igen fails.
178 2011-07-05 Mike Frysinger <vapier@gentoo.org>
180 * interp.c (sim_do_command): Delete.
182 2011-02-14 Mike Frysinger <vapier@gentoo.org>
184 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
185 (tx3904sio_fifo_reset): Likewise.
186 * interp.c (sim_monitor): Likewise.
188 2010-04-14 Mike Frysinger <vapier@gentoo.org>
190 * interp.c (sim_write): Add const to buffer arg.
192 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
194 * interp.c: Don't include sysdep.h
196 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
198 * configure: Regenerate.
200 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
202 * config.in: Regenerate.
203 * configure: Likewise.
205 * configure: Regenerate.
207 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
209 * configure: Regenerate to track ../common/common.m4 changes.
212 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
213 Daniel Jacobowitz <dan@codesourcery.com>
214 Joseph Myers <joseph@codesourcery.com>
216 * configure: Regenerate.
218 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
220 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
221 that unconditionally allows fmt_ps.
222 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
223 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
224 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
225 filter from 64,f to 32,f.
226 (PREFX): Change filter from 64 to 32.
227 (LDXC1, LUXC1): Provide separate mips32r2 implementations
228 that use do_load_double instead of do_load. Make both LUXC1
229 versions unpredictable if SizeFGR () != 64.
230 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
231 instead of do_store. Remove unused variable. Make both SUXC1
232 versions unpredictable if SizeFGR () != 64.
234 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
236 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
237 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
238 shifts for that case.
240 2007-09-04 Nick Clifton <nickc@redhat.com>
242 * interp.c (options enum): Add OPTION_INFO_MEMORY.
243 (display_mem_info): New static variable.
244 (mips_option_handler): Handle OPTION_INFO_MEMORY.
245 (mips_options): Add info-memory and memory-info.
246 (sim_open): After processing the command line and board
247 specification, check display_mem_info. If it is set then
248 call the real handler for the --memory-info command line
251 2007-08-24 Joel Brobecker <brobecker@adacore.com>
253 * configure.ac: Change license of multi-run.c to GPL version 3.
254 * configure: Regenerate.
256 2007-06-28 Richard Sandiford <richard@codesourcery.com>
258 * configure.ac, configure: Revert last patch.
260 2007-06-26 Richard Sandiford <richard@codesourcery.com>
262 * configure.ac (sim_mipsisa3264_configs): New variable.
263 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
264 every configuration support all four targets, using the triplet to
265 determine the default.
266 * configure: Regenerate.
268 2007-06-25 Richard Sandiford <richard@codesourcery.com>
270 * Makefile.in (m16run.o): New rule.
272 2007-05-15 Thiemo Seufer <ths@mips.com>
274 * mips3264r2.igen (DSHD): Fix compile warning.
276 2007-05-14 Thiemo Seufer <ths@mips.com>
278 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
279 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
280 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
281 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
284 2007-03-01 Thiemo Seufer <ths@mips.com>
286 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
289 2007-02-20 Thiemo Seufer <ths@mips.com>
291 * dsp.igen: Update copyright notice.
292 * dsp2.igen: Fix copyright notice.
294 2007-02-20 Thiemo Seufer <ths@mips.com>
295 Chao-Ying Fu <fu@mips.com>
297 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
298 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
299 Add dsp2 to sim_igen_machine.
300 * configure: Regenerate.
301 * dsp.igen (do_ph_op): Add MUL support when op = 2.
302 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
303 (mulq_rs.ph): Use do_ph_mulq.
304 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
305 * mips.igen: Add dsp2 model and include dsp2.igen.
306 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
307 for *mips32r2, *mips64r2, *dsp.
308 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
309 for *mips32r2, *mips64r2, *dsp2.
310 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
312 2007-02-19 Thiemo Seufer <ths@mips.com>
313 Nigel Stephens <nigel@mips.com>
315 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
316 jumps with hazard barrier.
318 2007-02-19 Thiemo Seufer <ths@mips.com>
319 Nigel Stephens <nigel@mips.com>
321 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
322 after each call to sim_io_write.
324 2007-02-19 Thiemo Seufer <ths@mips.com>
325 Nigel Stephens <nigel@mips.com>
327 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
328 supported by this simulator.
329 (decode_coproc): Recognise additional CP0 Config registers
332 2007-02-19 Thiemo Seufer <ths@mips.com>
333 Nigel Stephens <nigel@mips.com>
334 David Ung <davidu@mips.com>
336 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
337 uninterpreted formats. If fmt is one of the uninterpreted types
338 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
339 fmt_word, and fmt_uninterpreted_64 like fmt_long.
340 (store_fpr): When writing an invalid odd register, set the
341 matching even register to fmt_unknown, not the following register.
342 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
343 the the memory window at offset 0 set by --memory-size command
345 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
347 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
349 (sim_monitor): When returning the memory size to the MIPS
350 application, use the value in STATE_MEM_SIZE, not an arbitrary
352 (cop_lw): Don' mess around with FPR_STATE, just pass
353 fmt_uninterpreted_32 to StoreFPR.
355 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
357 * mips.igen (not_word_value): Single version for mips32, mips64
360 2007-02-19 Thiemo Seufer <ths@mips.com>
361 Nigel Stephens <nigel@mips.com>
363 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
366 2007-02-17 Thiemo Seufer <ths@mips.com>
368 * configure.ac (mips*-sde-elf*): Move in front of generic machine
370 * configure: Regenerate.
372 2007-02-17 Thiemo Seufer <ths@mips.com>
374 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
375 Add mdmx to sim_igen_machine.
376 (mipsisa64*-*-*): Likewise. Remove dsp.
377 (mipsisa32*-*-*): Remove dsp.
378 * configure: Regenerate.
380 2007-02-13 Thiemo Seufer <ths@mips.com>
382 * configure.ac: Add mips*-sde-elf* target.
383 * configure: Regenerate.
385 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
387 * acconfig.h: Remove.
388 * config.in, configure: Regenerate.
390 2006-11-07 Thiemo Seufer <ths@mips.com>
392 * dsp.igen (do_w_op): Fix compiler warning.
394 2006-08-29 Thiemo Seufer <ths@mips.com>
395 David Ung <davidu@mips.com>
397 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
399 * configure: Regenerate.
400 * mips.igen (model): Add smartmips.
401 (MADDU): Increment ACX if carry.
402 (do_mult): Clear ACX.
403 (ROR,RORV): Add smartmips.
404 (include): Include smartmips.igen.
405 * sim-main.h (ACX): Set to REGISTERS[89].
406 * smartmips.igen: New file.
408 2006-08-29 Thiemo Seufer <ths@mips.com>
409 David Ung <davidu@mips.com>
411 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
412 mips3264r2.igen. Add missing dependency rules.
413 * m16e.igen: Support for mips16e save/restore instructions.
415 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
417 * configure: Regenerated.
419 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
421 * configure: Regenerated.
423 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
425 * configure: Regenerated.
427 2006-05-15 Chao-ying Fu <fu@mips.com>
429 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
431 2006-04-18 Nick Clifton <nickc@redhat.com>
433 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
436 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
438 * configure: Regenerate.
440 2005-12-14 Chao-ying Fu <fu@mips.com>
442 * Makefile.in (SIM_OBJS): Add dsp.o.
443 (dsp.o): New dependency.
444 (IGEN_INCLUDE): Add dsp.igen.
445 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
446 mipsisa64*-*-*): Add dsp to sim_igen_machine.
447 * configure: Regenerate.
448 * mips.igen: Add dsp model and include dsp.igen.
449 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
450 because these instructions are extended in DSP ASE.
451 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
452 adding 6 DSP accumulator registers and 1 DSP control register.
453 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
454 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
455 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
456 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
457 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
458 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
459 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
460 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
461 DSPCR_CCOND_SMASK): New define.
462 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
463 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
465 2005-07-08 Ian Lance Taylor <ian@airs.com>
467 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
469 2005-06-16 David Ung <davidu@mips.com>
470 Nigel Stephens <nigel@mips.com>
472 * mips.igen: New mips16e model and include m16e.igen.
473 (check_u64): Add mips16e tag.
474 * m16e.igen: New file for MIPS16e instructions.
475 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
476 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
478 * configure: Regenerate.
480 2005-05-26 David Ung <davidu@mips.com>
482 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
483 tags to all instructions which are applicable to the new ISAs.
484 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
486 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
488 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
490 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
491 * configure: Regenerate.
493 2005-03-23 Mark Kettenis <kettenis@gnu.org>
495 * configure: Regenerate.
497 2005-01-14 Andrew Cagney <cagney@gnu.org>
499 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
500 explicit call to AC_CONFIG_HEADER.
501 * configure: Regenerate.
503 2005-01-12 Andrew Cagney <cagney@gnu.org>
505 * configure.ac: Update to use ../common/common.m4.
506 * configure: Re-generate.
508 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
510 * configure: Regenerated to track ../common/aclocal.m4 changes.
512 2005-01-07 Andrew Cagney <cagney@gnu.org>
514 * configure.ac: Rename configure.in, require autoconf 2.59.
515 * configure: Re-generate.
517 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
519 * configure: Regenerate for ../common/aclocal.m4 update.
521 2004-09-24 Monika Chaddha <monika@acmet.com>
523 Committed by Andrew Cagney.
524 * m16.igen (CMP, CMPI): Fix assembler.
526 2004-08-18 Chris Demetriou <cgd@broadcom.com>
528 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
529 * configure: Regenerate.
531 2004-06-25 Chris Demetriou <cgd@broadcom.com>
533 * configure.in (sim_m16_machine): Include mipsIII.
534 * configure: Regenerate.
536 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
538 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
540 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
542 2004-04-10 Chris Demetriou <cgd@broadcom.com>
544 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
546 2004-04-09 Chris Demetriou <cgd@broadcom.com>
548 * mips.igen (check_fmt): Remove.
549 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
550 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
551 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
552 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
553 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
554 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
555 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
556 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
557 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
558 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
560 2004-04-09 Chris Demetriou <cgd@broadcom.com>
562 * sb1.igen (check_sbx): New function.
563 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
565 2004-03-29 Chris Demetriou <cgd@broadcom.com>
566 Richard Sandiford <rsandifo@redhat.com>
568 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
569 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
570 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
571 separate implementations for mipsIV and mipsV. Use new macros to
572 determine whether the restrictions apply.
574 2004-01-19 Chris Demetriou <cgd@broadcom.com>
576 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
577 (check_mult_hilo): Improve comments.
578 (check_div_hilo): Likewise. Also, fork off a new version
579 to handle mips32/mips64 (since there are no hazards to check
582 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
584 * mips.igen (do_dmultx): Fix check for negative operands.
586 2003-05-16 Ian Lance Taylor <ian@airs.com>
588 * Makefile.in (SHELL): Make sure this is defined.
589 (various): Use $(SHELL) whenever we invoke move-if-change.
591 2003-05-03 Chris Demetriou <cgd@broadcom.com>
593 * cp1.c: Tweak attribution slightly.
596 * mdmx.igen: Likewise.
597 * mips3d.igen: Likewise.
598 * sb1.igen: Likewise.
600 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
602 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
605 2003-02-27 Andrew Cagney <cagney@redhat.com>
607 * interp.c (sim_open): Rename _bfd to bfd.
608 (sim_create_inferior): Ditto.
610 2003-01-14 Chris Demetriou <cgd@broadcom.com>
612 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
614 2003-01-14 Chris Demetriou <cgd@broadcom.com>
616 * mips.igen (EI, DI): Remove.
618 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
620 * Makefile.in (tmp-run-multi): Fix mips16 filter.
622 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
623 Andrew Cagney <ac131313@redhat.com>
624 Gavin Romig-Koch <gavin@redhat.com>
625 Graydon Hoare <graydon@redhat.com>
626 Aldy Hernandez <aldyh@redhat.com>
627 Dave Brolley <brolley@redhat.com>
628 Chris Demetriou <cgd@broadcom.com>
630 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
631 (sim_mach_default): New variable.
632 (mips64vr-*-*, mips64vrel-*-*): New configurations.
633 Add a new simulator generator, MULTI.
634 * configure: Regenerate.
635 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
636 (multi-run.o): New dependency.
637 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
638 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
639 (tmp-multi): Combine them.
640 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
641 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
642 (distclean-extra): New rule.
643 * sim-main.h: Include bfd.h.
644 (MIPS_MACH): New macro.
645 * mips.igen (vr4120, vr5400, vr5500): New models.
646 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
647 * vr.igen: Replace with new version.
649 2003-01-04 Chris Demetriou <cgd@broadcom.com>
651 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
652 * configure: Regenerate.
654 2002-12-31 Chris Demetriou <cgd@broadcom.com>
656 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
657 * mips.igen: Remove all invocations of check_branch_bug and
660 2002-12-16 Chris Demetriou <cgd@broadcom.com>
662 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
664 2002-07-30 Chris Demetriou <cgd@broadcom.com>
666 * mips.igen (do_load_double, do_store_double): New functions.
667 (LDC1, SDC1): Rename to...
668 (LDC1b, SDC1b): respectively.
669 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
671 2002-07-29 Michael Snyder <msnyder@redhat.com>
673 * cp1.c (fp_recip2): Modify initialization expression so that
674 GCC will recognize it as constant.
676 2002-06-18 Chris Demetriou <cgd@broadcom.com>
678 * mdmx.c (SD_): Delete.
679 (Unpredictable): Re-define, for now, to directly invoke
680 unpredictable_action().
681 (mdmx_acc_op): Fix error in .ob immediate handling.
683 2002-06-18 Andrew Cagney <cagney@redhat.com>
685 * interp.c (sim_firmware_command): Initialize `address'.
687 2002-06-16 Andrew Cagney <ac131313@redhat.com>
689 * configure: Regenerated to track ../common/aclocal.m4 changes.
691 2002-06-14 Chris Demetriou <cgd@broadcom.com>
692 Ed Satterthwaite <ehs@broadcom.com>
694 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
695 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
696 * mips.igen: Include mips3d.igen.
697 (mips3d): New model name for MIPS-3D ASE instructions.
698 (CVT.W.fmt): Don't use this instruction for word (source) format
700 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
701 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
702 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
703 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
704 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
705 (RSquareRoot1, RSquareRoot2): New macros.
706 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
707 (fp_rsqrt2): New functions.
708 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
709 * configure: Regenerate.
711 2002-06-13 Chris Demetriou <cgd@broadcom.com>
712 Ed Satterthwaite <ehs@broadcom.com>
714 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
715 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
716 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
717 (convert): Note that this function is not used for paired-single
719 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
720 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
721 (check_fmt_p): Enable paired-single support.
722 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
723 (PUU.PS): New instructions.
724 (CVT.S.fmt): Don't use this instruction for paired-single format
726 * sim-main.h (FP_formats): New value 'fmt_ps.'
727 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
728 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
730 2002-06-12 Chris Demetriou <cgd@broadcom.com>
732 * mips.igen: Fix formatting of function calls in
735 2002-06-12 Chris Demetriou <cgd@broadcom.com>
737 * mips.igen (MOVN, MOVZ): Trace result.
738 (TNEI): Print "tnei" as the opcode name in traces.
739 (CEIL.W): Add disassembly string for traces.
740 (RSQRT.fmt): Make location of disassembly string consistent
741 with other instructions.
743 2002-06-12 Chris Demetriou <cgd@broadcom.com>
745 * mips.igen (X): Delete unused function.
747 2002-06-08 Andrew Cagney <cagney@redhat.com>
749 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
751 2002-06-07 Chris Demetriou <cgd@broadcom.com>
752 Ed Satterthwaite <ehs@broadcom.com>
754 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
755 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
756 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
757 (fp_nmsub): New prototypes.
758 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
759 (NegMultiplySub): New defines.
760 * mips.igen (RSQRT.fmt): Use RSquareRoot().
761 (MADD.D, MADD.S): Replace with...
762 (MADD.fmt): New instruction.
763 (MSUB.D, MSUB.S): Replace with...
764 (MSUB.fmt): New instruction.
765 (NMADD.D, NMADD.S): Replace with...
766 (NMADD.fmt): New instruction.
767 (NMSUB.D, MSUB.S): Replace with...
768 (NMSUB.fmt): New instruction.
770 2002-06-07 Chris Demetriou <cgd@broadcom.com>
771 Ed Satterthwaite <ehs@broadcom.com>
773 * cp1.c: Fix more comment spelling and formatting.
774 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
775 (denorm_mode): New function.
776 (fpu_unary, fpu_binary): Round results after operation, collect
777 status from rounding operations, and update the FCSR.
778 (convert): Collect status from integer conversions and rounding
779 operations, and update the FCSR. Adjust NaN values that result
780 from conversions. Convert to use sim_io_eprintf rather than
781 fprintf, and remove some debugging code.
782 * cp1.h (fenr_FS): New define.
784 2002-06-07 Chris Demetriou <cgd@broadcom.com>
786 * cp1.c (convert): Remove unusable debugging code, and move MIPS
787 rounding mode to sim FP rounding mode flag conversion code into...
788 (rounding_mode): New function.
790 2002-06-07 Chris Demetriou <cgd@broadcom.com>
792 * cp1.c: Clean up formatting of a few comments.
793 (value_fpr): Reformat switch statement.
795 2002-06-06 Chris Demetriou <cgd@broadcom.com>
796 Ed Satterthwaite <ehs@broadcom.com>
799 * sim-main.h: Include cp1.h.
800 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
801 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
802 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
803 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
804 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
805 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
806 * cp1.c: Don't include sim-fpu.h; already included by
807 sim-main.h. Clean up formatting of some comments.
808 (NaN, Equal, Less): Remove.
809 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
810 (fp_cmp): New functions.
811 * mips.igen (do_c_cond_fmt): Remove.
812 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
813 Compare. Add result tracing.
814 (CxC1): Remove, replace with...
815 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
816 (DMxC1): Remove, replace with...
817 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
818 (MxC1): Remove, replace with...
819 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
821 2002-06-04 Chris Demetriou <cgd@broadcom.com>
823 * sim-main.h (FGRIDX): Remove, replace all uses with...
824 (FGR_BASE): New macro.
825 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
826 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
827 (NR_FGR, FGR): Likewise.
828 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
829 * mips.igen: Likewise.
831 2002-06-04 Chris Demetriou <cgd@broadcom.com>
833 * cp1.c: Add an FSF Copyright notice to this file.
835 2002-06-04 Chris Demetriou <cgd@broadcom.com>
836 Ed Satterthwaite <ehs@broadcom.com>
838 * cp1.c (Infinity): Remove.
839 * sim-main.h (Infinity): Likewise.
841 * cp1.c (fp_unary, fp_binary): New functions.
842 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
843 (fp_sqrt): New functions, implemented in terms of the above.
844 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
845 (Recip, SquareRoot): Remove (replaced by functions above).
846 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
847 (fp_recip, fp_sqrt): New prototypes.
848 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
849 (Recip, SquareRoot): Replace prototypes with #defines which
850 invoke the functions above.
852 2002-06-03 Chris Demetriou <cgd@broadcom.com>
854 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
855 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
856 file, remove PARAMS from prototypes.
857 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
858 simulator state arguments.
859 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
860 pass simulator state arguments.
861 * cp1.c (SD): Redefine as CPU_STATE(cpu).
862 (store_fpr, convert): Remove 'sd' argument.
863 (value_fpr): Likewise. Convert to use 'SD' instead.
865 2002-06-03 Chris Demetriou <cgd@broadcom.com>
867 * cp1.c (Min, Max): Remove #if 0'd functions.
868 * sim-main.h (Min, Max): Remove.
870 2002-06-03 Chris Demetriou <cgd@broadcom.com>
872 * cp1.c: fix formatting of switch case and default labels.
873 * interp.c: Likewise.
874 * sim-main.c: Likewise.
876 2002-06-03 Chris Demetriou <cgd@broadcom.com>
878 * cp1.c: Clean up comments which describe FP formats.
879 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
881 2002-06-03 Chris Demetriou <cgd@broadcom.com>
882 Ed Satterthwaite <ehs@broadcom.com>
884 * configure.in (mipsisa64sb1*-*-*): New target for supporting
885 Broadcom SiByte SB-1 processor configurations.
886 * configure: Regenerate.
887 * sb1.igen: New file.
888 * mips.igen: Include sb1.igen.
890 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
891 * mdmx.igen: Add "sb1" model to all appropriate functions and
893 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
894 (ob_func, ob_acc): Reference the above.
895 (qh_acc): Adjust to keep the same size as ob_acc.
896 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
897 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
899 2002-06-03 Chris Demetriou <cgd@broadcom.com>
901 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
903 2002-06-02 Chris Demetriou <cgd@broadcom.com>
904 Ed Satterthwaite <ehs@broadcom.com>
906 * mips.igen (mdmx): New (pseudo-)model.
907 * mdmx.c, mdmx.igen: New files.
908 * Makefile.in (SIM_OBJS): Add mdmx.o.
909 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
911 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
912 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
913 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
914 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
915 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
916 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
917 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
918 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
919 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
920 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
921 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
922 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
923 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
924 (qh_fmtsel): New macros.
925 (_sim_cpu): New member "acc".
926 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
927 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
929 2002-05-01 Chris Demetriou <cgd@broadcom.com>
931 * interp.c: Use 'deprecated' rather than 'depreciated.'
932 * sim-main.h: Likewise.
934 2002-05-01 Chris Demetriou <cgd@broadcom.com>
936 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
937 which wouldn't compile anyway.
938 * sim-main.h (unpredictable_action): New function prototype.
939 (Unpredictable): Define to call igen function unpredictable().
940 (NotWordValue): New macro to call igen function not_word_value().
941 (UndefinedResult): Remove.
942 * interp.c (undefined_result): Remove.
943 (unpredictable_action): New function.
944 * mips.igen (not_word_value, unpredictable): New functions.
945 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
946 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
947 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
948 NotWordValue() to check for unpredictable inputs, then
949 Unpredictable() to handle them.
951 2002-02-24 Chris Demetriou <cgd@broadcom.com>
953 * mips.igen: Fix formatting of calls to Unpredictable().
955 2002-04-20 Andrew Cagney <ac131313@redhat.com>
957 * interp.c (sim_open): Revert previous change.
959 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
961 * interp.c (sim_open): Disable chunk of code that wrote code in
962 vector table entries.
964 2002-03-19 Chris Demetriou <cgd@broadcom.com>
966 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
967 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
970 2002-03-19 Chris Demetriou <cgd@broadcom.com>
972 * cp1.c: Fix many formatting issues.
974 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
976 * cp1.c (fpu_format_name): New function to replace...
977 (DOFMT): This. Delete, and update all callers.
978 (fpu_rounding_mode_name): New function to replace...
979 (RMMODE): This. Delete, and update all callers.
981 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
983 * interp.c: Move FPU support routines from here to...
984 * cp1.c: Here. New file.
985 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
988 2002-03-12 Chris Demetriou <cgd@broadcom.com>
990 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
991 * mips.igen (mips32, mips64): New models, add to all instructions
992 and functions as appropriate.
993 (loadstore_ea, check_u64): New variant for model mips64.
994 (check_fmt_p): New variant for models mipsV and mips64, remove
995 mipsV model marking fro other variant.
998 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
999 for mips32 and mips64.
1000 (DCLO, DCLZ): New instructions for mips64.
1002 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1004 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1005 immediate or code as a hex value with the "%#lx" format.
1006 (ANDI): Likewise, and fix printed instruction name.
1008 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1010 * sim-main.h (UndefinedResult, Unpredictable): New macros
1011 which currently do nothing.
1013 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1015 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1016 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1017 (status_CU3): New definitions.
1019 * sim-main.h (ExceptionCause): Add new values for MIPS32
1020 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1021 for DebugBreakPoint and NMIReset to note their status in
1023 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1024 (SignalExceptionCacheErr): New exception macros.
1026 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1028 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1029 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1031 (SignalExceptionCoProcessorUnusable): Take as argument the
1032 unusable coprocessor number.
1034 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1036 * mips.igen: Fix formatting of all SignalException calls.
1038 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1040 * sim-main.h (SIGNEXTEND): Remove.
1042 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1044 * mips.igen: Remove gencode comment from top of file, fix
1045 spelling in another comment.
1047 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1049 * mips.igen (check_fmt, check_fmt_p): New functions to check
1050 whether specific floating point formats are usable.
1051 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1052 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1053 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1054 Use the new functions.
1055 (do_c_cond_fmt): Remove format checks...
1056 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1058 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1060 * mips.igen: Fix formatting of check_fpu calls.
1062 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1064 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1066 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1068 * mips.igen: Remove whitespace at end of lines.
1070 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1072 * mips.igen (loadstore_ea): New function to do effective
1073 address calculations.
1074 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1075 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1076 CACHE): Use loadstore_ea to do effective address computations.
1078 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1080 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1081 * mips.igen (LL, CxC1, MxC1): Likewise.
1083 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1085 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1086 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1087 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1088 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1089 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1090 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1091 Don't split opcode fields by hand, use the opcode field values
1094 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1096 * mips.igen (do_divu): Fix spacing.
1098 * mips.igen (do_dsllv): Move to be right before DSLLV,
1099 to match the rest of the do_<shift> functions.
1101 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1103 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1104 DSRL32, do_dsrlv): Trace inputs and results.
1106 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1108 * mips.igen (CACHE): Provide instruction-printing string.
1110 * interp.c (signal_exception): Comment tokens after #endif.
1112 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1114 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1115 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1116 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1117 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1118 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1119 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1120 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1121 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1123 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1125 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1126 instruction-printing string.
1127 (LWU): Use '64' as the filter flag.
1129 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1131 * mips.igen (SDXC1): Fix instruction-printing string.
1133 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1135 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1136 filter flags "32,f".
1138 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1140 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1143 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1145 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1146 add a comma) so that it more closely match the MIPS ISA
1147 documentation opcode partitioning.
1148 (PREF): Put useful names on opcode fields, and include
1149 instruction-printing string.
1151 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1153 * mips.igen (check_u64): New function which in the future will
1154 check whether 64-bit instructions are usable and signal an
1155 exception if not. Currently a no-op.
1156 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1157 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1158 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1159 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1161 * mips.igen (check_fpu): New function which in the future will
1162 check whether FPU instructions are usable and signal an exception
1163 if not. Currently a no-op.
1164 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1165 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1166 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1167 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1168 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1169 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1170 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1171 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1173 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1175 * mips.igen (do_load_left, do_load_right): Move to be immediately
1177 (do_store_left, do_store_right): Move to be immediately following
1180 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1182 * mips.igen (mipsV): New model name. Also, add it to
1183 all instructions and functions where it is appropriate.
1185 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1187 * mips.igen: For all functions and instructions, list model
1188 names that support that instruction one per line.
1190 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1192 * mips.igen: Add some additional comments about supported
1193 models, and about which instructions go where.
1194 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1195 order as is used in the rest of the file.
1197 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1199 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1200 indicating that ALU32_END or ALU64_END are there to check
1202 (DADD): Likewise, but also remove previous comment about
1205 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1207 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1208 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1209 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1210 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1211 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1212 fields (i.e., add and move commas) so that they more closely
1213 match the MIPS ISA documentation opcode partitioning.
1215 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1217 * mips.igen (ADDI): Print immediate value.
1218 (BREAK): Print code.
1219 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1220 (SLL): Print "nop" specially, and don't run the code
1221 that does the shift for the "nop" case.
1223 2001-11-17 Fred Fish <fnf@redhat.com>
1225 * sim-main.h (float_operation): Move enum declaration outside
1226 of _sim_cpu struct declaration.
1228 2001-04-12 Jim Blandy <jimb@redhat.com>
1230 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1231 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1233 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1234 PENDING_FILL, and you can get the intended effect gracefully by
1235 calling PENDING_SCHED directly.
1237 2001-02-23 Ben Elliston <bje@redhat.com>
1239 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1240 already defined elsewhere.
1242 2001-02-19 Ben Elliston <bje@redhat.com>
1244 * sim-main.h (sim_monitor): Return an int.
1245 * interp.c (sim_monitor): Add return values.
1246 (signal_exception): Handle error conditions from sim_monitor.
1248 2001-02-08 Ben Elliston <bje@redhat.com>
1250 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1251 (store_memory): Likewise, pass cia to sim_core_write*.
1253 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1255 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1256 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1258 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1260 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1261 * Makefile.in: Don't delete *.igen when cleaning directory.
1263 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1265 * m16.igen (break): Call SignalException not sim_engine_halt.
1267 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1269 From Jason Eckhardt:
1270 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1272 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1274 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1276 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1278 * mips.igen (do_dmultx): Fix typo.
1280 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1282 * configure: Regenerated to track ../common/aclocal.m4 changes.
1284 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1286 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1288 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1290 * sim-main.h (GPR_CLEAR): Define macro.
1292 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1294 * interp.c (decode_coproc): Output long using %lx and not %s.
1296 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1298 * interp.c (sim_open): Sort & extend dummy memory regions for
1299 --board=jmr3904 for eCos.
1301 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1303 * configure: Regenerated.
1305 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1307 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1308 calls, conditional on the simulator being in verbose mode.
1310 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1312 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1313 cache don't get ReservedInstruction traps.
1315 1999-11-29 Mark Salter <msalter@cygnus.com>
1317 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1318 to clear status bits in sdisr register. This is how the hardware works.
1320 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1321 being used by cygmon.
1323 1999-11-11 Andrew Haley <aph@cygnus.com>
1325 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1328 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1330 * mips.igen (MULT): Correct previous mis-applied patch.
1332 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1334 * mips.igen (delayslot32): Handle sequence like
1335 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1336 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1337 (MULT): Actually pass the third register...
1339 1999-09-03 Mark Salter <msalter@cygnus.com>
1341 * interp.c (sim_open): Added more memory aliases for additional
1342 hardware being touched by cygmon on jmr3904 board.
1344 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1346 * configure: Regenerated to track ../common/aclocal.m4 changes.
1348 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1350 * interp.c (sim_store_register): Handle case where client - GDB -
1351 specifies that a 4 byte register is 8 bytes in size.
1352 (sim_fetch_register): Ditto.
1354 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1356 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1357 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1358 (idt_monitor_base): Base address for IDT monitor traps.
1359 (pmon_monitor_base): Ditto for PMON.
1360 (lsipmon_monitor_base): Ditto for LSI PMON.
1361 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1362 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1363 (sim_firmware_command): New function.
1364 (mips_option_handler): Call it for OPTION_FIRMWARE.
1365 (sim_open): Allocate memory for idt_monitor region. If "--board"
1366 option was given, add no monitor by default. Add BREAK hooks only if
1367 monitors are also there.
1369 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1371 * interp.c (sim_monitor): Flush output before reading input.
1373 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1375 * tconfig.in (SIM_HANDLES_LMA): Always define.
1377 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1379 From Mark Salter <msalter@cygnus.com>:
1380 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1381 (sim_open): Add setup for BSP board.
1383 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1385 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1386 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1387 them as unimplemented.
1389 1999-05-08 Felix Lee <flee@cygnus.com>
1391 * configure: Regenerated to track ../common/aclocal.m4 changes.
1393 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1395 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1397 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1399 * configure.in: Any mips64vr5*-*-* target should have
1400 -DTARGET_ENABLE_FR=1.
1401 (default_endian): Any mips64vr*el-*-* target should default to
1403 * configure: Re-generate.
1405 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1407 * mips.igen (ldl): Extend from _16_, not 32.
1409 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1411 * interp.c (sim_store_register): Force registers written to by GDB
1412 into an un-interpreted state.
1414 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1416 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1417 CPU, start periodic background I/O polls.
1418 (tx3904sio_poll): New function: periodic I/O poller.
1420 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1422 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1424 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1426 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1429 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1431 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1432 (load_word): Call SIM_CORE_SIGNAL hook on error.
1433 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1434 starting. For exception dispatching, pass PC instead of NULL_CIA.
1435 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1436 * sim-main.h (COP0_BADVADDR): Define.
1437 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1438 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1439 (_sim_cpu): Add exc_* fields to store register value snapshots.
1440 * mips.igen (*): Replace memory-related SignalException* calls
1441 with references to SIM_CORE_SIGNAL hook.
1443 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1445 * sim-main.c (*): Minor warning cleanups.
1447 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1449 * m16.igen (DADDIU5): Correct type-o.
1451 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1453 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1456 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1458 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1460 (interp.o): Add dependency on itable.h
1461 (oengine.c, gencode): Delete remaining references.
1462 (BUILT_SRC_FROM_GEN): Clean up.
1464 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1467 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1468 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1469 tmp-run-hack) : New.
1470 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1471 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1472 Drop the "64" qualifier to get the HACK generator working.
1473 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1474 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1475 qualifier to get the hack generator working.
1476 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1477 (DSLL): Use do_dsll.
1478 (DSLLV): Use do_dsllv.
1479 (DSRA): Use do_dsra.
1480 (DSRL): Use do_dsrl.
1481 (DSRLV): Use do_dsrlv.
1482 (BC1): Move *vr4100 to get the HACK generator working.
1483 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1484 get the HACK generator working.
1485 (MACC) Rename to get the HACK generator working.
1486 (DMACC,MACCS,DMACCS): Add the 64.
1488 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1490 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1491 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1493 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1495 * mips/interp.c (DEBUG): Cleanups.
1497 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1499 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1500 (tx3904sio_tickle): fflush after a stdout character output.
1502 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1504 * interp.c (sim_close): Uninstall modules.
1506 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1508 * sim-main.h, interp.c (sim_monitor): Change to global
1511 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1513 * configure.in (vr4100): Only include vr4100 instructions in
1515 * configure: Re-generate.
1516 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1518 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1520 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1521 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1524 * configure.in (sim_default_gen, sim_use_gen): Replace with
1526 (--enable-sim-igen): Delete config option. Always using IGEN.
1527 * configure: Re-generate.
1529 * Makefile.in (gencode): Kill, kill, kill.
1532 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1534 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1535 bit mips16 igen simulator.
1536 * configure: Re-generate.
1538 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1539 as part of vr4100 ISA.
1540 * vr.igen: Mark all instructions as 64 bit only.
1542 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1544 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1547 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1549 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1550 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1551 * configure: Re-generate.
1553 * m16.igen (BREAK): Define breakpoint instruction.
1554 (JALX32): Mark instruction as mips16 and not r3900.
1555 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1557 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1559 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1561 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1562 insn as a debug breakpoint.
1564 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1566 (PENDING_SCHED): Clean up trace statement.
1567 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1568 (PENDING_FILL): Delay write by only one cycle.
1569 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1571 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1573 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1575 (pending_tick): Move incrementing of index to FOR statement.
1576 (pending_tick): Only update PENDING_OUT after a write has occured.
1578 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1580 * configure: Re-generate.
1582 * interp.c (sim_engine_run OLD): Delete explicit call to
1583 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1585 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1587 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1588 interrupt level number to match changed SignalExceptionInterrupt
1591 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1593 * interp.c: #include "itable.h" if WITH_IGEN.
1594 (get_insn_name): New function.
1595 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1596 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1598 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1600 * configure: Rebuilt to inhale new common/aclocal.m4.
1602 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1604 * dv-tx3904sio.c: Include sim-assert.h.
1606 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1608 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1609 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1610 Reorganize target-specific sim-hardware checks.
1611 * configure: rebuilt.
1612 * interp.c (sim_open): For tx39 target boards, set
1613 OPERATING_ENVIRONMENT, add tx3904sio devices.
1614 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1615 ROM executables. Install dv-sockser into sim-modules list.
1617 * dv-tx3904irc.c: Compiler warning clean-up.
1618 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1619 frequent hw-trace messages.
1621 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1623 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1625 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1627 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1629 * vr.igen: New file.
1630 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1631 * mips.igen: Define vr4100 model. Include vr.igen.
1632 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1634 * mips.igen (check_mf_hilo): Correct check.
1636 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1638 * sim-main.h (interrupt_event): Add prototype.
1640 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1641 register_ptr, register_value.
1642 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1644 * sim-main.h (tracefh): Make extern.
1646 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1648 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1649 Reduce unnecessarily high timer event frequency.
1650 * dv-tx3904cpu.c: Ditto for interrupt event.
1652 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1654 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1656 (interrupt_event): Made non-static.
1658 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1659 interchange of configuration values for external vs. internal
1662 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1664 * mips.igen (BREAK): Moved code to here for
1665 simulator-reserved break instructions.
1666 * gencode.c (build_instruction): Ditto.
1667 * interp.c (signal_exception): Code moved from here. Non-
1668 reserved instructions now use exception vector, rather
1670 * sim-main.h: Moved magic constants to here.
1672 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1674 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1675 register upon non-zero interrupt event level, clear upon zero
1677 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1678 by passing zero event value.
1679 (*_io_{read,write}_buffer): Endianness fixes.
1680 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1681 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1683 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1684 serial I/O and timer module at base address 0xFFFF0000.
1686 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1688 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1691 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1693 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1695 * configure: Update.
1697 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1699 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1700 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1701 * configure.in: Include tx3904tmr in hw_device list.
1702 * configure: Rebuilt.
1703 * interp.c (sim_open): Instantiate three timer instances.
1704 Fix address typo of tx3904irc instance.
1706 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1708 * interp.c (signal_exception): SystemCall exception now uses
1709 the exception vector.
1711 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1713 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1716 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1718 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1720 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1722 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1724 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1725 sim-main.h. Declare a struct hw_descriptor instead of struct
1726 hw_device_descriptor.
1728 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1730 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1731 right bits and then re-align left hand bytes to correct byte
1732 lanes. Fix incorrect computation in do_store_left when loading
1733 bytes from second word.
1735 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1737 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1738 * interp.c (sim_open): Only create a device tree when HW is
1741 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1742 * interp.c (signal_exception): Ditto.
1744 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1746 * gencode.c: Mark BEGEZALL as LIKELY.
1748 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1750 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1751 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1753 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1755 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1756 modules. Recognize TX39 target with "mips*tx39" pattern.
1757 * configure: Rebuilt.
1758 * sim-main.h (*): Added many macros defining bits in
1759 TX39 control registers.
1760 (SignalInterrupt): Send actual PC instead of NULL.
1761 (SignalNMIReset): New exception type.
1762 * interp.c (board): New variable for future use to identify
1763 a particular board being simulated.
1764 (mips_option_handler,mips_options): Added "--board" option.
1765 (interrupt_event): Send actual PC.
1766 (sim_open): Make memory layout conditional on board setting.
1767 (signal_exception): Initial implementation of hardware interrupt
1768 handling. Accept another break instruction variant for simulator
1770 (decode_coproc): Implement RFE instruction for TX39.
1771 (mips.igen): Decode RFE instruction as such.
1772 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1773 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1774 bbegin to implement memory map.
1775 * dv-tx3904cpu.c: New file.
1776 * dv-tx3904irc.c: New file.
1778 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1780 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1782 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1784 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1785 with calls to check_div_hilo.
1787 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1789 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1790 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1791 Add special r3900 version of do_mult_hilo.
1792 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1793 with calls to check_mult_hilo.
1794 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1795 with calls to check_div_hilo.
1797 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1799 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1800 Document a replacement.
1802 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1804 * interp.c (sim_monitor): Make mon_printf work.
1806 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1808 * sim-main.h (INSN_NAME): New arg `cpu'.
1810 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1812 * configure: Regenerated to track ../common/aclocal.m4 changes.
1814 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1816 * configure: Regenerated to track ../common/aclocal.m4 changes.
1819 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1821 * acconfig.h: New file.
1822 * configure.in: Reverted change of Apr 24; use sinclude again.
1824 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1826 * configure: Regenerated to track ../common/aclocal.m4 changes.
1829 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1831 * configure.in: Don't call sinclude.
1833 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1835 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1837 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1839 * mips.igen (ERET): Implement.
1841 * interp.c (decode_coproc): Return sign-extended EPC.
1843 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1845 * interp.c (signal_exception): Do not ignore Trap.
1846 (signal_exception): On TRAP, restart at exception address.
1847 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1848 (signal_exception): Update.
1849 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1850 so that TRAP instructions are caught.
1852 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1854 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1855 contains HI/LO access history.
1856 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1857 (HIACCESS, LOACCESS): Delete, replace with
1858 (HIHISTORY, LOHISTORY): New macros.
1859 (CHECKHILO): Delete all, moved to mips.igen
1861 * gencode.c (build_instruction): Do not generate checks for
1862 correct HI/LO register usage.
1864 * interp.c (old_engine_run): Delete checks for correct HI/LO
1867 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1868 check_mf_cycles): New functions.
1869 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1870 do_divu, domultx, do_mult, do_multu): Use.
1872 * tx.igen ("madd", "maddu"): Use.
1874 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1876 * mips.igen (DSRAV): Use function do_dsrav.
1877 (SRAV): Use new function do_srav.
1879 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1880 (B): Sign extend 11 bit immediate.
1881 (EXT-B*): Shift 16 bit immediate left by 1.
1882 (ADDIU*): Don't sign extend immediate value.
1884 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1886 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1888 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1891 * mips.igen (delayslot32, nullify_next_insn): New functions.
1892 (m16.igen): Always include.
1893 (do_*): Add more tracing.
1895 * m16.igen (delayslot16): Add NIA argument, could be called by a
1896 32 bit MIPS16 instruction.
1898 * interp.c (ifetch16): Move function from here.
1899 * sim-main.c (ifetch16): To here.
1901 * sim-main.c (ifetch16, ifetch32): Update to match current
1902 implementations of LH, LW.
1903 (signal_exception): Don't print out incorrect hex value of illegal
1906 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1908 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1911 * m16.igen: Implement MIPS16 instructions.
1913 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1914 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1915 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1916 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1917 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1918 bodies of corresponding code from 32 bit insn to these. Also used
1919 by MIPS16 versions of functions.
1921 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1922 (IMEM16): Drop NR argument from macro.
1924 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1926 * Makefile.in (SIM_OBJS): Add sim-main.o.
1928 * sim-main.h (address_translation, load_memory, store_memory,
1929 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1931 (pr_addr, pr_uword64): Declare.
1932 (sim-main.c): Include when H_REVEALS_MODULE_P.
1934 * interp.c (address_translation, load_memory, store_memory,
1935 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1937 * sim-main.c: To here. Fix compilation problems.
1939 * configure.in: Enable inlining.
1940 * configure: Re-config.
1942 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1944 * configure: Regenerated to track ../common/aclocal.m4 changes.
1946 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1948 * mips.igen: Include tx.igen.
1949 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1950 * tx.igen: New file, contains MADD and MADDU.
1952 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1953 the hardwired constant `7'.
1954 (store_memory): Ditto.
1955 (LOADDRMASK): Move definition to sim-main.h.
1957 mips.igen (MTC0): Enable for r3900.
1960 mips.igen (do_load_byte): Delete.
1961 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1962 do_store_right): New functions.
1963 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1965 configure.in: Let the tx39 use igen again.
1968 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1970 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1971 not an address sized quantity. Return zero for cache sizes.
1973 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1975 * mips.igen (r3900): r3900 does not support 64 bit integer
1978 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1980 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1982 * configure : Rebuild.
1984 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1986 * configure: Regenerated to track ../common/aclocal.m4 changes.
1988 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1990 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1992 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1994 * configure: Regenerated to track ../common/aclocal.m4 changes.
1995 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1997 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1999 * configure: Regenerated to track ../common/aclocal.m4 changes.
2001 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2003 * interp.c (Max, Min): Comment out functions. Not yet used.
2005 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2007 * configure: Regenerated to track ../common/aclocal.m4 changes.
2009 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2011 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2012 configurable settings for stand-alone simulator.
2014 * configure.in: Added X11 search, just in case.
2016 * configure: Regenerated.
2018 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2020 * interp.c (sim_write, sim_read, load_memory, store_memory):
2021 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2023 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2025 * sim-main.h (GETFCC): Return an unsigned value.
2027 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2029 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2030 (DADD): Result destination is RD not RT.
2032 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2034 * sim-main.h (HIACCESS, LOACCESS): Always define.
2036 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2038 * interp.c (sim_info): Delete.
2040 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2042 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2043 (mips_option_handler): New argument `cpu'.
2044 (sim_open): Update call to sim_add_option_table.
2046 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2048 * mips.igen (CxC1): Add tracing.
2050 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2052 * sim-main.h (Max, Min): Declare.
2054 * interp.c (Max, Min): New functions.
2056 * mips.igen (BC1): Add tracing.
2058 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2060 * interp.c Added memory map for stack in vr4100
2062 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2064 * interp.c (load_memory): Add missing "break"'s.
2066 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2068 * interp.c (sim_store_register, sim_fetch_register): Pass in
2069 length parameter. Return -1.
2071 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2073 * interp.c: Added hardware init hook, fixed warnings.
2075 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2077 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2079 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2081 * interp.c (ifetch16): New function.
2083 * sim-main.h (IMEM32): Rename IMEM.
2084 (IMEM16_IMMED): Define.
2086 (DELAY_SLOT): Update.
2088 * m16run.c (sim_engine_run): New file.
2090 * m16.igen: All instructions except LB.
2091 (LB): Call do_load_byte.
2092 * mips.igen (do_load_byte): New function.
2093 (LB): Call do_load_byte.
2095 * mips.igen: Move spec for insn bit size and high bit from here.
2096 * Makefile.in (tmp-igen, tmp-m16): To here.
2098 * m16.dc: New file, decode mips16 instructions.
2100 * Makefile.in (SIM_NO_ALL): Define.
2101 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2103 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2105 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2106 point unit to 32 bit registers.
2107 * configure: Re-generate.
2109 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2111 * configure.in (sim_use_gen): Make IGEN the default simulator
2112 generator for generic 32 and 64 bit mips targets.
2113 * configure: Re-generate.
2115 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2117 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2120 * interp.c (sim_fetch_register, sim_store_register): Read/write
2121 FGR from correct location.
2122 (sim_open): Set size of FGR's according to
2123 WITH_TARGET_FLOATING_POINT_BITSIZE.
2125 * sim-main.h (FGR): Store floating point registers in a separate
2128 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2130 * configure: Regenerated to track ../common/aclocal.m4 changes.
2132 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2134 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2136 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2138 * interp.c (pending_tick): New function. Deliver pending writes.
2140 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2141 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2142 it can handle mixed sized quantites and single bits.
2144 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2146 * interp.c (oengine.h): Do not include when building with IGEN.
2147 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2148 (sim_info): Ditto for PROCESSOR_64BIT.
2149 (sim_monitor): Replace ut_reg with unsigned_word.
2150 (*): Ditto for t_reg.
2151 (LOADDRMASK): Define.
2152 (sim_open): Remove defunct check that host FP is IEEE compliant,
2153 using software to emulate floating point.
2154 (value_fpr, ...): Always compile, was conditional on HASFPU.
2156 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2161 * interp.c (SD, CPU): Define.
2162 (mips_option_handler): Set flags in each CPU.
2163 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2164 (sim_close): Do not clear STATE, deleted anyway.
2165 (sim_write, sim_read): Assume CPU zero's vm should be used for
2167 (sim_create_inferior): Set the PC for all processors.
2168 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2170 (mips16_entry): Pass correct nr of args to store_word, load_word.
2171 (ColdReset): Cold reset all cpu's.
2172 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2173 (sim_monitor, load_memory, store_memory, signal_exception): Use
2174 `CPU' instead of STATE_CPU.
2177 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2180 * sim-main.h (signal_exception): Add sim_cpu arg.
2181 (SignalException*): Pass both SD and CPU to signal_exception.
2182 * interp.c (signal_exception): Update.
2184 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2186 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2187 address_translation): Ditto
2188 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2190 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2192 * configure: Regenerated to track ../common/aclocal.m4 changes.
2194 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2196 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2198 * mips.igen (model): Map processor names onto BFD name.
2200 * sim-main.h (CPU_CIA): Delete.
2201 (SET_CIA, GET_CIA): Define
2203 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2205 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2208 * configure.in (default_endian): Configure a big-endian simulator
2210 * configure: Re-generate.
2212 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2214 * configure: Regenerated to track ../common/aclocal.m4 changes.
2216 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2218 * interp.c (sim_monitor): Handle Densan monitor outbyte
2219 and inbyte functions.
2221 1997-12-29 Felix Lee <flee@cygnus.com>
2223 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2225 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2227 * Makefile.in (tmp-igen): Arrange for $zero to always be
2228 reset to zero after every instruction.
2230 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2232 * configure: Regenerated to track ../common/aclocal.m4 changes.
2235 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2237 * mips.igen (MSUB): Fix to work like MADD.
2238 * gencode.c (MSUB): Similarly.
2240 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2242 * configure: Regenerated to track ../common/aclocal.m4 changes.
2244 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2246 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2248 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2250 * sim-main.h (sim-fpu.h): Include.
2252 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2253 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2254 using host independant sim_fpu module.
2256 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2258 * interp.c (signal_exception): Report internal errors with SIGABRT
2261 * sim-main.h (C0_CONFIG): New register.
2262 (signal.h): No longer include.
2264 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2266 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2268 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2270 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2272 * mips.igen: Tag vr5000 instructions.
2273 (ANDI): Was missing mipsIV model, fix assembler syntax.
2274 (do_c_cond_fmt): New function.
2275 (C.cond.fmt): Handle mips I-III which do not support CC field
2277 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2278 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2280 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2281 vr5000 which saves LO in a GPR separatly.
2283 * configure.in (enable-sim-igen): For vr5000, select vr5000
2284 specific instructions.
2285 * configure: Re-generate.
2287 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2289 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2291 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2292 fmt_uninterpreted_64 bit cases to switch. Convert to
2295 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2297 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2298 as specified in IV3.2 spec.
2299 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2301 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2303 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2304 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2305 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2306 PENDING_FILL versions of instructions. Simplify.
2308 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2310 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2312 (MTHI, MFHI): Disable code checking HI-LO.
2314 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2316 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2318 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2320 * gencode.c (build_mips16_operands): Replace IPC with cia.
2322 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2323 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2325 (UndefinedResult): Replace function with macro/function
2327 (sim_engine_run): Don't save PC in IPC.
2329 * sim-main.h (IPC): Delete.
2332 * interp.c (signal_exception, store_word, load_word,
2333 address_translation, load_memory, store_memory, cache_op,
2334 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2335 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2336 current instruction address - cia - argument.
2337 (sim_read, sim_write): Call address_translation directly.
2338 (sim_engine_run): Rename variable vaddr to cia.
2339 (signal_exception): Pass cia to sim_monitor
2341 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2342 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2343 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2345 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2346 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2349 * interp.c (signal_exception): Pass restart address to
2352 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2353 idecode.o): Add dependency.
2355 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2357 (DELAY_SLOT): Update NIA not PC with branch address.
2358 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2360 * mips.igen: Use CIA not PC in branch calculations.
2361 (illegal): Call SignalException.
2362 (BEQ, ADDIU): Fix assembler.
2364 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2366 * m16.igen (JALX): Was missing.
2368 * configure.in (enable-sim-igen): New configuration option.
2369 * configure: Re-generate.
2371 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2373 * interp.c (load_memory, store_memory): Delete parameter RAW.
2374 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2375 bypassing {load,store}_memory.
2377 * sim-main.h (ByteSwapMem): Delete definition.
2379 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2381 * interp.c (sim_do_command, sim_commands): Delete mips specific
2382 commands. Handled by module sim-options.
2384 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2385 (WITH_MODULO_MEMORY): Define.
2387 * interp.c (sim_info): Delete code printing memory size.
2389 * interp.c (mips_size): Nee sim_size, delete function.
2391 (monitor, monitor_base, monitor_size): Delete global variables.
2392 (sim_open, sim_close): Delete code creating monitor and other
2393 memory regions. Use sim-memopts module, via sim_do_commandf, to
2394 manage memory regions.
2395 (load_memory, store_memory): Use sim-core for memory model.
2397 * interp.c (address_translation): Delete all memory map code
2398 except line forcing 32 bit addresses.
2400 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2402 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2405 * interp.c (logfh, logfile): Delete globals.
2406 (sim_open, sim_close): Delete code opening & closing log file.
2407 (mips_option_handler): Delete -l and -n options.
2408 (OPTION mips_options): Ditto.
2410 * interp.c (OPTION mips_options): Rename option trace to dinero.
2411 (mips_option_handler): Update.
2413 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2415 * interp.c (fetch_str): New function.
2416 (sim_monitor): Rewrite using sim_read & sim_write.
2417 (sim_open): Check magic number.
2418 (sim_open): Write monitor vectors into memory using sim_write.
2419 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2420 (sim_read, sim_write): Simplify - transfer data one byte at a
2422 (load_memory, store_memory): Clarify meaning of parameter RAW.
2424 * sim-main.h (isHOST): Defete definition.
2425 (isTARGET): Mark as depreciated.
2426 (address_translation): Delete parameter HOST.
2428 * interp.c (address_translation): Delete parameter HOST.
2430 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2434 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2435 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2437 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2439 * mips.igen: Add model filter field to records.
2441 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2443 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2445 interp.c (sim_engine_run): Do not compile function sim_engine_run
2446 when WITH_IGEN == 1.
2448 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2449 target architecture.
2451 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2452 igen. Replace with configuration variables sim_igen_flags /
2455 * m16.igen: New file. Copy mips16 insns here.
2456 * mips.igen: From here.
2458 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2460 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2462 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2464 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2466 * gencode.c (build_instruction): Follow sim_write's lead in using
2467 BigEndianMem instead of !ByteSwapMem.
2469 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2471 * configure.in (sim_gen): Dependent on target, select type of
2472 generator. Always select old style generator.
2474 configure: Re-generate.
2476 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2478 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2479 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2480 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2481 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2482 SIM_@sim_gen@_*, set by autoconf.
2484 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2486 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2488 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2489 CURRENT_FLOATING_POINT instead.
2491 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2492 (address_translation): Raise exception InstructionFetch when
2493 translation fails and isINSTRUCTION.
2495 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2496 sim_engine_run): Change type of of vaddr and paddr to
2498 (address_translation, prefetch, load_memory, store_memory,
2499 cache_op): Change type of vAddr and pAddr to address_word.
2501 * gencode.c (build_instruction): Change type of vaddr and paddr to
2504 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2506 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2507 macro to obtain result of ALU op.
2509 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2511 * interp.c (sim_info): Call profile_print.
2513 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2515 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2517 * sim-main.h (WITH_PROFILE): Do not define, defined in
2518 common/sim-config.h. Use sim-profile module.
2519 (simPROFILE): Delete defintion.
2521 * interp.c (PROFILE): Delete definition.
2522 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2523 (sim_close): Delete code writing profile histogram.
2524 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2526 (sim_engine_run): Delete code profiling the PC.
2528 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2532 * interp.c (sim_monitor): Make register pointers of type
2535 * sim-main.h: Make registers of type unsigned_word not
2538 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2540 * interp.c (sync_operation): Rename from SyncOperation, make
2541 global, add SD argument.
2542 (prefetch): Rename from Prefetch, make global, add SD argument.
2543 (decode_coproc): Make global.
2545 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2547 * gencode.c (build_instruction): Generate DecodeCoproc not
2548 decode_coproc calls.
2550 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2551 (SizeFGR): Move to sim-main.h
2552 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2553 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2554 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2556 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2557 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2558 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2559 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2560 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2561 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2563 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2565 (sim-alu.h): Include.
2566 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2567 (sim_cia): Typedef to instruction_address.
2569 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2571 * Makefile.in (interp.o): Rename generated file engine.c to
2576 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2578 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2580 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2582 * gencode.c (build_instruction): For "FPSQRT", output correct
2583 number of arguments to Recip.
2585 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2587 * Makefile.in (interp.o): Depends on sim-main.h
2589 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2591 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2592 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2593 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2594 STATE, DSSTATE): Define
2595 (GPR, FGRIDX, ..): Define.
2597 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2598 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2599 (GPR, FGRIDX, ...): Delete macros.
2601 * interp.c: Update names to match defines from sim-main.h
2603 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2605 * interp.c (sim_monitor): Add SD argument.
2606 (sim_warning): Delete. Replace calls with calls to
2608 (sim_error): Delete. Replace calls with sim_io_error.
2609 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2610 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2611 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2613 (mips_size): Rename from sim_size. Add SD argument.
2615 * interp.c (simulator): Delete global variable.
2616 (callback): Delete global variable.
2617 (mips_option_handler, sim_open, sim_write, sim_read,
2618 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2619 sim_size,sim_monitor): Use sim_io_* not callback->*.
2620 (sim_open): ZALLOC simulator struct.
2621 (PROFILE): Do not define.
2623 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2625 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2626 support.h with corresponding code.
2628 * sim-main.h (word64, uword64), support.h: Move definition to
2630 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2633 * Makefile.in: Update dependencies
2634 * interp.c: Do not include.
2636 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2638 * interp.c (address_translation, load_memory, store_memory,
2639 cache_op): Rename to from AddressTranslation et.al., make global,
2642 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2645 * interp.c (SignalException): Rename to signal_exception, make
2648 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2650 * sim-main.h (SignalException, SignalExceptionInterrupt,
2651 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2652 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2653 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2656 * interp.c, support.h: Use.
2658 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2660 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2661 to value_fpr / store_fpr. Add SD argument.
2662 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2663 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2665 * sim-main.h (ValueFPR, StoreFPR): Define.
2667 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2669 * interp.c (sim_engine_run): Check consistency between configure
2670 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2673 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2674 (mips_fpu): Configure WITH_FLOATING_POINT.
2675 (mips_endian): Configure WITH_TARGET_ENDIAN.
2676 * configure: Update.
2678 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2680 * configure: Regenerated to track ../common/aclocal.m4 changes.
2682 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2684 * configure: Regenerated.
2686 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2688 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2690 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2692 * gencode.c (print_igen_insn_models): Assume certain architectures
2693 include all mips* instructions.
2694 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2697 * Makefile.in (tmp.igen): Add target. Generate igen input from
2700 * gencode.c (FEATURE_IGEN): Define.
2701 (main): Add --igen option. Generate output in igen format.
2702 (process_instructions): Format output according to igen option.
2703 (print_igen_insn_format): New function.
2704 (print_igen_insn_models): New function.
2705 (process_instructions): Only issue warnings and ignore
2706 instructions when no FEATURE_IGEN.
2708 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2710 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2713 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2715 * configure: Regenerated to track ../common/aclocal.m4 changes.
2717 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2719 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2720 SIM_RESERVED_BITS): Delete, moved to common.
2721 (SIM_EXTRA_CFLAGS): Update.
2723 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2725 * configure.in: Configure non-strict memory alignment.
2726 * configure: Regenerated to track ../common/aclocal.m4 changes.
2728 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * configure: Regenerated to track ../common/aclocal.m4 changes.
2732 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2734 * gencode.c (SDBBP,DERET): Added (3900) insns.
2735 (RFE): Turn on for 3900.
2736 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2737 (dsstate): Made global.
2738 (SUBTARGET_R3900): Added.
2739 (CANCELDELAYSLOT): New.
2740 (SignalException): Ignore SystemCall rather than ignore and
2741 terminate. Add DebugBreakPoint handling.
2742 (decode_coproc): New insns RFE, DERET; and new registers Debug
2743 and DEPC protected by SUBTARGET_R3900.
2744 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2746 * Makefile.in,configure.in: Add mips subtarget option.
2747 * configure: Update.
2749 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2751 * gencode.c: Add r3900 (tx39).
2754 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2756 * gencode.c (build_instruction): Don't need to subtract 4 for
2759 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2761 * interp.c: Correct some HASFPU problems.
2763 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * configure: Regenerated to track ../common/aclocal.m4 changes.
2767 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2769 * interp.c (mips_options): Fix samples option short form, should
2772 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2774 * interp.c (sim_info): Enable info code. Was just returning.
2776 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2778 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2781 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2783 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2785 (build_instruction): Ditto for LL.
2787 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2789 * configure: Regenerated to track ../common/aclocal.m4 changes.
2791 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * configure: Regenerated to track ../common/aclocal.m4 changes.
2796 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * interp.c (sim_open): Add call to sim_analyze_program, update
2801 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2803 * interp.c (sim_kill): Delete.
2804 (sim_create_inferior): Add ABFD argument. Set PC from same.
2805 (sim_load): Move code initializing trap handlers from here.
2806 (sim_open): To here.
2807 (sim_load): Delete, use sim-hload.c.
2809 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2811 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2813 * configure: Regenerated to track ../common/aclocal.m4 changes.
2816 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2818 * interp.c (sim_open): Add ABFD argument.
2819 (sim_load): Move call to sim_config from here.
2820 (sim_open): To here. Check return status.
2822 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2824 * gencode.c (build_instruction): Two arg MADD should
2825 not assign result to $0.
2827 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2829 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2830 * sim/mips/configure.in: Regenerate.
2832 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2834 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2835 signed8, unsigned8 et.al. types.
2837 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2838 hosts when selecting subreg.
2840 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2842 * interp.c (sim_engine_run): Reset the ZERO register to zero
2843 regardless of FEATURE_WARN_ZERO.
2844 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2846 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2848 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2849 (SignalException): For BreakPoints ignore any mode bits and just
2851 (SignalException): Always set the CAUSE register.
2853 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2855 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2856 exception has been taken.
2858 * interp.c: Implement the ERET and mt/f sr instructions.
2860 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2862 * interp.c (SignalException): Don't bother restarting an
2865 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * interp.c (SignalException): Really take an interrupt.
2868 (interrupt_event): Only deliver interrupts when enabled.
2870 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2872 * interp.c (sim_info): Only print info when verbose.
2873 (sim_info) Use sim_io_printf for output.
2875 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2877 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2880 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2882 * interp.c (sim_do_command): Check for common commands if a
2883 simulator specific command fails.
2885 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2887 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2888 and simBE when DEBUG is defined.
2890 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2892 * interp.c (interrupt_event): New function. Pass exception event
2893 onto exception handler.
2895 * configure.in: Check for stdlib.h.
2896 * configure: Regenerate.
2898 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2899 variable declaration.
2900 (build_instruction): Initialize memval1.
2901 (build_instruction): Add UNUSED attribute to byte, bigend,
2903 (build_operands): Ditto.
2905 * interp.c: Fix GCC warnings.
2906 (sim_get_quit_code): Delete.
2908 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2909 * Makefile.in: Ditto.
2910 * configure: Re-generate.
2912 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2914 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2916 * interp.c (mips_option_handler): New function parse argumes using
2918 (myname): Replace with STATE_MY_NAME.
2919 (sim_open): Delete check for host endianness - performed by
2921 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2922 (sim_open): Move much of the initialization from here.
2923 (sim_load): To here. After the image has been loaded and
2925 (sim_open): Move ColdReset from here.
2926 (sim_create_inferior): To here.
2927 (sim_open): Make FP check less dependant on host endianness.
2929 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2931 * interp.c (sim_set_callbacks): Delete.
2933 * interp.c (membank, membank_base, membank_size): Replace with
2934 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2935 (sim_open): Remove call to callback->init. gdb/run do this.
2939 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2941 * interp.c (big_endian_p): Delete, replaced by
2942 current_target_byte_order.
2944 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2946 * interp.c (host_read_long, host_read_word, host_swap_word,
2947 host_swap_long): Delete. Using common sim-endian.
2948 (sim_fetch_register, sim_store_register): Use H2T.
2949 (pipeline_ticks): Delete. Handled by sim-events.
2951 (sim_engine_run): Update.
2953 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2955 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2957 (SignalException): To here. Signal using sim_engine_halt.
2958 (sim_stop_reason): Delete, moved to common.
2960 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2962 * interp.c (sim_open): Add callback argument.
2963 (sim_set_callbacks): Delete SIM_DESC argument.
2966 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2968 * Makefile.in (SIM_OBJS): Add common modules.
2970 * interp.c (sim_set_callbacks): Also set SD callback.
2971 (set_endianness, xfer_*, swap_*): Delete.
2972 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2973 Change to functions using sim-endian macros.
2974 (control_c, sim_stop): Delete, use common version.
2975 (simulate): Convert into.
2976 (sim_engine_run): This function.
2977 (sim_resume): Delete.
2979 * interp.c (simulation): New variable - the simulator object.
2980 (sim_kind): Delete global - merged into simulation.
2981 (sim_load): Cleanup. Move PC assignment from here.
2982 (sim_create_inferior): To here.
2984 * sim-main.h: New file.
2985 * interp.c (sim-main.h): Include.
2987 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2989 * configure: Regenerated to track ../common/aclocal.m4 changes.
2991 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2993 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2995 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2997 * gencode.c (build_instruction): DIV instructions: check
2998 for division by zero and integer overflow before using
2999 host's division operation.
3001 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3003 * Makefile.in (SIM_OBJS): Add sim-load.o.
3004 * interp.c: #include bfd.h.
3005 (target_byte_order): Delete.
3006 (sim_kind, myname, big_endian_p): New static locals.
3007 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3008 after argument parsing. Recognize -E arg, set endianness accordingly.
3009 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3010 load file into simulator. Set PC from bfd.
3011 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3012 (set_endianness): Use big_endian_p instead of target_byte_order.
3014 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3016 * interp.c (sim_size): Delete prototype - conflicts with
3017 definition in remote-sim.h. Correct definition.
3019 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3021 * configure: Regenerated to track ../common/aclocal.m4 changes.
3024 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3026 * interp.c (sim_open): New arg `kind'.
3028 * configure: Regenerated to track ../common/aclocal.m4 changes.
3030 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3032 * configure: Regenerated to track ../common/aclocal.m4 changes.
3034 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3036 * interp.c (sim_open): Set optind to 0 before calling getopt.
3038 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3040 * configure: Regenerated to track ../common/aclocal.m4 changes.
3042 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3044 * interp.c : Replace uses of pr_addr with pr_uword64
3045 where the bit length is always 64 independent of SIM_ADDR.
3046 (pr_uword64) : added.
3048 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3050 * configure: Re-generate.
3052 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3054 * configure: Regenerate to track ../common/aclocal.m4 changes.
3056 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3058 * interp.c (sim_open): New SIM_DESC result. Argument is now
3060 (other sim_*): New SIM_DESC argument.
3062 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3064 * interp.c: Fix printing of addresses for non-64-bit targets.
3065 (pr_addr): Add function to print address based on size.
3067 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3069 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3071 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3073 * gencode.c (build_mips16_operands): Correct computation of base
3074 address for extended PC relative instruction.
3076 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3078 * interp.c (mips16_entry): Add support for floating point cases.
3079 (SignalException): Pass floating point cases to mips16_entry.
3080 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3082 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3084 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3085 and then set the state to fmt_uninterpreted.
3086 (COP_SW): Temporarily set the state to fmt_word while calling
3089 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3091 * gencode.c (build_instruction): The high order may be set in the
3092 comparison flags at any ISA level, not just ISA 4.
3094 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3096 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3097 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3098 * configure.in: sinclude ../common/aclocal.m4.
3099 * configure: Regenerated.
3101 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3103 * configure: Rebuild after change to aclocal.m4.
3105 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3107 * configure configure.in Makefile.in: Update to new configure
3108 scheme which is more compatible with WinGDB builds.
3109 * configure.in: Improve comment on how to run autoconf.
3110 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3111 * Makefile.in: Use autoconf substitution to install common
3114 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3116 * gencode.c (build_instruction): Use BigEndianCPU instead of
3119 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3121 * interp.c (sim_monitor): Make output to stdout visible in
3122 wingdb's I/O log window.
3124 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3126 * support.h: Undo previous change to SIGTRAP
3129 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3131 * interp.c (store_word, load_word): New static functions.
3132 (mips16_entry): New static function.
3133 (SignalException): Look for mips16 entry and exit instructions.
3134 (simulate): Use the correct index when setting fpr_state after
3135 doing a pending move.
3137 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3139 * interp.c: Fix byte-swapping code throughout to work on
3140 both little- and big-endian hosts.
3142 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3144 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3145 with gdb/config/i386/xm-windows.h.
3147 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3149 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3150 that messes up arithmetic shifts.
3152 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3154 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3155 SIGTRAP and SIGQUIT for _WIN32.
3157 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3159 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3160 force a 64 bit multiplication.
3161 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3162 destination register is 0, since that is the default mips16 nop
3165 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3167 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3168 (build_endian_shift): Don't check proc64.
3169 (build_instruction): Always set memval to uword64. Cast op2 to
3170 uword64 when shifting it left in memory instructions. Always use
3171 the same code for stores--don't special case proc64.
3173 * gencode.c (build_mips16_operands): Fix base PC value for PC
3175 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3177 * interp.c (simJALDELAYSLOT): Define.
3178 (JALDELAYSLOT): Define.
3179 (INDELAYSLOT, INJALDELAYSLOT): Define.
3180 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3182 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3184 * interp.c (sim_open): add flush_cache as a PMON routine
3185 (sim_monitor): handle flush_cache by ignoring it
3187 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3189 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3191 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3192 (BigEndianMem): Rename to ByteSwapMem and change sense.
3193 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3194 BigEndianMem references to !ByteSwapMem.
3195 (set_endianness): New function, with prototype.
3196 (sim_open): Call set_endianness.
3197 (sim_info): Use simBE instead of BigEndianMem.
3198 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3199 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3200 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3201 ifdefs, keeping the prototype declaration.
3202 (swap_word): Rewrite correctly.
3203 (ColdReset): Delete references to CONFIG. Delete endianness related
3204 code; moved to set_endianness.
3206 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3208 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3209 * interp.c (CHECKHILO): Define away.
3210 (simSIGINT): New macro.
3211 (membank_size): Increase from 1MB to 2MB.
3212 (control_c): New function.
3213 (sim_resume): Rename parameter signal to signal_number. Add local
3214 variable prev. Call signal before and after simulate.
3215 (sim_stop_reason): Add simSIGINT support.
3216 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3218 (sim_warning): Delete call to SignalException. Do call printf_filtered
3220 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3221 a call to sim_warning.
3223 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3225 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3226 16 bit instructions.
3228 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3230 Add support for mips16 (16 bit MIPS implementation):
3231 * gencode.c (inst_type): Add mips16 instruction encoding types.
3232 (GETDATASIZEINSN): Define.
3233 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3234 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3236 (MIPS16_DECODE): New table, for mips16 instructions.
3237 (bitmap_val): New static function.
3238 (struct mips16_op): Define.
3239 (mips16_op_table): New table, for mips16 operands.
3240 (build_mips16_operands): New static function.
3241 (process_instructions): If PC is odd, decode a mips16
3242 instruction. Break out instruction handling into new
3243 build_instruction function.
3244 (build_instruction): New static function, broken out of
3245 process_instructions. Check modifiers rather than flags for SHIFT
3246 bit count and m[ft]{hi,lo} direction.
3247 (usage): Pass program name to fprintf.
3248 (main): Remove unused variable this_option_optind. Change
3249 ``*loptarg++'' to ``loptarg++''.
3250 (my_strtoul): Parenthesize && within ||.
3251 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3252 (simulate): If PC is odd, fetch a 16 bit instruction, and
3253 increment PC by 2 rather than 4.
3254 * configure.in: Add case for mips16*-*-*.
3255 * configure: Rebuild.
3257 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3259 * interp.c: Allow -t to enable tracing in standalone simulator.
3260 Fix garbage output in trace file and error messages.
3262 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3264 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3265 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3266 * configure.in: Simplify using macros in ../common/aclocal.m4.
3267 * configure: Regenerated.
3268 * tconfig.in: New file.
3270 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3272 * interp.c: Fix bugs in 64-bit port.
3273 Use ansi function declarations for msvc compiler.
3274 Initialize and test file pointer in trace code.
3275 Prevent duplicate definition of LAST_EMED_REGNUM.
3277 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3279 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3281 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3283 * interp.c (SignalException): Check for explicit terminating
3285 * gencode.c: Pass instruction value through SignalException()
3286 calls for Trap, Breakpoint and Syscall.
3288 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3290 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3291 only used on those hosts that provide it.
3292 * configure.in: Add sqrt() to list of functions to be checked for.
3293 * config.in: Re-generated.
3294 * configure: Re-generated.
3296 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3298 * gencode.c (process_instructions): Call build_endian_shift when
3299 expanding STORE RIGHT, to fix swr.
3300 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3301 clear the high bits.
3302 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3303 Fix float to int conversions to produce signed values.
3305 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3307 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3308 (process_instructions): Correct handling of nor instruction.
3309 Correct shift count for 32 bit shift instructions. Correct sign
3310 extension for arithmetic shifts to not shift the number of bits in
3311 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3312 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3314 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3315 It's OK to have a mult follow a mult. What's not OK is to have a
3316 mult follow an mfhi.
3317 (Convert): Comment out incorrect rounding code.
3319 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3321 * interp.c (sim_monitor): Improved monitor printf
3322 simulation. Tidied up simulator warnings, and added "--log" option
3323 for directing warning message output.
3324 * gencode.c: Use sim_warning() rather than WARNING macro.
3326 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3328 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3329 getopt1.o, rather than on gencode.c. Link objects together.
3330 Don't link against -liberty.
3331 (gencode.o, getopt.o, getopt1.o): New targets.
3332 * gencode.c: Include <ctype.h> and "ansidecl.h".
3333 (AND): Undefine after including "ansidecl.h".
3334 (ULONG_MAX): Define if not defined.
3335 (OP_*): Don't define macros; now defined in opcode/mips.h.
3336 (main): Call my_strtoul rather than strtoul.
3337 (my_strtoul): New static function.
3339 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3341 * gencode.c (process_instructions): Generate word64 and uword64
3342 instead of `long long' and `unsigned long long' data types.
3343 * interp.c: #include sysdep.h to get signals, and define default
3345 * (Convert): Work around for Visual-C++ compiler bug with type
3347 * support.h: Make things compile under Visual-C++ by using
3348 __int64 instead of `long long'. Change many refs to long long
3349 into word64/uword64 typedefs.
3351 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3353 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3354 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3356 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3357 (AC_PROG_INSTALL): Added.
3358 (AC_PROG_CC): Moved to before configure.host call.
3359 * configure: Rebuilt.
3361 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3363 * configure.in: Define @SIMCONF@ depending on mips target.
3364 * configure: Rebuild.
3365 * Makefile.in (run): Add @SIMCONF@ to control simulator
3367 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3368 * interp.c: Remove some debugging, provide more detailed error
3369 messages, update memory accesses to use LOADDRMASK.
3371 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3373 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3374 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3376 * configure: Rebuild.
3377 * config.in: New file, generated by autoheader.
3378 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3379 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3380 HAVE_ANINT and HAVE_AINT, as appropriate.
3381 * Makefile.in (run): Use @LIBS@ rather than -lm.
3382 (interp.o): Depend upon config.h.
3383 (Makefile): Just rebuild Makefile.
3384 (clean): Remove stamp-h.
3385 (mostlyclean): Make the same as clean, not as distclean.
3386 (config.h, stamp-h): New targets.
3388 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3390 * interp.c (ColdReset): Fix boolean test. Make all simulator
3393 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3395 * interp.c (xfer_direct_word, xfer_direct_long,
3396 swap_direct_word, swap_direct_long, xfer_big_word,
3397 xfer_big_long, xfer_little_word, xfer_little_long,
3398 swap_word,swap_long): Added.
3399 * interp.c (ColdReset): Provide function indirection to
3400 host<->simulated_target transfer routines.
3401 * interp.c (sim_store_register, sim_fetch_register): Updated to
3402 make use of indirected transfer routines.
3404 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3406 * gencode.c (process_instructions): Ensure FP ABS instruction
3408 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3409 system call support.
3411 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3413 * interp.c (sim_do_command): Complain if callback structure not
3416 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3418 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3419 support for Sun hosts.
3420 * Makefile.in (gencode): Ensure the host compiler and libraries
3421 used for cross-hosted build.
3423 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3425 * interp.c, gencode.c: Some more (TODO) tidying.
3427 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3429 * gencode.c, interp.c: Replaced explicit long long references with
3430 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3431 * support.h (SET64LO, SET64HI): Macros added.
3433 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3435 * configure: Regenerate with autoconf 2.7.
3437 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3439 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3440 * support.h: Remove superfluous "1" from #if.
3441 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3443 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3445 * interp.c (StoreFPR): Control UndefinedResult() call on
3446 WARN_RESULT manifest.
3448 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3450 * gencode.c: Tidied instruction decoding, and added FP instruction
3453 * interp.c: Added dineroIII, and BSD profiling support. Also
3454 run-time FP handling.
3456 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3458 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3459 gencode.c, interp.c, support.h: created.
projects / external / binutils.git / blob