1 2015-03-23 Mike Frysinger <vapier@gentoo.org>
3 * configure: Regenerate.
5 2015-03-23 Mike Frysinger <vapier@gentoo.org>
7 * configure: Regenerate.
8 * configure.ac (mips_extra_objs): Delete.
9 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
10 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
12 2015-03-23 Mike Frysinger <vapier@gentoo.org>
14 * configure: Regenerate.
15 * configure.ac: Delete sim_hw checks for dv-sockser.
17 2015-03-16 Mike Frysinger <vapier@gentoo.org>
19 * config.in, configure: Regenerate.
20 * tconfig.in: Rename file ...
21 * tconfig.h: ... here.
23 2015-03-15 Mike Frysinger <vapier@gentoo.org>
25 * tconfig.in: Delete includes.
26 [HAVE_DV_SOCKSER]: Delete.
28 2015-03-14 Mike Frysinger <vapier@gentoo.org>
30 * Makefile.in (SIM_RUN_OBJS): Delete.
32 2015-03-14 Mike Frysinger <vapier@gentoo.org>
34 * configure.ac (AC_CHECK_HEADERS): Delete.
35 * aclocal.m4, configure: Regenerate.
37 2014-08-19 Alan Modra <amodra@gmail.com>
39 * configure: Regenerate.
41 2014-08-15 Roland McGrath <mcgrathr@google.com>
43 * configure: Regenerate.
44 * config.in: Regenerate.
46 2014-03-04 Mike Frysinger <vapier@gentoo.org>
48 * configure: Regenerate.
50 2013-09-23 Alan Modra <amodra@gmail.com>
52 * configure: Regenerate.
54 2013-06-03 Mike Frysinger <vapier@gentoo.org>
56 * aclocal.m4, configure: Regenerate.
58 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
62 2013-03-26 Mike Frysinger <vapier@gentoo.org>
64 * configure: Regenerate.
66 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
68 * configure.ac: Address use of dv-sockser.o.
69 * tconfig.in: Conditionalize use of dv_sockser_install.
70 * configure: Regenerated.
71 * config.in: Regenerated.
73 2012-10-04 Chao-ying Fu <fu@mips.com>
74 Steve Ellcey <sellcey@mips.com>
76 * mips/mips3264r2.igen (rdhwr): New.
78 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
80 * configure.ac: Always link against dv-sockser.o.
81 * configure: Regenerate.
83 2012-06-15 Joel Brobecker <brobecker@adacore.com>
85 * config.in, configure: Regenerate.
87 2012-05-18 Nick Clifton <nickc@redhat.com>
90 * interp.c: Include config.h before system header files.
92 2012-03-24 Mike Frysinger <vapier@gentoo.org>
94 * aclocal.m4, config.in, configure: Regenerate.
96 2011-12-03 Mike Frysinger <vapier@gentoo.org>
98 * aclocal.m4: New file.
99 * configure: Regenerate.
101 2011-10-19 Mike Frysinger <vapier@gentoo.org>
103 * configure: Regenerate after common/acinclude.m4 update.
105 2011-10-17 Mike Frysinger <vapier@gentoo.org>
107 * configure.ac: Change include to common/acinclude.m4.
109 2011-10-17 Mike Frysinger <vapier@gentoo.org>
111 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
112 call. Replace common.m4 include with SIM_AC_COMMON.
113 * configure: Regenerate.
115 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
117 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
119 (tmp-mach-multi): Exit early when igen fails.
121 2011-07-05 Mike Frysinger <vapier@gentoo.org>
123 * interp.c (sim_do_command): Delete.
125 2011-02-14 Mike Frysinger <vapier@gentoo.org>
127 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
128 (tx3904sio_fifo_reset): Likewise.
129 * interp.c (sim_monitor): Likewise.
131 2010-04-14 Mike Frysinger <vapier@gentoo.org>
133 * interp.c (sim_write): Add const to buffer arg.
135 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
137 * interp.c: Don't include sysdep.h
139 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
141 * configure: Regenerate.
143 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
145 * config.in: Regenerate.
146 * configure: Likewise.
148 * configure: Regenerate.
150 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
152 * configure: Regenerate to track ../common/common.m4 changes.
155 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
156 Daniel Jacobowitz <dan@codesourcery.com>
157 Joseph Myers <joseph@codesourcery.com>
159 * configure: Regenerate.
161 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
163 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
164 that unconditionally allows fmt_ps.
165 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
166 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
167 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
168 filter from 64,f to 32,f.
169 (PREFX): Change filter from 64 to 32.
170 (LDXC1, LUXC1): Provide separate mips32r2 implementations
171 that use do_load_double instead of do_load. Make both LUXC1
172 versions unpredictable if SizeFGR () != 64.
173 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
174 instead of do_store. Remove unused variable. Make both SUXC1
175 versions unpredictable if SizeFGR () != 64.
177 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
179 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
180 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
181 shifts for that case.
183 2007-09-04 Nick Clifton <nickc@redhat.com>
185 * interp.c (options enum): Add OPTION_INFO_MEMORY.
186 (display_mem_info): New static variable.
187 (mips_option_handler): Handle OPTION_INFO_MEMORY.
188 (mips_options): Add info-memory and memory-info.
189 (sim_open): After processing the command line and board
190 specification, check display_mem_info. If it is set then
191 call the real handler for the --memory-info command line
194 2007-08-24 Joel Brobecker <brobecker@adacore.com>
196 * configure.ac: Change license of multi-run.c to GPL version 3.
197 * configure: Regenerate.
199 2007-06-28 Richard Sandiford <richard@codesourcery.com>
201 * configure.ac, configure: Revert last patch.
203 2007-06-26 Richard Sandiford <richard@codesourcery.com>
205 * configure.ac (sim_mipsisa3264_configs): New variable.
206 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
207 every configuration support all four targets, using the triplet to
208 determine the default.
209 * configure: Regenerate.
211 2007-06-25 Richard Sandiford <richard@codesourcery.com>
213 * Makefile.in (m16run.o): New rule.
215 2007-05-15 Thiemo Seufer <ths@mips.com>
217 * mips3264r2.igen (DSHD): Fix compile warning.
219 2007-05-14 Thiemo Seufer <ths@mips.com>
221 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
222 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
223 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
224 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
227 2007-03-01 Thiemo Seufer <ths@mips.com>
229 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
232 2007-02-20 Thiemo Seufer <ths@mips.com>
234 * dsp.igen: Update copyright notice.
235 * dsp2.igen: Fix copyright notice.
237 2007-02-20 Thiemo Seufer <ths@mips.com>
238 Chao-Ying Fu <fu@mips.com>
240 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
241 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
242 Add dsp2 to sim_igen_machine.
243 * configure: Regenerate.
244 * dsp.igen (do_ph_op): Add MUL support when op = 2.
245 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
246 (mulq_rs.ph): Use do_ph_mulq.
247 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
248 * mips.igen: Add dsp2 model and include dsp2.igen.
249 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
250 for *mips32r2, *mips64r2, *dsp.
251 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
252 for *mips32r2, *mips64r2, *dsp2.
253 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
255 2007-02-19 Thiemo Seufer <ths@mips.com>
256 Nigel Stephens <nigel@mips.com>
258 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
259 jumps with hazard barrier.
261 2007-02-19 Thiemo Seufer <ths@mips.com>
262 Nigel Stephens <nigel@mips.com>
264 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
265 after each call to sim_io_write.
267 2007-02-19 Thiemo Seufer <ths@mips.com>
268 Nigel Stephens <nigel@mips.com>
270 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
271 supported by this simulator.
272 (decode_coproc): Recognise additional CP0 Config registers
275 2007-02-19 Thiemo Seufer <ths@mips.com>
276 Nigel Stephens <nigel@mips.com>
277 David Ung <davidu@mips.com>
279 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
280 uninterpreted formats. If fmt is one of the uninterpreted types
281 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
282 fmt_word, and fmt_uninterpreted_64 like fmt_long.
283 (store_fpr): When writing an invalid odd register, set the
284 matching even register to fmt_unknown, not the following register.
285 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
286 the the memory window at offset 0 set by --memory-size command
288 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
290 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
292 (sim_monitor): When returning the memory size to the MIPS
293 application, use the value in STATE_MEM_SIZE, not an arbitrary
295 (cop_lw): Don' mess around with FPR_STATE, just pass
296 fmt_uninterpreted_32 to StoreFPR.
298 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
300 * mips.igen (not_word_value): Single version for mips32, mips64
303 2007-02-19 Thiemo Seufer <ths@mips.com>
304 Nigel Stephens <nigel@mips.com>
306 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
309 2007-02-17 Thiemo Seufer <ths@mips.com>
311 * configure.ac (mips*-sde-elf*): Move in front of generic machine
313 * configure: Regenerate.
315 2007-02-17 Thiemo Seufer <ths@mips.com>
317 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
318 Add mdmx to sim_igen_machine.
319 (mipsisa64*-*-*): Likewise. Remove dsp.
320 (mipsisa32*-*-*): Remove dsp.
321 * configure: Regenerate.
323 2007-02-13 Thiemo Seufer <ths@mips.com>
325 * configure.ac: Add mips*-sde-elf* target.
326 * configure: Regenerate.
328 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
330 * acconfig.h: Remove.
331 * config.in, configure: Regenerate.
333 2006-11-07 Thiemo Seufer <ths@mips.com>
335 * dsp.igen (do_w_op): Fix compiler warning.
337 2006-08-29 Thiemo Seufer <ths@mips.com>
338 David Ung <davidu@mips.com>
340 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
342 * configure: Regenerate.
343 * mips.igen (model): Add smartmips.
344 (MADDU): Increment ACX if carry.
345 (do_mult): Clear ACX.
346 (ROR,RORV): Add smartmips.
347 (include): Include smartmips.igen.
348 * sim-main.h (ACX): Set to REGISTERS[89].
349 * smartmips.igen: New file.
351 2006-08-29 Thiemo Seufer <ths@mips.com>
352 David Ung <davidu@mips.com>
354 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
355 mips3264r2.igen. Add missing dependency rules.
356 * m16e.igen: Support for mips16e save/restore instructions.
358 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
360 * configure: Regenerated.
362 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
364 * configure: Regenerated.
366 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
368 * configure: Regenerated.
370 2006-05-15 Chao-ying Fu <fu@mips.com>
372 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
374 2006-04-18 Nick Clifton <nickc@redhat.com>
376 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
379 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
381 * configure: Regenerate.
383 2005-12-14 Chao-ying Fu <fu@mips.com>
385 * Makefile.in (SIM_OBJS): Add dsp.o.
386 (dsp.o): New dependency.
387 (IGEN_INCLUDE): Add dsp.igen.
388 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
389 mipsisa64*-*-*): Add dsp to sim_igen_machine.
390 * configure: Regenerate.
391 * mips.igen: Add dsp model and include dsp.igen.
392 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
393 because these instructions are extended in DSP ASE.
394 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
395 adding 6 DSP accumulator registers and 1 DSP control register.
396 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
397 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
398 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
399 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
400 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
401 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
402 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
403 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
404 DSPCR_CCOND_SMASK): New define.
405 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
406 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
408 2005-07-08 Ian Lance Taylor <ian@airs.com>
410 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
412 2005-06-16 David Ung <davidu@mips.com>
413 Nigel Stephens <nigel@mips.com>
415 * mips.igen: New mips16e model and include m16e.igen.
416 (check_u64): Add mips16e tag.
417 * m16e.igen: New file for MIPS16e instructions.
418 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
419 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
421 * configure: Regenerate.
423 2005-05-26 David Ung <davidu@mips.com>
425 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
426 tags to all instructions which are applicable to the new ISAs.
427 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
429 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
431 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
433 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
434 * configure: Regenerate.
436 2005-03-23 Mark Kettenis <kettenis@gnu.org>
438 * configure: Regenerate.
440 2005-01-14 Andrew Cagney <cagney@gnu.org>
442 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
443 explicit call to AC_CONFIG_HEADER.
444 * configure: Regenerate.
446 2005-01-12 Andrew Cagney <cagney@gnu.org>
448 * configure.ac: Update to use ../common/common.m4.
449 * configure: Re-generate.
451 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
453 * configure: Regenerated to track ../common/aclocal.m4 changes.
455 2005-01-07 Andrew Cagney <cagney@gnu.org>
457 * configure.ac: Rename configure.in, require autoconf 2.59.
458 * configure: Re-generate.
460 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
462 * configure: Regenerate for ../common/aclocal.m4 update.
464 2004-09-24 Monika Chaddha <monika@acmet.com>
466 Committed by Andrew Cagney.
467 * m16.igen (CMP, CMPI): Fix assembler.
469 2004-08-18 Chris Demetriou <cgd@broadcom.com>
471 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
472 * configure: Regenerate.
474 2004-06-25 Chris Demetriou <cgd@broadcom.com>
476 * configure.in (sim_m16_machine): Include mipsIII.
477 * configure: Regenerate.
479 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
481 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
483 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
485 2004-04-10 Chris Demetriou <cgd@broadcom.com>
487 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
489 2004-04-09 Chris Demetriou <cgd@broadcom.com>
491 * mips.igen (check_fmt): Remove.
492 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
493 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
494 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
495 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
496 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
497 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
498 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
499 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
500 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
501 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
503 2004-04-09 Chris Demetriou <cgd@broadcom.com>
505 * sb1.igen (check_sbx): New function.
506 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
508 2004-03-29 Chris Demetriou <cgd@broadcom.com>
509 Richard Sandiford <rsandifo@redhat.com>
511 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
512 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
513 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
514 separate implementations for mipsIV and mipsV. Use new macros to
515 determine whether the restrictions apply.
517 2004-01-19 Chris Demetriou <cgd@broadcom.com>
519 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
520 (check_mult_hilo): Improve comments.
521 (check_div_hilo): Likewise. Also, fork off a new version
522 to handle mips32/mips64 (since there are no hazards to check
525 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
527 * mips.igen (do_dmultx): Fix check for negative operands.
529 2003-05-16 Ian Lance Taylor <ian@airs.com>
531 * Makefile.in (SHELL): Make sure this is defined.
532 (various): Use $(SHELL) whenever we invoke move-if-change.
534 2003-05-03 Chris Demetriou <cgd@broadcom.com>
536 * cp1.c: Tweak attribution slightly.
539 * mdmx.igen: Likewise.
540 * mips3d.igen: Likewise.
541 * sb1.igen: Likewise.
543 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
545 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
548 2003-02-27 Andrew Cagney <cagney@redhat.com>
550 * interp.c (sim_open): Rename _bfd to bfd.
551 (sim_create_inferior): Ditto.
553 2003-01-14 Chris Demetriou <cgd@broadcom.com>
555 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
557 2003-01-14 Chris Demetriou <cgd@broadcom.com>
559 * mips.igen (EI, DI): Remove.
561 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
563 * Makefile.in (tmp-run-multi): Fix mips16 filter.
565 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
566 Andrew Cagney <ac131313@redhat.com>
567 Gavin Romig-Koch <gavin@redhat.com>
568 Graydon Hoare <graydon@redhat.com>
569 Aldy Hernandez <aldyh@redhat.com>
570 Dave Brolley <brolley@redhat.com>
571 Chris Demetriou <cgd@broadcom.com>
573 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
574 (sim_mach_default): New variable.
575 (mips64vr-*-*, mips64vrel-*-*): New configurations.
576 Add a new simulator generator, MULTI.
577 * configure: Regenerate.
578 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
579 (multi-run.o): New dependency.
580 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
581 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
582 (tmp-multi): Combine them.
583 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
584 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
585 (distclean-extra): New rule.
586 * sim-main.h: Include bfd.h.
587 (MIPS_MACH): New macro.
588 * mips.igen (vr4120, vr5400, vr5500): New models.
589 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
590 * vr.igen: Replace with new version.
592 2003-01-04 Chris Demetriou <cgd@broadcom.com>
594 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
595 * configure: Regenerate.
597 2002-12-31 Chris Demetriou <cgd@broadcom.com>
599 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
600 * mips.igen: Remove all invocations of check_branch_bug and
603 2002-12-16 Chris Demetriou <cgd@broadcom.com>
605 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
607 2002-07-30 Chris Demetriou <cgd@broadcom.com>
609 * mips.igen (do_load_double, do_store_double): New functions.
610 (LDC1, SDC1): Rename to...
611 (LDC1b, SDC1b): respectively.
612 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
614 2002-07-29 Michael Snyder <msnyder@redhat.com>
616 * cp1.c (fp_recip2): Modify initialization expression so that
617 GCC will recognize it as constant.
619 2002-06-18 Chris Demetriou <cgd@broadcom.com>
621 * mdmx.c (SD_): Delete.
622 (Unpredictable): Re-define, for now, to directly invoke
623 unpredictable_action().
624 (mdmx_acc_op): Fix error in .ob immediate handling.
626 2002-06-18 Andrew Cagney <cagney@redhat.com>
628 * interp.c (sim_firmware_command): Initialize `address'.
630 2002-06-16 Andrew Cagney <ac131313@redhat.com>
632 * configure: Regenerated to track ../common/aclocal.m4 changes.
634 2002-06-14 Chris Demetriou <cgd@broadcom.com>
635 Ed Satterthwaite <ehs@broadcom.com>
637 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
638 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
639 * mips.igen: Include mips3d.igen.
640 (mips3d): New model name for MIPS-3D ASE instructions.
641 (CVT.W.fmt): Don't use this instruction for word (source) format
643 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
644 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
645 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
646 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
647 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
648 (RSquareRoot1, RSquareRoot2): New macros.
649 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
650 (fp_rsqrt2): New functions.
651 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
652 * configure: Regenerate.
654 2002-06-13 Chris Demetriou <cgd@broadcom.com>
655 Ed Satterthwaite <ehs@broadcom.com>
657 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
658 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
659 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
660 (convert): Note that this function is not used for paired-single
662 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
663 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
664 (check_fmt_p): Enable paired-single support.
665 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
666 (PUU.PS): New instructions.
667 (CVT.S.fmt): Don't use this instruction for paired-single format
669 * sim-main.h (FP_formats): New value 'fmt_ps.'
670 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
671 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
673 2002-06-12 Chris Demetriou <cgd@broadcom.com>
675 * mips.igen: Fix formatting of function calls in
678 2002-06-12 Chris Demetriou <cgd@broadcom.com>
680 * mips.igen (MOVN, MOVZ): Trace result.
681 (TNEI): Print "tnei" as the opcode name in traces.
682 (CEIL.W): Add disassembly string for traces.
683 (RSQRT.fmt): Make location of disassembly string consistent
684 with other instructions.
686 2002-06-12 Chris Demetriou <cgd@broadcom.com>
688 * mips.igen (X): Delete unused function.
690 2002-06-08 Andrew Cagney <cagney@redhat.com>
692 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
694 2002-06-07 Chris Demetriou <cgd@broadcom.com>
695 Ed Satterthwaite <ehs@broadcom.com>
697 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
698 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
699 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
700 (fp_nmsub): New prototypes.
701 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
702 (NegMultiplySub): New defines.
703 * mips.igen (RSQRT.fmt): Use RSquareRoot().
704 (MADD.D, MADD.S): Replace with...
705 (MADD.fmt): New instruction.
706 (MSUB.D, MSUB.S): Replace with...
707 (MSUB.fmt): New instruction.
708 (NMADD.D, NMADD.S): Replace with...
709 (NMADD.fmt): New instruction.
710 (NMSUB.D, MSUB.S): Replace with...
711 (NMSUB.fmt): New instruction.
713 2002-06-07 Chris Demetriou <cgd@broadcom.com>
714 Ed Satterthwaite <ehs@broadcom.com>
716 * cp1.c: Fix more comment spelling and formatting.
717 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
718 (denorm_mode): New function.
719 (fpu_unary, fpu_binary): Round results after operation, collect
720 status from rounding operations, and update the FCSR.
721 (convert): Collect status from integer conversions and rounding
722 operations, and update the FCSR. Adjust NaN values that result
723 from conversions. Convert to use sim_io_eprintf rather than
724 fprintf, and remove some debugging code.
725 * cp1.h (fenr_FS): New define.
727 2002-06-07 Chris Demetriou <cgd@broadcom.com>
729 * cp1.c (convert): Remove unusable debugging code, and move MIPS
730 rounding mode to sim FP rounding mode flag conversion code into...
731 (rounding_mode): New function.
733 2002-06-07 Chris Demetriou <cgd@broadcom.com>
735 * cp1.c: Clean up formatting of a few comments.
736 (value_fpr): Reformat switch statement.
738 2002-06-06 Chris Demetriou <cgd@broadcom.com>
739 Ed Satterthwaite <ehs@broadcom.com>
742 * sim-main.h: Include cp1.h.
743 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
744 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
745 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
746 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
747 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
748 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
749 * cp1.c: Don't include sim-fpu.h; already included by
750 sim-main.h. Clean up formatting of some comments.
751 (NaN, Equal, Less): Remove.
752 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
753 (fp_cmp): New functions.
754 * mips.igen (do_c_cond_fmt): Remove.
755 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
756 Compare. Add result tracing.
757 (CxC1): Remove, replace with...
758 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
759 (DMxC1): Remove, replace with...
760 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
761 (MxC1): Remove, replace with...
762 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
764 2002-06-04 Chris Demetriou <cgd@broadcom.com>
766 * sim-main.h (FGRIDX): Remove, replace all uses with...
767 (FGR_BASE): New macro.
768 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
769 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
770 (NR_FGR, FGR): Likewise.
771 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
772 * mips.igen: Likewise.
774 2002-06-04 Chris Demetriou <cgd@broadcom.com>
776 * cp1.c: Add an FSF Copyright notice to this file.
778 2002-06-04 Chris Demetriou <cgd@broadcom.com>
779 Ed Satterthwaite <ehs@broadcom.com>
781 * cp1.c (Infinity): Remove.
782 * sim-main.h (Infinity): Likewise.
784 * cp1.c (fp_unary, fp_binary): New functions.
785 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
786 (fp_sqrt): New functions, implemented in terms of the above.
787 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
788 (Recip, SquareRoot): Remove (replaced by functions above).
789 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
790 (fp_recip, fp_sqrt): New prototypes.
791 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
792 (Recip, SquareRoot): Replace prototypes with #defines which
793 invoke the functions above.
795 2002-06-03 Chris Demetriou <cgd@broadcom.com>
797 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
798 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
799 file, remove PARAMS from prototypes.
800 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
801 simulator state arguments.
802 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
803 pass simulator state arguments.
804 * cp1.c (SD): Redefine as CPU_STATE(cpu).
805 (store_fpr, convert): Remove 'sd' argument.
806 (value_fpr): Likewise. Convert to use 'SD' instead.
808 2002-06-03 Chris Demetriou <cgd@broadcom.com>
810 * cp1.c (Min, Max): Remove #if 0'd functions.
811 * sim-main.h (Min, Max): Remove.
813 2002-06-03 Chris Demetriou <cgd@broadcom.com>
815 * cp1.c: fix formatting of switch case and default labels.
816 * interp.c: Likewise.
817 * sim-main.c: Likewise.
819 2002-06-03 Chris Demetriou <cgd@broadcom.com>
821 * cp1.c: Clean up comments which describe FP formats.
822 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
824 2002-06-03 Chris Demetriou <cgd@broadcom.com>
825 Ed Satterthwaite <ehs@broadcom.com>
827 * configure.in (mipsisa64sb1*-*-*): New target for supporting
828 Broadcom SiByte SB-1 processor configurations.
829 * configure: Regenerate.
830 * sb1.igen: New file.
831 * mips.igen: Include sb1.igen.
833 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
834 * mdmx.igen: Add "sb1" model to all appropriate functions and
836 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
837 (ob_func, ob_acc): Reference the above.
838 (qh_acc): Adjust to keep the same size as ob_acc.
839 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
840 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
842 2002-06-03 Chris Demetriou <cgd@broadcom.com>
844 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
846 2002-06-02 Chris Demetriou <cgd@broadcom.com>
847 Ed Satterthwaite <ehs@broadcom.com>
849 * mips.igen (mdmx): New (pseudo-)model.
850 * mdmx.c, mdmx.igen: New files.
851 * Makefile.in (SIM_OBJS): Add mdmx.o.
852 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
854 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
855 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
856 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
857 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
858 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
859 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
860 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
861 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
862 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
863 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
864 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
865 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
866 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
867 (qh_fmtsel): New macros.
868 (_sim_cpu): New member "acc".
869 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
870 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
872 2002-05-01 Chris Demetriou <cgd@broadcom.com>
874 * interp.c: Use 'deprecated' rather than 'depreciated.'
875 * sim-main.h: Likewise.
877 2002-05-01 Chris Demetriou <cgd@broadcom.com>
879 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
880 which wouldn't compile anyway.
881 * sim-main.h (unpredictable_action): New function prototype.
882 (Unpredictable): Define to call igen function unpredictable().
883 (NotWordValue): New macro to call igen function not_word_value().
884 (UndefinedResult): Remove.
885 * interp.c (undefined_result): Remove.
886 (unpredictable_action): New function.
887 * mips.igen (not_word_value, unpredictable): New functions.
888 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
889 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
890 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
891 NotWordValue() to check for unpredictable inputs, then
892 Unpredictable() to handle them.
894 2002-02-24 Chris Demetriou <cgd@broadcom.com>
896 * mips.igen: Fix formatting of calls to Unpredictable().
898 2002-04-20 Andrew Cagney <ac131313@redhat.com>
900 * interp.c (sim_open): Revert previous change.
902 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
904 * interp.c (sim_open): Disable chunk of code that wrote code in
905 vector table entries.
907 2002-03-19 Chris Demetriou <cgd@broadcom.com>
909 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
910 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
913 2002-03-19 Chris Demetriou <cgd@broadcom.com>
915 * cp1.c: Fix many formatting issues.
917 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
919 * cp1.c (fpu_format_name): New function to replace...
920 (DOFMT): This. Delete, and update all callers.
921 (fpu_rounding_mode_name): New function to replace...
922 (RMMODE): This. Delete, and update all callers.
924 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
926 * interp.c: Move FPU support routines from here to...
927 * cp1.c: Here. New file.
928 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
931 2002-03-12 Chris Demetriou <cgd@broadcom.com>
933 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
934 * mips.igen (mips32, mips64): New models, add to all instructions
935 and functions as appropriate.
936 (loadstore_ea, check_u64): New variant for model mips64.
937 (check_fmt_p): New variant for models mipsV and mips64, remove
938 mipsV model marking fro other variant.
941 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
942 for mips32 and mips64.
943 (DCLO, DCLZ): New instructions for mips64.
945 2002-03-07 Chris Demetriou <cgd@broadcom.com>
947 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
948 immediate or code as a hex value with the "%#lx" format.
949 (ANDI): Likewise, and fix printed instruction name.
951 2002-03-05 Chris Demetriou <cgd@broadcom.com>
953 * sim-main.h (UndefinedResult, Unpredictable): New macros
954 which currently do nothing.
956 2002-03-05 Chris Demetriou <cgd@broadcom.com>
958 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
959 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
960 (status_CU3): New definitions.
962 * sim-main.h (ExceptionCause): Add new values for MIPS32
963 and MIPS64: MDMX, MCheck, CacheErr. Update comments
964 for DebugBreakPoint and NMIReset to note their status in
966 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
967 (SignalExceptionCacheErr): New exception macros.
969 2002-03-05 Chris Demetriou <cgd@broadcom.com>
971 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
972 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
974 (SignalExceptionCoProcessorUnusable): Take as argument the
975 unusable coprocessor number.
977 2002-03-05 Chris Demetriou <cgd@broadcom.com>
979 * mips.igen: Fix formatting of all SignalException calls.
981 2002-03-05 Chris Demetriou <cgd@broadcom.com>
983 * sim-main.h (SIGNEXTEND): Remove.
985 2002-03-04 Chris Demetriou <cgd@broadcom.com>
987 * mips.igen: Remove gencode comment from top of file, fix
988 spelling in another comment.
990 2002-03-04 Chris Demetriou <cgd@broadcom.com>
992 * mips.igen (check_fmt, check_fmt_p): New functions to check
993 whether specific floating point formats are usable.
994 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
995 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
996 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
997 Use the new functions.
998 (do_c_cond_fmt): Remove format checks...
999 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1001 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1003 * mips.igen: Fix formatting of check_fpu calls.
1005 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1007 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1009 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1011 * mips.igen: Remove whitespace at end of lines.
1013 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1015 * mips.igen (loadstore_ea): New function to do effective
1016 address calculations.
1017 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1018 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1019 CACHE): Use loadstore_ea to do effective address computations.
1021 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1023 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1024 * mips.igen (LL, CxC1, MxC1): Likewise.
1026 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1028 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1029 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1030 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1031 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1032 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1033 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1034 Don't split opcode fields by hand, use the opcode field values
1037 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1039 * mips.igen (do_divu): Fix spacing.
1041 * mips.igen (do_dsllv): Move to be right before DSLLV,
1042 to match the rest of the do_<shift> functions.
1044 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1046 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1047 DSRL32, do_dsrlv): Trace inputs and results.
1049 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1051 * mips.igen (CACHE): Provide instruction-printing string.
1053 * interp.c (signal_exception): Comment tokens after #endif.
1055 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1057 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1058 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1059 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1060 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1061 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1062 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1063 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1064 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1066 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1068 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1069 instruction-printing string.
1070 (LWU): Use '64' as the filter flag.
1072 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1074 * mips.igen (SDXC1): Fix instruction-printing string.
1076 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1078 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1079 filter flags "32,f".
1081 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1083 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1086 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1088 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1089 add a comma) so that it more closely match the MIPS ISA
1090 documentation opcode partitioning.
1091 (PREF): Put useful names on opcode fields, and include
1092 instruction-printing string.
1094 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1096 * mips.igen (check_u64): New function which in the future will
1097 check whether 64-bit instructions are usable and signal an
1098 exception if not. Currently a no-op.
1099 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1100 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1101 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1102 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1104 * mips.igen (check_fpu): New function which in the future will
1105 check whether FPU instructions are usable and signal an exception
1106 if not. Currently a no-op.
1107 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1108 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1109 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1110 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1111 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1112 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1113 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1114 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1116 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1118 * mips.igen (do_load_left, do_load_right): Move to be immediately
1120 (do_store_left, do_store_right): Move to be immediately following
1123 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1125 * mips.igen (mipsV): New model name. Also, add it to
1126 all instructions and functions where it is appropriate.
1128 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1130 * mips.igen: For all functions and instructions, list model
1131 names that support that instruction one per line.
1133 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1135 * mips.igen: Add some additional comments about supported
1136 models, and about which instructions go where.
1137 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1138 order as is used in the rest of the file.
1140 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1142 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1143 indicating that ALU32_END or ALU64_END are there to check
1145 (DADD): Likewise, but also remove previous comment about
1148 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1150 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1151 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1152 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1153 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1154 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1155 fields (i.e., add and move commas) so that they more closely
1156 match the MIPS ISA documentation opcode partitioning.
1158 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1160 * mips.igen (ADDI): Print immediate value.
1161 (BREAK): Print code.
1162 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1163 (SLL): Print "nop" specially, and don't run the code
1164 that does the shift for the "nop" case.
1166 2001-11-17 Fred Fish <fnf@redhat.com>
1168 * sim-main.h (float_operation): Move enum declaration outside
1169 of _sim_cpu struct declaration.
1171 2001-04-12 Jim Blandy <jimb@redhat.com>
1173 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1174 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1176 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1177 PENDING_FILL, and you can get the intended effect gracefully by
1178 calling PENDING_SCHED directly.
1180 2001-02-23 Ben Elliston <bje@redhat.com>
1182 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1183 already defined elsewhere.
1185 2001-02-19 Ben Elliston <bje@redhat.com>
1187 * sim-main.h (sim_monitor): Return an int.
1188 * interp.c (sim_monitor): Add return values.
1189 (signal_exception): Handle error conditions from sim_monitor.
1191 2001-02-08 Ben Elliston <bje@redhat.com>
1193 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1194 (store_memory): Likewise, pass cia to sim_core_write*.
1196 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1198 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1199 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1201 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1203 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1204 * Makefile.in: Don't delete *.igen when cleaning directory.
1206 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1208 * m16.igen (break): Call SignalException not sim_engine_halt.
1210 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1212 From Jason Eckhardt:
1213 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1215 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1217 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1219 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1221 * mips.igen (do_dmultx): Fix typo.
1223 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1225 * configure: Regenerated to track ../common/aclocal.m4 changes.
1227 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1229 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1231 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1233 * sim-main.h (GPR_CLEAR): Define macro.
1235 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1237 * interp.c (decode_coproc): Output long using %lx and not %s.
1239 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1241 * interp.c (sim_open): Sort & extend dummy memory regions for
1242 --board=jmr3904 for eCos.
1244 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1246 * configure: Regenerated.
1248 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1250 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1251 calls, conditional on the simulator being in verbose mode.
1253 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1255 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1256 cache don't get ReservedInstruction traps.
1258 1999-11-29 Mark Salter <msalter@cygnus.com>
1260 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1261 to clear status bits in sdisr register. This is how the hardware works.
1263 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1264 being used by cygmon.
1266 1999-11-11 Andrew Haley <aph@cygnus.com>
1268 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1271 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1273 * mips.igen (MULT): Correct previous mis-applied patch.
1275 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1277 * mips.igen (delayslot32): Handle sequence like
1278 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1279 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1280 (MULT): Actually pass the third register...
1282 1999-09-03 Mark Salter <msalter@cygnus.com>
1284 * interp.c (sim_open): Added more memory aliases for additional
1285 hardware being touched by cygmon on jmr3904 board.
1287 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1289 * configure: Regenerated to track ../common/aclocal.m4 changes.
1291 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1293 * interp.c (sim_store_register): Handle case where client - GDB -
1294 specifies that a 4 byte register is 8 bytes in size.
1295 (sim_fetch_register): Ditto.
1297 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1299 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1300 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1301 (idt_monitor_base): Base address for IDT monitor traps.
1302 (pmon_monitor_base): Ditto for PMON.
1303 (lsipmon_monitor_base): Ditto for LSI PMON.
1304 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1305 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1306 (sim_firmware_command): New function.
1307 (mips_option_handler): Call it for OPTION_FIRMWARE.
1308 (sim_open): Allocate memory for idt_monitor region. If "--board"
1309 option was given, add no monitor by default. Add BREAK hooks only if
1310 monitors are also there.
1312 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1314 * interp.c (sim_monitor): Flush output before reading input.
1316 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1318 * tconfig.in (SIM_HANDLES_LMA): Always define.
1320 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1322 From Mark Salter <msalter@cygnus.com>:
1323 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1324 (sim_open): Add setup for BSP board.
1326 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1328 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1329 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1330 them as unimplemented.
1332 1999-05-08 Felix Lee <flee@cygnus.com>
1334 * configure: Regenerated to track ../common/aclocal.m4 changes.
1336 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1338 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1340 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1342 * configure.in: Any mips64vr5*-*-* target should have
1343 -DTARGET_ENABLE_FR=1.
1344 (default_endian): Any mips64vr*el-*-* target should default to
1346 * configure: Re-generate.
1348 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1350 * mips.igen (ldl): Extend from _16_, not 32.
1352 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1354 * interp.c (sim_store_register): Force registers written to by GDB
1355 into an un-interpreted state.
1357 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1359 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1360 CPU, start periodic background I/O polls.
1361 (tx3904sio_poll): New function: periodic I/O poller.
1363 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1365 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1367 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1369 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1372 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1374 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1375 (load_word): Call SIM_CORE_SIGNAL hook on error.
1376 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1377 starting. For exception dispatching, pass PC instead of NULL_CIA.
1378 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1379 * sim-main.h (COP0_BADVADDR): Define.
1380 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1381 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1382 (_sim_cpu): Add exc_* fields to store register value snapshots.
1383 * mips.igen (*): Replace memory-related SignalException* calls
1384 with references to SIM_CORE_SIGNAL hook.
1386 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1388 * sim-main.c (*): Minor warning cleanups.
1390 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1392 * m16.igen (DADDIU5): Correct type-o.
1394 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1396 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1399 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1401 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1403 (interp.o): Add dependency on itable.h
1404 (oengine.c, gencode): Delete remaining references.
1405 (BUILT_SRC_FROM_GEN): Clean up.
1407 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1410 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1411 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1412 tmp-run-hack) : New.
1413 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1414 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1415 Drop the "64" qualifier to get the HACK generator working.
1416 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1417 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1418 qualifier to get the hack generator working.
1419 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1420 (DSLL): Use do_dsll.
1421 (DSLLV): Use do_dsllv.
1422 (DSRA): Use do_dsra.
1423 (DSRL): Use do_dsrl.
1424 (DSRLV): Use do_dsrlv.
1425 (BC1): Move *vr4100 to get the HACK generator working.
1426 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1427 get the HACK generator working.
1428 (MACC) Rename to get the HACK generator working.
1429 (DMACC,MACCS,DMACCS): Add the 64.
1431 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1433 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1434 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1436 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1438 * mips/interp.c (DEBUG): Cleanups.
1440 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1442 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1443 (tx3904sio_tickle): fflush after a stdout character output.
1445 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1447 * interp.c (sim_close): Uninstall modules.
1449 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1451 * sim-main.h, interp.c (sim_monitor): Change to global
1454 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1456 * configure.in (vr4100): Only include vr4100 instructions in
1458 * configure: Re-generate.
1459 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1461 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1463 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1464 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1467 * configure.in (sim_default_gen, sim_use_gen): Replace with
1469 (--enable-sim-igen): Delete config option. Always using IGEN.
1470 * configure: Re-generate.
1472 * Makefile.in (gencode): Kill, kill, kill.
1475 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1477 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1478 bit mips16 igen simulator.
1479 * configure: Re-generate.
1481 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1482 as part of vr4100 ISA.
1483 * vr.igen: Mark all instructions as 64 bit only.
1485 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1487 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1490 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1492 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1493 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1494 * configure: Re-generate.
1496 * m16.igen (BREAK): Define breakpoint instruction.
1497 (JALX32): Mark instruction as mips16 and not r3900.
1498 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1500 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1502 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1504 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1505 insn as a debug breakpoint.
1507 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1509 (PENDING_SCHED): Clean up trace statement.
1510 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1511 (PENDING_FILL): Delay write by only one cycle.
1512 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1514 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1516 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1518 (pending_tick): Move incrementing of index to FOR statement.
1519 (pending_tick): Only update PENDING_OUT after a write has occured.
1521 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1523 * configure: Re-generate.
1525 * interp.c (sim_engine_run OLD): Delete explicit call to
1526 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1528 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1530 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1531 interrupt level number to match changed SignalExceptionInterrupt
1534 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1536 * interp.c: #include "itable.h" if WITH_IGEN.
1537 (get_insn_name): New function.
1538 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1539 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1541 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1543 * configure: Rebuilt to inhale new common/aclocal.m4.
1545 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1547 * dv-tx3904sio.c: Include sim-assert.h.
1549 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1551 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1552 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1553 Reorganize target-specific sim-hardware checks.
1554 * configure: rebuilt.
1555 * interp.c (sim_open): For tx39 target boards, set
1556 OPERATING_ENVIRONMENT, add tx3904sio devices.
1557 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1558 ROM executables. Install dv-sockser into sim-modules list.
1560 * dv-tx3904irc.c: Compiler warning clean-up.
1561 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1562 frequent hw-trace messages.
1564 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1566 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1568 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1570 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1572 * vr.igen: New file.
1573 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1574 * mips.igen: Define vr4100 model. Include vr.igen.
1575 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1577 * mips.igen (check_mf_hilo): Correct check.
1579 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1581 * sim-main.h (interrupt_event): Add prototype.
1583 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1584 register_ptr, register_value.
1585 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1587 * sim-main.h (tracefh): Make extern.
1589 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1591 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1592 Reduce unnecessarily high timer event frequency.
1593 * dv-tx3904cpu.c: Ditto for interrupt event.
1595 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1597 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1599 (interrupt_event): Made non-static.
1601 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1602 interchange of configuration values for external vs. internal
1605 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1607 * mips.igen (BREAK): Moved code to here for
1608 simulator-reserved break instructions.
1609 * gencode.c (build_instruction): Ditto.
1610 * interp.c (signal_exception): Code moved from here. Non-
1611 reserved instructions now use exception vector, rather
1613 * sim-main.h: Moved magic constants to here.
1615 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1617 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1618 register upon non-zero interrupt event level, clear upon zero
1620 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1621 by passing zero event value.
1622 (*_io_{read,write}_buffer): Endianness fixes.
1623 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1624 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1626 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1627 serial I/O and timer module at base address 0xFFFF0000.
1629 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1631 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1634 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1636 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1638 * configure: Update.
1640 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1642 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1643 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1644 * configure.in: Include tx3904tmr in hw_device list.
1645 * configure: Rebuilt.
1646 * interp.c (sim_open): Instantiate three timer instances.
1647 Fix address typo of tx3904irc instance.
1649 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1651 * interp.c (signal_exception): SystemCall exception now uses
1652 the exception vector.
1654 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1656 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1659 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1661 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1663 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1665 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1667 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1668 sim-main.h. Declare a struct hw_descriptor instead of struct
1669 hw_device_descriptor.
1671 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1673 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1674 right bits and then re-align left hand bytes to correct byte
1675 lanes. Fix incorrect computation in do_store_left when loading
1676 bytes from second word.
1678 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1680 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1681 * interp.c (sim_open): Only create a device tree when HW is
1684 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1685 * interp.c (signal_exception): Ditto.
1687 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1689 * gencode.c: Mark BEGEZALL as LIKELY.
1691 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1693 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1694 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1696 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1698 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1699 modules. Recognize TX39 target with "mips*tx39" pattern.
1700 * configure: Rebuilt.
1701 * sim-main.h (*): Added many macros defining bits in
1702 TX39 control registers.
1703 (SignalInterrupt): Send actual PC instead of NULL.
1704 (SignalNMIReset): New exception type.
1705 * interp.c (board): New variable for future use to identify
1706 a particular board being simulated.
1707 (mips_option_handler,mips_options): Added "--board" option.
1708 (interrupt_event): Send actual PC.
1709 (sim_open): Make memory layout conditional on board setting.
1710 (signal_exception): Initial implementation of hardware interrupt
1711 handling. Accept another break instruction variant for simulator
1713 (decode_coproc): Implement RFE instruction for TX39.
1714 (mips.igen): Decode RFE instruction as such.
1715 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1716 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1717 bbegin to implement memory map.
1718 * dv-tx3904cpu.c: New file.
1719 * dv-tx3904irc.c: New file.
1721 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1723 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1725 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1727 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1728 with calls to check_div_hilo.
1730 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1732 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1733 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1734 Add special r3900 version of do_mult_hilo.
1735 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1736 with calls to check_mult_hilo.
1737 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1738 with calls to check_div_hilo.
1740 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1742 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1743 Document a replacement.
1745 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1747 * interp.c (sim_monitor): Make mon_printf work.
1749 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1751 * sim-main.h (INSN_NAME): New arg `cpu'.
1753 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1755 * configure: Regenerated to track ../common/aclocal.m4 changes.
1757 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1759 * configure: Regenerated to track ../common/aclocal.m4 changes.
1762 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1764 * acconfig.h: New file.
1765 * configure.in: Reverted change of Apr 24; use sinclude again.
1767 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1769 * configure: Regenerated to track ../common/aclocal.m4 changes.
1772 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1774 * configure.in: Don't call sinclude.
1776 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1778 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1780 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1782 * mips.igen (ERET): Implement.
1784 * interp.c (decode_coproc): Return sign-extended EPC.
1786 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1788 * interp.c (signal_exception): Do not ignore Trap.
1789 (signal_exception): On TRAP, restart at exception address.
1790 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1791 (signal_exception): Update.
1792 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1793 so that TRAP instructions are caught.
1795 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1797 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1798 contains HI/LO access history.
1799 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1800 (HIACCESS, LOACCESS): Delete, replace with
1801 (HIHISTORY, LOHISTORY): New macros.
1802 (CHECKHILO): Delete all, moved to mips.igen
1804 * gencode.c (build_instruction): Do not generate checks for
1805 correct HI/LO register usage.
1807 * interp.c (old_engine_run): Delete checks for correct HI/LO
1810 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1811 check_mf_cycles): New functions.
1812 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1813 do_divu, domultx, do_mult, do_multu): Use.
1815 * tx.igen ("madd", "maddu"): Use.
1817 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1819 * mips.igen (DSRAV): Use function do_dsrav.
1820 (SRAV): Use new function do_srav.
1822 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1823 (B): Sign extend 11 bit immediate.
1824 (EXT-B*): Shift 16 bit immediate left by 1.
1825 (ADDIU*): Don't sign extend immediate value.
1827 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1829 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1831 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1834 * mips.igen (delayslot32, nullify_next_insn): New functions.
1835 (m16.igen): Always include.
1836 (do_*): Add more tracing.
1838 * m16.igen (delayslot16): Add NIA argument, could be called by a
1839 32 bit MIPS16 instruction.
1841 * interp.c (ifetch16): Move function from here.
1842 * sim-main.c (ifetch16): To here.
1844 * sim-main.c (ifetch16, ifetch32): Update to match current
1845 implementations of LH, LW.
1846 (signal_exception): Don't print out incorrect hex value of illegal
1849 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1851 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1854 * m16.igen: Implement MIPS16 instructions.
1856 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1857 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1858 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1859 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1860 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1861 bodies of corresponding code from 32 bit insn to these. Also used
1862 by MIPS16 versions of functions.
1864 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1865 (IMEM16): Drop NR argument from macro.
1867 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1869 * Makefile.in (SIM_OBJS): Add sim-main.o.
1871 * sim-main.h (address_translation, load_memory, store_memory,
1872 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1874 (pr_addr, pr_uword64): Declare.
1875 (sim-main.c): Include when H_REVEALS_MODULE_P.
1877 * interp.c (address_translation, load_memory, store_memory,
1878 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1880 * sim-main.c: To here. Fix compilation problems.
1882 * configure.in: Enable inlining.
1883 * configure: Re-config.
1885 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1887 * configure: Regenerated to track ../common/aclocal.m4 changes.
1889 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1891 * mips.igen: Include tx.igen.
1892 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1893 * tx.igen: New file, contains MADD and MADDU.
1895 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1896 the hardwired constant `7'.
1897 (store_memory): Ditto.
1898 (LOADDRMASK): Move definition to sim-main.h.
1900 mips.igen (MTC0): Enable for r3900.
1903 mips.igen (do_load_byte): Delete.
1904 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1905 do_store_right): New functions.
1906 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1908 configure.in: Let the tx39 use igen again.
1911 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1913 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1914 not an address sized quantity. Return zero for cache sizes.
1916 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1918 * mips.igen (r3900): r3900 does not support 64 bit integer
1921 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1923 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1925 * configure : Rebuild.
1927 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1929 * configure: Regenerated to track ../common/aclocal.m4 changes.
1931 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1933 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1935 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1937 * configure: Regenerated to track ../common/aclocal.m4 changes.
1938 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1940 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1942 * configure: Regenerated to track ../common/aclocal.m4 changes.
1944 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * interp.c (Max, Min): Comment out functions. Not yet used.
1948 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1950 * configure: Regenerated to track ../common/aclocal.m4 changes.
1952 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1954 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1955 configurable settings for stand-alone simulator.
1957 * configure.in: Added X11 search, just in case.
1959 * configure: Regenerated.
1961 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1963 * interp.c (sim_write, sim_read, load_memory, store_memory):
1964 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1966 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1968 * sim-main.h (GETFCC): Return an unsigned value.
1970 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1972 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1973 (DADD): Result destination is RD not RT.
1975 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1977 * sim-main.h (HIACCESS, LOACCESS): Always define.
1979 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1981 * interp.c (sim_info): Delete.
1983 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1985 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1986 (mips_option_handler): New argument `cpu'.
1987 (sim_open): Update call to sim_add_option_table.
1989 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1991 * mips.igen (CxC1): Add tracing.
1993 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1995 * sim-main.h (Max, Min): Declare.
1997 * interp.c (Max, Min): New functions.
1999 * mips.igen (BC1): Add tracing.
2001 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2003 * interp.c Added memory map for stack in vr4100
2005 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2007 * interp.c (load_memory): Add missing "break"'s.
2009 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2011 * interp.c (sim_store_register, sim_fetch_register): Pass in
2012 length parameter. Return -1.
2014 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2016 * interp.c: Added hardware init hook, fixed warnings.
2018 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2020 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2022 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2024 * interp.c (ifetch16): New function.
2026 * sim-main.h (IMEM32): Rename IMEM.
2027 (IMEM16_IMMED): Define.
2029 (DELAY_SLOT): Update.
2031 * m16run.c (sim_engine_run): New file.
2033 * m16.igen: All instructions except LB.
2034 (LB): Call do_load_byte.
2035 * mips.igen (do_load_byte): New function.
2036 (LB): Call do_load_byte.
2038 * mips.igen: Move spec for insn bit size and high bit from here.
2039 * Makefile.in (tmp-igen, tmp-m16): To here.
2041 * m16.dc: New file, decode mips16 instructions.
2043 * Makefile.in (SIM_NO_ALL): Define.
2044 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2046 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2048 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2049 point unit to 32 bit registers.
2050 * configure: Re-generate.
2052 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2054 * configure.in (sim_use_gen): Make IGEN the default simulator
2055 generator for generic 32 and 64 bit mips targets.
2056 * configure: Re-generate.
2058 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2060 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2063 * interp.c (sim_fetch_register, sim_store_register): Read/write
2064 FGR from correct location.
2065 (sim_open): Set size of FGR's according to
2066 WITH_TARGET_FLOATING_POINT_BITSIZE.
2068 * sim-main.h (FGR): Store floating point registers in a separate
2071 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2073 * configure: Regenerated to track ../common/aclocal.m4 changes.
2075 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2077 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2079 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2081 * interp.c (pending_tick): New function. Deliver pending writes.
2083 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2084 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2085 it can handle mixed sized quantites and single bits.
2087 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2089 * interp.c (oengine.h): Do not include when building with IGEN.
2090 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2091 (sim_info): Ditto for PROCESSOR_64BIT.
2092 (sim_monitor): Replace ut_reg with unsigned_word.
2093 (*): Ditto for t_reg.
2094 (LOADDRMASK): Define.
2095 (sim_open): Remove defunct check that host FP is IEEE compliant,
2096 using software to emulate floating point.
2097 (value_fpr, ...): Always compile, was conditional on HASFPU.
2099 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2101 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2104 * interp.c (SD, CPU): Define.
2105 (mips_option_handler): Set flags in each CPU.
2106 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2107 (sim_close): Do not clear STATE, deleted anyway.
2108 (sim_write, sim_read): Assume CPU zero's vm should be used for
2110 (sim_create_inferior): Set the PC for all processors.
2111 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2113 (mips16_entry): Pass correct nr of args to store_word, load_word.
2114 (ColdReset): Cold reset all cpu's.
2115 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2116 (sim_monitor, load_memory, store_memory, signal_exception): Use
2117 `CPU' instead of STATE_CPU.
2120 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2123 * sim-main.h (signal_exception): Add sim_cpu arg.
2124 (SignalException*): Pass both SD and CPU to signal_exception.
2125 * interp.c (signal_exception): Update.
2127 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2129 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2130 address_translation): Ditto
2131 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2133 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2135 * configure: Regenerated to track ../common/aclocal.m4 changes.
2137 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2139 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2141 * mips.igen (model): Map processor names onto BFD name.
2143 * sim-main.h (CPU_CIA): Delete.
2144 (SET_CIA, GET_CIA): Define
2146 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2151 * configure.in (default_endian): Configure a big-endian simulator
2153 * configure: Re-generate.
2155 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2157 * configure: Regenerated to track ../common/aclocal.m4 changes.
2159 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2161 * interp.c (sim_monitor): Handle Densan monitor outbyte
2162 and inbyte functions.
2164 1997-12-29 Felix Lee <flee@cygnus.com>
2166 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2168 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2170 * Makefile.in (tmp-igen): Arrange for $zero to always be
2171 reset to zero after every instruction.
2173 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2175 * configure: Regenerated to track ../common/aclocal.m4 changes.
2178 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2180 * mips.igen (MSUB): Fix to work like MADD.
2181 * gencode.c (MSUB): Similarly.
2183 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2185 * configure: Regenerated to track ../common/aclocal.m4 changes.
2187 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2189 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2191 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2193 * sim-main.h (sim-fpu.h): Include.
2195 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2196 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2197 using host independant sim_fpu module.
2199 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2201 * interp.c (signal_exception): Report internal errors with SIGABRT
2204 * sim-main.h (C0_CONFIG): New register.
2205 (signal.h): No longer include.
2207 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2209 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2211 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2213 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2215 * mips.igen: Tag vr5000 instructions.
2216 (ANDI): Was missing mipsIV model, fix assembler syntax.
2217 (do_c_cond_fmt): New function.
2218 (C.cond.fmt): Handle mips I-III which do not support CC field
2220 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2221 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2223 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2224 vr5000 which saves LO in a GPR separatly.
2226 * configure.in (enable-sim-igen): For vr5000, select vr5000
2227 specific instructions.
2228 * configure: Re-generate.
2230 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2232 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2234 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2235 fmt_uninterpreted_64 bit cases to switch. Convert to
2238 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2240 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2241 as specified in IV3.2 spec.
2242 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2244 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2246 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2247 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2248 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2249 PENDING_FILL versions of instructions. Simplify.
2251 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2253 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2255 (MTHI, MFHI): Disable code checking HI-LO.
2257 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2259 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2261 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2263 * gencode.c (build_mips16_operands): Replace IPC with cia.
2265 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2266 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2268 (UndefinedResult): Replace function with macro/function
2270 (sim_engine_run): Don't save PC in IPC.
2272 * sim-main.h (IPC): Delete.
2275 * interp.c (signal_exception, store_word, load_word,
2276 address_translation, load_memory, store_memory, cache_op,
2277 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2278 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2279 current instruction address - cia - argument.
2280 (sim_read, sim_write): Call address_translation directly.
2281 (sim_engine_run): Rename variable vaddr to cia.
2282 (signal_exception): Pass cia to sim_monitor
2284 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2285 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2286 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2288 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2289 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2292 * interp.c (signal_exception): Pass restart address to
2295 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2296 idecode.o): Add dependency.
2298 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2300 (DELAY_SLOT): Update NIA not PC with branch address.
2301 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2303 * mips.igen: Use CIA not PC in branch calculations.
2304 (illegal): Call SignalException.
2305 (BEQ, ADDIU): Fix assembler.
2307 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2309 * m16.igen (JALX): Was missing.
2311 * configure.in (enable-sim-igen): New configuration option.
2312 * configure: Re-generate.
2314 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2316 * interp.c (load_memory, store_memory): Delete parameter RAW.
2317 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2318 bypassing {load,store}_memory.
2320 * sim-main.h (ByteSwapMem): Delete definition.
2322 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2324 * interp.c (sim_do_command, sim_commands): Delete mips specific
2325 commands. Handled by module sim-options.
2327 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2328 (WITH_MODULO_MEMORY): Define.
2330 * interp.c (sim_info): Delete code printing memory size.
2332 * interp.c (mips_size): Nee sim_size, delete function.
2334 (monitor, monitor_base, monitor_size): Delete global variables.
2335 (sim_open, sim_close): Delete code creating monitor and other
2336 memory regions. Use sim-memopts module, via sim_do_commandf, to
2337 manage memory regions.
2338 (load_memory, store_memory): Use sim-core for memory model.
2340 * interp.c (address_translation): Delete all memory map code
2341 except line forcing 32 bit addresses.
2343 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2345 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2348 * interp.c (logfh, logfile): Delete globals.
2349 (sim_open, sim_close): Delete code opening & closing log file.
2350 (mips_option_handler): Delete -l and -n options.
2351 (OPTION mips_options): Ditto.
2353 * interp.c (OPTION mips_options): Rename option trace to dinero.
2354 (mips_option_handler): Update.
2356 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2358 * interp.c (fetch_str): New function.
2359 (sim_monitor): Rewrite using sim_read & sim_write.
2360 (sim_open): Check magic number.
2361 (sim_open): Write monitor vectors into memory using sim_write.
2362 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2363 (sim_read, sim_write): Simplify - transfer data one byte at a
2365 (load_memory, store_memory): Clarify meaning of parameter RAW.
2367 * sim-main.h (isHOST): Defete definition.
2368 (isTARGET): Mark as depreciated.
2369 (address_translation): Delete parameter HOST.
2371 * interp.c (address_translation): Delete parameter HOST.
2373 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2377 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2378 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2380 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2382 * mips.igen: Add model filter field to records.
2384 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2386 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2388 interp.c (sim_engine_run): Do not compile function sim_engine_run
2389 when WITH_IGEN == 1.
2391 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2392 target architecture.
2394 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2395 igen. Replace with configuration variables sim_igen_flags /
2398 * m16.igen: New file. Copy mips16 insns here.
2399 * mips.igen: From here.
2401 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2403 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2405 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2407 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2409 * gencode.c (build_instruction): Follow sim_write's lead in using
2410 BigEndianMem instead of !ByteSwapMem.
2412 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2414 * configure.in (sim_gen): Dependent on target, select type of
2415 generator. Always select old style generator.
2417 configure: Re-generate.
2419 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2421 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2422 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2423 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2424 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2425 SIM_@sim_gen@_*, set by autoconf.
2427 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2429 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2431 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2432 CURRENT_FLOATING_POINT instead.
2434 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2435 (address_translation): Raise exception InstructionFetch when
2436 translation fails and isINSTRUCTION.
2438 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2439 sim_engine_run): Change type of of vaddr and paddr to
2441 (address_translation, prefetch, load_memory, store_memory,
2442 cache_op): Change type of vAddr and pAddr to address_word.
2444 * gencode.c (build_instruction): Change type of vaddr and paddr to
2447 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2449 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2450 macro to obtain result of ALU op.
2452 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2454 * interp.c (sim_info): Call profile_print.
2456 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2460 * sim-main.h (WITH_PROFILE): Do not define, defined in
2461 common/sim-config.h. Use sim-profile module.
2462 (simPROFILE): Delete defintion.
2464 * interp.c (PROFILE): Delete definition.
2465 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2466 (sim_close): Delete code writing profile histogram.
2467 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2469 (sim_engine_run): Delete code profiling the PC.
2471 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2473 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2475 * interp.c (sim_monitor): Make register pointers of type
2478 * sim-main.h: Make registers of type unsigned_word not
2481 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2483 * interp.c (sync_operation): Rename from SyncOperation, make
2484 global, add SD argument.
2485 (prefetch): Rename from Prefetch, make global, add SD argument.
2486 (decode_coproc): Make global.
2488 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2490 * gencode.c (build_instruction): Generate DecodeCoproc not
2491 decode_coproc calls.
2493 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2494 (SizeFGR): Move to sim-main.h
2495 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2496 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2497 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2499 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2500 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2501 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2502 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2503 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2504 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2506 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2508 (sim-alu.h): Include.
2509 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2510 (sim_cia): Typedef to instruction_address.
2512 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2514 * Makefile.in (interp.o): Rename generated file engine.c to
2519 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2521 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2523 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2525 * gencode.c (build_instruction): For "FPSQRT", output correct
2526 number of arguments to Recip.
2528 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * Makefile.in (interp.o): Depends on sim-main.h
2532 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2534 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2535 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2536 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2537 STATE, DSSTATE): Define
2538 (GPR, FGRIDX, ..): Define.
2540 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2541 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2542 (GPR, FGRIDX, ...): Delete macros.
2544 * interp.c: Update names to match defines from sim-main.h
2546 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2548 * interp.c (sim_monitor): Add SD argument.
2549 (sim_warning): Delete. Replace calls with calls to
2551 (sim_error): Delete. Replace calls with sim_io_error.
2552 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2553 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2554 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2556 (mips_size): Rename from sim_size. Add SD argument.
2558 * interp.c (simulator): Delete global variable.
2559 (callback): Delete global variable.
2560 (mips_option_handler, sim_open, sim_write, sim_read,
2561 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2562 sim_size,sim_monitor): Use sim_io_* not callback->*.
2563 (sim_open): ZALLOC simulator struct.
2564 (PROFILE): Do not define.
2566 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2568 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2569 support.h with corresponding code.
2571 * sim-main.h (word64, uword64), support.h: Move definition to
2573 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2576 * Makefile.in: Update dependencies
2577 * interp.c: Do not include.
2579 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2581 * interp.c (address_translation, load_memory, store_memory,
2582 cache_op): Rename to from AddressTranslation et.al., make global,
2585 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2588 * interp.c (SignalException): Rename to signal_exception, make
2591 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2593 * sim-main.h (SignalException, SignalExceptionInterrupt,
2594 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2595 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2596 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2599 * interp.c, support.h: Use.
2601 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2603 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2604 to value_fpr / store_fpr. Add SD argument.
2605 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2606 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2608 * sim-main.h (ValueFPR, StoreFPR): Define.
2610 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2612 * interp.c (sim_engine_run): Check consistency between configure
2613 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2616 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2617 (mips_fpu): Configure WITH_FLOATING_POINT.
2618 (mips_endian): Configure WITH_TARGET_ENDIAN.
2619 * configure: Update.
2621 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2623 * configure: Regenerated to track ../common/aclocal.m4 changes.
2625 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2627 * configure: Regenerated.
2629 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2631 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2633 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2635 * gencode.c (print_igen_insn_models): Assume certain architectures
2636 include all mips* instructions.
2637 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2640 * Makefile.in (tmp.igen): Add target. Generate igen input from
2643 * gencode.c (FEATURE_IGEN): Define.
2644 (main): Add --igen option. Generate output in igen format.
2645 (process_instructions): Format output according to igen option.
2646 (print_igen_insn_format): New function.
2647 (print_igen_insn_models): New function.
2648 (process_instructions): Only issue warnings and ignore
2649 instructions when no FEATURE_IGEN.
2651 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2653 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2656 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2658 * configure: Regenerated to track ../common/aclocal.m4 changes.
2660 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2662 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2663 SIM_RESERVED_BITS): Delete, moved to common.
2664 (SIM_EXTRA_CFLAGS): Update.
2666 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2668 * configure.in: Configure non-strict memory alignment.
2669 * configure: Regenerated to track ../common/aclocal.m4 changes.
2671 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2673 * configure: Regenerated to track ../common/aclocal.m4 changes.
2675 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2677 * gencode.c (SDBBP,DERET): Added (3900) insns.
2678 (RFE): Turn on for 3900.
2679 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2680 (dsstate): Made global.
2681 (SUBTARGET_R3900): Added.
2682 (CANCELDELAYSLOT): New.
2683 (SignalException): Ignore SystemCall rather than ignore and
2684 terminate. Add DebugBreakPoint handling.
2685 (decode_coproc): New insns RFE, DERET; and new registers Debug
2686 and DEPC protected by SUBTARGET_R3900.
2687 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2689 * Makefile.in,configure.in: Add mips subtarget option.
2690 * configure: Update.
2692 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2694 * gencode.c: Add r3900 (tx39).
2697 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2699 * gencode.c (build_instruction): Don't need to subtract 4 for
2702 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2704 * interp.c: Correct some HASFPU problems.
2706 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2708 * configure: Regenerated to track ../common/aclocal.m4 changes.
2710 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2712 * interp.c (mips_options): Fix samples option short form, should
2715 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2717 * interp.c (sim_info): Enable info code. Was just returning.
2719 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2724 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2726 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2728 (build_instruction): Ditto for LL.
2730 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2732 * configure: Regenerated to track ../common/aclocal.m4 changes.
2734 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2736 * configure: Regenerated to track ../common/aclocal.m4 changes.
2739 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2741 * interp.c (sim_open): Add call to sim_analyze_program, update
2744 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2746 * interp.c (sim_kill): Delete.
2747 (sim_create_inferior): Add ABFD argument. Set PC from same.
2748 (sim_load): Move code initializing trap handlers from here.
2749 (sim_open): To here.
2750 (sim_load): Delete, use sim-hload.c.
2752 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2754 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2756 * configure: Regenerated to track ../common/aclocal.m4 changes.
2759 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2761 * interp.c (sim_open): Add ABFD argument.
2762 (sim_load): Move call to sim_config from here.
2763 (sim_open): To here. Check return status.
2765 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2767 * gencode.c (build_instruction): Two arg MADD should
2768 not assign result to $0.
2770 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2772 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2773 * sim/mips/configure.in: Regenerate.
2775 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2777 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2778 signed8, unsigned8 et.al. types.
2780 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2781 hosts when selecting subreg.
2783 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2785 * interp.c (sim_engine_run): Reset the ZERO register to zero
2786 regardless of FEATURE_WARN_ZERO.
2787 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2789 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2791 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2792 (SignalException): For BreakPoints ignore any mode bits and just
2794 (SignalException): Always set the CAUSE register.
2796 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2799 exception has been taken.
2801 * interp.c: Implement the ERET and mt/f sr instructions.
2803 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2805 * interp.c (SignalException): Don't bother restarting an
2808 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2810 * interp.c (SignalException): Really take an interrupt.
2811 (interrupt_event): Only deliver interrupts when enabled.
2813 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2815 * interp.c (sim_info): Only print info when verbose.
2816 (sim_info) Use sim_io_printf for output.
2818 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2820 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2823 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2825 * interp.c (sim_do_command): Check for common commands if a
2826 simulator specific command fails.
2828 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2830 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2831 and simBE when DEBUG is defined.
2833 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2835 * interp.c (interrupt_event): New function. Pass exception event
2836 onto exception handler.
2838 * configure.in: Check for stdlib.h.
2839 * configure: Regenerate.
2841 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2842 variable declaration.
2843 (build_instruction): Initialize memval1.
2844 (build_instruction): Add UNUSED attribute to byte, bigend,
2846 (build_operands): Ditto.
2848 * interp.c: Fix GCC warnings.
2849 (sim_get_quit_code): Delete.
2851 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2852 * Makefile.in: Ditto.
2853 * configure: Re-generate.
2855 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2857 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2859 * interp.c (mips_option_handler): New function parse argumes using
2861 (myname): Replace with STATE_MY_NAME.
2862 (sim_open): Delete check for host endianness - performed by
2864 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2865 (sim_open): Move much of the initialization from here.
2866 (sim_load): To here. After the image has been loaded and
2868 (sim_open): Move ColdReset from here.
2869 (sim_create_inferior): To here.
2870 (sim_open): Make FP check less dependant on host endianness.
2872 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2874 * interp.c (sim_set_callbacks): Delete.
2876 * interp.c (membank, membank_base, membank_size): Replace with
2877 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2878 (sim_open): Remove call to callback->init. gdb/run do this.
2882 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2884 * interp.c (big_endian_p): Delete, replaced by
2885 current_target_byte_order.
2887 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2889 * interp.c (host_read_long, host_read_word, host_swap_word,
2890 host_swap_long): Delete. Using common sim-endian.
2891 (sim_fetch_register, sim_store_register): Use H2T.
2892 (pipeline_ticks): Delete. Handled by sim-events.
2894 (sim_engine_run): Update.
2896 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2898 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2900 (SignalException): To here. Signal using sim_engine_halt.
2901 (sim_stop_reason): Delete, moved to common.
2903 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2905 * interp.c (sim_open): Add callback argument.
2906 (sim_set_callbacks): Delete SIM_DESC argument.
2909 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2911 * Makefile.in (SIM_OBJS): Add common modules.
2913 * interp.c (sim_set_callbacks): Also set SD callback.
2914 (set_endianness, xfer_*, swap_*): Delete.
2915 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2916 Change to functions using sim-endian macros.
2917 (control_c, sim_stop): Delete, use common version.
2918 (simulate): Convert into.
2919 (sim_engine_run): This function.
2920 (sim_resume): Delete.
2922 * interp.c (simulation): New variable - the simulator object.
2923 (sim_kind): Delete global - merged into simulation.
2924 (sim_load): Cleanup. Move PC assignment from here.
2925 (sim_create_inferior): To here.
2927 * sim-main.h: New file.
2928 * interp.c (sim-main.h): Include.
2930 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2932 * configure: Regenerated to track ../common/aclocal.m4 changes.
2934 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2936 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2938 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2940 * gencode.c (build_instruction): DIV instructions: check
2941 for division by zero and integer overflow before using
2942 host's division operation.
2944 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2946 * Makefile.in (SIM_OBJS): Add sim-load.o.
2947 * interp.c: #include bfd.h.
2948 (target_byte_order): Delete.
2949 (sim_kind, myname, big_endian_p): New static locals.
2950 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2951 after argument parsing. Recognize -E arg, set endianness accordingly.
2952 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2953 load file into simulator. Set PC from bfd.
2954 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2955 (set_endianness): Use big_endian_p instead of target_byte_order.
2957 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2959 * interp.c (sim_size): Delete prototype - conflicts with
2960 definition in remote-sim.h. Correct definition.
2962 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2964 * configure: Regenerated to track ../common/aclocal.m4 changes.
2967 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2969 * interp.c (sim_open): New arg `kind'.
2971 * configure: Regenerated to track ../common/aclocal.m4 changes.
2973 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2975 * configure: Regenerated to track ../common/aclocal.m4 changes.
2977 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2979 * interp.c (sim_open): Set optind to 0 before calling getopt.
2981 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2983 * configure: Regenerated to track ../common/aclocal.m4 changes.
2985 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2987 * interp.c : Replace uses of pr_addr with pr_uword64
2988 where the bit length is always 64 independent of SIM_ADDR.
2989 (pr_uword64) : added.
2991 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2993 * configure: Re-generate.
2995 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2997 * configure: Regenerate to track ../common/aclocal.m4 changes.
2999 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3001 * interp.c (sim_open): New SIM_DESC result. Argument is now
3003 (other sim_*): New SIM_DESC argument.
3005 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3007 * interp.c: Fix printing of addresses for non-64-bit targets.
3008 (pr_addr): Add function to print address based on size.
3010 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3012 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3014 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3016 * gencode.c (build_mips16_operands): Correct computation of base
3017 address for extended PC relative instruction.
3019 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3021 * interp.c (mips16_entry): Add support for floating point cases.
3022 (SignalException): Pass floating point cases to mips16_entry.
3023 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3025 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3027 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3028 and then set the state to fmt_uninterpreted.
3029 (COP_SW): Temporarily set the state to fmt_word while calling
3032 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3034 * gencode.c (build_instruction): The high order may be set in the
3035 comparison flags at any ISA level, not just ISA 4.
3037 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3039 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3040 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3041 * configure.in: sinclude ../common/aclocal.m4.
3042 * configure: Regenerated.
3044 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3046 * configure: Rebuild after change to aclocal.m4.
3048 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3050 * configure configure.in Makefile.in: Update to new configure
3051 scheme which is more compatible with WinGDB builds.
3052 * configure.in: Improve comment on how to run autoconf.
3053 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3054 * Makefile.in: Use autoconf substitution to install common
3057 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3059 * gencode.c (build_instruction): Use BigEndianCPU instead of
3062 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3064 * interp.c (sim_monitor): Make output to stdout visible in
3065 wingdb's I/O log window.
3067 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3069 * support.h: Undo previous change to SIGTRAP
3072 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3074 * interp.c (store_word, load_word): New static functions.
3075 (mips16_entry): New static function.
3076 (SignalException): Look for mips16 entry and exit instructions.
3077 (simulate): Use the correct index when setting fpr_state after
3078 doing a pending move.
3080 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3082 * interp.c: Fix byte-swapping code throughout to work on
3083 both little- and big-endian hosts.
3085 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3087 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3088 with gdb/config/i386/xm-windows.h.
3090 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3092 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3093 that messes up arithmetic shifts.
3095 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3097 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3098 SIGTRAP and SIGQUIT for _WIN32.
3100 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3102 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3103 force a 64 bit multiplication.
3104 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3105 destination register is 0, since that is the default mips16 nop
3108 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3110 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3111 (build_endian_shift): Don't check proc64.
3112 (build_instruction): Always set memval to uword64. Cast op2 to
3113 uword64 when shifting it left in memory instructions. Always use
3114 the same code for stores--don't special case proc64.
3116 * gencode.c (build_mips16_operands): Fix base PC value for PC
3118 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3120 * interp.c (simJALDELAYSLOT): Define.
3121 (JALDELAYSLOT): Define.
3122 (INDELAYSLOT, INJALDELAYSLOT): Define.
3123 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3125 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3127 * interp.c (sim_open): add flush_cache as a PMON routine
3128 (sim_monitor): handle flush_cache by ignoring it
3130 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3132 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3134 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3135 (BigEndianMem): Rename to ByteSwapMem and change sense.
3136 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3137 BigEndianMem references to !ByteSwapMem.
3138 (set_endianness): New function, with prototype.
3139 (sim_open): Call set_endianness.
3140 (sim_info): Use simBE instead of BigEndianMem.
3141 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3142 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3143 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3144 ifdefs, keeping the prototype declaration.
3145 (swap_word): Rewrite correctly.
3146 (ColdReset): Delete references to CONFIG. Delete endianness related
3147 code; moved to set_endianness.
3149 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3151 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3152 * interp.c (CHECKHILO): Define away.
3153 (simSIGINT): New macro.
3154 (membank_size): Increase from 1MB to 2MB.
3155 (control_c): New function.
3156 (sim_resume): Rename parameter signal to signal_number. Add local
3157 variable prev. Call signal before and after simulate.
3158 (sim_stop_reason): Add simSIGINT support.
3159 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3161 (sim_warning): Delete call to SignalException. Do call printf_filtered
3163 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3164 a call to sim_warning.
3166 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3168 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3169 16 bit instructions.
3171 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3173 Add support for mips16 (16 bit MIPS implementation):
3174 * gencode.c (inst_type): Add mips16 instruction encoding types.
3175 (GETDATASIZEINSN): Define.
3176 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3177 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3179 (MIPS16_DECODE): New table, for mips16 instructions.
3180 (bitmap_val): New static function.
3181 (struct mips16_op): Define.
3182 (mips16_op_table): New table, for mips16 operands.
3183 (build_mips16_operands): New static function.
3184 (process_instructions): If PC is odd, decode a mips16
3185 instruction. Break out instruction handling into new
3186 build_instruction function.
3187 (build_instruction): New static function, broken out of
3188 process_instructions. Check modifiers rather than flags for SHIFT
3189 bit count and m[ft]{hi,lo} direction.
3190 (usage): Pass program name to fprintf.
3191 (main): Remove unused variable this_option_optind. Change
3192 ``*loptarg++'' to ``loptarg++''.
3193 (my_strtoul): Parenthesize && within ||.
3194 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3195 (simulate): If PC is odd, fetch a 16 bit instruction, and
3196 increment PC by 2 rather than 4.
3197 * configure.in: Add case for mips16*-*-*.
3198 * configure: Rebuild.
3200 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3202 * interp.c: Allow -t to enable tracing in standalone simulator.
3203 Fix garbage output in trace file and error messages.
3205 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3207 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3208 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3209 * configure.in: Simplify using macros in ../common/aclocal.m4.
3210 * configure: Regenerated.
3211 * tconfig.in: New file.
3213 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3215 * interp.c: Fix bugs in 64-bit port.
3216 Use ansi function declarations for msvc compiler.
3217 Initialize and test file pointer in trace code.
3218 Prevent duplicate definition of LAST_EMED_REGNUM.
3220 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3222 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3224 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3226 * interp.c (SignalException): Check for explicit terminating
3228 * gencode.c: Pass instruction value through SignalException()
3229 calls for Trap, Breakpoint and Syscall.
3231 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3233 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3234 only used on those hosts that provide it.
3235 * configure.in: Add sqrt() to list of functions to be checked for.
3236 * config.in: Re-generated.
3237 * configure: Re-generated.
3239 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3241 * gencode.c (process_instructions): Call build_endian_shift when
3242 expanding STORE RIGHT, to fix swr.
3243 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3244 clear the high bits.
3245 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3246 Fix float to int conversions to produce signed values.
3248 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3250 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3251 (process_instructions): Correct handling of nor instruction.
3252 Correct shift count for 32 bit shift instructions. Correct sign
3253 extension for arithmetic shifts to not shift the number of bits in
3254 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3255 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3257 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3258 It's OK to have a mult follow a mult. What's not OK is to have a
3259 mult follow an mfhi.
3260 (Convert): Comment out incorrect rounding code.
3262 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3264 * interp.c (sim_monitor): Improved monitor printf
3265 simulation. Tidied up simulator warnings, and added "--log" option
3266 for directing warning message output.
3267 * gencode.c: Use sim_warning() rather than WARNING macro.
3269 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3271 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3272 getopt1.o, rather than on gencode.c. Link objects together.
3273 Don't link against -liberty.
3274 (gencode.o, getopt.o, getopt1.o): New targets.
3275 * gencode.c: Include <ctype.h> and "ansidecl.h".
3276 (AND): Undefine after including "ansidecl.h".
3277 (ULONG_MAX): Define if not defined.
3278 (OP_*): Don't define macros; now defined in opcode/mips.h.
3279 (main): Call my_strtoul rather than strtoul.
3280 (my_strtoul): New static function.
3282 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3284 * gencode.c (process_instructions): Generate word64 and uword64
3285 instead of `long long' and `unsigned long long' data types.
3286 * interp.c: #include sysdep.h to get signals, and define default
3288 * (Convert): Work around for Visual-C++ compiler bug with type
3290 * support.h: Make things compile under Visual-C++ by using
3291 __int64 instead of `long long'. Change many refs to long long
3292 into word64/uword64 typedefs.
3294 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3296 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3297 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3299 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3300 (AC_PROG_INSTALL): Added.
3301 (AC_PROG_CC): Moved to before configure.host call.
3302 * configure: Rebuilt.
3304 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3306 * configure.in: Define @SIMCONF@ depending on mips target.
3307 * configure: Rebuild.
3308 * Makefile.in (run): Add @SIMCONF@ to control simulator
3310 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3311 * interp.c: Remove some debugging, provide more detailed error
3312 messages, update memory accesses to use LOADDRMASK.
3314 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3316 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3317 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3319 * configure: Rebuild.
3320 * config.in: New file, generated by autoheader.
3321 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3322 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3323 HAVE_ANINT and HAVE_AINT, as appropriate.
3324 * Makefile.in (run): Use @LIBS@ rather than -lm.
3325 (interp.o): Depend upon config.h.
3326 (Makefile): Just rebuild Makefile.
3327 (clean): Remove stamp-h.
3328 (mostlyclean): Make the same as clean, not as distclean.
3329 (config.h, stamp-h): New targets.
3331 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3333 * interp.c (ColdReset): Fix boolean test. Make all simulator
3336 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3338 * interp.c (xfer_direct_word, xfer_direct_long,
3339 swap_direct_word, swap_direct_long, xfer_big_word,
3340 xfer_big_long, xfer_little_word, xfer_little_long,
3341 swap_word,swap_long): Added.
3342 * interp.c (ColdReset): Provide function indirection to
3343 host<->simulated_target transfer routines.
3344 * interp.c (sim_store_register, sim_fetch_register): Updated to
3345 make use of indirected transfer routines.
3347 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3349 * gencode.c (process_instructions): Ensure FP ABS instruction
3351 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3352 system call support.
3354 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3356 * interp.c (sim_do_command): Complain if callback structure not
3359 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3361 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3362 support for Sun hosts.
3363 * Makefile.in (gencode): Ensure the host compiler and libraries
3364 used for cross-hosted build.
3366 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3368 * interp.c, gencode.c: Some more (TODO) tidying.
3370 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3372 * gencode.c, interp.c: Replaced explicit long long references with
3373 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3374 * support.h (SET64LO, SET64HI): Macros added.
3376 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3378 * configure: Regenerate with autoconf 2.7.
3380 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3382 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3383 * support.h: Remove superfluous "1" from #if.
3384 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3386 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3388 * interp.c (StoreFPR): Control UndefinedResult() call on
3389 WARN_RESULT manifest.
3391 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3393 * gencode.c: Tidied instruction decoding, and added FP instruction
3396 * interp.c: Added dineroIII, and BSD profiling support. Also
3397 run-time FP handling.
3399 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3401 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3402 gencode.c, interp.c, support.h: created.