1 2016-01-03 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
4 * configure: Regenerate.
6 2016-01-02 Mike Frysinger <vapier@gentoo.org>
8 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
9 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
10 * configure: Regenerate.
11 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
13 2016-01-02 Mike Frysinger <vapier@gentoo.org>
15 * dv-tx3904cpu.c (CPU, SD): Delete.
17 2015-12-30 Mike Frysinger <vapier@gentoo.org>
19 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
20 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
21 (sim_store_register): Rename to ...
22 (mips_reg_store): ... this. Delete local cpu var.
23 Update sim_io_eprintf calls.
24 (sim_fetch_register): Rename to ...
25 (mips_reg_fetch): ... this. Delete local cpu var.
26 Update sim_io_eprintf calls.
28 2015-12-27 Mike Frysinger <vapier@gentoo.org>
30 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
32 2015-12-26 Mike Frysinger <vapier@gentoo.org>
34 * config.in, configure: Regenerate.
36 2015-12-26 Mike Frysinger <vapier@gentoo.org>
38 * interp.c (sim_write, sim_read): Delete.
39 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
40 (load_word): Likewise.
41 * micromips.igen (cache): Likewise.
42 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
43 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
44 do_store_left, do_store_right, do_load_double, do_store_double):
46 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
48 * sim-main.c (address_translation, prefetch): Delete.
49 (ifetch32, ifetch16): Delete call to AddressTranslation and set
51 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
52 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
53 (LoadMemory, StoreMemory): Delete CCA arg.
55 2015-12-24 Mike Frysinger <vapier@gentoo.org>
57 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
58 * configure: Regenerated.
60 2015-12-24 Mike Frysinger <vapier@gentoo.org>
62 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
65 2015-12-24 Mike Frysinger <vapier@gentoo.org>
67 * tconfig.h (SIM_HANDLES_LMA): Delete.
69 2015-12-24 Mike Frysinger <vapier@gentoo.org>
71 * sim-main.h (WITH_WATCHPOINTS): Delete.
73 2015-12-24 Mike Frysinger <vapier@gentoo.org>
75 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
77 2015-12-24 Mike Frysinger <vapier@gentoo.org>
79 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
81 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
83 * micromips.igen (process_isa_mode): Fix left shift of negative
86 2015-11-17 Mike Frysinger <vapier@gentoo.org>
88 * sim-main.h (WITH_MODULO_MEMORY): Delete.
90 2015-11-15 Mike Frysinger <vapier@gentoo.org>
92 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
94 2015-11-14 Mike Frysinger <vapier@gentoo.org>
96 * interp.c (sim_close): Rename to ...
97 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
99 * sim-main.h (mips_sim_close): Declare.
100 (SIM_CLOSE_HOOK): Define.
102 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
103 Ali Lown <ali.lown@imgtec.com>
105 * Makefile.in (tmp-micromips): New rule.
106 (tmp-mach-multi): Add support for micromips.
107 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
108 that works for both mips64 and micromips64.
109 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
111 Add build support for micromips.
112 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
113 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
114 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
115 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
116 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
117 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
118 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
119 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
120 Refactored instruction code to use these functions.
121 * dsp2.igen: Refactored instruction code to use the new functions.
122 * interp.c (decode_coproc): Refactored to work with any instruction
124 (isa_mode): New variable
125 (RSVD_INSTRUCTION): Changed to 0x00000039.
126 * m16.igen (BREAK16): Refactored instruction to use do_break16.
127 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
128 * micromips.dc: New file.
129 * micromips.igen: New file.
130 * micromips16.dc: New file.
131 * micromipsdsp.igen: New file.
132 * micromipsrun.c: New file.
133 * mips.igen (do_swc1): Changed to work with any instruction encoding.
134 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
135 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
136 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
137 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
138 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
139 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
140 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
141 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
142 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
143 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
144 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
145 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
146 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
147 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
148 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
149 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
150 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
151 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
153 Refactored instruction code to use these functions.
154 (RSVD): Changed to use new reserved instruction.
155 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
156 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
157 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
158 do_store_double): Added micromips32 and micromips64 models.
159 Added include for micromips.igen and micromipsdsp.igen
160 Add micromips32 and micromips64 models.
161 (DecodeCoproc): Updated to use new macro definition.
162 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
163 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
164 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
165 Refactored instruction code to use these functions.
166 * sim-main.h (CP0_operation): New enum.
167 (DecodeCoproc): Updated macro.
168 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
169 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
170 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
171 ISA_MODE_MICROMIPS): New defines.
172 (sim_state): Add isa_mode field.
174 2015-06-23 Mike Frysinger <vapier@gentoo.org>
176 * configure: Regenerate.
178 2015-06-12 Mike Frysinger <vapier@gentoo.org>
180 * configure.ac: Change configure.in to configure.ac.
181 * configure: Regenerate.
183 2015-06-12 Mike Frysinger <vapier@gentoo.org>
185 * configure: Regenerate.
187 2015-06-12 Mike Frysinger <vapier@gentoo.org>
189 * interp.c [TRACE]: Delete.
190 (TRACE): Change to WITH_TRACE_ANY_P.
191 [!WITH_TRACE_ANY_P] (open_trace): Define.
192 (mips_option_handler, open_trace, sim_close, dotrace):
193 Change defined(TRACE) to WITH_TRACE_ANY_P.
194 (sim_open): Delete TRACE ifdef check.
195 * sim-main.c (load_memory): Delete TRACE ifdef check.
196 (store_memory): Likewise.
197 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
198 [!WITH_TRACE_ANY_P] (dotrace): Define.
200 2015-04-18 Mike Frysinger <vapier@gentoo.org>
202 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
205 2015-04-18 Mike Frysinger <vapier@gentoo.org>
207 * sim-main.h (SIM_CPU): Delete.
209 2015-04-18 Mike Frysinger <vapier@gentoo.org>
211 * sim-main.h (sim_cia): Delete.
213 2015-04-17 Mike Frysinger <vapier@gentoo.org>
215 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
217 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
218 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
219 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
220 CIA_SET to CPU_PC_SET.
221 * sim-main.h (CIA_GET, CIA_SET): Delete.
223 2015-04-15 Mike Frysinger <vapier@gentoo.org>
225 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
226 * sim-main.h (STATE_CPU): Delete.
228 2015-04-13 Mike Frysinger <vapier@gentoo.org>
230 * configure: Regenerate.
232 2015-04-13 Mike Frysinger <vapier@gentoo.org>
234 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
235 * interp.c (mips_pc_get, mips_pc_set): New functions.
236 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
237 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
238 (sim_pc_get): Delete.
239 * sim-main.h (SIM_CPU): Define.
240 (struct sim_state): Change cpu to an array of pointers.
243 2015-04-13 Mike Frysinger <vapier@gentoo.org>
245 * interp.c (mips_option_handler, open_trace, sim_close,
246 sim_write, sim_read, sim_store_register, sim_fetch_register,
247 sim_create_inferior, pr_addr, pr_uword64): Convert old style
249 (sim_open): Convert old style prototype. Change casts with
250 sim_write to unsigned char *.
251 (fetch_str): Change null to unsigned char, and change cast to
253 (sim_monitor): Change c & ch to unsigned char. Change cast to
256 2015-04-12 Mike Frysinger <vapier@gentoo.org>
258 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
260 2015-04-06 Mike Frysinger <vapier@gentoo.org>
262 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
264 2015-04-01 Mike Frysinger <vapier@gentoo.org>
266 * tconfig.h (SIM_HAVE_PROFILE): Delete.
268 2015-03-31 Mike Frysinger <vapier@gentoo.org>
270 * config.in, configure: Regenerate.
272 2015-03-24 Mike Frysinger <vapier@gentoo.org>
274 * interp.c (sim_pc_get): New function.
276 2015-03-24 Mike Frysinger <vapier@gentoo.org>
278 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
279 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
281 2015-03-24 Mike Frysinger <vapier@gentoo.org>
283 * configure: Regenerate.
285 2015-03-23 Mike Frysinger <vapier@gentoo.org>
287 * configure: Regenerate.
289 2015-03-23 Mike Frysinger <vapier@gentoo.org>
291 * configure: Regenerate.
292 * configure.ac (mips_extra_objs): Delete.
293 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
294 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
296 2015-03-23 Mike Frysinger <vapier@gentoo.org>
298 * configure: Regenerate.
299 * configure.ac: Delete sim_hw checks for dv-sockser.
301 2015-03-16 Mike Frysinger <vapier@gentoo.org>
303 * config.in, configure: Regenerate.
304 * tconfig.in: Rename file ...
305 * tconfig.h: ... here.
307 2015-03-15 Mike Frysinger <vapier@gentoo.org>
309 * tconfig.in: Delete includes.
310 [HAVE_DV_SOCKSER]: Delete.
312 2015-03-14 Mike Frysinger <vapier@gentoo.org>
314 * Makefile.in (SIM_RUN_OBJS): Delete.
316 2015-03-14 Mike Frysinger <vapier@gentoo.org>
318 * configure.ac (AC_CHECK_HEADERS): Delete.
319 * aclocal.m4, configure: Regenerate.
321 2014-08-19 Alan Modra <amodra@gmail.com>
323 * configure: Regenerate.
325 2014-08-15 Roland McGrath <mcgrathr@google.com>
327 * configure: Regenerate.
328 * config.in: Regenerate.
330 2014-03-04 Mike Frysinger <vapier@gentoo.org>
332 * configure: Regenerate.
334 2013-09-23 Alan Modra <amodra@gmail.com>
336 * configure: Regenerate.
338 2013-06-03 Mike Frysinger <vapier@gentoo.org>
340 * aclocal.m4, configure: Regenerate.
342 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
344 * configure: Rebuild.
346 2013-03-26 Mike Frysinger <vapier@gentoo.org>
348 * configure: Regenerate.
350 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
352 * configure.ac: Address use of dv-sockser.o.
353 * tconfig.in: Conditionalize use of dv_sockser_install.
354 * configure: Regenerated.
355 * config.in: Regenerated.
357 2012-10-04 Chao-ying Fu <fu@mips.com>
358 Steve Ellcey <sellcey@mips.com>
360 * mips/mips3264r2.igen (rdhwr): New.
362 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
364 * configure.ac: Always link against dv-sockser.o.
365 * configure: Regenerate.
367 2012-06-15 Joel Brobecker <brobecker@adacore.com>
369 * config.in, configure: Regenerate.
371 2012-05-18 Nick Clifton <nickc@redhat.com>
374 * interp.c: Include config.h before system header files.
376 2012-03-24 Mike Frysinger <vapier@gentoo.org>
378 * aclocal.m4, config.in, configure: Regenerate.
380 2011-12-03 Mike Frysinger <vapier@gentoo.org>
382 * aclocal.m4: New file.
383 * configure: Regenerate.
385 2011-10-19 Mike Frysinger <vapier@gentoo.org>
387 * configure: Regenerate after common/acinclude.m4 update.
389 2011-10-17 Mike Frysinger <vapier@gentoo.org>
391 * configure.ac: Change include to common/acinclude.m4.
393 2011-10-17 Mike Frysinger <vapier@gentoo.org>
395 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
396 call. Replace common.m4 include with SIM_AC_COMMON.
397 * configure: Regenerate.
399 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
401 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
403 (tmp-mach-multi): Exit early when igen fails.
405 2011-07-05 Mike Frysinger <vapier@gentoo.org>
407 * interp.c (sim_do_command): Delete.
409 2011-02-14 Mike Frysinger <vapier@gentoo.org>
411 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
412 (tx3904sio_fifo_reset): Likewise.
413 * interp.c (sim_monitor): Likewise.
415 2010-04-14 Mike Frysinger <vapier@gentoo.org>
417 * interp.c (sim_write): Add const to buffer arg.
419 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
421 * interp.c: Don't include sysdep.h
423 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
425 * configure: Regenerate.
427 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
429 * config.in: Regenerate.
430 * configure: Likewise.
432 * configure: Regenerate.
434 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
436 * configure: Regenerate to track ../common/common.m4 changes.
439 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
440 Daniel Jacobowitz <dan@codesourcery.com>
441 Joseph Myers <joseph@codesourcery.com>
443 * configure: Regenerate.
445 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
447 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
448 that unconditionally allows fmt_ps.
449 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
450 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
451 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
452 filter from 64,f to 32,f.
453 (PREFX): Change filter from 64 to 32.
454 (LDXC1, LUXC1): Provide separate mips32r2 implementations
455 that use do_load_double instead of do_load. Make both LUXC1
456 versions unpredictable if SizeFGR () != 64.
457 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
458 instead of do_store. Remove unused variable. Make both SUXC1
459 versions unpredictable if SizeFGR () != 64.
461 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
463 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
464 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
465 shifts for that case.
467 2007-09-04 Nick Clifton <nickc@redhat.com>
469 * interp.c (options enum): Add OPTION_INFO_MEMORY.
470 (display_mem_info): New static variable.
471 (mips_option_handler): Handle OPTION_INFO_MEMORY.
472 (mips_options): Add info-memory and memory-info.
473 (sim_open): After processing the command line and board
474 specification, check display_mem_info. If it is set then
475 call the real handler for the --memory-info command line
478 2007-08-24 Joel Brobecker <brobecker@adacore.com>
480 * configure.ac: Change license of multi-run.c to GPL version 3.
481 * configure: Regenerate.
483 2007-06-28 Richard Sandiford <richard@codesourcery.com>
485 * configure.ac, configure: Revert last patch.
487 2007-06-26 Richard Sandiford <richard@codesourcery.com>
489 * configure.ac (sim_mipsisa3264_configs): New variable.
490 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
491 every configuration support all four targets, using the triplet to
492 determine the default.
493 * configure: Regenerate.
495 2007-06-25 Richard Sandiford <richard@codesourcery.com>
497 * Makefile.in (m16run.o): New rule.
499 2007-05-15 Thiemo Seufer <ths@mips.com>
501 * mips3264r2.igen (DSHD): Fix compile warning.
503 2007-05-14 Thiemo Seufer <ths@mips.com>
505 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
506 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
507 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
508 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
511 2007-03-01 Thiemo Seufer <ths@mips.com>
513 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
516 2007-02-20 Thiemo Seufer <ths@mips.com>
518 * dsp.igen: Update copyright notice.
519 * dsp2.igen: Fix copyright notice.
521 2007-02-20 Thiemo Seufer <ths@mips.com>
522 Chao-Ying Fu <fu@mips.com>
524 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
525 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
526 Add dsp2 to sim_igen_machine.
527 * configure: Regenerate.
528 * dsp.igen (do_ph_op): Add MUL support when op = 2.
529 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
530 (mulq_rs.ph): Use do_ph_mulq.
531 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
532 * mips.igen: Add dsp2 model and include dsp2.igen.
533 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
534 for *mips32r2, *mips64r2, *dsp.
535 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
536 for *mips32r2, *mips64r2, *dsp2.
537 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
539 2007-02-19 Thiemo Seufer <ths@mips.com>
540 Nigel Stephens <nigel@mips.com>
542 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
543 jumps with hazard barrier.
545 2007-02-19 Thiemo Seufer <ths@mips.com>
546 Nigel Stephens <nigel@mips.com>
548 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
549 after each call to sim_io_write.
551 2007-02-19 Thiemo Seufer <ths@mips.com>
552 Nigel Stephens <nigel@mips.com>
554 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
555 supported by this simulator.
556 (decode_coproc): Recognise additional CP0 Config registers
559 2007-02-19 Thiemo Seufer <ths@mips.com>
560 Nigel Stephens <nigel@mips.com>
561 David Ung <davidu@mips.com>
563 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
564 uninterpreted formats. If fmt is one of the uninterpreted types
565 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
566 fmt_word, and fmt_uninterpreted_64 like fmt_long.
567 (store_fpr): When writing an invalid odd register, set the
568 matching even register to fmt_unknown, not the following register.
569 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
570 the the memory window at offset 0 set by --memory-size command
572 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
574 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
576 (sim_monitor): When returning the memory size to the MIPS
577 application, use the value in STATE_MEM_SIZE, not an arbitrary
579 (cop_lw): Don' mess around with FPR_STATE, just pass
580 fmt_uninterpreted_32 to StoreFPR.
582 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
584 * mips.igen (not_word_value): Single version for mips32, mips64
587 2007-02-19 Thiemo Seufer <ths@mips.com>
588 Nigel Stephens <nigel@mips.com>
590 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
593 2007-02-17 Thiemo Seufer <ths@mips.com>
595 * configure.ac (mips*-sde-elf*): Move in front of generic machine
597 * configure: Regenerate.
599 2007-02-17 Thiemo Seufer <ths@mips.com>
601 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
602 Add mdmx to sim_igen_machine.
603 (mipsisa64*-*-*): Likewise. Remove dsp.
604 (mipsisa32*-*-*): Remove dsp.
605 * configure: Regenerate.
607 2007-02-13 Thiemo Seufer <ths@mips.com>
609 * configure.ac: Add mips*-sde-elf* target.
610 * configure: Regenerate.
612 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
614 * acconfig.h: Remove.
615 * config.in, configure: Regenerate.
617 2006-11-07 Thiemo Seufer <ths@mips.com>
619 * dsp.igen (do_w_op): Fix compiler warning.
621 2006-08-29 Thiemo Seufer <ths@mips.com>
622 David Ung <davidu@mips.com>
624 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
626 * configure: Regenerate.
627 * mips.igen (model): Add smartmips.
628 (MADDU): Increment ACX if carry.
629 (do_mult): Clear ACX.
630 (ROR,RORV): Add smartmips.
631 (include): Include smartmips.igen.
632 * sim-main.h (ACX): Set to REGISTERS[89].
633 * smartmips.igen: New file.
635 2006-08-29 Thiemo Seufer <ths@mips.com>
636 David Ung <davidu@mips.com>
638 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
639 mips3264r2.igen. Add missing dependency rules.
640 * m16e.igen: Support for mips16e save/restore instructions.
642 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
644 * configure: Regenerated.
646 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
648 * configure: Regenerated.
650 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
652 * configure: Regenerated.
654 2006-05-15 Chao-ying Fu <fu@mips.com>
656 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
658 2006-04-18 Nick Clifton <nickc@redhat.com>
660 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
663 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
665 * configure: Regenerate.
667 2005-12-14 Chao-ying Fu <fu@mips.com>
669 * Makefile.in (SIM_OBJS): Add dsp.o.
670 (dsp.o): New dependency.
671 (IGEN_INCLUDE): Add dsp.igen.
672 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
673 mipsisa64*-*-*): Add dsp to sim_igen_machine.
674 * configure: Regenerate.
675 * mips.igen: Add dsp model and include dsp.igen.
676 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
677 because these instructions are extended in DSP ASE.
678 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
679 adding 6 DSP accumulator registers and 1 DSP control register.
680 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
681 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
682 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
683 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
684 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
685 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
686 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
687 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
688 DSPCR_CCOND_SMASK): New define.
689 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
690 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
692 2005-07-08 Ian Lance Taylor <ian@airs.com>
694 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
696 2005-06-16 David Ung <davidu@mips.com>
697 Nigel Stephens <nigel@mips.com>
699 * mips.igen: New mips16e model and include m16e.igen.
700 (check_u64): Add mips16e tag.
701 * m16e.igen: New file for MIPS16e instructions.
702 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
703 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
705 * configure: Regenerate.
707 2005-05-26 David Ung <davidu@mips.com>
709 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
710 tags to all instructions which are applicable to the new ISAs.
711 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
713 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
715 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
717 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
718 * configure: Regenerate.
720 2005-03-23 Mark Kettenis <kettenis@gnu.org>
722 * configure: Regenerate.
724 2005-01-14 Andrew Cagney <cagney@gnu.org>
726 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
727 explicit call to AC_CONFIG_HEADER.
728 * configure: Regenerate.
730 2005-01-12 Andrew Cagney <cagney@gnu.org>
732 * configure.ac: Update to use ../common/common.m4.
733 * configure: Re-generate.
735 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
737 * configure: Regenerated to track ../common/aclocal.m4 changes.
739 2005-01-07 Andrew Cagney <cagney@gnu.org>
741 * configure.ac: Rename configure.in, require autoconf 2.59.
742 * configure: Re-generate.
744 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
746 * configure: Regenerate for ../common/aclocal.m4 update.
748 2004-09-24 Monika Chaddha <monika@acmet.com>
750 Committed by Andrew Cagney.
751 * m16.igen (CMP, CMPI): Fix assembler.
753 2004-08-18 Chris Demetriou <cgd@broadcom.com>
755 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
756 * configure: Regenerate.
758 2004-06-25 Chris Demetriou <cgd@broadcom.com>
760 * configure.in (sim_m16_machine): Include mipsIII.
761 * configure: Regenerate.
763 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
765 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
767 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
769 2004-04-10 Chris Demetriou <cgd@broadcom.com>
771 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
773 2004-04-09 Chris Demetriou <cgd@broadcom.com>
775 * mips.igen (check_fmt): Remove.
776 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
777 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
778 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
779 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
780 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
781 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
782 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
783 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
784 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
785 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
787 2004-04-09 Chris Demetriou <cgd@broadcom.com>
789 * sb1.igen (check_sbx): New function.
790 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
792 2004-03-29 Chris Demetriou <cgd@broadcom.com>
793 Richard Sandiford <rsandifo@redhat.com>
795 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
796 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
797 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
798 separate implementations for mipsIV and mipsV. Use new macros to
799 determine whether the restrictions apply.
801 2004-01-19 Chris Demetriou <cgd@broadcom.com>
803 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
804 (check_mult_hilo): Improve comments.
805 (check_div_hilo): Likewise. Also, fork off a new version
806 to handle mips32/mips64 (since there are no hazards to check
809 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
811 * mips.igen (do_dmultx): Fix check for negative operands.
813 2003-05-16 Ian Lance Taylor <ian@airs.com>
815 * Makefile.in (SHELL): Make sure this is defined.
816 (various): Use $(SHELL) whenever we invoke move-if-change.
818 2003-05-03 Chris Demetriou <cgd@broadcom.com>
820 * cp1.c: Tweak attribution slightly.
823 * mdmx.igen: Likewise.
824 * mips3d.igen: Likewise.
825 * sb1.igen: Likewise.
827 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
829 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
832 2003-02-27 Andrew Cagney <cagney@redhat.com>
834 * interp.c (sim_open): Rename _bfd to bfd.
835 (sim_create_inferior): Ditto.
837 2003-01-14 Chris Demetriou <cgd@broadcom.com>
839 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
841 2003-01-14 Chris Demetriou <cgd@broadcom.com>
843 * mips.igen (EI, DI): Remove.
845 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
847 * Makefile.in (tmp-run-multi): Fix mips16 filter.
849 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
850 Andrew Cagney <ac131313@redhat.com>
851 Gavin Romig-Koch <gavin@redhat.com>
852 Graydon Hoare <graydon@redhat.com>
853 Aldy Hernandez <aldyh@redhat.com>
854 Dave Brolley <brolley@redhat.com>
855 Chris Demetriou <cgd@broadcom.com>
857 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
858 (sim_mach_default): New variable.
859 (mips64vr-*-*, mips64vrel-*-*): New configurations.
860 Add a new simulator generator, MULTI.
861 * configure: Regenerate.
862 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
863 (multi-run.o): New dependency.
864 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
865 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
866 (tmp-multi): Combine them.
867 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
868 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
869 (distclean-extra): New rule.
870 * sim-main.h: Include bfd.h.
871 (MIPS_MACH): New macro.
872 * mips.igen (vr4120, vr5400, vr5500): New models.
873 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
874 * vr.igen: Replace with new version.
876 2003-01-04 Chris Demetriou <cgd@broadcom.com>
878 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
879 * configure: Regenerate.
881 2002-12-31 Chris Demetriou <cgd@broadcom.com>
883 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
884 * mips.igen: Remove all invocations of check_branch_bug and
887 2002-12-16 Chris Demetriou <cgd@broadcom.com>
889 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
891 2002-07-30 Chris Demetriou <cgd@broadcom.com>
893 * mips.igen (do_load_double, do_store_double): New functions.
894 (LDC1, SDC1): Rename to...
895 (LDC1b, SDC1b): respectively.
896 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
898 2002-07-29 Michael Snyder <msnyder@redhat.com>
900 * cp1.c (fp_recip2): Modify initialization expression so that
901 GCC will recognize it as constant.
903 2002-06-18 Chris Demetriou <cgd@broadcom.com>
905 * mdmx.c (SD_): Delete.
906 (Unpredictable): Re-define, for now, to directly invoke
907 unpredictable_action().
908 (mdmx_acc_op): Fix error in .ob immediate handling.
910 2002-06-18 Andrew Cagney <cagney@redhat.com>
912 * interp.c (sim_firmware_command): Initialize `address'.
914 2002-06-16 Andrew Cagney <ac131313@redhat.com>
916 * configure: Regenerated to track ../common/aclocal.m4 changes.
918 2002-06-14 Chris Demetriou <cgd@broadcom.com>
919 Ed Satterthwaite <ehs@broadcom.com>
921 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
922 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
923 * mips.igen: Include mips3d.igen.
924 (mips3d): New model name for MIPS-3D ASE instructions.
925 (CVT.W.fmt): Don't use this instruction for word (source) format
927 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
928 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
929 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
930 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
931 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
932 (RSquareRoot1, RSquareRoot2): New macros.
933 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
934 (fp_rsqrt2): New functions.
935 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
936 * configure: Regenerate.
938 2002-06-13 Chris Demetriou <cgd@broadcom.com>
939 Ed Satterthwaite <ehs@broadcom.com>
941 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
942 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
943 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
944 (convert): Note that this function is not used for paired-single
946 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
947 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
948 (check_fmt_p): Enable paired-single support.
949 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
950 (PUU.PS): New instructions.
951 (CVT.S.fmt): Don't use this instruction for paired-single format
953 * sim-main.h (FP_formats): New value 'fmt_ps.'
954 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
955 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
957 2002-06-12 Chris Demetriou <cgd@broadcom.com>
959 * mips.igen: Fix formatting of function calls in
962 2002-06-12 Chris Demetriou <cgd@broadcom.com>
964 * mips.igen (MOVN, MOVZ): Trace result.
965 (TNEI): Print "tnei" as the opcode name in traces.
966 (CEIL.W): Add disassembly string for traces.
967 (RSQRT.fmt): Make location of disassembly string consistent
968 with other instructions.
970 2002-06-12 Chris Demetriou <cgd@broadcom.com>
972 * mips.igen (X): Delete unused function.
974 2002-06-08 Andrew Cagney <cagney@redhat.com>
976 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
978 2002-06-07 Chris Demetriou <cgd@broadcom.com>
979 Ed Satterthwaite <ehs@broadcom.com>
981 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
982 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
983 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
984 (fp_nmsub): New prototypes.
985 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
986 (NegMultiplySub): New defines.
987 * mips.igen (RSQRT.fmt): Use RSquareRoot().
988 (MADD.D, MADD.S): Replace with...
989 (MADD.fmt): New instruction.
990 (MSUB.D, MSUB.S): Replace with...
991 (MSUB.fmt): New instruction.
992 (NMADD.D, NMADD.S): Replace with...
993 (NMADD.fmt): New instruction.
994 (NMSUB.D, MSUB.S): Replace with...
995 (NMSUB.fmt): New instruction.
997 2002-06-07 Chris Demetriou <cgd@broadcom.com>
998 Ed Satterthwaite <ehs@broadcom.com>
1000 * cp1.c: Fix more comment spelling and formatting.
1001 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1002 (denorm_mode): New function.
1003 (fpu_unary, fpu_binary): Round results after operation, collect
1004 status from rounding operations, and update the FCSR.
1005 (convert): Collect status from integer conversions and rounding
1006 operations, and update the FCSR. Adjust NaN values that result
1007 from conversions. Convert to use sim_io_eprintf rather than
1008 fprintf, and remove some debugging code.
1009 * cp1.h (fenr_FS): New define.
1011 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1013 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1014 rounding mode to sim FP rounding mode flag conversion code into...
1015 (rounding_mode): New function.
1017 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1019 * cp1.c: Clean up formatting of a few comments.
1020 (value_fpr): Reformat switch statement.
1022 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1023 Ed Satterthwaite <ehs@broadcom.com>
1026 * sim-main.h: Include cp1.h.
1027 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1028 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1029 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1030 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1031 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1032 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1033 * cp1.c: Don't include sim-fpu.h; already included by
1034 sim-main.h. Clean up formatting of some comments.
1035 (NaN, Equal, Less): Remove.
1036 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1037 (fp_cmp): New functions.
1038 * mips.igen (do_c_cond_fmt): Remove.
1039 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1040 Compare. Add result tracing.
1041 (CxC1): Remove, replace with...
1042 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1043 (DMxC1): Remove, replace with...
1044 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1045 (MxC1): Remove, replace with...
1046 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1048 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1050 * sim-main.h (FGRIDX): Remove, replace all uses with...
1051 (FGR_BASE): New macro.
1052 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1053 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1054 (NR_FGR, FGR): Likewise.
1055 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1056 * mips.igen: Likewise.
1058 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1060 * cp1.c: Add an FSF Copyright notice to this file.
1062 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1063 Ed Satterthwaite <ehs@broadcom.com>
1065 * cp1.c (Infinity): Remove.
1066 * sim-main.h (Infinity): Likewise.
1068 * cp1.c (fp_unary, fp_binary): New functions.
1069 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1070 (fp_sqrt): New functions, implemented in terms of the above.
1071 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1072 (Recip, SquareRoot): Remove (replaced by functions above).
1073 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1074 (fp_recip, fp_sqrt): New prototypes.
1075 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1076 (Recip, SquareRoot): Replace prototypes with #defines which
1077 invoke the functions above.
1079 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1081 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1082 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1083 file, remove PARAMS from prototypes.
1084 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1085 simulator state arguments.
1086 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1087 pass simulator state arguments.
1088 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1089 (store_fpr, convert): Remove 'sd' argument.
1090 (value_fpr): Likewise. Convert to use 'SD' instead.
1092 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1094 * cp1.c (Min, Max): Remove #if 0'd functions.
1095 * sim-main.h (Min, Max): Remove.
1097 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1099 * cp1.c: fix formatting of switch case and default labels.
1100 * interp.c: Likewise.
1101 * sim-main.c: Likewise.
1103 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1105 * cp1.c: Clean up comments which describe FP formats.
1106 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1108 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1109 Ed Satterthwaite <ehs@broadcom.com>
1111 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1112 Broadcom SiByte SB-1 processor configurations.
1113 * configure: Regenerate.
1114 * sb1.igen: New file.
1115 * mips.igen: Include sb1.igen.
1117 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1118 * mdmx.igen: Add "sb1" model to all appropriate functions and
1120 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1121 (ob_func, ob_acc): Reference the above.
1122 (qh_acc): Adjust to keep the same size as ob_acc.
1123 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1124 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1126 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1128 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1130 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1131 Ed Satterthwaite <ehs@broadcom.com>
1133 * mips.igen (mdmx): New (pseudo-)model.
1134 * mdmx.c, mdmx.igen: New files.
1135 * Makefile.in (SIM_OBJS): Add mdmx.o.
1136 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1138 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1139 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1140 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1141 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1142 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1143 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1144 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1145 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1146 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1147 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1148 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1149 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1150 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1151 (qh_fmtsel): New macros.
1152 (_sim_cpu): New member "acc".
1153 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1154 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1156 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1158 * interp.c: Use 'deprecated' rather than 'depreciated.'
1159 * sim-main.h: Likewise.
1161 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1163 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1164 which wouldn't compile anyway.
1165 * sim-main.h (unpredictable_action): New function prototype.
1166 (Unpredictable): Define to call igen function unpredictable().
1167 (NotWordValue): New macro to call igen function not_word_value().
1168 (UndefinedResult): Remove.
1169 * interp.c (undefined_result): Remove.
1170 (unpredictable_action): New function.
1171 * mips.igen (not_word_value, unpredictable): New functions.
1172 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1173 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1174 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1175 NotWordValue() to check for unpredictable inputs, then
1176 Unpredictable() to handle them.
1178 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1180 * mips.igen: Fix formatting of calls to Unpredictable().
1182 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1184 * interp.c (sim_open): Revert previous change.
1186 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1188 * interp.c (sim_open): Disable chunk of code that wrote code in
1189 vector table entries.
1191 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1193 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1194 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1197 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1199 * cp1.c: Fix many formatting issues.
1201 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1203 * cp1.c (fpu_format_name): New function to replace...
1204 (DOFMT): This. Delete, and update all callers.
1205 (fpu_rounding_mode_name): New function to replace...
1206 (RMMODE): This. Delete, and update all callers.
1208 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1210 * interp.c: Move FPU support routines from here to...
1211 * cp1.c: Here. New file.
1212 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1213 (cp1.o): New target.
1215 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1217 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1218 * mips.igen (mips32, mips64): New models, add to all instructions
1219 and functions as appropriate.
1220 (loadstore_ea, check_u64): New variant for model mips64.
1221 (check_fmt_p): New variant for models mipsV and mips64, remove
1222 mipsV model marking fro other variant.
1225 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1226 for mips32 and mips64.
1227 (DCLO, DCLZ): New instructions for mips64.
1229 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1231 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1232 immediate or code as a hex value with the "%#lx" format.
1233 (ANDI): Likewise, and fix printed instruction name.
1235 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1237 * sim-main.h (UndefinedResult, Unpredictable): New macros
1238 which currently do nothing.
1240 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1242 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1243 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1244 (status_CU3): New definitions.
1246 * sim-main.h (ExceptionCause): Add new values for MIPS32
1247 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1248 for DebugBreakPoint and NMIReset to note their status in
1250 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1251 (SignalExceptionCacheErr): New exception macros.
1253 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1255 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1256 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1258 (SignalExceptionCoProcessorUnusable): Take as argument the
1259 unusable coprocessor number.
1261 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1263 * mips.igen: Fix formatting of all SignalException calls.
1265 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1267 * sim-main.h (SIGNEXTEND): Remove.
1269 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1271 * mips.igen: Remove gencode comment from top of file, fix
1272 spelling in another comment.
1274 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1276 * mips.igen (check_fmt, check_fmt_p): New functions to check
1277 whether specific floating point formats are usable.
1278 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1279 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1280 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1281 Use the new functions.
1282 (do_c_cond_fmt): Remove format checks...
1283 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1285 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1287 * mips.igen: Fix formatting of check_fpu calls.
1289 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1291 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1293 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1295 * mips.igen: Remove whitespace at end of lines.
1297 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1299 * mips.igen (loadstore_ea): New function to do effective
1300 address calculations.
1301 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1302 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1303 CACHE): Use loadstore_ea to do effective address computations.
1305 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1307 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1308 * mips.igen (LL, CxC1, MxC1): Likewise.
1310 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1312 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1313 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1314 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1315 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1316 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1317 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1318 Don't split opcode fields by hand, use the opcode field values
1321 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1323 * mips.igen (do_divu): Fix spacing.
1325 * mips.igen (do_dsllv): Move to be right before DSLLV,
1326 to match the rest of the do_<shift> functions.
1328 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1331 DSRL32, do_dsrlv): Trace inputs and results.
1333 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1335 * mips.igen (CACHE): Provide instruction-printing string.
1337 * interp.c (signal_exception): Comment tokens after #endif.
1339 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1341 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1342 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1343 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1344 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1345 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1346 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1347 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1348 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1350 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1352 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1353 instruction-printing string.
1354 (LWU): Use '64' as the filter flag.
1356 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1358 * mips.igen (SDXC1): Fix instruction-printing string.
1360 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1362 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1363 filter flags "32,f".
1365 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1367 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1370 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1372 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1373 add a comma) so that it more closely match the MIPS ISA
1374 documentation opcode partitioning.
1375 (PREF): Put useful names on opcode fields, and include
1376 instruction-printing string.
1378 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1380 * mips.igen (check_u64): New function which in the future will
1381 check whether 64-bit instructions are usable and signal an
1382 exception if not. Currently a no-op.
1383 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1384 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1385 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1386 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1388 * mips.igen (check_fpu): New function which in the future will
1389 check whether FPU instructions are usable and signal an exception
1390 if not. Currently a no-op.
1391 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1392 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1393 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1394 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1395 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1396 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1397 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1398 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1400 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1402 * mips.igen (do_load_left, do_load_right): Move to be immediately
1404 (do_store_left, do_store_right): Move to be immediately following
1407 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1409 * mips.igen (mipsV): New model name. Also, add it to
1410 all instructions and functions where it is appropriate.
1412 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1414 * mips.igen: For all functions and instructions, list model
1415 names that support that instruction one per line.
1417 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1419 * mips.igen: Add some additional comments about supported
1420 models, and about which instructions go where.
1421 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1422 order as is used in the rest of the file.
1424 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1426 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1427 indicating that ALU32_END or ALU64_END are there to check
1429 (DADD): Likewise, but also remove previous comment about
1432 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1434 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1435 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1436 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1437 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1438 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1439 fields (i.e., add and move commas) so that they more closely
1440 match the MIPS ISA documentation opcode partitioning.
1442 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1444 * mips.igen (ADDI): Print immediate value.
1445 (BREAK): Print code.
1446 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1447 (SLL): Print "nop" specially, and don't run the code
1448 that does the shift for the "nop" case.
1450 2001-11-17 Fred Fish <fnf@redhat.com>
1452 * sim-main.h (float_operation): Move enum declaration outside
1453 of _sim_cpu struct declaration.
1455 2001-04-12 Jim Blandy <jimb@redhat.com>
1457 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1458 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1460 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1461 PENDING_FILL, and you can get the intended effect gracefully by
1462 calling PENDING_SCHED directly.
1464 2001-02-23 Ben Elliston <bje@redhat.com>
1466 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1467 already defined elsewhere.
1469 2001-02-19 Ben Elliston <bje@redhat.com>
1471 * sim-main.h (sim_monitor): Return an int.
1472 * interp.c (sim_monitor): Add return values.
1473 (signal_exception): Handle error conditions from sim_monitor.
1475 2001-02-08 Ben Elliston <bje@redhat.com>
1477 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1478 (store_memory): Likewise, pass cia to sim_core_write*.
1480 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1482 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1483 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1485 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1487 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1488 * Makefile.in: Don't delete *.igen when cleaning directory.
1490 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1492 * m16.igen (break): Call SignalException not sim_engine_halt.
1494 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1496 From Jason Eckhardt:
1497 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1499 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1501 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1503 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1505 * mips.igen (do_dmultx): Fix typo.
1507 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1509 * configure: Regenerated to track ../common/aclocal.m4 changes.
1511 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1513 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1515 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1517 * sim-main.h (GPR_CLEAR): Define macro.
1519 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1521 * interp.c (decode_coproc): Output long using %lx and not %s.
1523 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1525 * interp.c (sim_open): Sort & extend dummy memory regions for
1526 --board=jmr3904 for eCos.
1528 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1530 * configure: Regenerated.
1532 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1534 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1535 calls, conditional on the simulator being in verbose mode.
1537 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1539 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1540 cache don't get ReservedInstruction traps.
1542 1999-11-29 Mark Salter <msalter@cygnus.com>
1544 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1545 to clear status bits in sdisr register. This is how the hardware works.
1547 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1548 being used by cygmon.
1550 1999-11-11 Andrew Haley <aph@cygnus.com>
1552 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1555 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1557 * mips.igen (MULT): Correct previous mis-applied patch.
1559 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1561 * mips.igen (delayslot32): Handle sequence like
1562 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1563 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1564 (MULT): Actually pass the third register...
1566 1999-09-03 Mark Salter <msalter@cygnus.com>
1568 * interp.c (sim_open): Added more memory aliases for additional
1569 hardware being touched by cygmon on jmr3904 board.
1571 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1573 * configure: Regenerated to track ../common/aclocal.m4 changes.
1575 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1577 * interp.c (sim_store_register): Handle case where client - GDB -
1578 specifies that a 4 byte register is 8 bytes in size.
1579 (sim_fetch_register): Ditto.
1581 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1583 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1584 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1585 (idt_monitor_base): Base address for IDT monitor traps.
1586 (pmon_monitor_base): Ditto for PMON.
1587 (lsipmon_monitor_base): Ditto for LSI PMON.
1588 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1589 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1590 (sim_firmware_command): New function.
1591 (mips_option_handler): Call it for OPTION_FIRMWARE.
1592 (sim_open): Allocate memory for idt_monitor region. If "--board"
1593 option was given, add no monitor by default. Add BREAK hooks only if
1594 monitors are also there.
1596 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1598 * interp.c (sim_monitor): Flush output before reading input.
1600 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1602 * tconfig.in (SIM_HANDLES_LMA): Always define.
1604 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1606 From Mark Salter <msalter@cygnus.com>:
1607 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1608 (sim_open): Add setup for BSP board.
1610 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1612 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1613 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1614 them as unimplemented.
1616 1999-05-08 Felix Lee <flee@cygnus.com>
1618 * configure: Regenerated to track ../common/aclocal.m4 changes.
1620 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1622 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1624 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1626 * configure.in: Any mips64vr5*-*-* target should have
1627 -DTARGET_ENABLE_FR=1.
1628 (default_endian): Any mips64vr*el-*-* target should default to
1630 * configure: Re-generate.
1632 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1634 * mips.igen (ldl): Extend from _16_, not 32.
1636 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1638 * interp.c (sim_store_register): Force registers written to by GDB
1639 into an un-interpreted state.
1641 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1643 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1644 CPU, start periodic background I/O polls.
1645 (tx3904sio_poll): New function: periodic I/O poller.
1647 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1649 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1651 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1653 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1656 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1658 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1659 (load_word): Call SIM_CORE_SIGNAL hook on error.
1660 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1661 starting. For exception dispatching, pass PC instead of NULL_CIA.
1662 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1663 * sim-main.h (COP0_BADVADDR): Define.
1664 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1665 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1666 (_sim_cpu): Add exc_* fields to store register value snapshots.
1667 * mips.igen (*): Replace memory-related SignalException* calls
1668 with references to SIM_CORE_SIGNAL hook.
1670 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1672 * sim-main.c (*): Minor warning cleanups.
1674 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1676 * m16.igen (DADDIU5): Correct type-o.
1678 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1680 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1683 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1685 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1687 (interp.o): Add dependency on itable.h
1688 (oengine.c, gencode): Delete remaining references.
1689 (BUILT_SRC_FROM_GEN): Clean up.
1691 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1694 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1695 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1696 tmp-run-hack) : New.
1697 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1698 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1699 Drop the "64" qualifier to get the HACK generator working.
1700 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1701 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1702 qualifier to get the hack generator working.
1703 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1704 (DSLL): Use do_dsll.
1705 (DSLLV): Use do_dsllv.
1706 (DSRA): Use do_dsra.
1707 (DSRL): Use do_dsrl.
1708 (DSRLV): Use do_dsrlv.
1709 (BC1): Move *vr4100 to get the HACK generator working.
1710 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1711 get the HACK generator working.
1712 (MACC) Rename to get the HACK generator working.
1713 (DMACC,MACCS,DMACCS): Add the 64.
1715 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1717 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1718 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1720 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1722 * mips/interp.c (DEBUG): Cleanups.
1724 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1726 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1727 (tx3904sio_tickle): fflush after a stdout character output.
1729 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1731 * interp.c (sim_close): Uninstall modules.
1733 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1735 * sim-main.h, interp.c (sim_monitor): Change to global
1738 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1740 * configure.in (vr4100): Only include vr4100 instructions in
1742 * configure: Re-generate.
1743 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1745 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1747 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1748 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1751 * configure.in (sim_default_gen, sim_use_gen): Replace with
1753 (--enable-sim-igen): Delete config option. Always using IGEN.
1754 * configure: Re-generate.
1756 * Makefile.in (gencode): Kill, kill, kill.
1759 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1761 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1762 bit mips16 igen simulator.
1763 * configure: Re-generate.
1765 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1766 as part of vr4100 ISA.
1767 * vr.igen: Mark all instructions as 64 bit only.
1769 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1771 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1774 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1776 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1777 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1778 * configure: Re-generate.
1780 * m16.igen (BREAK): Define breakpoint instruction.
1781 (JALX32): Mark instruction as mips16 and not r3900.
1782 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1784 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1786 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1788 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1789 insn as a debug breakpoint.
1791 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1793 (PENDING_SCHED): Clean up trace statement.
1794 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1795 (PENDING_FILL): Delay write by only one cycle.
1796 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1798 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1800 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1802 (pending_tick): Move incrementing of index to FOR statement.
1803 (pending_tick): Only update PENDING_OUT after a write has occured.
1805 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1807 * configure: Re-generate.
1809 * interp.c (sim_engine_run OLD): Delete explicit call to
1810 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1812 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1814 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1815 interrupt level number to match changed SignalExceptionInterrupt
1818 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1820 * interp.c: #include "itable.h" if WITH_IGEN.
1821 (get_insn_name): New function.
1822 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1823 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1825 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1827 * configure: Rebuilt to inhale new common/aclocal.m4.
1829 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1831 * dv-tx3904sio.c: Include sim-assert.h.
1833 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1835 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1836 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1837 Reorganize target-specific sim-hardware checks.
1838 * configure: rebuilt.
1839 * interp.c (sim_open): For tx39 target boards, set
1840 OPERATING_ENVIRONMENT, add tx3904sio devices.
1841 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1842 ROM executables. Install dv-sockser into sim-modules list.
1844 * dv-tx3904irc.c: Compiler warning clean-up.
1845 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1846 frequent hw-trace messages.
1848 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1850 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1852 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1854 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1856 * vr.igen: New file.
1857 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1858 * mips.igen: Define vr4100 model. Include vr.igen.
1859 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1861 * mips.igen (check_mf_hilo): Correct check.
1863 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1865 * sim-main.h (interrupt_event): Add prototype.
1867 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1868 register_ptr, register_value.
1869 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1871 * sim-main.h (tracefh): Make extern.
1873 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1875 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1876 Reduce unnecessarily high timer event frequency.
1877 * dv-tx3904cpu.c: Ditto for interrupt event.
1879 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1881 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1883 (interrupt_event): Made non-static.
1885 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1886 interchange of configuration values for external vs. internal
1889 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1891 * mips.igen (BREAK): Moved code to here for
1892 simulator-reserved break instructions.
1893 * gencode.c (build_instruction): Ditto.
1894 * interp.c (signal_exception): Code moved from here. Non-
1895 reserved instructions now use exception vector, rather
1897 * sim-main.h: Moved magic constants to here.
1899 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1901 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1902 register upon non-zero interrupt event level, clear upon zero
1904 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1905 by passing zero event value.
1906 (*_io_{read,write}_buffer): Endianness fixes.
1907 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1908 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1910 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1911 serial I/O and timer module at base address 0xFFFF0000.
1913 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1915 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1918 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1920 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1922 * configure: Update.
1924 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1926 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1927 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1928 * configure.in: Include tx3904tmr in hw_device list.
1929 * configure: Rebuilt.
1930 * interp.c (sim_open): Instantiate three timer instances.
1931 Fix address typo of tx3904irc instance.
1933 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1935 * interp.c (signal_exception): SystemCall exception now uses
1936 the exception vector.
1938 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1940 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1943 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1945 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1947 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1949 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1951 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1952 sim-main.h. Declare a struct hw_descriptor instead of struct
1953 hw_device_descriptor.
1955 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1957 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1958 right bits and then re-align left hand bytes to correct byte
1959 lanes. Fix incorrect computation in do_store_left when loading
1960 bytes from second word.
1962 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1964 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1965 * interp.c (sim_open): Only create a device tree when HW is
1968 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1969 * interp.c (signal_exception): Ditto.
1971 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1973 * gencode.c: Mark BEGEZALL as LIKELY.
1975 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1977 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1978 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1980 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1982 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1983 modules. Recognize TX39 target with "mips*tx39" pattern.
1984 * configure: Rebuilt.
1985 * sim-main.h (*): Added many macros defining bits in
1986 TX39 control registers.
1987 (SignalInterrupt): Send actual PC instead of NULL.
1988 (SignalNMIReset): New exception type.
1989 * interp.c (board): New variable for future use to identify
1990 a particular board being simulated.
1991 (mips_option_handler,mips_options): Added "--board" option.
1992 (interrupt_event): Send actual PC.
1993 (sim_open): Make memory layout conditional on board setting.
1994 (signal_exception): Initial implementation of hardware interrupt
1995 handling. Accept another break instruction variant for simulator
1997 (decode_coproc): Implement RFE instruction for TX39.
1998 (mips.igen): Decode RFE instruction as such.
1999 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2000 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2001 bbegin to implement memory map.
2002 * dv-tx3904cpu.c: New file.
2003 * dv-tx3904irc.c: New file.
2005 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2007 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2009 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2011 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2012 with calls to check_div_hilo.
2014 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2016 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2017 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2018 Add special r3900 version of do_mult_hilo.
2019 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2020 with calls to check_mult_hilo.
2021 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2022 with calls to check_div_hilo.
2024 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2026 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2027 Document a replacement.
2029 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2031 * interp.c (sim_monitor): Make mon_printf work.
2033 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2035 * sim-main.h (INSN_NAME): New arg `cpu'.
2037 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2039 * configure: Regenerated to track ../common/aclocal.m4 changes.
2041 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2043 * configure: Regenerated to track ../common/aclocal.m4 changes.
2046 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2048 * acconfig.h: New file.
2049 * configure.in: Reverted change of Apr 24; use sinclude again.
2051 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2053 * configure: Regenerated to track ../common/aclocal.m4 changes.
2056 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2058 * configure.in: Don't call sinclude.
2060 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2062 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2064 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2066 * mips.igen (ERET): Implement.
2068 * interp.c (decode_coproc): Return sign-extended EPC.
2070 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2072 * interp.c (signal_exception): Do not ignore Trap.
2073 (signal_exception): On TRAP, restart at exception address.
2074 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2075 (signal_exception): Update.
2076 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2077 so that TRAP instructions are caught.
2079 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2081 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2082 contains HI/LO access history.
2083 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2084 (HIACCESS, LOACCESS): Delete, replace with
2085 (HIHISTORY, LOHISTORY): New macros.
2086 (CHECKHILO): Delete all, moved to mips.igen
2088 * gencode.c (build_instruction): Do not generate checks for
2089 correct HI/LO register usage.
2091 * interp.c (old_engine_run): Delete checks for correct HI/LO
2094 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2095 check_mf_cycles): New functions.
2096 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2097 do_divu, domultx, do_mult, do_multu): Use.
2099 * tx.igen ("madd", "maddu"): Use.
2101 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2103 * mips.igen (DSRAV): Use function do_dsrav.
2104 (SRAV): Use new function do_srav.
2106 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2107 (B): Sign extend 11 bit immediate.
2108 (EXT-B*): Shift 16 bit immediate left by 1.
2109 (ADDIU*): Don't sign extend immediate value.
2111 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2113 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2115 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2118 * mips.igen (delayslot32, nullify_next_insn): New functions.
2119 (m16.igen): Always include.
2120 (do_*): Add more tracing.
2122 * m16.igen (delayslot16): Add NIA argument, could be called by a
2123 32 bit MIPS16 instruction.
2125 * interp.c (ifetch16): Move function from here.
2126 * sim-main.c (ifetch16): To here.
2128 * sim-main.c (ifetch16, ifetch32): Update to match current
2129 implementations of LH, LW.
2130 (signal_exception): Don't print out incorrect hex value of illegal
2133 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2135 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2138 * m16.igen: Implement MIPS16 instructions.
2140 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2141 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2142 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2143 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2144 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2145 bodies of corresponding code from 32 bit insn to these. Also used
2146 by MIPS16 versions of functions.
2148 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2149 (IMEM16): Drop NR argument from macro.
2151 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2153 * Makefile.in (SIM_OBJS): Add sim-main.o.
2155 * sim-main.h (address_translation, load_memory, store_memory,
2156 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2158 (pr_addr, pr_uword64): Declare.
2159 (sim-main.c): Include when H_REVEALS_MODULE_P.
2161 * interp.c (address_translation, load_memory, store_memory,
2162 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2164 * sim-main.c: To here. Fix compilation problems.
2166 * configure.in: Enable inlining.
2167 * configure: Re-config.
2169 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2171 * configure: Regenerated to track ../common/aclocal.m4 changes.
2173 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2175 * mips.igen: Include tx.igen.
2176 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2177 * tx.igen: New file, contains MADD and MADDU.
2179 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2180 the hardwired constant `7'.
2181 (store_memory): Ditto.
2182 (LOADDRMASK): Move definition to sim-main.h.
2184 mips.igen (MTC0): Enable for r3900.
2187 mips.igen (do_load_byte): Delete.
2188 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2189 do_store_right): New functions.
2190 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2192 configure.in: Let the tx39 use igen again.
2195 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2197 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2198 not an address sized quantity. Return zero for cache sizes.
2200 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2202 * mips.igen (r3900): r3900 does not support 64 bit integer
2205 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2207 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2209 * configure : Rebuild.
2211 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2213 * configure: Regenerated to track ../common/aclocal.m4 changes.
2215 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2217 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2219 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2221 * configure: Regenerated to track ../common/aclocal.m4 changes.
2222 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2224 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2226 * configure: Regenerated to track ../common/aclocal.m4 changes.
2228 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2230 * interp.c (Max, Min): Comment out functions. Not yet used.
2232 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2234 * configure: Regenerated to track ../common/aclocal.m4 changes.
2236 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2238 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2239 configurable settings for stand-alone simulator.
2241 * configure.in: Added X11 search, just in case.
2243 * configure: Regenerated.
2245 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2247 * interp.c (sim_write, sim_read, load_memory, store_memory):
2248 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2250 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2252 * sim-main.h (GETFCC): Return an unsigned value.
2254 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2256 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2257 (DADD): Result destination is RD not RT.
2259 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2261 * sim-main.h (HIACCESS, LOACCESS): Always define.
2263 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2265 * interp.c (sim_info): Delete.
2267 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2269 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2270 (mips_option_handler): New argument `cpu'.
2271 (sim_open): Update call to sim_add_option_table.
2273 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2275 * mips.igen (CxC1): Add tracing.
2277 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2279 * sim-main.h (Max, Min): Declare.
2281 * interp.c (Max, Min): New functions.
2283 * mips.igen (BC1): Add tracing.
2285 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2287 * interp.c Added memory map for stack in vr4100
2289 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2291 * interp.c (load_memory): Add missing "break"'s.
2293 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2295 * interp.c (sim_store_register, sim_fetch_register): Pass in
2296 length parameter. Return -1.
2298 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2300 * interp.c: Added hardware init hook, fixed warnings.
2302 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2304 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2306 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2308 * interp.c (ifetch16): New function.
2310 * sim-main.h (IMEM32): Rename IMEM.
2311 (IMEM16_IMMED): Define.
2313 (DELAY_SLOT): Update.
2315 * m16run.c (sim_engine_run): New file.
2317 * m16.igen: All instructions except LB.
2318 (LB): Call do_load_byte.
2319 * mips.igen (do_load_byte): New function.
2320 (LB): Call do_load_byte.
2322 * mips.igen: Move spec for insn bit size and high bit from here.
2323 * Makefile.in (tmp-igen, tmp-m16): To here.
2325 * m16.dc: New file, decode mips16 instructions.
2327 * Makefile.in (SIM_NO_ALL): Define.
2328 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2330 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2332 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2333 point unit to 32 bit registers.
2334 * configure: Re-generate.
2336 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2338 * configure.in (sim_use_gen): Make IGEN the default simulator
2339 generator for generic 32 and 64 bit mips targets.
2340 * configure: Re-generate.
2342 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2344 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2347 * interp.c (sim_fetch_register, sim_store_register): Read/write
2348 FGR from correct location.
2349 (sim_open): Set size of FGR's according to
2350 WITH_TARGET_FLOATING_POINT_BITSIZE.
2352 * sim-main.h (FGR): Store floating point registers in a separate
2355 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2357 * configure: Regenerated to track ../common/aclocal.m4 changes.
2359 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2361 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2363 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2365 * interp.c (pending_tick): New function. Deliver pending writes.
2367 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2368 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2369 it can handle mixed sized quantites and single bits.
2371 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2373 * interp.c (oengine.h): Do not include when building with IGEN.
2374 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2375 (sim_info): Ditto for PROCESSOR_64BIT.
2376 (sim_monitor): Replace ut_reg with unsigned_word.
2377 (*): Ditto for t_reg.
2378 (LOADDRMASK): Define.
2379 (sim_open): Remove defunct check that host FP is IEEE compliant,
2380 using software to emulate floating point.
2381 (value_fpr, ...): Always compile, was conditional on HASFPU.
2383 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2385 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2388 * interp.c (SD, CPU): Define.
2389 (mips_option_handler): Set flags in each CPU.
2390 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2391 (sim_close): Do not clear STATE, deleted anyway.
2392 (sim_write, sim_read): Assume CPU zero's vm should be used for
2394 (sim_create_inferior): Set the PC for all processors.
2395 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2397 (mips16_entry): Pass correct nr of args to store_word, load_word.
2398 (ColdReset): Cold reset all cpu's.
2399 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2400 (sim_monitor, load_memory, store_memory, signal_exception): Use
2401 `CPU' instead of STATE_CPU.
2404 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2407 * sim-main.h (signal_exception): Add sim_cpu arg.
2408 (SignalException*): Pass both SD and CPU to signal_exception.
2409 * interp.c (signal_exception): Update.
2411 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2413 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2414 address_translation): Ditto
2415 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2417 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2419 * configure: Regenerated to track ../common/aclocal.m4 changes.
2421 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2423 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2425 * mips.igen (model): Map processor names onto BFD name.
2427 * sim-main.h (CPU_CIA): Delete.
2428 (SET_CIA, GET_CIA): Define
2430 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2432 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2435 * configure.in (default_endian): Configure a big-endian simulator
2437 * configure: Re-generate.
2439 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2441 * configure: Regenerated to track ../common/aclocal.m4 changes.
2443 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2445 * interp.c (sim_monitor): Handle Densan monitor outbyte
2446 and inbyte functions.
2448 1997-12-29 Felix Lee <flee@cygnus.com>
2450 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2452 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2454 * Makefile.in (tmp-igen): Arrange for $zero to always be
2455 reset to zero after every instruction.
2457 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2459 * configure: Regenerated to track ../common/aclocal.m4 changes.
2462 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2464 * mips.igen (MSUB): Fix to work like MADD.
2465 * gencode.c (MSUB): Similarly.
2467 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2469 * configure: Regenerated to track ../common/aclocal.m4 changes.
2471 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2473 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2475 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2477 * sim-main.h (sim-fpu.h): Include.
2479 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2480 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2481 using host independant sim_fpu module.
2483 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2485 * interp.c (signal_exception): Report internal errors with SIGABRT
2488 * sim-main.h (C0_CONFIG): New register.
2489 (signal.h): No longer include.
2491 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2493 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2495 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2497 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2499 * mips.igen: Tag vr5000 instructions.
2500 (ANDI): Was missing mipsIV model, fix assembler syntax.
2501 (do_c_cond_fmt): New function.
2502 (C.cond.fmt): Handle mips I-III which do not support CC field
2504 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2505 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2507 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2508 vr5000 which saves LO in a GPR separatly.
2510 * configure.in (enable-sim-igen): For vr5000, select vr5000
2511 specific instructions.
2512 * configure: Re-generate.
2514 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2516 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2518 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2519 fmt_uninterpreted_64 bit cases to switch. Convert to
2522 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2524 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2525 as specified in IV3.2 spec.
2526 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2528 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2531 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2532 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2533 PENDING_FILL versions of instructions. Simplify.
2535 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2537 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2539 (MTHI, MFHI): Disable code checking HI-LO.
2541 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2543 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2545 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2547 * gencode.c (build_mips16_operands): Replace IPC with cia.
2549 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2550 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2552 (UndefinedResult): Replace function with macro/function
2554 (sim_engine_run): Don't save PC in IPC.
2556 * sim-main.h (IPC): Delete.
2559 * interp.c (signal_exception, store_word, load_word,
2560 address_translation, load_memory, store_memory, cache_op,
2561 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2562 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2563 current instruction address - cia - argument.
2564 (sim_read, sim_write): Call address_translation directly.
2565 (sim_engine_run): Rename variable vaddr to cia.
2566 (signal_exception): Pass cia to sim_monitor
2568 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2569 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2570 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2572 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2573 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2576 * interp.c (signal_exception): Pass restart address to
2579 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2580 idecode.o): Add dependency.
2582 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2584 (DELAY_SLOT): Update NIA not PC with branch address.
2585 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2587 * mips.igen: Use CIA not PC in branch calculations.
2588 (illegal): Call SignalException.
2589 (BEQ, ADDIU): Fix assembler.
2591 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2593 * m16.igen (JALX): Was missing.
2595 * configure.in (enable-sim-igen): New configuration option.
2596 * configure: Re-generate.
2598 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2600 * interp.c (load_memory, store_memory): Delete parameter RAW.
2601 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2602 bypassing {load,store}_memory.
2604 * sim-main.h (ByteSwapMem): Delete definition.
2606 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2608 * interp.c (sim_do_command, sim_commands): Delete mips specific
2609 commands. Handled by module sim-options.
2611 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2612 (WITH_MODULO_MEMORY): Define.
2614 * interp.c (sim_info): Delete code printing memory size.
2616 * interp.c (mips_size): Nee sim_size, delete function.
2618 (monitor, monitor_base, monitor_size): Delete global variables.
2619 (sim_open, sim_close): Delete code creating monitor and other
2620 memory regions. Use sim-memopts module, via sim_do_commandf, to
2621 manage memory regions.
2622 (load_memory, store_memory): Use sim-core for memory model.
2624 * interp.c (address_translation): Delete all memory map code
2625 except line forcing 32 bit addresses.
2627 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2629 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2632 * interp.c (logfh, logfile): Delete globals.
2633 (sim_open, sim_close): Delete code opening & closing log file.
2634 (mips_option_handler): Delete -l and -n options.
2635 (OPTION mips_options): Ditto.
2637 * interp.c (OPTION mips_options): Rename option trace to dinero.
2638 (mips_option_handler): Update.
2640 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2642 * interp.c (fetch_str): New function.
2643 (sim_monitor): Rewrite using sim_read & sim_write.
2644 (sim_open): Check magic number.
2645 (sim_open): Write monitor vectors into memory using sim_write.
2646 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2647 (sim_read, sim_write): Simplify - transfer data one byte at a
2649 (load_memory, store_memory): Clarify meaning of parameter RAW.
2651 * sim-main.h (isHOST): Defete definition.
2652 (isTARGET): Mark as depreciated.
2653 (address_translation): Delete parameter HOST.
2655 * interp.c (address_translation): Delete parameter HOST.
2657 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2661 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2662 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2664 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2666 * mips.igen: Add model filter field to records.
2668 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2670 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2672 interp.c (sim_engine_run): Do not compile function sim_engine_run
2673 when WITH_IGEN == 1.
2675 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2676 target architecture.
2678 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2679 igen. Replace with configuration variables sim_igen_flags /
2682 * m16.igen: New file. Copy mips16 insns here.
2683 * mips.igen: From here.
2685 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2687 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2689 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2691 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2693 * gencode.c (build_instruction): Follow sim_write's lead in using
2694 BigEndianMem instead of !ByteSwapMem.
2696 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2698 * configure.in (sim_gen): Dependent on target, select type of
2699 generator. Always select old style generator.
2701 configure: Re-generate.
2703 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2705 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2706 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2707 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2708 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2709 SIM_@sim_gen@_*, set by autoconf.
2711 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2713 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2715 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2716 CURRENT_FLOATING_POINT instead.
2718 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2719 (address_translation): Raise exception InstructionFetch when
2720 translation fails and isINSTRUCTION.
2722 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2723 sim_engine_run): Change type of of vaddr and paddr to
2725 (address_translation, prefetch, load_memory, store_memory,
2726 cache_op): Change type of vAddr and pAddr to address_word.
2728 * gencode.c (build_instruction): Change type of vaddr and paddr to
2731 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2733 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2734 macro to obtain result of ALU op.
2736 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2738 * interp.c (sim_info): Call profile_print.
2740 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2742 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2744 * sim-main.h (WITH_PROFILE): Do not define, defined in
2745 common/sim-config.h. Use sim-profile module.
2746 (simPROFILE): Delete defintion.
2748 * interp.c (PROFILE): Delete definition.
2749 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2750 (sim_close): Delete code writing profile histogram.
2751 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2753 (sim_engine_run): Delete code profiling the PC.
2755 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2757 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2759 * interp.c (sim_monitor): Make register pointers of type
2762 * sim-main.h: Make registers of type unsigned_word not
2765 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2767 * interp.c (sync_operation): Rename from SyncOperation, make
2768 global, add SD argument.
2769 (prefetch): Rename from Prefetch, make global, add SD argument.
2770 (decode_coproc): Make global.
2772 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2774 * gencode.c (build_instruction): Generate DecodeCoproc not
2775 decode_coproc calls.
2777 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2778 (SizeFGR): Move to sim-main.h
2779 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2780 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2781 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2783 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2784 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2785 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2786 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2787 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2788 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2790 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2792 (sim-alu.h): Include.
2793 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2794 (sim_cia): Typedef to instruction_address.
2796 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * Makefile.in (interp.o): Rename generated file engine.c to
2803 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2805 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2807 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2809 * gencode.c (build_instruction): For "FPSQRT", output correct
2810 number of arguments to Recip.
2812 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2814 * Makefile.in (interp.o): Depends on sim-main.h
2816 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2818 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2819 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2820 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2821 STATE, DSSTATE): Define
2822 (GPR, FGRIDX, ..): Define.
2824 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2825 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2826 (GPR, FGRIDX, ...): Delete macros.
2828 * interp.c: Update names to match defines from sim-main.h
2830 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2832 * interp.c (sim_monitor): Add SD argument.
2833 (sim_warning): Delete. Replace calls with calls to
2835 (sim_error): Delete. Replace calls with sim_io_error.
2836 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2837 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2838 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2840 (mips_size): Rename from sim_size. Add SD argument.
2842 * interp.c (simulator): Delete global variable.
2843 (callback): Delete global variable.
2844 (mips_option_handler, sim_open, sim_write, sim_read,
2845 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2846 sim_size,sim_monitor): Use sim_io_* not callback->*.
2847 (sim_open): ZALLOC simulator struct.
2848 (PROFILE): Do not define.
2850 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2852 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2853 support.h with corresponding code.
2855 * sim-main.h (word64, uword64), support.h: Move definition to
2857 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2860 * Makefile.in: Update dependencies
2861 * interp.c: Do not include.
2863 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2865 * interp.c (address_translation, load_memory, store_memory,
2866 cache_op): Rename to from AddressTranslation et.al., make global,
2869 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2872 * interp.c (SignalException): Rename to signal_exception, make
2875 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2877 * sim-main.h (SignalException, SignalExceptionInterrupt,
2878 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2879 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2880 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2883 * interp.c, support.h: Use.
2885 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2887 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2888 to value_fpr / store_fpr. Add SD argument.
2889 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2890 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2892 * sim-main.h (ValueFPR, StoreFPR): Define.
2894 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2896 * interp.c (sim_engine_run): Check consistency between configure
2897 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2900 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2901 (mips_fpu): Configure WITH_FLOATING_POINT.
2902 (mips_endian): Configure WITH_TARGET_ENDIAN.
2903 * configure: Update.
2905 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * configure: Regenerated to track ../common/aclocal.m4 changes.
2909 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2911 * configure: Regenerated.
2913 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2915 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2917 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2919 * gencode.c (print_igen_insn_models): Assume certain architectures
2920 include all mips* instructions.
2921 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2924 * Makefile.in (tmp.igen): Add target. Generate igen input from
2927 * gencode.c (FEATURE_IGEN): Define.
2928 (main): Add --igen option. Generate output in igen format.
2929 (process_instructions): Format output according to igen option.
2930 (print_igen_insn_format): New function.
2931 (print_igen_insn_models): New function.
2932 (process_instructions): Only issue warnings and ignore
2933 instructions when no FEATURE_IGEN.
2935 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2937 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2940 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2942 * configure: Regenerated to track ../common/aclocal.m4 changes.
2944 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2946 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2947 SIM_RESERVED_BITS): Delete, moved to common.
2948 (SIM_EXTRA_CFLAGS): Update.
2950 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2952 * configure.in: Configure non-strict memory alignment.
2953 * configure: Regenerated to track ../common/aclocal.m4 changes.
2955 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2957 * configure: Regenerated to track ../common/aclocal.m4 changes.
2959 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2961 * gencode.c (SDBBP,DERET): Added (3900) insns.
2962 (RFE): Turn on for 3900.
2963 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2964 (dsstate): Made global.
2965 (SUBTARGET_R3900): Added.
2966 (CANCELDELAYSLOT): New.
2967 (SignalException): Ignore SystemCall rather than ignore and
2968 terminate. Add DebugBreakPoint handling.
2969 (decode_coproc): New insns RFE, DERET; and new registers Debug
2970 and DEPC protected by SUBTARGET_R3900.
2971 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2973 * Makefile.in,configure.in: Add mips subtarget option.
2974 * configure: Update.
2976 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2978 * gencode.c: Add r3900 (tx39).
2981 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2983 * gencode.c (build_instruction): Don't need to subtract 4 for
2986 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2988 * interp.c: Correct some HASFPU problems.
2990 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2992 * configure: Regenerated to track ../common/aclocal.m4 changes.
2994 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2996 * interp.c (mips_options): Fix samples option short form, should
2999 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3001 * interp.c (sim_info): Enable info code. Was just returning.
3003 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3005 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3008 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3010 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3012 (build_instruction): Ditto for LL.
3014 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3016 * configure: Regenerated to track ../common/aclocal.m4 changes.
3018 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3020 * configure: Regenerated to track ../common/aclocal.m4 changes.
3023 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3025 * interp.c (sim_open): Add call to sim_analyze_program, update
3028 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3030 * interp.c (sim_kill): Delete.
3031 (sim_create_inferior): Add ABFD argument. Set PC from same.
3032 (sim_load): Move code initializing trap handlers from here.
3033 (sim_open): To here.
3034 (sim_load): Delete, use sim-hload.c.
3036 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3038 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3040 * configure: Regenerated to track ../common/aclocal.m4 changes.
3043 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3045 * interp.c (sim_open): Add ABFD argument.
3046 (sim_load): Move call to sim_config from here.
3047 (sim_open): To here. Check return status.
3049 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3051 * gencode.c (build_instruction): Two arg MADD should
3052 not assign result to $0.
3054 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3056 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3057 * sim/mips/configure.in: Regenerate.
3059 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3061 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3062 signed8, unsigned8 et.al. types.
3064 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3065 hosts when selecting subreg.
3067 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3069 * interp.c (sim_engine_run): Reset the ZERO register to zero
3070 regardless of FEATURE_WARN_ZERO.
3071 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3073 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3075 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3076 (SignalException): For BreakPoints ignore any mode bits and just
3078 (SignalException): Always set the CAUSE register.
3080 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3082 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3083 exception has been taken.
3085 * interp.c: Implement the ERET and mt/f sr instructions.
3087 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3089 * interp.c (SignalException): Don't bother restarting an
3092 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3094 * interp.c (SignalException): Really take an interrupt.
3095 (interrupt_event): Only deliver interrupts when enabled.
3097 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3099 * interp.c (sim_info): Only print info when verbose.
3100 (sim_info) Use sim_io_printf for output.
3102 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3104 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3107 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3109 * interp.c (sim_do_command): Check for common commands if a
3110 simulator specific command fails.
3112 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3114 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3115 and simBE when DEBUG is defined.
3117 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3119 * interp.c (interrupt_event): New function. Pass exception event
3120 onto exception handler.
3122 * configure.in: Check for stdlib.h.
3123 * configure: Regenerate.
3125 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3126 variable declaration.
3127 (build_instruction): Initialize memval1.
3128 (build_instruction): Add UNUSED attribute to byte, bigend,
3130 (build_operands): Ditto.
3132 * interp.c: Fix GCC warnings.
3133 (sim_get_quit_code): Delete.
3135 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3136 * Makefile.in: Ditto.
3137 * configure: Re-generate.
3139 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3141 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3143 * interp.c (mips_option_handler): New function parse argumes using
3145 (myname): Replace with STATE_MY_NAME.
3146 (sim_open): Delete check for host endianness - performed by
3148 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3149 (sim_open): Move much of the initialization from here.
3150 (sim_load): To here. After the image has been loaded and
3152 (sim_open): Move ColdReset from here.
3153 (sim_create_inferior): To here.
3154 (sim_open): Make FP check less dependant on host endianness.
3156 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3158 * interp.c (sim_set_callbacks): Delete.
3160 * interp.c (membank, membank_base, membank_size): Replace with
3161 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3162 (sim_open): Remove call to callback->init. gdb/run do this.
3166 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3168 * interp.c (big_endian_p): Delete, replaced by
3169 current_target_byte_order.
3171 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3173 * interp.c (host_read_long, host_read_word, host_swap_word,
3174 host_swap_long): Delete. Using common sim-endian.
3175 (sim_fetch_register, sim_store_register): Use H2T.
3176 (pipeline_ticks): Delete. Handled by sim-events.
3178 (sim_engine_run): Update.
3180 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3182 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3184 (SignalException): To here. Signal using sim_engine_halt.
3185 (sim_stop_reason): Delete, moved to common.
3187 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3189 * interp.c (sim_open): Add callback argument.
3190 (sim_set_callbacks): Delete SIM_DESC argument.
3193 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3195 * Makefile.in (SIM_OBJS): Add common modules.
3197 * interp.c (sim_set_callbacks): Also set SD callback.
3198 (set_endianness, xfer_*, swap_*): Delete.
3199 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3200 Change to functions using sim-endian macros.
3201 (control_c, sim_stop): Delete, use common version.
3202 (simulate): Convert into.
3203 (sim_engine_run): This function.
3204 (sim_resume): Delete.
3206 * interp.c (simulation): New variable - the simulator object.
3207 (sim_kind): Delete global - merged into simulation.
3208 (sim_load): Cleanup. Move PC assignment from here.
3209 (sim_create_inferior): To here.
3211 * sim-main.h: New file.
3212 * interp.c (sim-main.h): Include.
3214 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3216 * configure: Regenerated to track ../common/aclocal.m4 changes.
3218 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3220 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3222 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3224 * gencode.c (build_instruction): DIV instructions: check
3225 for division by zero and integer overflow before using
3226 host's division operation.
3228 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3230 * Makefile.in (SIM_OBJS): Add sim-load.o.
3231 * interp.c: #include bfd.h.
3232 (target_byte_order): Delete.
3233 (sim_kind, myname, big_endian_p): New static locals.
3234 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3235 after argument parsing. Recognize -E arg, set endianness accordingly.
3236 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3237 load file into simulator. Set PC from bfd.
3238 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3239 (set_endianness): Use big_endian_p instead of target_byte_order.
3241 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3243 * interp.c (sim_size): Delete prototype - conflicts with
3244 definition in remote-sim.h. Correct definition.
3246 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3248 * configure: Regenerated to track ../common/aclocal.m4 changes.
3251 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3253 * interp.c (sim_open): New arg `kind'.
3255 * configure: Regenerated to track ../common/aclocal.m4 changes.
3257 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3259 * configure: Regenerated to track ../common/aclocal.m4 changes.
3261 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3263 * interp.c (sim_open): Set optind to 0 before calling getopt.
3265 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3267 * configure: Regenerated to track ../common/aclocal.m4 changes.
3269 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3271 * interp.c : Replace uses of pr_addr with pr_uword64
3272 where the bit length is always 64 independent of SIM_ADDR.
3273 (pr_uword64) : added.
3275 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3277 * configure: Re-generate.
3279 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3281 * configure: Regenerate to track ../common/aclocal.m4 changes.
3283 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3285 * interp.c (sim_open): New SIM_DESC result. Argument is now
3287 (other sim_*): New SIM_DESC argument.
3289 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3291 * interp.c: Fix printing of addresses for non-64-bit targets.
3292 (pr_addr): Add function to print address based on size.
3294 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3296 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3298 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3300 * gencode.c (build_mips16_operands): Correct computation of base
3301 address for extended PC relative instruction.
3303 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3305 * interp.c (mips16_entry): Add support for floating point cases.
3306 (SignalException): Pass floating point cases to mips16_entry.
3307 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3309 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3311 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3312 and then set the state to fmt_uninterpreted.
3313 (COP_SW): Temporarily set the state to fmt_word while calling
3316 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3318 * gencode.c (build_instruction): The high order may be set in the
3319 comparison flags at any ISA level, not just ISA 4.
3321 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3323 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3324 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3325 * configure.in: sinclude ../common/aclocal.m4.
3326 * configure: Regenerated.
3328 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3330 * configure: Rebuild after change to aclocal.m4.
3332 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3334 * configure configure.in Makefile.in: Update to new configure
3335 scheme which is more compatible with WinGDB builds.
3336 * configure.in: Improve comment on how to run autoconf.
3337 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3338 * Makefile.in: Use autoconf substitution to install common
3341 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3343 * gencode.c (build_instruction): Use BigEndianCPU instead of
3346 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3348 * interp.c (sim_monitor): Make output to stdout visible in
3349 wingdb's I/O log window.
3351 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3353 * support.h: Undo previous change to SIGTRAP
3356 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3358 * interp.c (store_word, load_word): New static functions.
3359 (mips16_entry): New static function.
3360 (SignalException): Look for mips16 entry and exit instructions.
3361 (simulate): Use the correct index when setting fpr_state after
3362 doing a pending move.
3364 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3366 * interp.c: Fix byte-swapping code throughout to work on
3367 both little- and big-endian hosts.
3369 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3371 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3372 with gdb/config/i386/xm-windows.h.
3374 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3376 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3377 that messes up arithmetic shifts.
3379 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3381 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3382 SIGTRAP and SIGQUIT for _WIN32.
3384 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3386 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3387 force a 64 bit multiplication.
3388 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3389 destination register is 0, since that is the default mips16 nop
3392 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3394 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3395 (build_endian_shift): Don't check proc64.
3396 (build_instruction): Always set memval to uword64. Cast op2 to
3397 uword64 when shifting it left in memory instructions. Always use
3398 the same code for stores--don't special case proc64.
3400 * gencode.c (build_mips16_operands): Fix base PC value for PC
3402 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3404 * interp.c (simJALDELAYSLOT): Define.
3405 (JALDELAYSLOT): Define.
3406 (INDELAYSLOT, INJALDELAYSLOT): Define.
3407 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3409 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3411 * interp.c (sim_open): add flush_cache as a PMON routine
3412 (sim_monitor): handle flush_cache by ignoring it
3414 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3416 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3418 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3419 (BigEndianMem): Rename to ByteSwapMem and change sense.
3420 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3421 BigEndianMem references to !ByteSwapMem.
3422 (set_endianness): New function, with prototype.
3423 (sim_open): Call set_endianness.
3424 (sim_info): Use simBE instead of BigEndianMem.
3425 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3426 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3427 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3428 ifdefs, keeping the prototype declaration.
3429 (swap_word): Rewrite correctly.
3430 (ColdReset): Delete references to CONFIG. Delete endianness related
3431 code; moved to set_endianness.
3433 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3435 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3436 * interp.c (CHECKHILO): Define away.
3437 (simSIGINT): New macro.
3438 (membank_size): Increase from 1MB to 2MB.
3439 (control_c): New function.
3440 (sim_resume): Rename parameter signal to signal_number. Add local
3441 variable prev. Call signal before and after simulate.
3442 (sim_stop_reason): Add simSIGINT support.
3443 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3445 (sim_warning): Delete call to SignalException. Do call printf_filtered
3447 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3448 a call to sim_warning.
3450 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3452 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3453 16 bit instructions.
3455 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3457 Add support for mips16 (16 bit MIPS implementation):
3458 * gencode.c (inst_type): Add mips16 instruction encoding types.
3459 (GETDATASIZEINSN): Define.
3460 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3461 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3463 (MIPS16_DECODE): New table, for mips16 instructions.
3464 (bitmap_val): New static function.
3465 (struct mips16_op): Define.
3466 (mips16_op_table): New table, for mips16 operands.
3467 (build_mips16_operands): New static function.
3468 (process_instructions): If PC is odd, decode a mips16
3469 instruction. Break out instruction handling into new
3470 build_instruction function.
3471 (build_instruction): New static function, broken out of
3472 process_instructions. Check modifiers rather than flags for SHIFT
3473 bit count and m[ft]{hi,lo} direction.
3474 (usage): Pass program name to fprintf.
3475 (main): Remove unused variable this_option_optind. Change
3476 ``*loptarg++'' to ``loptarg++''.
3477 (my_strtoul): Parenthesize && within ||.
3478 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3479 (simulate): If PC is odd, fetch a 16 bit instruction, and
3480 increment PC by 2 rather than 4.
3481 * configure.in: Add case for mips16*-*-*.
3482 * configure: Rebuild.
3484 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3486 * interp.c: Allow -t to enable tracing in standalone simulator.
3487 Fix garbage output in trace file and error messages.
3489 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3491 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3492 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3493 * configure.in: Simplify using macros in ../common/aclocal.m4.
3494 * configure: Regenerated.
3495 * tconfig.in: New file.
3497 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3499 * interp.c: Fix bugs in 64-bit port.
3500 Use ansi function declarations for msvc compiler.
3501 Initialize and test file pointer in trace code.
3502 Prevent duplicate definition of LAST_EMED_REGNUM.
3504 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3506 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3508 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3510 * interp.c (SignalException): Check for explicit terminating
3512 * gencode.c: Pass instruction value through SignalException()
3513 calls for Trap, Breakpoint and Syscall.
3515 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3517 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3518 only used on those hosts that provide it.
3519 * configure.in: Add sqrt() to list of functions to be checked for.
3520 * config.in: Re-generated.
3521 * configure: Re-generated.
3523 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3525 * gencode.c (process_instructions): Call build_endian_shift when
3526 expanding STORE RIGHT, to fix swr.
3527 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3528 clear the high bits.
3529 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3530 Fix float to int conversions to produce signed values.
3532 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3534 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3535 (process_instructions): Correct handling of nor instruction.
3536 Correct shift count for 32 bit shift instructions. Correct sign
3537 extension for arithmetic shifts to not shift the number of bits in
3538 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3539 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3541 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3542 It's OK to have a mult follow a mult. What's not OK is to have a
3543 mult follow an mfhi.
3544 (Convert): Comment out incorrect rounding code.
3546 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3548 * interp.c (sim_monitor): Improved monitor printf
3549 simulation. Tidied up simulator warnings, and added "--log" option
3550 for directing warning message output.
3551 * gencode.c: Use sim_warning() rather than WARNING macro.
3553 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3555 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3556 getopt1.o, rather than on gencode.c. Link objects together.
3557 Don't link against -liberty.
3558 (gencode.o, getopt.o, getopt1.o): New targets.
3559 * gencode.c: Include <ctype.h> and "ansidecl.h".
3560 (AND): Undefine after including "ansidecl.h".
3561 (ULONG_MAX): Define if not defined.
3562 (OP_*): Don't define macros; now defined in opcode/mips.h.
3563 (main): Call my_strtoul rather than strtoul.
3564 (my_strtoul): New static function.
3566 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3568 * gencode.c (process_instructions): Generate word64 and uword64
3569 instead of `long long' and `unsigned long long' data types.
3570 * interp.c: #include sysdep.h to get signals, and define default
3572 * (Convert): Work around for Visual-C++ compiler bug with type
3574 * support.h: Make things compile under Visual-C++ by using
3575 __int64 instead of `long long'. Change many refs to long long
3576 into word64/uword64 typedefs.
3578 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3580 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3581 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3583 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3584 (AC_PROG_INSTALL): Added.
3585 (AC_PROG_CC): Moved to before configure.host call.
3586 * configure: Rebuilt.
3588 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3590 * configure.in: Define @SIMCONF@ depending on mips target.
3591 * configure: Rebuild.
3592 * Makefile.in (run): Add @SIMCONF@ to control simulator
3594 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3595 * interp.c: Remove some debugging, provide more detailed error
3596 messages, update memory accesses to use LOADDRMASK.
3598 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3600 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3601 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3603 * configure: Rebuild.
3604 * config.in: New file, generated by autoheader.
3605 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3606 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3607 HAVE_ANINT and HAVE_AINT, as appropriate.
3608 * Makefile.in (run): Use @LIBS@ rather than -lm.
3609 (interp.o): Depend upon config.h.
3610 (Makefile): Just rebuild Makefile.
3611 (clean): Remove stamp-h.
3612 (mostlyclean): Make the same as clean, not as distclean.
3613 (config.h, stamp-h): New targets.
3615 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3617 * interp.c (ColdReset): Fix boolean test. Make all simulator
3620 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3622 * interp.c (xfer_direct_word, xfer_direct_long,
3623 swap_direct_word, swap_direct_long, xfer_big_word,
3624 xfer_big_long, xfer_little_word, xfer_little_long,
3625 swap_word,swap_long): Added.
3626 * interp.c (ColdReset): Provide function indirection to
3627 host<->simulated_target transfer routines.
3628 * interp.c (sim_store_register, sim_fetch_register): Updated to
3629 make use of indirected transfer routines.
3631 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3633 * gencode.c (process_instructions): Ensure FP ABS instruction
3635 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3636 system call support.
3638 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3640 * interp.c (sim_do_command): Complain if callback structure not
3643 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3645 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3646 support for Sun hosts.
3647 * Makefile.in (gencode): Ensure the host compiler and libraries
3648 used for cross-hosted build.
3650 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3652 * interp.c, gencode.c: Some more (TODO) tidying.
3654 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3656 * gencode.c, interp.c: Replaced explicit long long references with
3657 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3658 * support.h (SET64LO, SET64HI): Macros added.
3660 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3662 * configure: Regenerate with autoconf 2.7.
3664 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3666 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3667 * support.h: Remove superfluous "1" from #if.
3668 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3670 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3672 * interp.c (StoreFPR): Control UndefinedResult() call on
3673 WARN_RESULT manifest.
3675 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3677 * gencode.c: Tidied instruction decoding, and added FP instruction
3680 * interp.c: Added dineroIII, and BSD profiling support. Also
3681 run-time FP handling.
3683 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3685 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3686 gencode.c, interp.c, support.h: created.
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