1 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
3 * configure: Regenerated to track ../common/aclocal.m4 changes.
5 2005-01-07 Andrew Cagney <cagney@gnu.org>
7 * configure.ac: Rename configure.in, require autoconf 2.59.
8 * configure: Re-generate.
10 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
12 * configure: Regenerate for ../common/aclocal.m4 update.
14 2004-09-24 Monika Chaddha <monika@acmet.com>
16 Committed by Andrew Cagney.
17 * m16.igen (CMP, CMPI): Fix assembler.
19 2004-08-18 Chris Demetriou <cgd@broadcom.com>
21 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
22 * configure: Regenerate.
24 2004-06-25 Chris Demetriou <cgd@broadcom.com>
26 * configure.in (sim_m16_machine): Include mipsIII.
27 * configure: Regenerate.
29 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
31 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
33 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
35 2004-04-10 Chris Demetriou <cgd@broadcom.com>
37 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
39 2004-04-09 Chris Demetriou <cgd@broadcom.com>
41 * mips.igen (check_fmt): Remove.
42 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
43 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
44 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
45 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
46 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
47 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
48 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
49 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
50 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
51 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
53 2004-04-09 Chris Demetriou <cgd@broadcom.com>
55 * sb1.igen (check_sbx): New function.
56 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
58 2004-03-29 Chris Demetriou <cgd@broadcom.com>
59 Richard Sandiford <rsandifo@redhat.com>
61 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
62 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
63 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
64 separate implementations for mipsIV and mipsV. Use new macros to
65 determine whether the restrictions apply.
67 2004-01-19 Chris Demetriou <cgd@broadcom.com>
69 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
70 (check_mult_hilo): Improve comments.
71 (check_div_hilo): Likewise. Also, fork off a new version
72 to handle mips32/mips64 (since there are no hazards to check
75 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
77 * mips.igen (do_dmultx): Fix check for negative operands.
79 2003-05-16 Ian Lance Taylor <ian@airs.com>
81 * Makefile.in (SHELL): Make sure this is defined.
82 (various): Use $(SHELL) whenever we invoke move-if-change.
84 2003-05-03 Chris Demetriou <cgd@broadcom.com>
86 * cp1.c: Tweak attribution slightly.
89 * mdmx.igen: Likewise.
90 * mips3d.igen: Likewise.
93 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
95 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
98 2003-02-27 Andrew Cagney <cagney@redhat.com>
100 * interp.c (sim_open): Rename _bfd to bfd.
101 (sim_create_inferior): Ditto.
103 2003-01-14 Chris Demetriou <cgd@broadcom.com>
105 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
107 2003-01-14 Chris Demetriou <cgd@broadcom.com>
109 * mips.igen (EI, DI): Remove.
111 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
113 * Makefile.in (tmp-run-multi): Fix mips16 filter.
115 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
116 Andrew Cagney <ac131313@redhat.com>
117 Gavin Romig-Koch <gavin@redhat.com>
118 Graydon Hoare <graydon@redhat.com>
119 Aldy Hernandez <aldyh@redhat.com>
120 Dave Brolley <brolley@redhat.com>
121 Chris Demetriou <cgd@broadcom.com>
123 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
124 (sim_mach_default): New variable.
125 (mips64vr-*-*, mips64vrel-*-*): New configurations.
126 Add a new simulator generator, MULTI.
127 * configure: Regenerate.
128 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
129 (multi-run.o): New dependency.
130 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
131 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
132 (tmp-multi): Combine them.
133 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
134 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
135 (distclean-extra): New rule.
136 * sim-main.h: Include bfd.h.
137 (MIPS_MACH): New macro.
138 * mips.igen (vr4120, vr5400, vr5500): New models.
139 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
140 * vr.igen: Replace with new version.
142 2003-01-04 Chris Demetriou <cgd@broadcom.com>
144 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
145 * configure: Regenerate.
147 2002-12-31 Chris Demetriou <cgd@broadcom.com>
149 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
150 * mips.igen: Remove all invocations of check_branch_bug and
153 2002-12-16 Chris Demetriou <cgd@broadcom.com>
155 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
157 2002-07-30 Chris Demetriou <cgd@broadcom.com>
159 * mips.igen (do_load_double, do_store_double): New functions.
160 (LDC1, SDC1): Rename to...
161 (LDC1b, SDC1b): respectively.
162 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
164 2002-07-29 Michael Snyder <msnyder@redhat.com>
166 * cp1.c (fp_recip2): Modify initialization expression so that
167 GCC will recognize it as constant.
169 2002-06-18 Chris Demetriou <cgd@broadcom.com>
171 * mdmx.c (SD_): Delete.
172 (Unpredictable): Re-define, for now, to directly invoke
173 unpredictable_action().
174 (mdmx_acc_op): Fix error in .ob immediate handling.
176 2002-06-18 Andrew Cagney <cagney@redhat.com>
178 * interp.c (sim_firmware_command): Initialize `address'.
180 2002-06-16 Andrew Cagney <ac131313@redhat.com>
182 * configure: Regenerated to track ../common/aclocal.m4 changes.
184 2002-06-14 Chris Demetriou <cgd@broadcom.com>
185 Ed Satterthwaite <ehs@broadcom.com>
187 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
188 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
189 * mips.igen: Include mips3d.igen.
190 (mips3d): New model name for MIPS-3D ASE instructions.
191 (CVT.W.fmt): Don't use this instruction for word (source) format
193 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
194 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
195 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
196 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
197 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
198 (RSquareRoot1, RSquareRoot2): New macros.
199 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
200 (fp_rsqrt2): New functions.
201 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
202 * configure: Regenerate.
204 2002-06-13 Chris Demetriou <cgd@broadcom.com>
205 Ed Satterthwaite <ehs@broadcom.com>
207 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
208 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
209 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
210 (convert): Note that this function is not used for paired-single
212 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
213 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
214 (check_fmt_p): Enable paired-single support.
215 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
216 (PUU.PS): New instructions.
217 (CVT.S.fmt): Don't use this instruction for paired-single format
219 * sim-main.h (FP_formats): New value 'fmt_ps.'
220 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
221 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
223 2002-06-12 Chris Demetriou <cgd@broadcom.com>
225 * mips.igen: Fix formatting of function calls in
228 2002-06-12 Chris Demetriou <cgd@broadcom.com>
230 * mips.igen (MOVN, MOVZ): Trace result.
231 (TNEI): Print "tnei" as the opcode name in traces.
232 (CEIL.W): Add disassembly string for traces.
233 (RSQRT.fmt): Make location of disassembly string consistent
234 with other instructions.
236 2002-06-12 Chris Demetriou <cgd@broadcom.com>
238 * mips.igen (X): Delete unused function.
240 2002-06-08 Andrew Cagney <cagney@redhat.com>
242 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
244 2002-06-07 Chris Demetriou <cgd@broadcom.com>
245 Ed Satterthwaite <ehs@broadcom.com>
247 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
248 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
249 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
250 (fp_nmsub): New prototypes.
251 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
252 (NegMultiplySub): New defines.
253 * mips.igen (RSQRT.fmt): Use RSquareRoot().
254 (MADD.D, MADD.S): Replace with...
255 (MADD.fmt): New instruction.
256 (MSUB.D, MSUB.S): Replace with...
257 (MSUB.fmt): New instruction.
258 (NMADD.D, NMADD.S): Replace with...
259 (NMADD.fmt): New instruction.
260 (NMSUB.D, MSUB.S): Replace with...
261 (NMSUB.fmt): New instruction.
263 2002-06-07 Chris Demetriou <cgd@broadcom.com>
264 Ed Satterthwaite <ehs@broadcom.com>
266 * cp1.c: Fix more comment spelling and formatting.
267 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
268 (denorm_mode): New function.
269 (fpu_unary, fpu_binary): Round results after operation, collect
270 status from rounding operations, and update the FCSR.
271 (convert): Collect status from integer conversions and rounding
272 operations, and update the FCSR. Adjust NaN values that result
273 from conversions. Convert to use sim_io_eprintf rather than
274 fprintf, and remove some debugging code.
275 * cp1.h (fenr_FS): New define.
277 2002-06-07 Chris Demetriou <cgd@broadcom.com>
279 * cp1.c (convert): Remove unusable debugging code, and move MIPS
280 rounding mode to sim FP rounding mode flag conversion code into...
281 (rounding_mode): New function.
283 2002-06-07 Chris Demetriou <cgd@broadcom.com>
285 * cp1.c: Clean up formatting of a few comments.
286 (value_fpr): Reformat switch statement.
288 2002-06-06 Chris Demetriou <cgd@broadcom.com>
289 Ed Satterthwaite <ehs@broadcom.com>
292 * sim-main.h: Include cp1.h.
293 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
294 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
295 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
296 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
297 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
298 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
299 * cp1.c: Don't include sim-fpu.h; already included by
300 sim-main.h. Clean up formatting of some comments.
301 (NaN, Equal, Less): Remove.
302 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
303 (fp_cmp): New functions.
304 * mips.igen (do_c_cond_fmt): Remove.
305 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
306 Compare. Add result tracing.
307 (CxC1): Remove, replace with...
308 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
309 (DMxC1): Remove, replace with...
310 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
311 (MxC1): Remove, replace with...
312 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
314 2002-06-04 Chris Demetriou <cgd@broadcom.com>
316 * sim-main.h (FGRIDX): Remove, replace all uses with...
317 (FGR_BASE): New macro.
318 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
319 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
320 (NR_FGR, FGR): Likewise.
321 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
322 * mips.igen: Likewise.
324 2002-06-04 Chris Demetriou <cgd@broadcom.com>
326 * cp1.c: Add an FSF Copyright notice to this file.
328 2002-06-04 Chris Demetriou <cgd@broadcom.com>
329 Ed Satterthwaite <ehs@broadcom.com>
331 * cp1.c (Infinity): Remove.
332 * sim-main.h (Infinity): Likewise.
334 * cp1.c (fp_unary, fp_binary): New functions.
335 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
336 (fp_sqrt): New functions, implemented in terms of the above.
337 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
338 (Recip, SquareRoot): Remove (replaced by functions above).
339 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
340 (fp_recip, fp_sqrt): New prototypes.
341 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
342 (Recip, SquareRoot): Replace prototypes with #defines which
343 invoke the functions above.
345 2002-06-03 Chris Demetriou <cgd@broadcom.com>
347 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
348 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
349 file, remove PARAMS from prototypes.
350 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
351 simulator state arguments.
352 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
353 pass simulator state arguments.
354 * cp1.c (SD): Redefine as CPU_STATE(cpu).
355 (store_fpr, convert): Remove 'sd' argument.
356 (value_fpr): Likewise. Convert to use 'SD' instead.
358 2002-06-03 Chris Demetriou <cgd@broadcom.com>
360 * cp1.c (Min, Max): Remove #if 0'd functions.
361 * sim-main.h (Min, Max): Remove.
363 2002-06-03 Chris Demetriou <cgd@broadcom.com>
365 * cp1.c: fix formatting of switch case and default labels.
366 * interp.c: Likewise.
367 * sim-main.c: Likewise.
369 2002-06-03 Chris Demetriou <cgd@broadcom.com>
371 * cp1.c: Clean up comments which describe FP formats.
372 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
374 2002-06-03 Chris Demetriou <cgd@broadcom.com>
375 Ed Satterthwaite <ehs@broadcom.com>
377 * configure.in (mipsisa64sb1*-*-*): New target for supporting
378 Broadcom SiByte SB-1 processor configurations.
379 * configure: Regenerate.
380 * sb1.igen: New file.
381 * mips.igen: Include sb1.igen.
383 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
384 * mdmx.igen: Add "sb1" model to all appropriate functions and
386 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
387 (ob_func, ob_acc): Reference the above.
388 (qh_acc): Adjust to keep the same size as ob_acc.
389 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
390 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
392 2002-06-03 Chris Demetriou <cgd@broadcom.com>
394 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
396 2002-06-02 Chris Demetriou <cgd@broadcom.com>
397 Ed Satterthwaite <ehs@broadcom.com>
399 * mips.igen (mdmx): New (pseudo-)model.
400 * mdmx.c, mdmx.igen: New files.
401 * Makefile.in (SIM_OBJS): Add mdmx.o.
402 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
404 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
405 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
406 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
407 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
408 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
409 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
410 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
411 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
412 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
413 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
414 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
415 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
416 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
417 (qh_fmtsel): New macros.
418 (_sim_cpu): New member "acc".
419 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
420 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
422 2002-05-01 Chris Demetriou <cgd@broadcom.com>
424 * interp.c: Use 'deprecated' rather than 'depreciated.'
425 * sim-main.h: Likewise.
427 2002-05-01 Chris Demetriou <cgd@broadcom.com>
429 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
430 which wouldn't compile anyway.
431 * sim-main.h (unpredictable_action): New function prototype.
432 (Unpredictable): Define to call igen function unpredictable().
433 (NotWordValue): New macro to call igen function not_word_value().
434 (UndefinedResult): Remove.
435 * interp.c (undefined_result): Remove.
436 (unpredictable_action): New function.
437 * mips.igen (not_word_value, unpredictable): New functions.
438 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
439 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
440 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
441 NotWordValue() to check for unpredictable inputs, then
442 Unpredictable() to handle them.
444 2002-02-24 Chris Demetriou <cgd@broadcom.com>
446 * mips.igen: Fix formatting of calls to Unpredictable().
448 2002-04-20 Andrew Cagney <ac131313@redhat.com>
450 * interp.c (sim_open): Revert previous change.
452 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
454 * interp.c (sim_open): Disable chunk of code that wrote code in
455 vector table entries.
457 2002-03-19 Chris Demetriou <cgd@broadcom.com>
459 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
460 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
463 2002-03-19 Chris Demetriou <cgd@broadcom.com>
465 * cp1.c: Fix many formatting issues.
467 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
469 * cp1.c (fpu_format_name): New function to replace...
470 (DOFMT): This. Delete, and update all callers.
471 (fpu_rounding_mode_name): New function to replace...
472 (RMMODE): This. Delete, and update all callers.
474 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
476 * interp.c: Move FPU support routines from here to...
477 * cp1.c: Here. New file.
478 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
481 2002-03-12 Chris Demetriou <cgd@broadcom.com>
483 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
484 * mips.igen (mips32, mips64): New models, add to all instructions
485 and functions as appropriate.
486 (loadstore_ea, check_u64): New variant for model mips64.
487 (check_fmt_p): New variant for models mipsV and mips64, remove
488 mipsV model marking fro other variant.
491 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
492 for mips32 and mips64.
493 (DCLO, DCLZ): New instructions for mips64.
495 2002-03-07 Chris Demetriou <cgd@broadcom.com>
497 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
498 immediate or code as a hex value with the "%#lx" format.
499 (ANDI): Likewise, and fix printed instruction name.
501 2002-03-05 Chris Demetriou <cgd@broadcom.com>
503 * sim-main.h (UndefinedResult, Unpredictable): New macros
504 which currently do nothing.
506 2002-03-05 Chris Demetriou <cgd@broadcom.com>
508 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
509 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
510 (status_CU3): New definitions.
512 * sim-main.h (ExceptionCause): Add new values for MIPS32
513 and MIPS64: MDMX, MCheck, CacheErr. Update comments
514 for DebugBreakPoint and NMIReset to note their status in
516 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
517 (SignalExceptionCacheErr): New exception macros.
519 2002-03-05 Chris Demetriou <cgd@broadcom.com>
521 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
522 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
524 (SignalExceptionCoProcessorUnusable): Take as argument the
525 unusable coprocessor number.
527 2002-03-05 Chris Demetriou <cgd@broadcom.com>
529 * mips.igen: Fix formatting of all SignalException calls.
531 2002-03-05 Chris Demetriou <cgd@broadcom.com>
533 * sim-main.h (SIGNEXTEND): Remove.
535 2002-03-04 Chris Demetriou <cgd@broadcom.com>
537 * mips.igen: Remove gencode comment from top of file, fix
538 spelling in another comment.
540 2002-03-04 Chris Demetriou <cgd@broadcom.com>
542 * mips.igen (check_fmt, check_fmt_p): New functions to check
543 whether specific floating point formats are usable.
544 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
545 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
546 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
547 Use the new functions.
548 (do_c_cond_fmt): Remove format checks...
549 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
551 2002-03-03 Chris Demetriou <cgd@broadcom.com>
553 * mips.igen: Fix formatting of check_fpu calls.
555 2002-03-03 Chris Demetriou <cgd@broadcom.com>
557 * mips.igen (FLOOR.L.fmt): Store correct destination register.
559 2002-03-03 Chris Demetriou <cgd@broadcom.com>
561 * mips.igen: Remove whitespace at end of lines.
563 2002-03-02 Chris Demetriou <cgd@broadcom.com>
565 * mips.igen (loadstore_ea): New function to do effective
566 address calculations.
567 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
568 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
569 CACHE): Use loadstore_ea to do effective address computations.
571 2002-03-02 Chris Demetriou <cgd@broadcom.com>
573 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
574 * mips.igen (LL, CxC1, MxC1): Likewise.
576 2002-03-02 Chris Demetriou <cgd@broadcom.com>
578 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
579 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
580 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
581 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
582 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
583 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
584 Don't split opcode fields by hand, use the opcode field values
587 2002-03-01 Chris Demetriou <cgd@broadcom.com>
589 * mips.igen (do_divu): Fix spacing.
591 * mips.igen (do_dsllv): Move to be right before DSLLV,
592 to match the rest of the do_<shift> functions.
594 2002-03-01 Chris Demetriou <cgd@broadcom.com>
596 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
597 DSRL32, do_dsrlv): Trace inputs and results.
599 2002-03-01 Chris Demetriou <cgd@broadcom.com>
601 * mips.igen (CACHE): Provide instruction-printing string.
603 * interp.c (signal_exception): Comment tokens after #endif.
605 2002-02-28 Chris Demetriou <cgd@broadcom.com>
607 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
608 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
609 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
610 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
611 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
612 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
613 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
614 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
616 2002-02-28 Chris Demetriou <cgd@broadcom.com>
618 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
619 instruction-printing string.
620 (LWU): Use '64' as the filter flag.
622 2002-02-28 Chris Demetriou <cgd@broadcom.com>
624 * mips.igen (SDXC1): Fix instruction-printing string.
626 2002-02-28 Chris Demetriou <cgd@broadcom.com>
628 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
631 2002-02-27 Chris Demetriou <cgd@broadcom.com>
633 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
636 2002-02-27 Chris Demetriou <cgd@broadcom.com>
638 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
639 add a comma) so that it more closely match the MIPS ISA
640 documentation opcode partitioning.
641 (PREF): Put useful names on opcode fields, and include
642 instruction-printing string.
644 2002-02-27 Chris Demetriou <cgd@broadcom.com>
646 * mips.igen (check_u64): New function which in the future will
647 check whether 64-bit instructions are usable and signal an
648 exception if not. Currently a no-op.
649 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
650 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
651 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
652 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
654 * mips.igen (check_fpu): New function which in the future will
655 check whether FPU instructions are usable and signal an exception
656 if not. Currently a no-op.
657 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
658 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
659 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
660 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
661 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
662 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
663 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
664 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
666 2002-02-27 Chris Demetriou <cgd@broadcom.com>
668 * mips.igen (do_load_left, do_load_right): Move to be immediately
670 (do_store_left, do_store_right): Move to be immediately following
673 2002-02-27 Chris Demetriou <cgd@broadcom.com>
675 * mips.igen (mipsV): New model name. Also, add it to
676 all instructions and functions where it is appropriate.
678 2002-02-18 Chris Demetriou <cgd@broadcom.com>
680 * mips.igen: For all functions and instructions, list model
681 names that support that instruction one per line.
683 2002-02-11 Chris Demetriou <cgd@broadcom.com>
685 * mips.igen: Add some additional comments about supported
686 models, and about which instructions go where.
687 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
688 order as is used in the rest of the file.
690 2002-02-11 Chris Demetriou <cgd@broadcom.com>
692 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
693 indicating that ALU32_END or ALU64_END are there to check
695 (DADD): Likewise, but also remove previous comment about
698 2002-02-10 Chris Demetriou <cgd@broadcom.com>
700 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
701 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
702 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
703 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
704 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
705 fields (i.e., add and move commas) so that they more closely
706 match the MIPS ISA documentation opcode partitioning.
708 2002-02-10 Chris Demetriou <cgd@broadcom.com>
710 * mips.igen (ADDI): Print immediate value.
712 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
713 (SLL): Print "nop" specially, and don't run the code
714 that does the shift for the "nop" case.
716 2001-11-17 Fred Fish <fnf@redhat.com>
718 * sim-main.h (float_operation): Move enum declaration outside
719 of _sim_cpu struct declaration.
721 2001-04-12 Jim Blandy <jimb@redhat.com>
723 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
724 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
726 * sim-main.h (COCIDX): Remove definition; this isn't supported by
727 PENDING_FILL, and you can get the intended effect gracefully by
728 calling PENDING_SCHED directly.
730 2001-02-23 Ben Elliston <bje@redhat.com>
732 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
733 already defined elsewhere.
735 2001-02-19 Ben Elliston <bje@redhat.com>
737 * sim-main.h (sim_monitor): Return an int.
738 * interp.c (sim_monitor): Add return values.
739 (signal_exception): Handle error conditions from sim_monitor.
741 2001-02-08 Ben Elliston <bje@redhat.com>
743 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
744 (store_memory): Likewise, pass cia to sim_core_write*.
746 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
748 On advice from Chris G. Demetriou <cgd@sibyte.com>:
749 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
751 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
753 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
754 * Makefile.in: Don't delete *.igen when cleaning directory.
756 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
758 * m16.igen (break): Call SignalException not sim_engine_halt.
760 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
763 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
765 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
767 * mips.igen (MxC1, DMxC1): Fix printf formatting.
769 2000-05-24 Michael Hayes <mhayes@cygnus.com>
771 * mips.igen (do_dmultx): Fix typo.
773 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
775 * configure: Regenerated to track ../common/aclocal.m4 changes.
777 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
779 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
781 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
783 * sim-main.h (GPR_CLEAR): Define macro.
785 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
787 * interp.c (decode_coproc): Output long using %lx and not %s.
789 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
791 * interp.c (sim_open): Sort & extend dummy memory regions for
792 --board=jmr3904 for eCos.
794 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
796 * configure: Regenerated.
798 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
800 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
801 calls, conditional on the simulator being in verbose mode.
803 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
805 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
806 cache don't get ReservedInstruction traps.
808 1999-11-29 Mark Salter <msalter@cygnus.com>
810 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
811 to clear status bits in sdisr register. This is how the hardware works.
813 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
814 being used by cygmon.
816 1999-11-11 Andrew Haley <aph@cygnus.com>
818 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
821 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
823 * mips.igen (MULT): Correct previous mis-applied patch.
825 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
827 * mips.igen (delayslot32): Handle sequence like
828 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
829 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
830 (MULT): Actually pass the third register...
832 1999-09-03 Mark Salter <msalter@cygnus.com>
834 * interp.c (sim_open): Added more memory aliases for additional
835 hardware being touched by cygmon on jmr3904 board.
837 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
839 * configure: Regenerated to track ../common/aclocal.m4 changes.
841 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
843 * interp.c (sim_store_register): Handle case where client - GDB -
844 specifies that a 4 byte register is 8 bytes in size.
845 (sim_fetch_register): Ditto.
847 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
849 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
850 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
851 (idt_monitor_base): Base address for IDT monitor traps.
852 (pmon_monitor_base): Ditto for PMON.
853 (lsipmon_monitor_base): Ditto for LSI PMON.
854 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
855 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
856 (sim_firmware_command): New function.
857 (mips_option_handler): Call it for OPTION_FIRMWARE.
858 (sim_open): Allocate memory for idt_monitor region. If "--board"
859 option was given, add no monitor by default. Add BREAK hooks only if
860 monitors are also there.
862 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
864 * interp.c (sim_monitor): Flush output before reading input.
866 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
868 * tconfig.in (SIM_HANDLES_LMA): Always define.
870 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
872 From Mark Salter <msalter@cygnus.com>:
873 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
874 (sim_open): Add setup for BSP board.
876 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
878 * mips.igen (MULT, MULTU): Add syntax for two operand version.
879 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
880 them as unimplemented.
882 1999-05-08 Felix Lee <flee@cygnus.com>
884 * configure: Regenerated to track ../common/aclocal.m4 changes.
886 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
888 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
890 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
892 * configure.in: Any mips64vr5*-*-* target should have
893 -DTARGET_ENABLE_FR=1.
894 (default_endian): Any mips64vr*el-*-* target should default to
896 * configure: Re-generate.
898 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
900 * mips.igen (ldl): Extend from _16_, not 32.
902 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
904 * interp.c (sim_store_register): Force registers written to by GDB
905 into an un-interpreted state.
907 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
909 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
910 CPU, start periodic background I/O polls.
911 (tx3904sio_poll): New function: periodic I/O poller.
913 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
915 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
917 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
919 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
922 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
924 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
925 (load_word): Call SIM_CORE_SIGNAL hook on error.
926 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
927 starting. For exception dispatching, pass PC instead of NULL_CIA.
928 (decode_coproc): Use COP0_BADVADDR to store faulting address.
929 * sim-main.h (COP0_BADVADDR): Define.
930 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
931 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
932 (_sim_cpu): Add exc_* fields to store register value snapshots.
933 * mips.igen (*): Replace memory-related SignalException* calls
934 with references to SIM_CORE_SIGNAL hook.
936 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
938 * sim-main.c (*): Minor warning cleanups.
940 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
942 * m16.igen (DADDIU5): Correct type-o.
944 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
946 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
949 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
951 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
953 (interp.o): Add dependency on itable.h
954 (oengine.c, gencode): Delete remaining references.
955 (BUILT_SRC_FROM_GEN): Clean up.
957 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
960 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
961 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
963 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
964 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
965 Drop the "64" qualifier to get the HACK generator working.
966 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
967 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
968 qualifier to get the hack generator working.
969 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
971 (DSLLV): Use do_dsllv.
974 (DSRLV): Use do_dsrlv.
975 (BC1): Move *vr4100 to get the HACK generator working.
976 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
977 get the HACK generator working.
978 (MACC) Rename to get the HACK generator working.
979 (DMACC,MACCS,DMACCS): Add the 64.
981 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
983 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
984 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
986 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
988 * mips/interp.c (DEBUG): Cleanups.
990 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
992 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
993 (tx3904sio_tickle): fflush after a stdout character output.
995 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
997 * interp.c (sim_close): Uninstall modules.
999 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1001 * sim-main.h, interp.c (sim_monitor): Change to global
1004 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1006 * configure.in (vr4100): Only include vr4100 instructions in
1008 * configure: Re-generate.
1009 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1011 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1013 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1014 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1017 * configure.in (sim_default_gen, sim_use_gen): Replace with
1019 (--enable-sim-igen): Delete config option. Always using IGEN.
1020 * configure: Re-generate.
1022 * Makefile.in (gencode): Kill, kill, kill.
1025 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1027 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1028 bit mips16 igen simulator.
1029 * configure: Re-generate.
1031 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1032 as part of vr4100 ISA.
1033 * vr.igen: Mark all instructions as 64 bit only.
1035 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1037 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1040 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1042 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1043 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1044 * configure: Re-generate.
1046 * m16.igen (BREAK): Define breakpoint instruction.
1047 (JALX32): Mark instruction as mips16 and not r3900.
1048 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1050 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1052 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1054 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1055 insn as a debug breakpoint.
1057 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1059 (PENDING_SCHED): Clean up trace statement.
1060 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1061 (PENDING_FILL): Delay write by only one cycle.
1062 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1064 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1066 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1068 (pending_tick): Move incrementing of index to FOR statement.
1069 (pending_tick): Only update PENDING_OUT after a write has occured.
1071 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1073 * configure: Re-generate.
1075 * interp.c (sim_engine_run OLD): Delete explicit call to
1076 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1078 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1080 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1081 interrupt level number to match changed SignalExceptionInterrupt
1084 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1086 * interp.c: #include "itable.h" if WITH_IGEN.
1087 (get_insn_name): New function.
1088 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1089 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1091 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1093 * configure: Rebuilt to inhale new common/aclocal.m4.
1095 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1097 * dv-tx3904sio.c: Include sim-assert.h.
1099 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1101 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1102 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1103 Reorganize target-specific sim-hardware checks.
1104 * configure: rebuilt.
1105 * interp.c (sim_open): For tx39 target boards, set
1106 OPERATING_ENVIRONMENT, add tx3904sio devices.
1107 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1108 ROM executables. Install dv-sockser into sim-modules list.
1110 * dv-tx3904irc.c: Compiler warning clean-up.
1111 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1112 frequent hw-trace messages.
1114 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1116 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1118 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1120 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1122 * vr.igen: New file.
1123 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1124 * mips.igen: Define vr4100 model. Include vr.igen.
1125 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1127 * mips.igen (check_mf_hilo): Correct check.
1129 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1131 * sim-main.h (interrupt_event): Add prototype.
1133 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1134 register_ptr, register_value.
1135 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1137 * sim-main.h (tracefh): Make extern.
1139 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1141 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1142 Reduce unnecessarily high timer event frequency.
1143 * dv-tx3904cpu.c: Ditto for interrupt event.
1145 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1147 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1149 (interrupt_event): Made non-static.
1151 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1152 interchange of configuration values for external vs. internal
1155 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1157 * mips.igen (BREAK): Moved code to here for
1158 simulator-reserved break instructions.
1159 * gencode.c (build_instruction): Ditto.
1160 * interp.c (signal_exception): Code moved from here. Non-
1161 reserved instructions now use exception vector, rather
1163 * sim-main.h: Moved magic constants to here.
1165 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1167 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1168 register upon non-zero interrupt event level, clear upon zero
1170 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1171 by passing zero event value.
1172 (*_io_{read,write}_buffer): Endianness fixes.
1173 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1174 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1176 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1177 serial I/O and timer module at base address 0xFFFF0000.
1179 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1181 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1184 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1186 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1188 * configure: Update.
1190 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1192 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1193 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1194 * configure.in: Include tx3904tmr in hw_device list.
1195 * configure: Rebuilt.
1196 * interp.c (sim_open): Instantiate three timer instances.
1197 Fix address typo of tx3904irc instance.
1199 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1201 * interp.c (signal_exception): SystemCall exception now uses
1202 the exception vector.
1204 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1206 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1209 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1211 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1213 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1215 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1217 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1218 sim-main.h. Declare a struct hw_descriptor instead of struct
1219 hw_device_descriptor.
1221 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1223 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1224 right bits and then re-align left hand bytes to correct byte
1225 lanes. Fix incorrect computation in do_store_left when loading
1226 bytes from second word.
1228 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1230 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1231 * interp.c (sim_open): Only create a device tree when HW is
1234 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1235 * interp.c (signal_exception): Ditto.
1237 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1239 * gencode.c: Mark BEGEZALL as LIKELY.
1241 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1243 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1244 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1246 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1248 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1249 modules. Recognize TX39 target with "mips*tx39" pattern.
1250 * configure: Rebuilt.
1251 * sim-main.h (*): Added many macros defining bits in
1252 TX39 control registers.
1253 (SignalInterrupt): Send actual PC instead of NULL.
1254 (SignalNMIReset): New exception type.
1255 * interp.c (board): New variable for future use to identify
1256 a particular board being simulated.
1257 (mips_option_handler,mips_options): Added "--board" option.
1258 (interrupt_event): Send actual PC.
1259 (sim_open): Make memory layout conditional on board setting.
1260 (signal_exception): Initial implementation of hardware interrupt
1261 handling. Accept another break instruction variant for simulator
1263 (decode_coproc): Implement RFE instruction for TX39.
1264 (mips.igen): Decode RFE instruction as such.
1265 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1266 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1267 bbegin to implement memory map.
1268 * dv-tx3904cpu.c: New file.
1269 * dv-tx3904irc.c: New file.
1271 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1273 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1275 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1277 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1278 with calls to check_div_hilo.
1280 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1282 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1283 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1284 Add special r3900 version of do_mult_hilo.
1285 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1286 with calls to check_mult_hilo.
1287 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1288 with calls to check_div_hilo.
1290 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1292 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1293 Document a replacement.
1295 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1297 * interp.c (sim_monitor): Make mon_printf work.
1299 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1301 * sim-main.h (INSN_NAME): New arg `cpu'.
1303 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1305 * configure: Regenerated to track ../common/aclocal.m4 changes.
1307 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1309 * configure: Regenerated to track ../common/aclocal.m4 changes.
1312 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1314 * acconfig.h: New file.
1315 * configure.in: Reverted change of Apr 24; use sinclude again.
1317 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1319 * configure: Regenerated to track ../common/aclocal.m4 changes.
1322 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1324 * configure.in: Don't call sinclude.
1326 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1328 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1330 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1332 * mips.igen (ERET): Implement.
1334 * interp.c (decode_coproc): Return sign-extended EPC.
1336 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1338 * interp.c (signal_exception): Do not ignore Trap.
1339 (signal_exception): On TRAP, restart at exception address.
1340 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1341 (signal_exception): Update.
1342 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1343 so that TRAP instructions are caught.
1345 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1347 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1348 contains HI/LO access history.
1349 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1350 (HIACCESS, LOACCESS): Delete, replace with
1351 (HIHISTORY, LOHISTORY): New macros.
1352 (CHECKHILO): Delete all, moved to mips.igen
1354 * gencode.c (build_instruction): Do not generate checks for
1355 correct HI/LO register usage.
1357 * interp.c (old_engine_run): Delete checks for correct HI/LO
1360 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1361 check_mf_cycles): New functions.
1362 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1363 do_divu, domultx, do_mult, do_multu): Use.
1365 * tx.igen ("madd", "maddu"): Use.
1367 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1369 * mips.igen (DSRAV): Use function do_dsrav.
1370 (SRAV): Use new function do_srav.
1372 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1373 (B): Sign extend 11 bit immediate.
1374 (EXT-B*): Shift 16 bit immediate left by 1.
1375 (ADDIU*): Don't sign extend immediate value.
1377 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1379 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1381 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1384 * mips.igen (delayslot32, nullify_next_insn): New functions.
1385 (m16.igen): Always include.
1386 (do_*): Add more tracing.
1388 * m16.igen (delayslot16): Add NIA argument, could be called by a
1389 32 bit MIPS16 instruction.
1391 * interp.c (ifetch16): Move function from here.
1392 * sim-main.c (ifetch16): To here.
1394 * sim-main.c (ifetch16, ifetch32): Update to match current
1395 implementations of LH, LW.
1396 (signal_exception): Don't print out incorrect hex value of illegal
1399 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1401 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1404 * m16.igen: Implement MIPS16 instructions.
1406 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1407 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1408 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1409 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1410 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1411 bodies of corresponding code from 32 bit insn to these. Also used
1412 by MIPS16 versions of functions.
1414 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1415 (IMEM16): Drop NR argument from macro.
1417 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1419 * Makefile.in (SIM_OBJS): Add sim-main.o.
1421 * sim-main.h (address_translation, load_memory, store_memory,
1422 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1424 (pr_addr, pr_uword64): Declare.
1425 (sim-main.c): Include when H_REVEALS_MODULE_P.
1427 * interp.c (address_translation, load_memory, store_memory,
1428 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1430 * sim-main.c: To here. Fix compilation problems.
1432 * configure.in: Enable inlining.
1433 * configure: Re-config.
1435 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1437 * configure: Regenerated to track ../common/aclocal.m4 changes.
1439 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1441 * mips.igen: Include tx.igen.
1442 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1443 * tx.igen: New file, contains MADD and MADDU.
1445 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1446 the hardwired constant `7'.
1447 (store_memory): Ditto.
1448 (LOADDRMASK): Move definition to sim-main.h.
1450 mips.igen (MTC0): Enable for r3900.
1453 mips.igen (do_load_byte): Delete.
1454 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1455 do_store_right): New functions.
1456 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1458 configure.in: Let the tx39 use igen again.
1461 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1463 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1464 not an address sized quantity. Return zero for cache sizes.
1466 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1468 * mips.igen (r3900): r3900 does not support 64 bit integer
1471 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1473 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1475 * configure : Rebuild.
1477 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1479 * configure: Regenerated to track ../common/aclocal.m4 changes.
1481 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1483 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1485 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1487 * configure: Regenerated to track ../common/aclocal.m4 changes.
1488 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1490 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1492 * configure: Regenerated to track ../common/aclocal.m4 changes.
1494 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1496 * interp.c (Max, Min): Comment out functions. Not yet used.
1498 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1500 * configure: Regenerated to track ../common/aclocal.m4 changes.
1502 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1504 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1505 configurable settings for stand-alone simulator.
1507 * configure.in: Added X11 search, just in case.
1509 * configure: Regenerated.
1511 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1513 * interp.c (sim_write, sim_read, load_memory, store_memory):
1514 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1516 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1518 * sim-main.h (GETFCC): Return an unsigned value.
1520 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1522 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1523 (DADD): Result destination is RD not RT.
1525 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1527 * sim-main.h (HIACCESS, LOACCESS): Always define.
1529 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1531 * interp.c (sim_info): Delete.
1533 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1535 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1536 (mips_option_handler): New argument `cpu'.
1537 (sim_open): Update call to sim_add_option_table.
1539 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1541 * mips.igen (CxC1): Add tracing.
1543 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1545 * sim-main.h (Max, Min): Declare.
1547 * interp.c (Max, Min): New functions.
1549 * mips.igen (BC1): Add tracing.
1551 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1553 * interp.c Added memory map for stack in vr4100
1555 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1557 * interp.c (load_memory): Add missing "break"'s.
1559 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1561 * interp.c (sim_store_register, sim_fetch_register): Pass in
1562 length parameter. Return -1.
1564 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1566 * interp.c: Added hardware init hook, fixed warnings.
1568 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1570 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1572 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1574 * interp.c (ifetch16): New function.
1576 * sim-main.h (IMEM32): Rename IMEM.
1577 (IMEM16_IMMED): Define.
1579 (DELAY_SLOT): Update.
1581 * m16run.c (sim_engine_run): New file.
1583 * m16.igen: All instructions except LB.
1584 (LB): Call do_load_byte.
1585 * mips.igen (do_load_byte): New function.
1586 (LB): Call do_load_byte.
1588 * mips.igen: Move spec for insn bit size and high bit from here.
1589 * Makefile.in (tmp-igen, tmp-m16): To here.
1591 * m16.dc: New file, decode mips16 instructions.
1593 * Makefile.in (SIM_NO_ALL): Define.
1594 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1596 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1598 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1599 point unit to 32 bit registers.
1600 * configure: Re-generate.
1602 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1604 * configure.in (sim_use_gen): Make IGEN the default simulator
1605 generator for generic 32 and 64 bit mips targets.
1606 * configure: Re-generate.
1608 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1610 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1613 * interp.c (sim_fetch_register, sim_store_register): Read/write
1614 FGR from correct location.
1615 (sim_open): Set size of FGR's according to
1616 WITH_TARGET_FLOATING_POINT_BITSIZE.
1618 * sim-main.h (FGR): Store floating point registers in a separate
1621 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1623 * configure: Regenerated to track ../common/aclocal.m4 changes.
1625 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1627 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1629 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1631 * interp.c (pending_tick): New function. Deliver pending writes.
1633 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1634 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1635 it can handle mixed sized quantites and single bits.
1637 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1639 * interp.c (oengine.h): Do not include when building with IGEN.
1640 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1641 (sim_info): Ditto for PROCESSOR_64BIT.
1642 (sim_monitor): Replace ut_reg with unsigned_word.
1643 (*): Ditto for t_reg.
1644 (LOADDRMASK): Define.
1645 (sim_open): Remove defunct check that host FP is IEEE compliant,
1646 using software to emulate floating point.
1647 (value_fpr, ...): Always compile, was conditional on HASFPU.
1649 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1651 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1654 * interp.c (SD, CPU): Define.
1655 (mips_option_handler): Set flags in each CPU.
1656 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1657 (sim_close): Do not clear STATE, deleted anyway.
1658 (sim_write, sim_read): Assume CPU zero's vm should be used for
1660 (sim_create_inferior): Set the PC for all processors.
1661 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1663 (mips16_entry): Pass correct nr of args to store_word, load_word.
1664 (ColdReset): Cold reset all cpu's.
1665 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1666 (sim_monitor, load_memory, store_memory, signal_exception): Use
1667 `CPU' instead of STATE_CPU.
1670 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1673 * sim-main.h (signal_exception): Add sim_cpu arg.
1674 (SignalException*): Pass both SD and CPU to signal_exception.
1675 * interp.c (signal_exception): Update.
1677 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1679 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1680 address_translation): Ditto
1681 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1683 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1685 * configure: Regenerated to track ../common/aclocal.m4 changes.
1687 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1689 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1691 * mips.igen (model): Map processor names onto BFD name.
1693 * sim-main.h (CPU_CIA): Delete.
1694 (SET_CIA, GET_CIA): Define
1696 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1698 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1701 * configure.in (default_endian): Configure a big-endian simulator
1703 * configure: Re-generate.
1705 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1707 * configure: Regenerated to track ../common/aclocal.m4 changes.
1709 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1711 * interp.c (sim_monitor): Handle Densan monitor outbyte
1712 and inbyte functions.
1714 1997-12-29 Felix Lee <flee@cygnus.com>
1716 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1718 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1720 * Makefile.in (tmp-igen): Arrange for $zero to always be
1721 reset to zero after every instruction.
1723 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1725 * configure: Regenerated to track ../common/aclocal.m4 changes.
1728 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1730 * mips.igen (MSUB): Fix to work like MADD.
1731 * gencode.c (MSUB): Similarly.
1733 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1735 * configure: Regenerated to track ../common/aclocal.m4 changes.
1737 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1739 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1741 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1743 * sim-main.h (sim-fpu.h): Include.
1745 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1746 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1747 using host independant sim_fpu module.
1749 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1751 * interp.c (signal_exception): Report internal errors with SIGABRT
1754 * sim-main.h (C0_CONFIG): New register.
1755 (signal.h): No longer include.
1757 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1759 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1761 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1763 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1765 * mips.igen: Tag vr5000 instructions.
1766 (ANDI): Was missing mipsIV model, fix assembler syntax.
1767 (do_c_cond_fmt): New function.
1768 (C.cond.fmt): Handle mips I-III which do not support CC field
1770 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1771 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1773 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1774 vr5000 which saves LO in a GPR separatly.
1776 * configure.in (enable-sim-igen): For vr5000, select vr5000
1777 specific instructions.
1778 * configure: Re-generate.
1780 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1782 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1784 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1785 fmt_uninterpreted_64 bit cases to switch. Convert to
1788 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1790 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1791 as specified in IV3.2 spec.
1792 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1794 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1796 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1797 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1798 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1799 PENDING_FILL versions of instructions. Simplify.
1801 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1803 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1805 (MTHI, MFHI): Disable code checking HI-LO.
1807 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1809 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1811 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1813 * gencode.c (build_mips16_operands): Replace IPC with cia.
1815 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1816 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1818 (UndefinedResult): Replace function with macro/function
1820 (sim_engine_run): Don't save PC in IPC.
1822 * sim-main.h (IPC): Delete.
1825 * interp.c (signal_exception, store_word, load_word,
1826 address_translation, load_memory, store_memory, cache_op,
1827 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1828 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1829 current instruction address - cia - argument.
1830 (sim_read, sim_write): Call address_translation directly.
1831 (sim_engine_run): Rename variable vaddr to cia.
1832 (signal_exception): Pass cia to sim_monitor
1834 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1835 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1836 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1838 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1839 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1842 * interp.c (signal_exception): Pass restart address to
1845 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1846 idecode.o): Add dependency.
1848 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1850 (DELAY_SLOT): Update NIA not PC with branch address.
1851 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1853 * mips.igen: Use CIA not PC in branch calculations.
1854 (illegal): Call SignalException.
1855 (BEQ, ADDIU): Fix assembler.
1857 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1859 * m16.igen (JALX): Was missing.
1861 * configure.in (enable-sim-igen): New configuration option.
1862 * configure: Re-generate.
1864 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1866 * interp.c (load_memory, store_memory): Delete parameter RAW.
1867 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1868 bypassing {load,store}_memory.
1870 * sim-main.h (ByteSwapMem): Delete definition.
1872 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1874 * interp.c (sim_do_command, sim_commands): Delete mips specific
1875 commands. Handled by module sim-options.
1877 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1878 (WITH_MODULO_MEMORY): Define.
1880 * interp.c (sim_info): Delete code printing memory size.
1882 * interp.c (mips_size): Nee sim_size, delete function.
1884 (monitor, monitor_base, monitor_size): Delete global variables.
1885 (sim_open, sim_close): Delete code creating monitor and other
1886 memory regions. Use sim-memopts module, via sim_do_commandf, to
1887 manage memory regions.
1888 (load_memory, store_memory): Use sim-core for memory model.
1890 * interp.c (address_translation): Delete all memory map code
1891 except line forcing 32 bit addresses.
1893 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1895 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1898 * interp.c (logfh, logfile): Delete globals.
1899 (sim_open, sim_close): Delete code opening & closing log file.
1900 (mips_option_handler): Delete -l and -n options.
1901 (OPTION mips_options): Ditto.
1903 * interp.c (OPTION mips_options): Rename option trace to dinero.
1904 (mips_option_handler): Update.
1906 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1908 * interp.c (fetch_str): New function.
1909 (sim_monitor): Rewrite using sim_read & sim_write.
1910 (sim_open): Check magic number.
1911 (sim_open): Write monitor vectors into memory using sim_write.
1912 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1913 (sim_read, sim_write): Simplify - transfer data one byte at a
1915 (load_memory, store_memory): Clarify meaning of parameter RAW.
1917 * sim-main.h (isHOST): Defete definition.
1918 (isTARGET): Mark as depreciated.
1919 (address_translation): Delete parameter HOST.
1921 * interp.c (address_translation): Delete parameter HOST.
1923 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1927 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1928 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1930 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1932 * mips.igen: Add model filter field to records.
1934 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1936 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1938 interp.c (sim_engine_run): Do not compile function sim_engine_run
1939 when WITH_IGEN == 1.
1941 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1942 target architecture.
1944 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1945 igen. Replace with configuration variables sim_igen_flags /
1948 * m16.igen: New file. Copy mips16 insns here.
1949 * mips.igen: From here.
1951 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1953 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1955 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1957 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1959 * gencode.c (build_instruction): Follow sim_write's lead in using
1960 BigEndianMem instead of !ByteSwapMem.
1962 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1964 * configure.in (sim_gen): Dependent on target, select type of
1965 generator. Always select old style generator.
1967 configure: Re-generate.
1969 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1971 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1972 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1973 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1974 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1975 SIM_@sim_gen@_*, set by autoconf.
1977 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1979 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1981 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1982 CURRENT_FLOATING_POINT instead.
1984 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1985 (address_translation): Raise exception InstructionFetch when
1986 translation fails and isINSTRUCTION.
1988 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1989 sim_engine_run): Change type of of vaddr and paddr to
1991 (address_translation, prefetch, load_memory, store_memory,
1992 cache_op): Change type of vAddr and pAddr to address_word.
1994 * gencode.c (build_instruction): Change type of vaddr and paddr to
1997 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1999 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2000 macro to obtain result of ALU op.
2002 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2004 * interp.c (sim_info): Call profile_print.
2006 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2008 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2010 * sim-main.h (WITH_PROFILE): Do not define, defined in
2011 common/sim-config.h. Use sim-profile module.
2012 (simPROFILE): Delete defintion.
2014 * interp.c (PROFILE): Delete definition.
2015 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2016 (sim_close): Delete code writing profile histogram.
2017 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2019 (sim_engine_run): Delete code profiling the PC.
2021 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2023 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2025 * interp.c (sim_monitor): Make register pointers of type
2028 * sim-main.h: Make registers of type unsigned_word not
2031 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2033 * interp.c (sync_operation): Rename from SyncOperation, make
2034 global, add SD argument.
2035 (prefetch): Rename from Prefetch, make global, add SD argument.
2036 (decode_coproc): Make global.
2038 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2040 * gencode.c (build_instruction): Generate DecodeCoproc not
2041 decode_coproc calls.
2043 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2044 (SizeFGR): Move to sim-main.h
2045 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2046 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2047 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2049 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2050 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2051 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2052 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2053 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2054 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2056 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2058 (sim-alu.h): Include.
2059 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2060 (sim_cia): Typedef to instruction_address.
2062 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2064 * Makefile.in (interp.o): Rename generated file engine.c to
2069 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2071 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2073 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2075 * gencode.c (build_instruction): For "FPSQRT", output correct
2076 number of arguments to Recip.
2078 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2080 * Makefile.in (interp.o): Depends on sim-main.h
2082 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2084 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2085 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2086 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2087 STATE, DSSTATE): Define
2088 (GPR, FGRIDX, ..): Define.
2090 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2091 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2092 (GPR, FGRIDX, ...): Delete macros.
2094 * interp.c: Update names to match defines from sim-main.h
2096 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2098 * interp.c (sim_monitor): Add SD argument.
2099 (sim_warning): Delete. Replace calls with calls to
2101 (sim_error): Delete. Replace calls with sim_io_error.
2102 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2103 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2104 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2106 (mips_size): Rename from sim_size. Add SD argument.
2108 * interp.c (simulator): Delete global variable.
2109 (callback): Delete global variable.
2110 (mips_option_handler, sim_open, sim_write, sim_read,
2111 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2112 sim_size,sim_monitor): Use sim_io_* not callback->*.
2113 (sim_open): ZALLOC simulator struct.
2114 (PROFILE): Do not define.
2116 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2118 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2119 support.h with corresponding code.
2121 * sim-main.h (word64, uword64), support.h: Move definition to
2123 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2126 * Makefile.in: Update dependencies
2127 * interp.c: Do not include.
2129 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2131 * interp.c (address_translation, load_memory, store_memory,
2132 cache_op): Rename to from AddressTranslation et.al., make global,
2135 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2138 * interp.c (SignalException): Rename to signal_exception, make
2141 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2143 * sim-main.h (SignalException, SignalExceptionInterrupt,
2144 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2145 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2146 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2149 * interp.c, support.h: Use.
2151 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2153 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2154 to value_fpr / store_fpr. Add SD argument.
2155 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2156 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2158 * sim-main.h (ValueFPR, StoreFPR): Define.
2160 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2162 * interp.c (sim_engine_run): Check consistency between configure
2163 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2166 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2167 (mips_fpu): Configure WITH_FLOATING_POINT.
2168 (mips_endian): Configure WITH_TARGET_ENDIAN.
2169 * configure: Update.
2171 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2173 * configure: Regenerated to track ../common/aclocal.m4 changes.
2175 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2177 * configure: Regenerated.
2179 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2181 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2183 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2185 * gencode.c (print_igen_insn_models): Assume certain architectures
2186 include all mips* instructions.
2187 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2190 * Makefile.in (tmp.igen): Add target. Generate igen input from
2193 * gencode.c (FEATURE_IGEN): Define.
2194 (main): Add --igen option. Generate output in igen format.
2195 (process_instructions): Format output according to igen option.
2196 (print_igen_insn_format): New function.
2197 (print_igen_insn_models): New function.
2198 (process_instructions): Only issue warnings and ignore
2199 instructions when no FEATURE_IGEN.
2201 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2203 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2206 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2208 * configure: Regenerated to track ../common/aclocal.m4 changes.
2210 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2212 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2213 SIM_RESERVED_BITS): Delete, moved to common.
2214 (SIM_EXTRA_CFLAGS): Update.
2216 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2218 * configure.in: Configure non-strict memory alignment.
2219 * configure: Regenerated to track ../common/aclocal.m4 changes.
2221 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2223 * configure: Regenerated to track ../common/aclocal.m4 changes.
2225 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2227 * gencode.c (SDBBP,DERET): Added (3900) insns.
2228 (RFE): Turn on for 3900.
2229 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2230 (dsstate): Made global.
2231 (SUBTARGET_R3900): Added.
2232 (CANCELDELAYSLOT): New.
2233 (SignalException): Ignore SystemCall rather than ignore and
2234 terminate. Add DebugBreakPoint handling.
2235 (decode_coproc): New insns RFE, DERET; and new registers Debug
2236 and DEPC protected by SUBTARGET_R3900.
2237 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2239 * Makefile.in,configure.in: Add mips subtarget option.
2240 * configure: Update.
2242 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2244 * gencode.c: Add r3900 (tx39).
2247 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2249 * gencode.c (build_instruction): Don't need to subtract 4 for
2252 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2254 * interp.c: Correct some HASFPU problems.
2256 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2258 * configure: Regenerated to track ../common/aclocal.m4 changes.
2260 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2262 * interp.c (mips_options): Fix samples option short form, should
2265 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2267 * interp.c (sim_info): Enable info code. Was just returning.
2269 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2271 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2274 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2276 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2278 (build_instruction): Ditto for LL.
2280 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2282 * configure: Regenerated to track ../common/aclocal.m4 changes.
2284 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2286 * configure: Regenerated to track ../common/aclocal.m4 changes.
2289 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2291 * interp.c (sim_open): Add call to sim_analyze_program, update
2294 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2296 * interp.c (sim_kill): Delete.
2297 (sim_create_inferior): Add ABFD argument. Set PC from same.
2298 (sim_load): Move code initializing trap handlers from here.
2299 (sim_open): To here.
2300 (sim_load): Delete, use sim-hload.c.
2302 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2304 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2306 * configure: Regenerated to track ../common/aclocal.m4 changes.
2309 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2311 * interp.c (sim_open): Add ABFD argument.
2312 (sim_load): Move call to sim_config from here.
2313 (sim_open): To here. Check return status.
2315 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2317 * gencode.c (build_instruction): Two arg MADD should
2318 not assign result to $0.
2320 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2322 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2323 * sim/mips/configure.in: Regenerate.
2325 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2327 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2328 signed8, unsigned8 et.al. types.
2330 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2331 hosts when selecting subreg.
2333 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2335 * interp.c (sim_engine_run): Reset the ZERO register to zero
2336 regardless of FEATURE_WARN_ZERO.
2337 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2339 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2341 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2342 (SignalException): For BreakPoints ignore any mode bits and just
2344 (SignalException): Always set the CAUSE register.
2346 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2348 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2349 exception has been taken.
2351 * interp.c: Implement the ERET and mt/f sr instructions.
2353 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2355 * interp.c (SignalException): Don't bother restarting an
2358 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2360 * interp.c (SignalException): Really take an interrupt.
2361 (interrupt_event): Only deliver interrupts when enabled.
2363 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2365 * interp.c (sim_info): Only print info when verbose.
2366 (sim_info) Use sim_io_printf for output.
2368 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2370 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2373 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2375 * interp.c (sim_do_command): Check for common commands if a
2376 simulator specific command fails.
2378 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2380 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2381 and simBE when DEBUG is defined.
2383 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2385 * interp.c (interrupt_event): New function. Pass exception event
2386 onto exception handler.
2388 * configure.in: Check for stdlib.h.
2389 * configure: Regenerate.
2391 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2392 variable declaration.
2393 (build_instruction): Initialize memval1.
2394 (build_instruction): Add UNUSED attribute to byte, bigend,
2396 (build_operands): Ditto.
2398 * interp.c: Fix GCC warnings.
2399 (sim_get_quit_code): Delete.
2401 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2402 * Makefile.in: Ditto.
2403 * configure: Re-generate.
2405 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2407 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2409 * interp.c (mips_option_handler): New function parse argumes using
2411 (myname): Replace with STATE_MY_NAME.
2412 (sim_open): Delete check for host endianness - performed by
2414 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2415 (sim_open): Move much of the initialization from here.
2416 (sim_load): To here. After the image has been loaded and
2418 (sim_open): Move ColdReset from here.
2419 (sim_create_inferior): To here.
2420 (sim_open): Make FP check less dependant on host endianness.
2422 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2424 * interp.c (sim_set_callbacks): Delete.
2426 * interp.c (membank, membank_base, membank_size): Replace with
2427 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2428 (sim_open): Remove call to callback->init. gdb/run do this.
2432 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2434 * interp.c (big_endian_p): Delete, replaced by
2435 current_target_byte_order.
2437 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2439 * interp.c (host_read_long, host_read_word, host_swap_word,
2440 host_swap_long): Delete. Using common sim-endian.
2441 (sim_fetch_register, sim_store_register): Use H2T.
2442 (pipeline_ticks): Delete. Handled by sim-events.
2444 (sim_engine_run): Update.
2446 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2448 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2450 (SignalException): To here. Signal using sim_engine_halt.
2451 (sim_stop_reason): Delete, moved to common.
2453 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2455 * interp.c (sim_open): Add callback argument.
2456 (sim_set_callbacks): Delete SIM_DESC argument.
2459 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2461 * Makefile.in (SIM_OBJS): Add common modules.
2463 * interp.c (sim_set_callbacks): Also set SD callback.
2464 (set_endianness, xfer_*, swap_*): Delete.
2465 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2466 Change to functions using sim-endian macros.
2467 (control_c, sim_stop): Delete, use common version.
2468 (simulate): Convert into.
2469 (sim_engine_run): This function.
2470 (sim_resume): Delete.
2472 * interp.c (simulation): New variable - the simulator object.
2473 (sim_kind): Delete global - merged into simulation.
2474 (sim_load): Cleanup. Move PC assignment from here.
2475 (sim_create_inferior): To here.
2477 * sim-main.h: New file.
2478 * interp.c (sim-main.h): Include.
2480 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2482 * configure: Regenerated to track ../common/aclocal.m4 changes.
2484 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2486 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2488 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2490 * gencode.c (build_instruction): DIV instructions: check
2491 for division by zero and integer overflow before using
2492 host's division operation.
2494 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2496 * Makefile.in (SIM_OBJS): Add sim-load.o.
2497 * interp.c: #include bfd.h.
2498 (target_byte_order): Delete.
2499 (sim_kind, myname, big_endian_p): New static locals.
2500 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2501 after argument parsing. Recognize -E arg, set endianness accordingly.
2502 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2503 load file into simulator. Set PC from bfd.
2504 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2505 (set_endianness): Use big_endian_p instead of target_byte_order.
2507 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2509 * interp.c (sim_size): Delete prototype - conflicts with
2510 definition in remote-sim.h. Correct definition.
2512 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2514 * configure: Regenerated to track ../common/aclocal.m4 changes.
2517 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2519 * interp.c (sim_open): New arg `kind'.
2521 * configure: Regenerated to track ../common/aclocal.m4 changes.
2523 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2525 * configure: Regenerated to track ../common/aclocal.m4 changes.
2527 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2529 * interp.c (sim_open): Set optind to 0 before calling getopt.
2531 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2533 * configure: Regenerated to track ../common/aclocal.m4 changes.
2535 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2537 * interp.c : Replace uses of pr_addr with pr_uword64
2538 where the bit length is always 64 independent of SIM_ADDR.
2539 (pr_uword64) : added.
2541 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2543 * configure: Re-generate.
2545 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2547 * configure: Regenerate to track ../common/aclocal.m4 changes.
2549 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2551 * interp.c (sim_open): New SIM_DESC result. Argument is now
2553 (other sim_*): New SIM_DESC argument.
2555 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2557 * interp.c: Fix printing of addresses for non-64-bit targets.
2558 (pr_addr): Add function to print address based on size.
2560 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2562 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2564 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2566 * gencode.c (build_mips16_operands): Correct computation of base
2567 address for extended PC relative instruction.
2569 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2571 * interp.c (mips16_entry): Add support for floating point cases.
2572 (SignalException): Pass floating point cases to mips16_entry.
2573 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2575 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2577 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2578 and then set the state to fmt_uninterpreted.
2579 (COP_SW): Temporarily set the state to fmt_word while calling
2582 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2584 * gencode.c (build_instruction): The high order may be set in the
2585 comparison flags at any ISA level, not just ISA 4.
2587 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2589 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2590 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2591 * configure.in: sinclude ../common/aclocal.m4.
2592 * configure: Regenerated.
2594 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2596 * configure: Rebuild after change to aclocal.m4.
2598 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2600 * configure configure.in Makefile.in: Update to new configure
2601 scheme which is more compatible with WinGDB builds.
2602 * configure.in: Improve comment on how to run autoconf.
2603 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2604 * Makefile.in: Use autoconf substitution to install common
2607 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2609 * gencode.c (build_instruction): Use BigEndianCPU instead of
2612 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2614 * interp.c (sim_monitor): Make output to stdout visible in
2615 wingdb's I/O log window.
2617 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2619 * support.h: Undo previous change to SIGTRAP
2622 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2624 * interp.c (store_word, load_word): New static functions.
2625 (mips16_entry): New static function.
2626 (SignalException): Look for mips16 entry and exit instructions.
2627 (simulate): Use the correct index when setting fpr_state after
2628 doing a pending move.
2630 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2632 * interp.c: Fix byte-swapping code throughout to work on
2633 both little- and big-endian hosts.
2635 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2637 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2638 with gdb/config/i386/xm-windows.h.
2640 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2642 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2643 that messes up arithmetic shifts.
2645 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2647 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2648 SIGTRAP and SIGQUIT for _WIN32.
2650 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2652 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2653 force a 64 bit multiplication.
2654 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2655 destination register is 0, since that is the default mips16 nop
2658 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2660 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2661 (build_endian_shift): Don't check proc64.
2662 (build_instruction): Always set memval to uword64. Cast op2 to
2663 uword64 when shifting it left in memory instructions. Always use
2664 the same code for stores--don't special case proc64.
2666 * gencode.c (build_mips16_operands): Fix base PC value for PC
2668 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2670 * interp.c (simJALDELAYSLOT): Define.
2671 (JALDELAYSLOT): Define.
2672 (INDELAYSLOT, INJALDELAYSLOT): Define.
2673 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2675 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2677 * interp.c (sim_open): add flush_cache as a PMON routine
2678 (sim_monitor): handle flush_cache by ignoring it
2680 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2682 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2684 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2685 (BigEndianMem): Rename to ByteSwapMem and change sense.
2686 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2687 BigEndianMem references to !ByteSwapMem.
2688 (set_endianness): New function, with prototype.
2689 (sim_open): Call set_endianness.
2690 (sim_info): Use simBE instead of BigEndianMem.
2691 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2692 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2693 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2694 ifdefs, keeping the prototype declaration.
2695 (swap_word): Rewrite correctly.
2696 (ColdReset): Delete references to CONFIG. Delete endianness related
2697 code; moved to set_endianness.
2699 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2701 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2702 * interp.c (CHECKHILO): Define away.
2703 (simSIGINT): New macro.
2704 (membank_size): Increase from 1MB to 2MB.
2705 (control_c): New function.
2706 (sim_resume): Rename parameter signal to signal_number. Add local
2707 variable prev. Call signal before and after simulate.
2708 (sim_stop_reason): Add simSIGINT support.
2709 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2711 (sim_warning): Delete call to SignalException. Do call printf_filtered
2713 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2714 a call to sim_warning.
2716 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2718 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2719 16 bit instructions.
2721 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2723 Add support for mips16 (16 bit MIPS implementation):
2724 * gencode.c (inst_type): Add mips16 instruction encoding types.
2725 (GETDATASIZEINSN): Define.
2726 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2727 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2729 (MIPS16_DECODE): New table, for mips16 instructions.
2730 (bitmap_val): New static function.
2731 (struct mips16_op): Define.
2732 (mips16_op_table): New table, for mips16 operands.
2733 (build_mips16_operands): New static function.
2734 (process_instructions): If PC is odd, decode a mips16
2735 instruction. Break out instruction handling into new
2736 build_instruction function.
2737 (build_instruction): New static function, broken out of
2738 process_instructions. Check modifiers rather than flags for SHIFT
2739 bit count and m[ft]{hi,lo} direction.
2740 (usage): Pass program name to fprintf.
2741 (main): Remove unused variable this_option_optind. Change
2742 ``*loptarg++'' to ``loptarg++''.
2743 (my_strtoul): Parenthesize && within ||.
2744 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2745 (simulate): If PC is odd, fetch a 16 bit instruction, and
2746 increment PC by 2 rather than 4.
2747 * configure.in: Add case for mips16*-*-*.
2748 * configure: Rebuild.
2750 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2752 * interp.c: Allow -t to enable tracing in standalone simulator.
2753 Fix garbage output in trace file and error messages.
2755 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2757 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2758 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2759 * configure.in: Simplify using macros in ../common/aclocal.m4.
2760 * configure: Regenerated.
2761 * tconfig.in: New file.
2763 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2765 * interp.c: Fix bugs in 64-bit port.
2766 Use ansi function declarations for msvc compiler.
2767 Initialize and test file pointer in trace code.
2768 Prevent duplicate definition of LAST_EMED_REGNUM.
2770 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2772 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2774 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2776 * interp.c (SignalException): Check for explicit terminating
2778 * gencode.c: Pass instruction value through SignalException()
2779 calls for Trap, Breakpoint and Syscall.
2781 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2783 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2784 only used on those hosts that provide it.
2785 * configure.in: Add sqrt() to list of functions to be checked for.
2786 * config.in: Re-generated.
2787 * configure: Re-generated.
2789 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2791 * gencode.c (process_instructions): Call build_endian_shift when
2792 expanding STORE RIGHT, to fix swr.
2793 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2794 clear the high bits.
2795 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2796 Fix float to int conversions to produce signed values.
2798 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2800 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2801 (process_instructions): Correct handling of nor instruction.
2802 Correct shift count for 32 bit shift instructions. Correct sign
2803 extension for arithmetic shifts to not shift the number of bits in
2804 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2805 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2807 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2808 It's OK to have a mult follow a mult. What's not OK is to have a
2809 mult follow an mfhi.
2810 (Convert): Comment out incorrect rounding code.
2812 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2814 * interp.c (sim_monitor): Improved monitor printf
2815 simulation. Tidied up simulator warnings, and added "--log" option
2816 for directing warning message output.
2817 * gencode.c: Use sim_warning() rather than WARNING macro.
2819 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2821 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2822 getopt1.o, rather than on gencode.c. Link objects together.
2823 Don't link against -liberty.
2824 (gencode.o, getopt.o, getopt1.o): New targets.
2825 * gencode.c: Include <ctype.h> and "ansidecl.h".
2826 (AND): Undefine after including "ansidecl.h".
2827 (ULONG_MAX): Define if not defined.
2828 (OP_*): Don't define macros; now defined in opcode/mips.h.
2829 (main): Call my_strtoul rather than strtoul.
2830 (my_strtoul): New static function.
2832 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2834 * gencode.c (process_instructions): Generate word64 and uword64
2835 instead of `long long' and `unsigned long long' data types.
2836 * interp.c: #include sysdep.h to get signals, and define default
2838 * (Convert): Work around for Visual-C++ compiler bug with type
2840 * support.h: Make things compile under Visual-C++ by using
2841 __int64 instead of `long long'. Change many refs to long long
2842 into word64/uword64 typedefs.
2844 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2846 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2847 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2849 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2850 (AC_PROG_INSTALL): Added.
2851 (AC_PROG_CC): Moved to before configure.host call.
2852 * configure: Rebuilt.
2854 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2856 * configure.in: Define @SIMCONF@ depending on mips target.
2857 * configure: Rebuild.
2858 * Makefile.in (run): Add @SIMCONF@ to control simulator
2860 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2861 * interp.c: Remove some debugging, provide more detailed error
2862 messages, update memory accesses to use LOADDRMASK.
2864 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2866 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2867 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2869 * configure: Rebuild.
2870 * config.in: New file, generated by autoheader.
2871 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2872 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2873 HAVE_ANINT and HAVE_AINT, as appropriate.
2874 * Makefile.in (run): Use @LIBS@ rather than -lm.
2875 (interp.o): Depend upon config.h.
2876 (Makefile): Just rebuild Makefile.
2877 (clean): Remove stamp-h.
2878 (mostlyclean): Make the same as clean, not as distclean.
2879 (config.h, stamp-h): New targets.
2881 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2883 * interp.c (ColdReset): Fix boolean test. Make all simulator
2886 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2888 * interp.c (xfer_direct_word, xfer_direct_long,
2889 swap_direct_word, swap_direct_long, xfer_big_word,
2890 xfer_big_long, xfer_little_word, xfer_little_long,
2891 swap_word,swap_long): Added.
2892 * interp.c (ColdReset): Provide function indirection to
2893 host<->simulated_target transfer routines.
2894 * interp.c (sim_store_register, sim_fetch_register): Updated to
2895 make use of indirected transfer routines.
2897 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2899 * gencode.c (process_instructions): Ensure FP ABS instruction
2901 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2902 system call support.
2904 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2906 * interp.c (sim_do_command): Complain if callback structure not
2909 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2911 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2912 support for Sun hosts.
2913 * Makefile.in (gencode): Ensure the host compiler and libraries
2914 used for cross-hosted build.
2916 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2918 * interp.c, gencode.c: Some more (TODO) tidying.
2920 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2922 * gencode.c, interp.c: Replaced explicit long long references with
2923 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2924 * support.h (SET64LO, SET64HI): Macros added.
2926 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2928 * configure: Regenerate with autoconf 2.7.
2930 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2932 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2933 * support.h: Remove superfluous "1" from #if.
2934 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2936 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2938 * interp.c (StoreFPR): Control UndefinedResult() call on
2939 WARN_RESULT manifest.
2941 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2943 * gencode.c: Tidied instruction decoding, and added FP instruction
2946 * interp.c: Added dineroIII, and BSD profiling support. Also
2947 run-time FP handling.
2949 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2951 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2952 gencode.c, interp.c, support.h: created.