1 2015-03-15 Mike Frysinger <vapier@gentoo.org>
3 * tconfig.in: Delete includes.
4 [HAVE_DV_SOCKSER]: Delete.
6 2015-03-14 Mike Frysinger <vapier@gentoo.org>
8 * Makefile.in (SIM_RUN_OBJS): Delete.
10 2015-03-14 Mike Frysinger <vapier@gentoo.org>
12 * configure.ac (AC_CHECK_HEADERS): Delete.
13 * aclocal.m4, configure: Regenerate.
15 2014-08-19 Alan Modra <amodra@gmail.com>
17 * configure: Regenerate.
19 2014-08-15 Roland McGrath <mcgrathr@google.com>
21 * configure: Regenerate.
22 * config.in: Regenerate.
24 2014-03-04 Mike Frysinger <vapier@gentoo.org>
26 * configure: Regenerate.
28 2013-09-23 Alan Modra <amodra@gmail.com>
30 * configure: Regenerate.
32 2013-06-03 Mike Frysinger <vapier@gentoo.org>
34 * aclocal.m4, configure: Regenerate.
36 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
40 2013-03-26 Mike Frysinger <vapier@gentoo.org>
42 * configure: Regenerate.
44 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
46 * configure.ac: Address use of dv-sockser.o.
47 * tconfig.in: Conditionalize use of dv_sockser_install.
48 * configure: Regenerated.
49 * config.in: Regenerated.
51 2012-10-04 Chao-ying Fu <fu@mips.com>
52 Steve Ellcey <sellcey@mips.com>
54 * mips/mips3264r2.igen (rdhwr): New.
56 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
58 * configure.ac: Always link against dv-sockser.o.
59 * configure: Regenerate.
61 2012-06-15 Joel Brobecker <brobecker@adacore.com>
63 * config.in, configure: Regenerate.
65 2012-05-18 Nick Clifton <nickc@redhat.com>
68 * interp.c: Include config.h before system header files.
70 2012-03-24 Mike Frysinger <vapier@gentoo.org>
72 * aclocal.m4, config.in, configure: Regenerate.
74 2011-12-03 Mike Frysinger <vapier@gentoo.org>
76 * aclocal.m4: New file.
77 * configure: Regenerate.
79 2011-10-19 Mike Frysinger <vapier@gentoo.org>
81 * configure: Regenerate after common/acinclude.m4 update.
83 2011-10-17 Mike Frysinger <vapier@gentoo.org>
85 * configure.ac: Change include to common/acinclude.m4.
87 2011-10-17 Mike Frysinger <vapier@gentoo.org>
89 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
90 call. Replace common.m4 include with SIM_AC_COMMON.
91 * configure: Regenerate.
93 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
95 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
97 (tmp-mach-multi): Exit early when igen fails.
99 2011-07-05 Mike Frysinger <vapier@gentoo.org>
101 * interp.c (sim_do_command): Delete.
103 2011-02-14 Mike Frysinger <vapier@gentoo.org>
105 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
106 (tx3904sio_fifo_reset): Likewise.
107 * interp.c (sim_monitor): Likewise.
109 2010-04-14 Mike Frysinger <vapier@gentoo.org>
111 * interp.c (sim_write): Add const to buffer arg.
113 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
115 * interp.c: Don't include sysdep.h
117 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
119 * configure: Regenerate.
121 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
123 * config.in: Regenerate.
124 * configure: Likewise.
126 * configure: Regenerate.
128 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
130 * configure: Regenerate to track ../common/common.m4 changes.
133 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
134 Daniel Jacobowitz <dan@codesourcery.com>
135 Joseph Myers <joseph@codesourcery.com>
137 * configure: Regenerate.
139 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
141 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
142 that unconditionally allows fmt_ps.
143 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
144 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
145 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
146 filter from 64,f to 32,f.
147 (PREFX): Change filter from 64 to 32.
148 (LDXC1, LUXC1): Provide separate mips32r2 implementations
149 that use do_load_double instead of do_load. Make both LUXC1
150 versions unpredictable if SizeFGR () != 64.
151 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
152 instead of do_store. Remove unused variable. Make both SUXC1
153 versions unpredictable if SizeFGR () != 64.
155 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
157 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
158 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
159 shifts for that case.
161 2007-09-04 Nick Clifton <nickc@redhat.com>
163 * interp.c (options enum): Add OPTION_INFO_MEMORY.
164 (display_mem_info): New static variable.
165 (mips_option_handler): Handle OPTION_INFO_MEMORY.
166 (mips_options): Add info-memory and memory-info.
167 (sim_open): After processing the command line and board
168 specification, check display_mem_info. If it is set then
169 call the real handler for the --memory-info command line
172 2007-08-24 Joel Brobecker <brobecker@adacore.com>
174 * configure.ac: Change license of multi-run.c to GPL version 3.
175 * configure: Regenerate.
177 2007-06-28 Richard Sandiford <richard@codesourcery.com>
179 * configure.ac, configure: Revert last patch.
181 2007-06-26 Richard Sandiford <richard@codesourcery.com>
183 * configure.ac (sim_mipsisa3264_configs): New variable.
184 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
185 every configuration support all four targets, using the triplet to
186 determine the default.
187 * configure: Regenerate.
189 2007-06-25 Richard Sandiford <richard@codesourcery.com>
191 * Makefile.in (m16run.o): New rule.
193 2007-05-15 Thiemo Seufer <ths@mips.com>
195 * mips3264r2.igen (DSHD): Fix compile warning.
197 2007-05-14 Thiemo Seufer <ths@mips.com>
199 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
200 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
201 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
202 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
205 2007-03-01 Thiemo Seufer <ths@mips.com>
207 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
210 2007-02-20 Thiemo Seufer <ths@mips.com>
212 * dsp.igen: Update copyright notice.
213 * dsp2.igen: Fix copyright notice.
215 2007-02-20 Thiemo Seufer <ths@mips.com>
216 Chao-Ying Fu <fu@mips.com>
218 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
219 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
220 Add dsp2 to sim_igen_machine.
221 * configure: Regenerate.
222 * dsp.igen (do_ph_op): Add MUL support when op = 2.
223 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
224 (mulq_rs.ph): Use do_ph_mulq.
225 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
226 * mips.igen: Add dsp2 model and include dsp2.igen.
227 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
228 for *mips32r2, *mips64r2, *dsp.
229 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
230 for *mips32r2, *mips64r2, *dsp2.
231 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
233 2007-02-19 Thiemo Seufer <ths@mips.com>
234 Nigel Stephens <nigel@mips.com>
236 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
237 jumps with hazard barrier.
239 2007-02-19 Thiemo Seufer <ths@mips.com>
240 Nigel Stephens <nigel@mips.com>
242 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
243 after each call to sim_io_write.
245 2007-02-19 Thiemo Seufer <ths@mips.com>
246 Nigel Stephens <nigel@mips.com>
248 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
249 supported by this simulator.
250 (decode_coproc): Recognise additional CP0 Config registers
253 2007-02-19 Thiemo Seufer <ths@mips.com>
254 Nigel Stephens <nigel@mips.com>
255 David Ung <davidu@mips.com>
257 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
258 uninterpreted formats. If fmt is one of the uninterpreted types
259 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
260 fmt_word, and fmt_uninterpreted_64 like fmt_long.
261 (store_fpr): When writing an invalid odd register, set the
262 matching even register to fmt_unknown, not the following register.
263 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
264 the the memory window at offset 0 set by --memory-size command
266 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
268 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
270 (sim_monitor): When returning the memory size to the MIPS
271 application, use the value in STATE_MEM_SIZE, not an arbitrary
273 (cop_lw): Don' mess around with FPR_STATE, just pass
274 fmt_uninterpreted_32 to StoreFPR.
276 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
278 * mips.igen (not_word_value): Single version for mips32, mips64
281 2007-02-19 Thiemo Seufer <ths@mips.com>
282 Nigel Stephens <nigel@mips.com>
284 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
287 2007-02-17 Thiemo Seufer <ths@mips.com>
289 * configure.ac (mips*-sde-elf*): Move in front of generic machine
291 * configure: Regenerate.
293 2007-02-17 Thiemo Seufer <ths@mips.com>
295 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
296 Add mdmx to sim_igen_machine.
297 (mipsisa64*-*-*): Likewise. Remove dsp.
298 (mipsisa32*-*-*): Remove dsp.
299 * configure: Regenerate.
301 2007-02-13 Thiemo Seufer <ths@mips.com>
303 * configure.ac: Add mips*-sde-elf* target.
304 * configure: Regenerate.
306 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
308 * acconfig.h: Remove.
309 * config.in, configure: Regenerate.
311 2006-11-07 Thiemo Seufer <ths@mips.com>
313 * dsp.igen (do_w_op): Fix compiler warning.
315 2006-08-29 Thiemo Seufer <ths@mips.com>
316 David Ung <davidu@mips.com>
318 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
320 * configure: Regenerate.
321 * mips.igen (model): Add smartmips.
322 (MADDU): Increment ACX if carry.
323 (do_mult): Clear ACX.
324 (ROR,RORV): Add smartmips.
325 (include): Include smartmips.igen.
326 * sim-main.h (ACX): Set to REGISTERS[89].
327 * smartmips.igen: New file.
329 2006-08-29 Thiemo Seufer <ths@mips.com>
330 David Ung <davidu@mips.com>
332 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
333 mips3264r2.igen. Add missing dependency rules.
334 * m16e.igen: Support for mips16e save/restore instructions.
336 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
338 * configure: Regenerated.
340 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
342 * configure: Regenerated.
344 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
346 * configure: Regenerated.
348 2006-05-15 Chao-ying Fu <fu@mips.com>
350 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
352 2006-04-18 Nick Clifton <nickc@redhat.com>
354 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
357 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
359 * configure: Regenerate.
361 2005-12-14 Chao-ying Fu <fu@mips.com>
363 * Makefile.in (SIM_OBJS): Add dsp.o.
364 (dsp.o): New dependency.
365 (IGEN_INCLUDE): Add dsp.igen.
366 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
367 mipsisa64*-*-*): Add dsp to sim_igen_machine.
368 * configure: Regenerate.
369 * mips.igen: Add dsp model and include dsp.igen.
370 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
371 because these instructions are extended in DSP ASE.
372 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
373 adding 6 DSP accumulator registers and 1 DSP control register.
374 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
375 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
376 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
377 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
378 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
379 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
380 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
381 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
382 DSPCR_CCOND_SMASK): New define.
383 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
384 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
386 2005-07-08 Ian Lance Taylor <ian@airs.com>
388 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
390 2005-06-16 David Ung <davidu@mips.com>
391 Nigel Stephens <nigel@mips.com>
393 * mips.igen: New mips16e model and include m16e.igen.
394 (check_u64): Add mips16e tag.
395 * m16e.igen: New file for MIPS16e instructions.
396 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
397 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
399 * configure: Regenerate.
401 2005-05-26 David Ung <davidu@mips.com>
403 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
404 tags to all instructions which are applicable to the new ISAs.
405 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
407 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
409 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
411 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
412 * configure: Regenerate.
414 2005-03-23 Mark Kettenis <kettenis@gnu.org>
416 * configure: Regenerate.
418 2005-01-14 Andrew Cagney <cagney@gnu.org>
420 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
421 explicit call to AC_CONFIG_HEADER.
422 * configure: Regenerate.
424 2005-01-12 Andrew Cagney <cagney@gnu.org>
426 * configure.ac: Update to use ../common/common.m4.
427 * configure: Re-generate.
429 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
431 * configure: Regenerated to track ../common/aclocal.m4 changes.
433 2005-01-07 Andrew Cagney <cagney@gnu.org>
435 * configure.ac: Rename configure.in, require autoconf 2.59.
436 * configure: Re-generate.
438 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
440 * configure: Regenerate for ../common/aclocal.m4 update.
442 2004-09-24 Monika Chaddha <monika@acmet.com>
444 Committed by Andrew Cagney.
445 * m16.igen (CMP, CMPI): Fix assembler.
447 2004-08-18 Chris Demetriou <cgd@broadcom.com>
449 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
450 * configure: Regenerate.
452 2004-06-25 Chris Demetriou <cgd@broadcom.com>
454 * configure.in (sim_m16_machine): Include mipsIII.
455 * configure: Regenerate.
457 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
459 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
461 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
463 2004-04-10 Chris Demetriou <cgd@broadcom.com>
465 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
467 2004-04-09 Chris Demetriou <cgd@broadcom.com>
469 * mips.igen (check_fmt): Remove.
470 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
471 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
472 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
473 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
474 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
475 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
476 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
477 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
478 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
479 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
481 2004-04-09 Chris Demetriou <cgd@broadcom.com>
483 * sb1.igen (check_sbx): New function.
484 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
486 2004-03-29 Chris Demetriou <cgd@broadcom.com>
487 Richard Sandiford <rsandifo@redhat.com>
489 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
490 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
491 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
492 separate implementations for mipsIV and mipsV. Use new macros to
493 determine whether the restrictions apply.
495 2004-01-19 Chris Demetriou <cgd@broadcom.com>
497 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
498 (check_mult_hilo): Improve comments.
499 (check_div_hilo): Likewise. Also, fork off a new version
500 to handle mips32/mips64 (since there are no hazards to check
503 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
505 * mips.igen (do_dmultx): Fix check for negative operands.
507 2003-05-16 Ian Lance Taylor <ian@airs.com>
509 * Makefile.in (SHELL): Make sure this is defined.
510 (various): Use $(SHELL) whenever we invoke move-if-change.
512 2003-05-03 Chris Demetriou <cgd@broadcom.com>
514 * cp1.c: Tweak attribution slightly.
517 * mdmx.igen: Likewise.
518 * mips3d.igen: Likewise.
519 * sb1.igen: Likewise.
521 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
523 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
526 2003-02-27 Andrew Cagney <cagney@redhat.com>
528 * interp.c (sim_open): Rename _bfd to bfd.
529 (sim_create_inferior): Ditto.
531 2003-01-14 Chris Demetriou <cgd@broadcom.com>
533 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
535 2003-01-14 Chris Demetriou <cgd@broadcom.com>
537 * mips.igen (EI, DI): Remove.
539 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
541 * Makefile.in (tmp-run-multi): Fix mips16 filter.
543 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
544 Andrew Cagney <ac131313@redhat.com>
545 Gavin Romig-Koch <gavin@redhat.com>
546 Graydon Hoare <graydon@redhat.com>
547 Aldy Hernandez <aldyh@redhat.com>
548 Dave Brolley <brolley@redhat.com>
549 Chris Demetriou <cgd@broadcom.com>
551 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
552 (sim_mach_default): New variable.
553 (mips64vr-*-*, mips64vrel-*-*): New configurations.
554 Add a new simulator generator, MULTI.
555 * configure: Regenerate.
556 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
557 (multi-run.o): New dependency.
558 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
559 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
560 (tmp-multi): Combine them.
561 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
562 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
563 (distclean-extra): New rule.
564 * sim-main.h: Include bfd.h.
565 (MIPS_MACH): New macro.
566 * mips.igen (vr4120, vr5400, vr5500): New models.
567 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
568 * vr.igen: Replace with new version.
570 2003-01-04 Chris Demetriou <cgd@broadcom.com>
572 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
573 * configure: Regenerate.
575 2002-12-31 Chris Demetriou <cgd@broadcom.com>
577 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
578 * mips.igen: Remove all invocations of check_branch_bug and
581 2002-12-16 Chris Demetriou <cgd@broadcom.com>
583 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
585 2002-07-30 Chris Demetriou <cgd@broadcom.com>
587 * mips.igen (do_load_double, do_store_double): New functions.
588 (LDC1, SDC1): Rename to...
589 (LDC1b, SDC1b): respectively.
590 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
592 2002-07-29 Michael Snyder <msnyder@redhat.com>
594 * cp1.c (fp_recip2): Modify initialization expression so that
595 GCC will recognize it as constant.
597 2002-06-18 Chris Demetriou <cgd@broadcom.com>
599 * mdmx.c (SD_): Delete.
600 (Unpredictable): Re-define, for now, to directly invoke
601 unpredictable_action().
602 (mdmx_acc_op): Fix error in .ob immediate handling.
604 2002-06-18 Andrew Cagney <cagney@redhat.com>
606 * interp.c (sim_firmware_command): Initialize `address'.
608 2002-06-16 Andrew Cagney <ac131313@redhat.com>
610 * configure: Regenerated to track ../common/aclocal.m4 changes.
612 2002-06-14 Chris Demetriou <cgd@broadcom.com>
613 Ed Satterthwaite <ehs@broadcom.com>
615 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
616 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
617 * mips.igen: Include mips3d.igen.
618 (mips3d): New model name for MIPS-3D ASE instructions.
619 (CVT.W.fmt): Don't use this instruction for word (source) format
621 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
622 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
623 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
624 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
625 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
626 (RSquareRoot1, RSquareRoot2): New macros.
627 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
628 (fp_rsqrt2): New functions.
629 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
630 * configure: Regenerate.
632 2002-06-13 Chris Demetriou <cgd@broadcom.com>
633 Ed Satterthwaite <ehs@broadcom.com>
635 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
636 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
637 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
638 (convert): Note that this function is not used for paired-single
640 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
641 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
642 (check_fmt_p): Enable paired-single support.
643 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
644 (PUU.PS): New instructions.
645 (CVT.S.fmt): Don't use this instruction for paired-single format
647 * sim-main.h (FP_formats): New value 'fmt_ps.'
648 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
649 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
651 2002-06-12 Chris Demetriou <cgd@broadcom.com>
653 * mips.igen: Fix formatting of function calls in
656 2002-06-12 Chris Demetriou <cgd@broadcom.com>
658 * mips.igen (MOVN, MOVZ): Trace result.
659 (TNEI): Print "tnei" as the opcode name in traces.
660 (CEIL.W): Add disassembly string for traces.
661 (RSQRT.fmt): Make location of disassembly string consistent
662 with other instructions.
664 2002-06-12 Chris Demetriou <cgd@broadcom.com>
666 * mips.igen (X): Delete unused function.
668 2002-06-08 Andrew Cagney <cagney@redhat.com>
670 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
672 2002-06-07 Chris Demetriou <cgd@broadcom.com>
673 Ed Satterthwaite <ehs@broadcom.com>
675 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
676 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
677 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
678 (fp_nmsub): New prototypes.
679 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
680 (NegMultiplySub): New defines.
681 * mips.igen (RSQRT.fmt): Use RSquareRoot().
682 (MADD.D, MADD.S): Replace with...
683 (MADD.fmt): New instruction.
684 (MSUB.D, MSUB.S): Replace with...
685 (MSUB.fmt): New instruction.
686 (NMADD.D, NMADD.S): Replace with...
687 (NMADD.fmt): New instruction.
688 (NMSUB.D, MSUB.S): Replace with...
689 (NMSUB.fmt): New instruction.
691 2002-06-07 Chris Demetriou <cgd@broadcom.com>
692 Ed Satterthwaite <ehs@broadcom.com>
694 * cp1.c: Fix more comment spelling and formatting.
695 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
696 (denorm_mode): New function.
697 (fpu_unary, fpu_binary): Round results after operation, collect
698 status from rounding operations, and update the FCSR.
699 (convert): Collect status from integer conversions and rounding
700 operations, and update the FCSR. Adjust NaN values that result
701 from conversions. Convert to use sim_io_eprintf rather than
702 fprintf, and remove some debugging code.
703 * cp1.h (fenr_FS): New define.
705 2002-06-07 Chris Demetriou <cgd@broadcom.com>
707 * cp1.c (convert): Remove unusable debugging code, and move MIPS
708 rounding mode to sim FP rounding mode flag conversion code into...
709 (rounding_mode): New function.
711 2002-06-07 Chris Demetriou <cgd@broadcom.com>
713 * cp1.c: Clean up formatting of a few comments.
714 (value_fpr): Reformat switch statement.
716 2002-06-06 Chris Demetriou <cgd@broadcom.com>
717 Ed Satterthwaite <ehs@broadcom.com>
720 * sim-main.h: Include cp1.h.
721 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
722 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
723 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
724 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
725 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
726 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
727 * cp1.c: Don't include sim-fpu.h; already included by
728 sim-main.h. Clean up formatting of some comments.
729 (NaN, Equal, Less): Remove.
730 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
731 (fp_cmp): New functions.
732 * mips.igen (do_c_cond_fmt): Remove.
733 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
734 Compare. Add result tracing.
735 (CxC1): Remove, replace with...
736 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
737 (DMxC1): Remove, replace with...
738 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
739 (MxC1): Remove, replace with...
740 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
742 2002-06-04 Chris Demetriou <cgd@broadcom.com>
744 * sim-main.h (FGRIDX): Remove, replace all uses with...
745 (FGR_BASE): New macro.
746 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
747 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
748 (NR_FGR, FGR): Likewise.
749 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
750 * mips.igen: Likewise.
752 2002-06-04 Chris Demetriou <cgd@broadcom.com>
754 * cp1.c: Add an FSF Copyright notice to this file.
756 2002-06-04 Chris Demetriou <cgd@broadcom.com>
757 Ed Satterthwaite <ehs@broadcom.com>
759 * cp1.c (Infinity): Remove.
760 * sim-main.h (Infinity): Likewise.
762 * cp1.c (fp_unary, fp_binary): New functions.
763 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
764 (fp_sqrt): New functions, implemented in terms of the above.
765 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
766 (Recip, SquareRoot): Remove (replaced by functions above).
767 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
768 (fp_recip, fp_sqrt): New prototypes.
769 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
770 (Recip, SquareRoot): Replace prototypes with #defines which
771 invoke the functions above.
773 2002-06-03 Chris Demetriou <cgd@broadcom.com>
775 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
776 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
777 file, remove PARAMS from prototypes.
778 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
779 simulator state arguments.
780 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
781 pass simulator state arguments.
782 * cp1.c (SD): Redefine as CPU_STATE(cpu).
783 (store_fpr, convert): Remove 'sd' argument.
784 (value_fpr): Likewise. Convert to use 'SD' instead.
786 2002-06-03 Chris Demetriou <cgd@broadcom.com>
788 * cp1.c (Min, Max): Remove #if 0'd functions.
789 * sim-main.h (Min, Max): Remove.
791 2002-06-03 Chris Demetriou <cgd@broadcom.com>
793 * cp1.c: fix formatting of switch case and default labels.
794 * interp.c: Likewise.
795 * sim-main.c: Likewise.
797 2002-06-03 Chris Demetriou <cgd@broadcom.com>
799 * cp1.c: Clean up comments which describe FP formats.
800 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
802 2002-06-03 Chris Demetriou <cgd@broadcom.com>
803 Ed Satterthwaite <ehs@broadcom.com>
805 * configure.in (mipsisa64sb1*-*-*): New target for supporting
806 Broadcom SiByte SB-1 processor configurations.
807 * configure: Regenerate.
808 * sb1.igen: New file.
809 * mips.igen: Include sb1.igen.
811 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
812 * mdmx.igen: Add "sb1" model to all appropriate functions and
814 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
815 (ob_func, ob_acc): Reference the above.
816 (qh_acc): Adjust to keep the same size as ob_acc.
817 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
818 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
820 2002-06-03 Chris Demetriou <cgd@broadcom.com>
822 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
824 2002-06-02 Chris Demetriou <cgd@broadcom.com>
825 Ed Satterthwaite <ehs@broadcom.com>
827 * mips.igen (mdmx): New (pseudo-)model.
828 * mdmx.c, mdmx.igen: New files.
829 * Makefile.in (SIM_OBJS): Add mdmx.o.
830 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
832 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
833 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
834 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
835 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
836 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
837 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
838 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
839 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
840 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
841 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
842 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
843 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
844 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
845 (qh_fmtsel): New macros.
846 (_sim_cpu): New member "acc".
847 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
848 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
850 2002-05-01 Chris Demetriou <cgd@broadcom.com>
852 * interp.c: Use 'deprecated' rather than 'depreciated.'
853 * sim-main.h: Likewise.
855 2002-05-01 Chris Demetriou <cgd@broadcom.com>
857 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
858 which wouldn't compile anyway.
859 * sim-main.h (unpredictable_action): New function prototype.
860 (Unpredictable): Define to call igen function unpredictable().
861 (NotWordValue): New macro to call igen function not_word_value().
862 (UndefinedResult): Remove.
863 * interp.c (undefined_result): Remove.
864 (unpredictable_action): New function.
865 * mips.igen (not_word_value, unpredictable): New functions.
866 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
867 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
868 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
869 NotWordValue() to check for unpredictable inputs, then
870 Unpredictable() to handle them.
872 2002-02-24 Chris Demetriou <cgd@broadcom.com>
874 * mips.igen: Fix formatting of calls to Unpredictable().
876 2002-04-20 Andrew Cagney <ac131313@redhat.com>
878 * interp.c (sim_open): Revert previous change.
880 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
882 * interp.c (sim_open): Disable chunk of code that wrote code in
883 vector table entries.
885 2002-03-19 Chris Demetriou <cgd@broadcom.com>
887 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
888 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
891 2002-03-19 Chris Demetriou <cgd@broadcom.com>
893 * cp1.c: Fix many formatting issues.
895 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
897 * cp1.c (fpu_format_name): New function to replace...
898 (DOFMT): This. Delete, and update all callers.
899 (fpu_rounding_mode_name): New function to replace...
900 (RMMODE): This. Delete, and update all callers.
902 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
904 * interp.c: Move FPU support routines from here to...
905 * cp1.c: Here. New file.
906 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
909 2002-03-12 Chris Demetriou <cgd@broadcom.com>
911 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
912 * mips.igen (mips32, mips64): New models, add to all instructions
913 and functions as appropriate.
914 (loadstore_ea, check_u64): New variant for model mips64.
915 (check_fmt_p): New variant for models mipsV and mips64, remove
916 mipsV model marking fro other variant.
919 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
920 for mips32 and mips64.
921 (DCLO, DCLZ): New instructions for mips64.
923 2002-03-07 Chris Demetriou <cgd@broadcom.com>
925 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
926 immediate or code as a hex value with the "%#lx" format.
927 (ANDI): Likewise, and fix printed instruction name.
929 2002-03-05 Chris Demetriou <cgd@broadcom.com>
931 * sim-main.h (UndefinedResult, Unpredictable): New macros
932 which currently do nothing.
934 2002-03-05 Chris Demetriou <cgd@broadcom.com>
936 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
937 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
938 (status_CU3): New definitions.
940 * sim-main.h (ExceptionCause): Add new values for MIPS32
941 and MIPS64: MDMX, MCheck, CacheErr. Update comments
942 for DebugBreakPoint and NMIReset to note their status in
944 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
945 (SignalExceptionCacheErr): New exception macros.
947 2002-03-05 Chris Demetriou <cgd@broadcom.com>
949 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
950 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
952 (SignalExceptionCoProcessorUnusable): Take as argument the
953 unusable coprocessor number.
955 2002-03-05 Chris Demetriou <cgd@broadcom.com>
957 * mips.igen: Fix formatting of all SignalException calls.
959 2002-03-05 Chris Demetriou <cgd@broadcom.com>
961 * sim-main.h (SIGNEXTEND): Remove.
963 2002-03-04 Chris Demetriou <cgd@broadcom.com>
965 * mips.igen: Remove gencode comment from top of file, fix
966 spelling in another comment.
968 2002-03-04 Chris Demetriou <cgd@broadcom.com>
970 * mips.igen (check_fmt, check_fmt_p): New functions to check
971 whether specific floating point formats are usable.
972 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
973 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
974 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
975 Use the new functions.
976 (do_c_cond_fmt): Remove format checks...
977 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
979 2002-03-03 Chris Demetriou <cgd@broadcom.com>
981 * mips.igen: Fix formatting of check_fpu calls.
983 2002-03-03 Chris Demetriou <cgd@broadcom.com>
985 * mips.igen (FLOOR.L.fmt): Store correct destination register.
987 2002-03-03 Chris Demetriou <cgd@broadcom.com>
989 * mips.igen: Remove whitespace at end of lines.
991 2002-03-02 Chris Demetriou <cgd@broadcom.com>
993 * mips.igen (loadstore_ea): New function to do effective
994 address calculations.
995 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
996 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
997 CACHE): Use loadstore_ea to do effective address computations.
999 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1001 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1002 * mips.igen (LL, CxC1, MxC1): Likewise.
1004 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1006 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1007 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1008 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1009 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1010 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1011 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1012 Don't split opcode fields by hand, use the opcode field values
1015 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1017 * mips.igen (do_divu): Fix spacing.
1019 * mips.igen (do_dsllv): Move to be right before DSLLV,
1020 to match the rest of the do_<shift> functions.
1022 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1024 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1025 DSRL32, do_dsrlv): Trace inputs and results.
1027 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1029 * mips.igen (CACHE): Provide instruction-printing string.
1031 * interp.c (signal_exception): Comment tokens after #endif.
1033 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1035 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1036 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1037 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1038 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1039 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1040 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1041 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1042 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1044 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1046 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1047 instruction-printing string.
1048 (LWU): Use '64' as the filter flag.
1050 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1052 * mips.igen (SDXC1): Fix instruction-printing string.
1054 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1056 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1057 filter flags "32,f".
1059 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1061 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1064 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1066 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1067 add a comma) so that it more closely match the MIPS ISA
1068 documentation opcode partitioning.
1069 (PREF): Put useful names on opcode fields, and include
1070 instruction-printing string.
1072 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1074 * mips.igen (check_u64): New function which in the future will
1075 check whether 64-bit instructions are usable and signal an
1076 exception if not. Currently a no-op.
1077 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1078 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1079 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1080 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1082 * mips.igen (check_fpu): New function which in the future will
1083 check whether FPU instructions are usable and signal an exception
1084 if not. Currently a no-op.
1085 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1086 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1087 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1088 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1089 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1090 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1091 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1092 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1094 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1096 * mips.igen (do_load_left, do_load_right): Move to be immediately
1098 (do_store_left, do_store_right): Move to be immediately following
1101 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1103 * mips.igen (mipsV): New model name. Also, add it to
1104 all instructions and functions where it is appropriate.
1106 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1108 * mips.igen: For all functions and instructions, list model
1109 names that support that instruction one per line.
1111 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1113 * mips.igen: Add some additional comments about supported
1114 models, and about which instructions go where.
1115 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1116 order as is used in the rest of the file.
1118 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1120 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1121 indicating that ALU32_END or ALU64_END are there to check
1123 (DADD): Likewise, but also remove previous comment about
1126 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1128 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1129 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1130 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1131 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1132 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1133 fields (i.e., add and move commas) so that they more closely
1134 match the MIPS ISA documentation opcode partitioning.
1136 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1138 * mips.igen (ADDI): Print immediate value.
1139 (BREAK): Print code.
1140 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1141 (SLL): Print "nop" specially, and don't run the code
1142 that does the shift for the "nop" case.
1144 2001-11-17 Fred Fish <fnf@redhat.com>
1146 * sim-main.h (float_operation): Move enum declaration outside
1147 of _sim_cpu struct declaration.
1149 2001-04-12 Jim Blandy <jimb@redhat.com>
1151 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1152 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1154 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1155 PENDING_FILL, and you can get the intended effect gracefully by
1156 calling PENDING_SCHED directly.
1158 2001-02-23 Ben Elliston <bje@redhat.com>
1160 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1161 already defined elsewhere.
1163 2001-02-19 Ben Elliston <bje@redhat.com>
1165 * sim-main.h (sim_monitor): Return an int.
1166 * interp.c (sim_monitor): Add return values.
1167 (signal_exception): Handle error conditions from sim_monitor.
1169 2001-02-08 Ben Elliston <bje@redhat.com>
1171 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1172 (store_memory): Likewise, pass cia to sim_core_write*.
1174 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1176 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1177 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1179 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1181 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1182 * Makefile.in: Don't delete *.igen when cleaning directory.
1184 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1186 * m16.igen (break): Call SignalException not sim_engine_halt.
1188 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1190 From Jason Eckhardt:
1191 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1193 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1195 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1197 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1199 * mips.igen (do_dmultx): Fix typo.
1201 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1203 * configure: Regenerated to track ../common/aclocal.m4 changes.
1205 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1207 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1209 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1211 * sim-main.h (GPR_CLEAR): Define macro.
1213 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1215 * interp.c (decode_coproc): Output long using %lx and not %s.
1217 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1219 * interp.c (sim_open): Sort & extend dummy memory regions for
1220 --board=jmr3904 for eCos.
1222 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1224 * configure: Regenerated.
1226 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1228 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1229 calls, conditional on the simulator being in verbose mode.
1231 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1233 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1234 cache don't get ReservedInstruction traps.
1236 1999-11-29 Mark Salter <msalter@cygnus.com>
1238 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1239 to clear status bits in sdisr register. This is how the hardware works.
1241 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1242 being used by cygmon.
1244 1999-11-11 Andrew Haley <aph@cygnus.com>
1246 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1249 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1251 * mips.igen (MULT): Correct previous mis-applied patch.
1253 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1255 * mips.igen (delayslot32): Handle sequence like
1256 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1257 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1258 (MULT): Actually pass the third register...
1260 1999-09-03 Mark Salter <msalter@cygnus.com>
1262 * interp.c (sim_open): Added more memory aliases for additional
1263 hardware being touched by cygmon on jmr3904 board.
1265 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1267 * configure: Regenerated to track ../common/aclocal.m4 changes.
1269 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1271 * interp.c (sim_store_register): Handle case where client - GDB -
1272 specifies that a 4 byte register is 8 bytes in size.
1273 (sim_fetch_register): Ditto.
1275 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1277 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1278 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1279 (idt_monitor_base): Base address for IDT monitor traps.
1280 (pmon_monitor_base): Ditto for PMON.
1281 (lsipmon_monitor_base): Ditto for LSI PMON.
1282 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1283 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1284 (sim_firmware_command): New function.
1285 (mips_option_handler): Call it for OPTION_FIRMWARE.
1286 (sim_open): Allocate memory for idt_monitor region. If "--board"
1287 option was given, add no monitor by default. Add BREAK hooks only if
1288 monitors are also there.
1290 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1292 * interp.c (sim_monitor): Flush output before reading input.
1294 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1296 * tconfig.in (SIM_HANDLES_LMA): Always define.
1298 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1300 From Mark Salter <msalter@cygnus.com>:
1301 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1302 (sim_open): Add setup for BSP board.
1304 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1306 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1307 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1308 them as unimplemented.
1310 1999-05-08 Felix Lee <flee@cygnus.com>
1312 * configure: Regenerated to track ../common/aclocal.m4 changes.
1314 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1316 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1318 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1320 * configure.in: Any mips64vr5*-*-* target should have
1321 -DTARGET_ENABLE_FR=1.
1322 (default_endian): Any mips64vr*el-*-* target should default to
1324 * configure: Re-generate.
1326 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1328 * mips.igen (ldl): Extend from _16_, not 32.
1330 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1332 * interp.c (sim_store_register): Force registers written to by GDB
1333 into an un-interpreted state.
1335 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1337 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1338 CPU, start periodic background I/O polls.
1339 (tx3904sio_poll): New function: periodic I/O poller.
1341 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1343 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1345 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1347 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1350 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1352 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1353 (load_word): Call SIM_CORE_SIGNAL hook on error.
1354 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1355 starting. For exception dispatching, pass PC instead of NULL_CIA.
1356 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1357 * sim-main.h (COP0_BADVADDR): Define.
1358 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1359 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1360 (_sim_cpu): Add exc_* fields to store register value snapshots.
1361 * mips.igen (*): Replace memory-related SignalException* calls
1362 with references to SIM_CORE_SIGNAL hook.
1364 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1366 * sim-main.c (*): Minor warning cleanups.
1368 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1370 * m16.igen (DADDIU5): Correct type-o.
1372 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1374 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1377 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1379 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1381 (interp.o): Add dependency on itable.h
1382 (oengine.c, gencode): Delete remaining references.
1383 (BUILT_SRC_FROM_GEN): Clean up.
1385 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1388 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1389 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1390 tmp-run-hack) : New.
1391 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1392 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1393 Drop the "64" qualifier to get the HACK generator working.
1394 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1395 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1396 qualifier to get the hack generator working.
1397 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1398 (DSLL): Use do_dsll.
1399 (DSLLV): Use do_dsllv.
1400 (DSRA): Use do_dsra.
1401 (DSRL): Use do_dsrl.
1402 (DSRLV): Use do_dsrlv.
1403 (BC1): Move *vr4100 to get the HACK generator working.
1404 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1405 get the HACK generator working.
1406 (MACC) Rename to get the HACK generator working.
1407 (DMACC,MACCS,DMACCS): Add the 64.
1409 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1411 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1412 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1414 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1416 * mips/interp.c (DEBUG): Cleanups.
1418 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1420 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1421 (tx3904sio_tickle): fflush after a stdout character output.
1423 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1425 * interp.c (sim_close): Uninstall modules.
1427 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1429 * sim-main.h, interp.c (sim_monitor): Change to global
1432 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1434 * configure.in (vr4100): Only include vr4100 instructions in
1436 * configure: Re-generate.
1437 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1439 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1441 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1442 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1445 * configure.in (sim_default_gen, sim_use_gen): Replace with
1447 (--enable-sim-igen): Delete config option. Always using IGEN.
1448 * configure: Re-generate.
1450 * Makefile.in (gencode): Kill, kill, kill.
1453 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1455 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1456 bit mips16 igen simulator.
1457 * configure: Re-generate.
1459 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1460 as part of vr4100 ISA.
1461 * vr.igen: Mark all instructions as 64 bit only.
1463 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1465 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1468 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1470 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1471 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1472 * configure: Re-generate.
1474 * m16.igen (BREAK): Define breakpoint instruction.
1475 (JALX32): Mark instruction as mips16 and not r3900.
1476 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1478 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1480 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1482 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1483 insn as a debug breakpoint.
1485 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1487 (PENDING_SCHED): Clean up trace statement.
1488 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1489 (PENDING_FILL): Delay write by only one cycle.
1490 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1492 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1494 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1496 (pending_tick): Move incrementing of index to FOR statement.
1497 (pending_tick): Only update PENDING_OUT after a write has occured.
1499 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1501 * configure: Re-generate.
1503 * interp.c (sim_engine_run OLD): Delete explicit call to
1504 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1506 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1508 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1509 interrupt level number to match changed SignalExceptionInterrupt
1512 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1514 * interp.c: #include "itable.h" if WITH_IGEN.
1515 (get_insn_name): New function.
1516 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1517 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1519 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1521 * configure: Rebuilt to inhale new common/aclocal.m4.
1523 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1525 * dv-tx3904sio.c: Include sim-assert.h.
1527 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1529 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1530 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1531 Reorganize target-specific sim-hardware checks.
1532 * configure: rebuilt.
1533 * interp.c (sim_open): For tx39 target boards, set
1534 OPERATING_ENVIRONMENT, add tx3904sio devices.
1535 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1536 ROM executables. Install dv-sockser into sim-modules list.
1538 * dv-tx3904irc.c: Compiler warning clean-up.
1539 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1540 frequent hw-trace messages.
1542 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1544 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1546 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1548 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1550 * vr.igen: New file.
1551 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1552 * mips.igen: Define vr4100 model. Include vr.igen.
1553 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1555 * mips.igen (check_mf_hilo): Correct check.
1557 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1559 * sim-main.h (interrupt_event): Add prototype.
1561 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1562 register_ptr, register_value.
1563 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1565 * sim-main.h (tracefh): Make extern.
1567 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1569 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1570 Reduce unnecessarily high timer event frequency.
1571 * dv-tx3904cpu.c: Ditto for interrupt event.
1573 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1575 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1577 (interrupt_event): Made non-static.
1579 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1580 interchange of configuration values for external vs. internal
1583 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1585 * mips.igen (BREAK): Moved code to here for
1586 simulator-reserved break instructions.
1587 * gencode.c (build_instruction): Ditto.
1588 * interp.c (signal_exception): Code moved from here. Non-
1589 reserved instructions now use exception vector, rather
1591 * sim-main.h: Moved magic constants to here.
1593 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1595 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1596 register upon non-zero interrupt event level, clear upon zero
1598 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1599 by passing zero event value.
1600 (*_io_{read,write}_buffer): Endianness fixes.
1601 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1602 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1604 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1605 serial I/O and timer module at base address 0xFFFF0000.
1607 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1609 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1612 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1614 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1616 * configure: Update.
1618 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1620 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1621 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1622 * configure.in: Include tx3904tmr in hw_device list.
1623 * configure: Rebuilt.
1624 * interp.c (sim_open): Instantiate three timer instances.
1625 Fix address typo of tx3904irc instance.
1627 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1629 * interp.c (signal_exception): SystemCall exception now uses
1630 the exception vector.
1632 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1634 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1637 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1639 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1641 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1643 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1645 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1646 sim-main.h. Declare a struct hw_descriptor instead of struct
1647 hw_device_descriptor.
1649 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1651 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1652 right bits and then re-align left hand bytes to correct byte
1653 lanes. Fix incorrect computation in do_store_left when loading
1654 bytes from second word.
1656 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1658 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1659 * interp.c (sim_open): Only create a device tree when HW is
1662 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1663 * interp.c (signal_exception): Ditto.
1665 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1667 * gencode.c: Mark BEGEZALL as LIKELY.
1669 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1671 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1672 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1674 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1676 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1677 modules. Recognize TX39 target with "mips*tx39" pattern.
1678 * configure: Rebuilt.
1679 * sim-main.h (*): Added many macros defining bits in
1680 TX39 control registers.
1681 (SignalInterrupt): Send actual PC instead of NULL.
1682 (SignalNMIReset): New exception type.
1683 * interp.c (board): New variable for future use to identify
1684 a particular board being simulated.
1685 (mips_option_handler,mips_options): Added "--board" option.
1686 (interrupt_event): Send actual PC.
1687 (sim_open): Make memory layout conditional on board setting.
1688 (signal_exception): Initial implementation of hardware interrupt
1689 handling. Accept another break instruction variant for simulator
1691 (decode_coproc): Implement RFE instruction for TX39.
1692 (mips.igen): Decode RFE instruction as such.
1693 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1694 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1695 bbegin to implement memory map.
1696 * dv-tx3904cpu.c: New file.
1697 * dv-tx3904irc.c: New file.
1699 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1701 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1703 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1705 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1706 with calls to check_div_hilo.
1708 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1710 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1711 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1712 Add special r3900 version of do_mult_hilo.
1713 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1714 with calls to check_mult_hilo.
1715 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1716 with calls to check_div_hilo.
1718 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1720 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1721 Document a replacement.
1723 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1725 * interp.c (sim_monitor): Make mon_printf work.
1727 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1729 * sim-main.h (INSN_NAME): New arg `cpu'.
1731 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1733 * configure: Regenerated to track ../common/aclocal.m4 changes.
1735 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1737 * configure: Regenerated to track ../common/aclocal.m4 changes.
1740 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1742 * acconfig.h: New file.
1743 * configure.in: Reverted change of Apr 24; use sinclude again.
1745 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1747 * configure: Regenerated to track ../common/aclocal.m4 changes.
1750 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1752 * configure.in: Don't call sinclude.
1754 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1756 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1758 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1760 * mips.igen (ERET): Implement.
1762 * interp.c (decode_coproc): Return sign-extended EPC.
1764 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1766 * interp.c (signal_exception): Do not ignore Trap.
1767 (signal_exception): On TRAP, restart at exception address.
1768 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1769 (signal_exception): Update.
1770 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1771 so that TRAP instructions are caught.
1773 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1775 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1776 contains HI/LO access history.
1777 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1778 (HIACCESS, LOACCESS): Delete, replace with
1779 (HIHISTORY, LOHISTORY): New macros.
1780 (CHECKHILO): Delete all, moved to mips.igen
1782 * gencode.c (build_instruction): Do not generate checks for
1783 correct HI/LO register usage.
1785 * interp.c (old_engine_run): Delete checks for correct HI/LO
1788 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1789 check_mf_cycles): New functions.
1790 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1791 do_divu, domultx, do_mult, do_multu): Use.
1793 * tx.igen ("madd", "maddu"): Use.
1795 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1797 * mips.igen (DSRAV): Use function do_dsrav.
1798 (SRAV): Use new function do_srav.
1800 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1801 (B): Sign extend 11 bit immediate.
1802 (EXT-B*): Shift 16 bit immediate left by 1.
1803 (ADDIU*): Don't sign extend immediate value.
1805 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1807 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1809 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1812 * mips.igen (delayslot32, nullify_next_insn): New functions.
1813 (m16.igen): Always include.
1814 (do_*): Add more tracing.
1816 * m16.igen (delayslot16): Add NIA argument, could be called by a
1817 32 bit MIPS16 instruction.
1819 * interp.c (ifetch16): Move function from here.
1820 * sim-main.c (ifetch16): To here.
1822 * sim-main.c (ifetch16, ifetch32): Update to match current
1823 implementations of LH, LW.
1824 (signal_exception): Don't print out incorrect hex value of illegal
1827 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1829 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1832 * m16.igen: Implement MIPS16 instructions.
1834 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1835 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1836 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1837 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1838 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1839 bodies of corresponding code from 32 bit insn to these. Also used
1840 by MIPS16 versions of functions.
1842 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1843 (IMEM16): Drop NR argument from macro.
1845 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1847 * Makefile.in (SIM_OBJS): Add sim-main.o.
1849 * sim-main.h (address_translation, load_memory, store_memory,
1850 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1852 (pr_addr, pr_uword64): Declare.
1853 (sim-main.c): Include when H_REVEALS_MODULE_P.
1855 * interp.c (address_translation, load_memory, store_memory,
1856 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1858 * sim-main.c: To here. Fix compilation problems.
1860 * configure.in: Enable inlining.
1861 * configure: Re-config.
1863 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1865 * configure: Regenerated to track ../common/aclocal.m4 changes.
1867 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1869 * mips.igen: Include tx.igen.
1870 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1871 * tx.igen: New file, contains MADD and MADDU.
1873 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1874 the hardwired constant `7'.
1875 (store_memory): Ditto.
1876 (LOADDRMASK): Move definition to sim-main.h.
1878 mips.igen (MTC0): Enable for r3900.
1881 mips.igen (do_load_byte): Delete.
1882 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1883 do_store_right): New functions.
1884 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1886 configure.in: Let the tx39 use igen again.
1889 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1891 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1892 not an address sized quantity. Return zero for cache sizes.
1894 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1896 * mips.igen (r3900): r3900 does not support 64 bit integer
1899 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1901 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1903 * configure : Rebuild.
1905 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
1907 * configure: Regenerated to track ../common/aclocal.m4 changes.
1909 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1911 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1913 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
1915 * configure: Regenerated to track ../common/aclocal.m4 changes.
1916 * config.in: Regenerated to track ../common/aclocal.m4 changes.
1918 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1920 * configure: Regenerated to track ../common/aclocal.m4 changes.
1922 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
1924 * interp.c (Max, Min): Comment out functions. Not yet used.
1926 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
1928 * configure: Regenerated to track ../common/aclocal.m4 changes.
1930 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
1932 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1933 configurable settings for stand-alone simulator.
1935 * configure.in: Added X11 search, just in case.
1937 * configure: Regenerated.
1939 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
1941 * interp.c (sim_write, sim_read, load_memory, store_memory):
1942 Replace sim_core_*_map with read_map, write_map, exec_map resp.
1944 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
1946 * sim-main.h (GETFCC): Return an unsigned value.
1948 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1950 * mips.igen (DIV): Fix check for -1 / MIN_INT.
1951 (DADD): Result destination is RD not RT.
1953 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1955 * sim-main.h (HIACCESS, LOACCESS): Always define.
1957 * mdmx.igen (Maxi, Mini): Rename Max, Min.
1959 * interp.c (sim_info): Delete.
1961 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
1963 * interp.c (DECLARE_OPTION_HANDLER): Use it.
1964 (mips_option_handler): New argument `cpu'.
1965 (sim_open): Update call to sim_add_option_table.
1967 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
1969 * mips.igen (CxC1): Add tracing.
1971 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
1973 * sim-main.h (Max, Min): Declare.
1975 * interp.c (Max, Min): New functions.
1977 * mips.igen (BC1): Add tracing.
1979 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
1981 * interp.c Added memory map for stack in vr4100
1983 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
1985 * interp.c (load_memory): Add missing "break"'s.
1987 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1989 * interp.c (sim_store_register, sim_fetch_register): Pass in
1990 length parameter. Return -1.
1992 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
1994 * interp.c: Added hardware init hook, fixed warnings.
1996 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1998 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2000 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2002 * interp.c (ifetch16): New function.
2004 * sim-main.h (IMEM32): Rename IMEM.
2005 (IMEM16_IMMED): Define.
2007 (DELAY_SLOT): Update.
2009 * m16run.c (sim_engine_run): New file.
2011 * m16.igen: All instructions except LB.
2012 (LB): Call do_load_byte.
2013 * mips.igen (do_load_byte): New function.
2014 (LB): Call do_load_byte.
2016 * mips.igen: Move spec for insn bit size and high bit from here.
2017 * Makefile.in (tmp-igen, tmp-m16): To here.
2019 * m16.dc: New file, decode mips16 instructions.
2021 * Makefile.in (SIM_NO_ALL): Define.
2022 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2024 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2026 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2027 point unit to 32 bit registers.
2028 * configure: Re-generate.
2030 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2032 * configure.in (sim_use_gen): Make IGEN the default simulator
2033 generator for generic 32 and 64 bit mips targets.
2034 * configure: Re-generate.
2036 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2038 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2041 * interp.c (sim_fetch_register, sim_store_register): Read/write
2042 FGR from correct location.
2043 (sim_open): Set size of FGR's according to
2044 WITH_TARGET_FLOATING_POINT_BITSIZE.
2046 * sim-main.h (FGR): Store floating point registers in a separate
2049 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2051 * configure: Regenerated to track ../common/aclocal.m4 changes.
2053 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2055 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2057 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2059 * interp.c (pending_tick): New function. Deliver pending writes.
2061 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2062 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2063 it can handle mixed sized quantites and single bits.
2065 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2067 * interp.c (oengine.h): Do not include when building with IGEN.
2068 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2069 (sim_info): Ditto for PROCESSOR_64BIT.
2070 (sim_monitor): Replace ut_reg with unsigned_word.
2071 (*): Ditto for t_reg.
2072 (LOADDRMASK): Define.
2073 (sim_open): Remove defunct check that host FP is IEEE compliant,
2074 using software to emulate floating point.
2075 (value_fpr, ...): Always compile, was conditional on HASFPU.
2077 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2079 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2082 * interp.c (SD, CPU): Define.
2083 (mips_option_handler): Set flags in each CPU.
2084 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2085 (sim_close): Do not clear STATE, deleted anyway.
2086 (sim_write, sim_read): Assume CPU zero's vm should be used for
2088 (sim_create_inferior): Set the PC for all processors.
2089 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2091 (mips16_entry): Pass correct nr of args to store_word, load_word.
2092 (ColdReset): Cold reset all cpu's.
2093 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2094 (sim_monitor, load_memory, store_memory, signal_exception): Use
2095 `CPU' instead of STATE_CPU.
2098 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2101 * sim-main.h (signal_exception): Add sim_cpu arg.
2102 (SignalException*): Pass both SD and CPU to signal_exception.
2103 * interp.c (signal_exception): Update.
2105 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2107 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2108 address_translation): Ditto
2109 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2111 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2113 * configure: Regenerated to track ../common/aclocal.m4 changes.
2115 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2117 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2119 * mips.igen (model): Map processor names onto BFD name.
2121 * sim-main.h (CPU_CIA): Delete.
2122 (SET_CIA, GET_CIA): Define
2124 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2126 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2129 * configure.in (default_endian): Configure a big-endian simulator
2131 * configure: Re-generate.
2133 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2135 * configure: Regenerated to track ../common/aclocal.m4 changes.
2137 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2139 * interp.c (sim_monitor): Handle Densan monitor outbyte
2140 and inbyte functions.
2142 1997-12-29 Felix Lee <flee@cygnus.com>
2144 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2146 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2148 * Makefile.in (tmp-igen): Arrange for $zero to always be
2149 reset to zero after every instruction.
2151 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2153 * configure: Regenerated to track ../common/aclocal.m4 changes.
2156 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2158 * mips.igen (MSUB): Fix to work like MADD.
2159 * gencode.c (MSUB): Similarly.
2161 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2163 * configure: Regenerated to track ../common/aclocal.m4 changes.
2165 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2167 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2169 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2171 * sim-main.h (sim-fpu.h): Include.
2173 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2174 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2175 using host independant sim_fpu module.
2177 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2179 * interp.c (signal_exception): Report internal errors with SIGABRT
2182 * sim-main.h (C0_CONFIG): New register.
2183 (signal.h): No longer include.
2185 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2187 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2189 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2191 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2193 * mips.igen: Tag vr5000 instructions.
2194 (ANDI): Was missing mipsIV model, fix assembler syntax.
2195 (do_c_cond_fmt): New function.
2196 (C.cond.fmt): Handle mips I-III which do not support CC field
2198 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2199 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2201 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2202 vr5000 which saves LO in a GPR separatly.
2204 * configure.in (enable-sim-igen): For vr5000, select vr5000
2205 specific instructions.
2206 * configure: Re-generate.
2208 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2210 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2212 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2213 fmt_uninterpreted_64 bit cases to switch. Convert to
2216 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2218 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2219 as specified in IV3.2 spec.
2220 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2222 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2224 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2225 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2226 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2227 PENDING_FILL versions of instructions. Simplify.
2229 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2231 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2233 (MTHI, MFHI): Disable code checking HI-LO.
2235 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2237 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2239 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2241 * gencode.c (build_mips16_operands): Replace IPC with cia.
2243 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2244 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2246 (UndefinedResult): Replace function with macro/function
2248 (sim_engine_run): Don't save PC in IPC.
2250 * sim-main.h (IPC): Delete.
2253 * interp.c (signal_exception, store_word, load_word,
2254 address_translation, load_memory, store_memory, cache_op,
2255 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2256 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2257 current instruction address - cia - argument.
2258 (sim_read, sim_write): Call address_translation directly.
2259 (sim_engine_run): Rename variable vaddr to cia.
2260 (signal_exception): Pass cia to sim_monitor
2262 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2263 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2264 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2266 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2267 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2270 * interp.c (signal_exception): Pass restart address to
2273 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2274 idecode.o): Add dependency.
2276 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2278 (DELAY_SLOT): Update NIA not PC with branch address.
2279 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2281 * mips.igen: Use CIA not PC in branch calculations.
2282 (illegal): Call SignalException.
2283 (BEQ, ADDIU): Fix assembler.
2285 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2287 * m16.igen (JALX): Was missing.
2289 * configure.in (enable-sim-igen): New configuration option.
2290 * configure: Re-generate.
2292 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2294 * interp.c (load_memory, store_memory): Delete parameter RAW.
2295 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2296 bypassing {load,store}_memory.
2298 * sim-main.h (ByteSwapMem): Delete definition.
2300 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2302 * interp.c (sim_do_command, sim_commands): Delete mips specific
2303 commands. Handled by module sim-options.
2305 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2306 (WITH_MODULO_MEMORY): Define.
2308 * interp.c (sim_info): Delete code printing memory size.
2310 * interp.c (mips_size): Nee sim_size, delete function.
2312 (monitor, monitor_base, monitor_size): Delete global variables.
2313 (sim_open, sim_close): Delete code creating monitor and other
2314 memory regions. Use sim-memopts module, via sim_do_commandf, to
2315 manage memory regions.
2316 (load_memory, store_memory): Use sim-core for memory model.
2318 * interp.c (address_translation): Delete all memory map code
2319 except line forcing 32 bit addresses.
2321 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2323 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2326 * interp.c (logfh, logfile): Delete globals.
2327 (sim_open, sim_close): Delete code opening & closing log file.
2328 (mips_option_handler): Delete -l and -n options.
2329 (OPTION mips_options): Ditto.
2331 * interp.c (OPTION mips_options): Rename option trace to dinero.
2332 (mips_option_handler): Update.
2334 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2336 * interp.c (fetch_str): New function.
2337 (sim_monitor): Rewrite using sim_read & sim_write.
2338 (sim_open): Check magic number.
2339 (sim_open): Write monitor vectors into memory using sim_write.
2340 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2341 (sim_read, sim_write): Simplify - transfer data one byte at a
2343 (load_memory, store_memory): Clarify meaning of parameter RAW.
2345 * sim-main.h (isHOST): Defete definition.
2346 (isTARGET): Mark as depreciated.
2347 (address_translation): Delete parameter HOST.
2349 * interp.c (address_translation): Delete parameter HOST.
2351 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2355 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2356 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2358 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2360 * mips.igen: Add model filter field to records.
2362 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2364 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2366 interp.c (sim_engine_run): Do not compile function sim_engine_run
2367 when WITH_IGEN == 1.
2369 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2370 target architecture.
2372 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2373 igen. Replace with configuration variables sim_igen_flags /
2376 * m16.igen: New file. Copy mips16 insns here.
2377 * mips.igen: From here.
2379 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2381 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2383 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2385 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2387 * gencode.c (build_instruction): Follow sim_write's lead in using
2388 BigEndianMem instead of !ByteSwapMem.
2390 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2392 * configure.in (sim_gen): Dependent on target, select type of
2393 generator. Always select old style generator.
2395 configure: Re-generate.
2397 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2399 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2400 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2401 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2402 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2403 SIM_@sim_gen@_*, set by autoconf.
2405 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2407 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2409 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2410 CURRENT_FLOATING_POINT instead.
2412 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2413 (address_translation): Raise exception InstructionFetch when
2414 translation fails and isINSTRUCTION.
2416 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2417 sim_engine_run): Change type of of vaddr and paddr to
2419 (address_translation, prefetch, load_memory, store_memory,
2420 cache_op): Change type of vAddr and pAddr to address_word.
2422 * gencode.c (build_instruction): Change type of vaddr and paddr to
2425 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2427 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2428 macro to obtain result of ALU op.
2430 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2432 * interp.c (sim_info): Call profile_print.
2434 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2436 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2438 * sim-main.h (WITH_PROFILE): Do not define, defined in
2439 common/sim-config.h. Use sim-profile module.
2440 (simPROFILE): Delete defintion.
2442 * interp.c (PROFILE): Delete definition.
2443 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2444 (sim_close): Delete code writing profile histogram.
2445 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2447 (sim_engine_run): Delete code profiling the PC.
2449 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2451 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2453 * interp.c (sim_monitor): Make register pointers of type
2456 * sim-main.h: Make registers of type unsigned_word not
2459 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2461 * interp.c (sync_operation): Rename from SyncOperation, make
2462 global, add SD argument.
2463 (prefetch): Rename from Prefetch, make global, add SD argument.
2464 (decode_coproc): Make global.
2466 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2468 * gencode.c (build_instruction): Generate DecodeCoproc not
2469 decode_coproc calls.
2471 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2472 (SizeFGR): Move to sim-main.h
2473 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2474 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2475 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2477 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2478 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2479 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2480 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2481 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2482 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2484 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2486 (sim-alu.h): Include.
2487 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2488 (sim_cia): Typedef to instruction_address.
2490 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2492 * Makefile.in (interp.o): Rename generated file engine.c to
2497 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2499 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2501 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2503 * gencode.c (build_instruction): For "FPSQRT", output correct
2504 number of arguments to Recip.
2506 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2508 * Makefile.in (interp.o): Depends on sim-main.h
2510 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2512 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2513 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2514 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2515 STATE, DSSTATE): Define
2516 (GPR, FGRIDX, ..): Define.
2518 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2519 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2520 (GPR, FGRIDX, ...): Delete macros.
2522 * interp.c: Update names to match defines from sim-main.h
2524 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2526 * interp.c (sim_monitor): Add SD argument.
2527 (sim_warning): Delete. Replace calls with calls to
2529 (sim_error): Delete. Replace calls with sim_io_error.
2530 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2531 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2532 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2534 (mips_size): Rename from sim_size. Add SD argument.
2536 * interp.c (simulator): Delete global variable.
2537 (callback): Delete global variable.
2538 (mips_option_handler, sim_open, sim_write, sim_read,
2539 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2540 sim_size,sim_monitor): Use sim_io_* not callback->*.
2541 (sim_open): ZALLOC simulator struct.
2542 (PROFILE): Do not define.
2544 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2546 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2547 support.h with corresponding code.
2549 * sim-main.h (word64, uword64), support.h: Move definition to
2551 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2554 * Makefile.in: Update dependencies
2555 * interp.c: Do not include.
2557 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2559 * interp.c (address_translation, load_memory, store_memory,
2560 cache_op): Rename to from AddressTranslation et.al., make global,
2563 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2566 * interp.c (SignalException): Rename to signal_exception, make
2569 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2571 * sim-main.h (SignalException, SignalExceptionInterrupt,
2572 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2573 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2574 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2577 * interp.c, support.h: Use.
2579 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2581 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2582 to value_fpr / store_fpr. Add SD argument.
2583 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2584 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2586 * sim-main.h (ValueFPR, StoreFPR): Define.
2588 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2590 * interp.c (sim_engine_run): Check consistency between configure
2591 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2594 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2595 (mips_fpu): Configure WITH_FLOATING_POINT.
2596 (mips_endian): Configure WITH_TARGET_ENDIAN.
2597 * configure: Update.
2599 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2601 * configure: Regenerated to track ../common/aclocal.m4 changes.
2603 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2605 * configure: Regenerated.
2607 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2609 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2611 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2613 * gencode.c (print_igen_insn_models): Assume certain architectures
2614 include all mips* instructions.
2615 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2618 * Makefile.in (tmp.igen): Add target. Generate igen input from
2621 * gencode.c (FEATURE_IGEN): Define.
2622 (main): Add --igen option. Generate output in igen format.
2623 (process_instructions): Format output according to igen option.
2624 (print_igen_insn_format): New function.
2625 (print_igen_insn_models): New function.
2626 (process_instructions): Only issue warnings and ignore
2627 instructions when no FEATURE_IGEN.
2629 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2631 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2634 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2636 * configure: Regenerated to track ../common/aclocal.m4 changes.
2638 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2640 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2641 SIM_RESERVED_BITS): Delete, moved to common.
2642 (SIM_EXTRA_CFLAGS): Update.
2644 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2646 * configure.in: Configure non-strict memory alignment.
2647 * configure: Regenerated to track ../common/aclocal.m4 changes.
2649 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2651 * configure: Regenerated to track ../common/aclocal.m4 changes.
2653 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2655 * gencode.c (SDBBP,DERET): Added (3900) insns.
2656 (RFE): Turn on for 3900.
2657 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2658 (dsstate): Made global.
2659 (SUBTARGET_R3900): Added.
2660 (CANCELDELAYSLOT): New.
2661 (SignalException): Ignore SystemCall rather than ignore and
2662 terminate. Add DebugBreakPoint handling.
2663 (decode_coproc): New insns RFE, DERET; and new registers Debug
2664 and DEPC protected by SUBTARGET_R3900.
2665 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2667 * Makefile.in,configure.in: Add mips subtarget option.
2668 * configure: Update.
2670 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2672 * gencode.c: Add r3900 (tx39).
2675 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2677 * gencode.c (build_instruction): Don't need to subtract 4 for
2680 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2682 * interp.c: Correct some HASFPU problems.
2684 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2686 * configure: Regenerated to track ../common/aclocal.m4 changes.
2688 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2690 * interp.c (mips_options): Fix samples option short form, should
2693 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2695 * interp.c (sim_info): Enable info code. Was just returning.
2697 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2699 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2702 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2704 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2706 (build_instruction): Ditto for LL.
2708 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2710 * configure: Regenerated to track ../common/aclocal.m4 changes.
2712 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2714 * configure: Regenerated to track ../common/aclocal.m4 changes.
2717 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2719 * interp.c (sim_open): Add call to sim_analyze_program, update
2722 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2724 * interp.c (sim_kill): Delete.
2725 (sim_create_inferior): Add ABFD argument. Set PC from same.
2726 (sim_load): Move code initializing trap handlers from here.
2727 (sim_open): To here.
2728 (sim_load): Delete, use sim-hload.c.
2730 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2732 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2734 * configure: Regenerated to track ../common/aclocal.m4 changes.
2737 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2739 * interp.c (sim_open): Add ABFD argument.
2740 (sim_load): Move call to sim_config from here.
2741 (sim_open): To here. Check return status.
2743 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2745 * gencode.c (build_instruction): Two arg MADD should
2746 not assign result to $0.
2748 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2750 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2751 * sim/mips/configure.in: Regenerate.
2753 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2755 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2756 signed8, unsigned8 et.al. types.
2758 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2759 hosts when selecting subreg.
2761 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2763 * interp.c (sim_engine_run): Reset the ZERO register to zero
2764 regardless of FEATURE_WARN_ZERO.
2765 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2767 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2769 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2770 (SignalException): For BreakPoints ignore any mode bits and just
2772 (SignalException): Always set the CAUSE register.
2774 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2776 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2777 exception has been taken.
2779 * interp.c: Implement the ERET and mt/f sr instructions.
2781 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2783 * interp.c (SignalException): Don't bother restarting an
2786 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2788 * interp.c (SignalException): Really take an interrupt.
2789 (interrupt_event): Only deliver interrupts when enabled.
2791 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * interp.c (sim_info): Only print info when verbose.
2794 (sim_info) Use sim_io_printf for output.
2796 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2801 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2803 * interp.c (sim_do_command): Check for common commands if a
2804 simulator specific command fails.
2806 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2808 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2809 and simBE when DEBUG is defined.
2811 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2813 * interp.c (interrupt_event): New function. Pass exception event
2814 onto exception handler.
2816 * configure.in: Check for stdlib.h.
2817 * configure: Regenerate.
2819 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2820 variable declaration.
2821 (build_instruction): Initialize memval1.
2822 (build_instruction): Add UNUSED attribute to byte, bigend,
2824 (build_operands): Ditto.
2826 * interp.c: Fix GCC warnings.
2827 (sim_get_quit_code): Delete.
2829 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2830 * Makefile.in: Ditto.
2831 * configure: Re-generate.
2833 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2835 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2837 * interp.c (mips_option_handler): New function parse argumes using
2839 (myname): Replace with STATE_MY_NAME.
2840 (sim_open): Delete check for host endianness - performed by
2842 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2843 (sim_open): Move much of the initialization from here.
2844 (sim_load): To here. After the image has been loaded and
2846 (sim_open): Move ColdReset from here.
2847 (sim_create_inferior): To here.
2848 (sim_open): Make FP check less dependant on host endianness.
2850 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2852 * interp.c (sim_set_callbacks): Delete.
2854 * interp.c (membank, membank_base, membank_size): Replace with
2855 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2856 (sim_open): Remove call to callback->init. gdb/run do this.
2860 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2862 * interp.c (big_endian_p): Delete, replaced by
2863 current_target_byte_order.
2865 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2867 * interp.c (host_read_long, host_read_word, host_swap_word,
2868 host_swap_long): Delete. Using common sim-endian.
2869 (sim_fetch_register, sim_store_register): Use H2T.
2870 (pipeline_ticks): Delete. Handled by sim-events.
2872 (sim_engine_run): Update.
2874 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2876 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2878 (SignalException): To here. Signal using sim_engine_halt.
2879 (sim_stop_reason): Delete, moved to common.
2881 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2883 * interp.c (sim_open): Add callback argument.
2884 (sim_set_callbacks): Delete SIM_DESC argument.
2887 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2889 * Makefile.in (SIM_OBJS): Add common modules.
2891 * interp.c (sim_set_callbacks): Also set SD callback.
2892 (set_endianness, xfer_*, swap_*): Delete.
2893 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2894 Change to functions using sim-endian macros.
2895 (control_c, sim_stop): Delete, use common version.
2896 (simulate): Convert into.
2897 (sim_engine_run): This function.
2898 (sim_resume): Delete.
2900 * interp.c (simulation): New variable - the simulator object.
2901 (sim_kind): Delete global - merged into simulation.
2902 (sim_load): Cleanup. Move PC assignment from here.
2903 (sim_create_inferior): To here.
2905 * sim-main.h: New file.
2906 * interp.c (sim-main.h): Include.
2908 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
2910 * configure: Regenerated to track ../common/aclocal.m4 changes.
2912 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
2914 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2916 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
2918 * gencode.c (build_instruction): DIV instructions: check
2919 for division by zero and integer overflow before using
2920 host's division operation.
2922 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
2924 * Makefile.in (SIM_OBJS): Add sim-load.o.
2925 * interp.c: #include bfd.h.
2926 (target_byte_order): Delete.
2927 (sim_kind, myname, big_endian_p): New static locals.
2928 (sim_open): Set sim_kind, myname. Move call to set_endianness to
2929 after argument parsing. Recognize -E arg, set endianness accordingly.
2930 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
2931 load file into simulator. Set PC from bfd.
2932 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
2933 (set_endianness): Use big_endian_p instead of target_byte_order.
2935 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
2937 * interp.c (sim_size): Delete prototype - conflicts with
2938 definition in remote-sim.h. Correct definition.
2940 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2942 * configure: Regenerated to track ../common/aclocal.m4 changes.
2945 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
2947 * interp.c (sim_open): New arg `kind'.
2949 * configure: Regenerated to track ../common/aclocal.m4 changes.
2951 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2953 * configure: Regenerated to track ../common/aclocal.m4 changes.
2955 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
2957 * interp.c (sim_open): Set optind to 0 before calling getopt.
2959 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2961 * configure: Regenerated to track ../common/aclocal.m4 changes.
2963 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
2965 * interp.c : Replace uses of pr_addr with pr_uword64
2966 where the bit length is always 64 independent of SIM_ADDR.
2967 (pr_uword64) : added.
2969 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2971 * configure: Re-generate.
2973 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
2975 * configure: Regenerate to track ../common/aclocal.m4 changes.
2977 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
2979 * interp.c (sim_open): New SIM_DESC result. Argument is now
2981 (other sim_*): New SIM_DESC argument.
2983 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
2985 * interp.c: Fix printing of addresses for non-64-bit targets.
2986 (pr_addr): Add function to print address based on size.
2988 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
2990 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2992 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
2994 * gencode.c (build_mips16_operands): Correct computation of base
2995 address for extended PC relative instruction.
2997 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2999 * interp.c (mips16_entry): Add support for floating point cases.
3000 (SignalException): Pass floating point cases to mips16_entry.
3001 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3003 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3005 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3006 and then set the state to fmt_uninterpreted.
3007 (COP_SW): Temporarily set the state to fmt_word while calling
3010 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3012 * gencode.c (build_instruction): The high order may be set in the
3013 comparison flags at any ISA level, not just ISA 4.
3015 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3017 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3018 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3019 * configure.in: sinclude ../common/aclocal.m4.
3020 * configure: Regenerated.
3022 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3024 * configure: Rebuild after change to aclocal.m4.
3026 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3028 * configure configure.in Makefile.in: Update to new configure
3029 scheme which is more compatible with WinGDB builds.
3030 * configure.in: Improve comment on how to run autoconf.
3031 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3032 * Makefile.in: Use autoconf substitution to install common
3035 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3037 * gencode.c (build_instruction): Use BigEndianCPU instead of
3040 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3042 * interp.c (sim_monitor): Make output to stdout visible in
3043 wingdb's I/O log window.
3045 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3047 * support.h: Undo previous change to SIGTRAP
3050 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3052 * interp.c (store_word, load_word): New static functions.
3053 (mips16_entry): New static function.
3054 (SignalException): Look for mips16 entry and exit instructions.
3055 (simulate): Use the correct index when setting fpr_state after
3056 doing a pending move.
3058 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3060 * interp.c: Fix byte-swapping code throughout to work on
3061 both little- and big-endian hosts.
3063 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3065 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3066 with gdb/config/i386/xm-windows.h.
3068 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3070 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3071 that messes up arithmetic shifts.
3073 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3075 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3076 SIGTRAP and SIGQUIT for _WIN32.
3078 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3080 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3081 force a 64 bit multiplication.
3082 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3083 destination register is 0, since that is the default mips16 nop
3086 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3088 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3089 (build_endian_shift): Don't check proc64.
3090 (build_instruction): Always set memval to uword64. Cast op2 to
3091 uword64 when shifting it left in memory instructions. Always use
3092 the same code for stores--don't special case proc64.
3094 * gencode.c (build_mips16_operands): Fix base PC value for PC
3096 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3098 * interp.c (simJALDELAYSLOT): Define.
3099 (JALDELAYSLOT): Define.
3100 (INDELAYSLOT, INJALDELAYSLOT): Define.
3101 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3103 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3105 * interp.c (sim_open): add flush_cache as a PMON routine
3106 (sim_monitor): handle flush_cache by ignoring it
3108 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3110 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3112 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3113 (BigEndianMem): Rename to ByteSwapMem and change sense.
3114 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3115 BigEndianMem references to !ByteSwapMem.
3116 (set_endianness): New function, with prototype.
3117 (sim_open): Call set_endianness.
3118 (sim_info): Use simBE instead of BigEndianMem.
3119 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3120 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3121 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3122 ifdefs, keeping the prototype declaration.
3123 (swap_word): Rewrite correctly.
3124 (ColdReset): Delete references to CONFIG. Delete endianness related
3125 code; moved to set_endianness.
3127 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3129 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3130 * interp.c (CHECKHILO): Define away.
3131 (simSIGINT): New macro.
3132 (membank_size): Increase from 1MB to 2MB.
3133 (control_c): New function.
3134 (sim_resume): Rename parameter signal to signal_number. Add local
3135 variable prev. Call signal before and after simulate.
3136 (sim_stop_reason): Add simSIGINT support.
3137 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3139 (sim_warning): Delete call to SignalException. Do call printf_filtered
3141 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3142 a call to sim_warning.
3144 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3146 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3147 16 bit instructions.
3149 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3151 Add support for mips16 (16 bit MIPS implementation):
3152 * gencode.c (inst_type): Add mips16 instruction encoding types.
3153 (GETDATASIZEINSN): Define.
3154 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3155 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3157 (MIPS16_DECODE): New table, for mips16 instructions.
3158 (bitmap_val): New static function.
3159 (struct mips16_op): Define.
3160 (mips16_op_table): New table, for mips16 operands.
3161 (build_mips16_operands): New static function.
3162 (process_instructions): If PC is odd, decode a mips16
3163 instruction. Break out instruction handling into new
3164 build_instruction function.
3165 (build_instruction): New static function, broken out of
3166 process_instructions. Check modifiers rather than flags for SHIFT
3167 bit count and m[ft]{hi,lo} direction.
3168 (usage): Pass program name to fprintf.
3169 (main): Remove unused variable this_option_optind. Change
3170 ``*loptarg++'' to ``loptarg++''.
3171 (my_strtoul): Parenthesize && within ||.
3172 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3173 (simulate): If PC is odd, fetch a 16 bit instruction, and
3174 increment PC by 2 rather than 4.
3175 * configure.in: Add case for mips16*-*-*.
3176 * configure: Rebuild.
3178 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3180 * interp.c: Allow -t to enable tracing in standalone simulator.
3181 Fix garbage output in trace file and error messages.
3183 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3185 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3186 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3187 * configure.in: Simplify using macros in ../common/aclocal.m4.
3188 * configure: Regenerated.
3189 * tconfig.in: New file.
3191 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3193 * interp.c: Fix bugs in 64-bit port.
3194 Use ansi function declarations for msvc compiler.
3195 Initialize and test file pointer in trace code.
3196 Prevent duplicate definition of LAST_EMED_REGNUM.
3198 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3200 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3202 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3204 * interp.c (SignalException): Check for explicit terminating
3206 * gencode.c: Pass instruction value through SignalException()
3207 calls for Trap, Breakpoint and Syscall.
3209 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3211 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3212 only used on those hosts that provide it.
3213 * configure.in: Add sqrt() to list of functions to be checked for.
3214 * config.in: Re-generated.
3215 * configure: Re-generated.
3217 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3219 * gencode.c (process_instructions): Call build_endian_shift when
3220 expanding STORE RIGHT, to fix swr.
3221 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3222 clear the high bits.
3223 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3224 Fix float to int conversions to produce signed values.
3226 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3228 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3229 (process_instructions): Correct handling of nor instruction.
3230 Correct shift count for 32 bit shift instructions. Correct sign
3231 extension for arithmetic shifts to not shift the number of bits in
3232 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3233 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3235 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3236 It's OK to have a mult follow a mult. What's not OK is to have a
3237 mult follow an mfhi.
3238 (Convert): Comment out incorrect rounding code.
3240 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3242 * interp.c (sim_monitor): Improved monitor printf
3243 simulation. Tidied up simulator warnings, and added "--log" option
3244 for directing warning message output.
3245 * gencode.c: Use sim_warning() rather than WARNING macro.
3247 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3249 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3250 getopt1.o, rather than on gencode.c. Link objects together.
3251 Don't link against -liberty.
3252 (gencode.o, getopt.o, getopt1.o): New targets.
3253 * gencode.c: Include <ctype.h> and "ansidecl.h".
3254 (AND): Undefine after including "ansidecl.h".
3255 (ULONG_MAX): Define if not defined.
3256 (OP_*): Don't define macros; now defined in opcode/mips.h.
3257 (main): Call my_strtoul rather than strtoul.
3258 (my_strtoul): New static function.
3260 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3262 * gencode.c (process_instructions): Generate word64 and uword64
3263 instead of `long long' and `unsigned long long' data types.
3264 * interp.c: #include sysdep.h to get signals, and define default
3266 * (Convert): Work around for Visual-C++ compiler bug with type
3268 * support.h: Make things compile under Visual-C++ by using
3269 __int64 instead of `long long'. Change many refs to long long
3270 into word64/uword64 typedefs.
3272 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3274 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3275 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3277 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3278 (AC_PROG_INSTALL): Added.
3279 (AC_PROG_CC): Moved to before configure.host call.
3280 * configure: Rebuilt.
3282 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3284 * configure.in: Define @SIMCONF@ depending on mips target.
3285 * configure: Rebuild.
3286 * Makefile.in (run): Add @SIMCONF@ to control simulator
3288 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3289 * interp.c: Remove some debugging, provide more detailed error
3290 messages, update memory accesses to use LOADDRMASK.
3292 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3294 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3295 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3297 * configure: Rebuild.
3298 * config.in: New file, generated by autoheader.
3299 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3300 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3301 HAVE_ANINT and HAVE_AINT, as appropriate.
3302 * Makefile.in (run): Use @LIBS@ rather than -lm.
3303 (interp.o): Depend upon config.h.
3304 (Makefile): Just rebuild Makefile.
3305 (clean): Remove stamp-h.
3306 (mostlyclean): Make the same as clean, not as distclean.
3307 (config.h, stamp-h): New targets.
3309 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3311 * interp.c (ColdReset): Fix boolean test. Make all simulator
3314 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3316 * interp.c (xfer_direct_word, xfer_direct_long,
3317 swap_direct_word, swap_direct_long, xfer_big_word,
3318 xfer_big_long, xfer_little_word, xfer_little_long,
3319 swap_word,swap_long): Added.
3320 * interp.c (ColdReset): Provide function indirection to
3321 host<->simulated_target transfer routines.
3322 * interp.c (sim_store_register, sim_fetch_register): Updated to
3323 make use of indirected transfer routines.
3325 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3327 * gencode.c (process_instructions): Ensure FP ABS instruction
3329 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3330 system call support.
3332 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3334 * interp.c (sim_do_command): Complain if callback structure not
3337 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3339 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3340 support for Sun hosts.
3341 * Makefile.in (gencode): Ensure the host compiler and libraries
3342 used for cross-hosted build.
3344 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3346 * interp.c, gencode.c: Some more (TODO) tidying.
3348 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3350 * gencode.c, interp.c: Replaced explicit long long references with
3351 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3352 * support.h (SET64LO, SET64HI): Macros added.
3354 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3356 * configure: Regenerate with autoconf 2.7.
3358 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3360 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3361 * support.h: Remove superfluous "1" from #if.
3362 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3364 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3366 * interp.c (StoreFPR): Control UndefinedResult() call on
3367 WARN_RESULT manifest.
3369 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3371 * gencode.c: Tidied instruction decoding, and added FP instruction
3374 * interp.c: Added dineroIII, and BSD profiling support. Also
3375 run-time FP handling.
3377 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3379 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3380 gencode.c, interp.c, support.h: created.