1 2015-12-27 Mike Frysinger <vapier@gentoo.org>
3 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
5 2015-12-26 Mike Frysinger <vapier@gentoo.org>
7 * config.in, configure: Regenerate.
9 2015-12-26 Mike Frysinger <vapier@gentoo.org>
11 * interp.c (sim_write, sim_read): Delete.
12 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
13 (load_word): Likewise.
14 * micromips.igen (cache): Likewise.
15 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
16 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
17 do_store_left, do_store_right, do_load_double, do_store_double):
19 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
21 * sim-main.c (address_translation, prefetch): Delete.
22 (ifetch32, ifetch16): Delete call to AddressTranslation and set
24 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
25 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
26 (LoadMemory, StoreMemory): Delete CCA arg.
28 2015-12-24 Mike Frysinger <vapier@gentoo.org>
30 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
31 * configure: Regenerated.
33 2015-12-24 Mike Frysinger <vapier@gentoo.org>
35 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
38 2015-12-24 Mike Frysinger <vapier@gentoo.org>
40 * tconfig.h (SIM_HANDLES_LMA): Delete.
42 2015-12-24 Mike Frysinger <vapier@gentoo.org>
44 * sim-main.h (WITH_WATCHPOINTS): Delete.
46 2015-12-24 Mike Frysinger <vapier@gentoo.org>
48 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
50 2015-12-24 Mike Frysinger <vapier@gentoo.org>
52 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
54 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
56 * micromips.igen (process_isa_mode): Fix left shift of negative
59 2015-11-17 Mike Frysinger <vapier@gentoo.org>
61 * sim-main.h (WITH_MODULO_MEMORY): Delete.
63 2015-11-15 Mike Frysinger <vapier@gentoo.org>
65 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
67 2015-11-14 Mike Frysinger <vapier@gentoo.org>
69 * interp.c (sim_close): Rename to ...
70 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
72 * sim-main.h (mips_sim_close): Declare.
73 (SIM_CLOSE_HOOK): Define.
75 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
76 Ali Lown <ali.lown@imgtec.com>
78 * Makefile.in (tmp-micromips): New rule.
79 (tmp-mach-multi): Add support for micromips.
80 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
81 that works for both mips64 and micromips64.
82 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
84 Add build support for micromips.
85 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
86 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
87 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
88 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
89 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
90 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
91 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
92 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
93 Refactored instruction code to use these functions.
94 * dsp2.igen: Refactored instruction code to use the new functions.
95 * interp.c (decode_coproc): Refactored to work with any instruction
97 (isa_mode): New variable
98 (RSVD_INSTRUCTION): Changed to 0x00000039.
99 * m16.igen (BREAK16): Refactored instruction to use do_break16.
100 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
101 * micromips.dc: New file.
102 * micromips.igen: New file.
103 * micromips16.dc: New file.
104 * micromipsdsp.igen: New file.
105 * micromipsrun.c: New file.
106 * mips.igen (do_swc1): Changed to work with any instruction encoding.
107 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
108 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
109 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
110 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
111 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
112 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
113 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
114 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
115 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
116 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
117 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
118 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
119 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
120 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
121 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
122 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
123 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
124 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
126 Refactored instruction code to use these functions.
127 (RSVD): Changed to use new reserved instruction.
128 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
129 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
130 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
131 do_store_double): Added micromips32 and micromips64 models.
132 Added include for micromips.igen and micromipsdsp.igen
133 Add micromips32 and micromips64 models.
134 (DecodeCoproc): Updated to use new macro definition.
135 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
136 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
137 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
138 Refactored instruction code to use these functions.
139 * sim-main.h (CP0_operation): New enum.
140 (DecodeCoproc): Updated macro.
141 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
142 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
143 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
144 ISA_MODE_MICROMIPS): New defines.
145 (sim_state): Add isa_mode field.
147 2015-06-23 Mike Frysinger <vapier@gentoo.org>
149 * configure: Regenerate.
151 2015-06-12 Mike Frysinger <vapier@gentoo.org>
153 * configure.ac: Change configure.in to configure.ac.
154 * configure: Regenerate.
156 2015-06-12 Mike Frysinger <vapier@gentoo.org>
158 * configure: Regenerate.
160 2015-06-12 Mike Frysinger <vapier@gentoo.org>
162 * interp.c [TRACE]: Delete.
163 (TRACE): Change to WITH_TRACE_ANY_P.
164 [!WITH_TRACE_ANY_P] (open_trace): Define.
165 (mips_option_handler, open_trace, sim_close, dotrace):
166 Change defined(TRACE) to WITH_TRACE_ANY_P.
167 (sim_open): Delete TRACE ifdef check.
168 * sim-main.c (load_memory): Delete TRACE ifdef check.
169 (store_memory): Likewise.
170 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
171 [!WITH_TRACE_ANY_P] (dotrace): Define.
173 2015-04-18 Mike Frysinger <vapier@gentoo.org>
175 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
178 2015-04-18 Mike Frysinger <vapier@gentoo.org>
180 * sim-main.h (SIM_CPU): Delete.
182 2015-04-18 Mike Frysinger <vapier@gentoo.org>
184 * sim-main.h (sim_cia): Delete.
186 2015-04-17 Mike Frysinger <vapier@gentoo.org>
188 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
190 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
191 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
192 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
193 CIA_SET to CPU_PC_SET.
194 * sim-main.h (CIA_GET, CIA_SET): Delete.
196 2015-04-15 Mike Frysinger <vapier@gentoo.org>
198 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
199 * sim-main.h (STATE_CPU): Delete.
201 2015-04-13 Mike Frysinger <vapier@gentoo.org>
203 * configure: Regenerate.
205 2015-04-13 Mike Frysinger <vapier@gentoo.org>
207 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
208 * interp.c (mips_pc_get, mips_pc_set): New functions.
209 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
210 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
211 (sim_pc_get): Delete.
212 * sim-main.h (SIM_CPU): Define.
213 (struct sim_state): Change cpu to an array of pointers.
216 2015-04-13 Mike Frysinger <vapier@gentoo.org>
218 * interp.c (mips_option_handler, open_trace, sim_close,
219 sim_write, sim_read, sim_store_register, sim_fetch_register,
220 sim_create_inferior, pr_addr, pr_uword64): Convert old style
222 (sim_open): Convert old style prototype. Change casts with
223 sim_write to unsigned char *.
224 (fetch_str): Change null to unsigned char, and change cast to
226 (sim_monitor): Change c & ch to unsigned char. Change cast to
229 2015-04-12 Mike Frysinger <vapier@gentoo.org>
231 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
233 2015-04-06 Mike Frysinger <vapier@gentoo.org>
235 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
237 2015-04-01 Mike Frysinger <vapier@gentoo.org>
239 * tconfig.h (SIM_HAVE_PROFILE): Delete.
241 2015-03-31 Mike Frysinger <vapier@gentoo.org>
243 * config.in, configure: Regenerate.
245 2015-03-24 Mike Frysinger <vapier@gentoo.org>
247 * interp.c (sim_pc_get): New function.
249 2015-03-24 Mike Frysinger <vapier@gentoo.org>
251 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
252 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
254 2015-03-24 Mike Frysinger <vapier@gentoo.org>
256 * configure: Regenerate.
258 2015-03-23 Mike Frysinger <vapier@gentoo.org>
260 * configure: Regenerate.
262 2015-03-23 Mike Frysinger <vapier@gentoo.org>
264 * configure: Regenerate.
265 * configure.ac (mips_extra_objs): Delete.
266 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
267 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
269 2015-03-23 Mike Frysinger <vapier@gentoo.org>
271 * configure: Regenerate.
272 * configure.ac: Delete sim_hw checks for dv-sockser.
274 2015-03-16 Mike Frysinger <vapier@gentoo.org>
276 * config.in, configure: Regenerate.
277 * tconfig.in: Rename file ...
278 * tconfig.h: ... here.
280 2015-03-15 Mike Frysinger <vapier@gentoo.org>
282 * tconfig.in: Delete includes.
283 [HAVE_DV_SOCKSER]: Delete.
285 2015-03-14 Mike Frysinger <vapier@gentoo.org>
287 * Makefile.in (SIM_RUN_OBJS): Delete.
289 2015-03-14 Mike Frysinger <vapier@gentoo.org>
291 * configure.ac (AC_CHECK_HEADERS): Delete.
292 * aclocal.m4, configure: Regenerate.
294 2014-08-19 Alan Modra <amodra@gmail.com>
296 * configure: Regenerate.
298 2014-08-15 Roland McGrath <mcgrathr@google.com>
300 * configure: Regenerate.
301 * config.in: Regenerate.
303 2014-03-04 Mike Frysinger <vapier@gentoo.org>
305 * configure: Regenerate.
307 2013-09-23 Alan Modra <amodra@gmail.com>
309 * configure: Regenerate.
311 2013-06-03 Mike Frysinger <vapier@gentoo.org>
313 * aclocal.m4, configure: Regenerate.
315 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
317 * configure: Rebuild.
319 2013-03-26 Mike Frysinger <vapier@gentoo.org>
321 * configure: Regenerate.
323 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
325 * configure.ac: Address use of dv-sockser.o.
326 * tconfig.in: Conditionalize use of dv_sockser_install.
327 * configure: Regenerated.
328 * config.in: Regenerated.
330 2012-10-04 Chao-ying Fu <fu@mips.com>
331 Steve Ellcey <sellcey@mips.com>
333 * mips/mips3264r2.igen (rdhwr): New.
335 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
337 * configure.ac: Always link against dv-sockser.o.
338 * configure: Regenerate.
340 2012-06-15 Joel Brobecker <brobecker@adacore.com>
342 * config.in, configure: Regenerate.
344 2012-05-18 Nick Clifton <nickc@redhat.com>
347 * interp.c: Include config.h before system header files.
349 2012-03-24 Mike Frysinger <vapier@gentoo.org>
351 * aclocal.m4, config.in, configure: Regenerate.
353 2011-12-03 Mike Frysinger <vapier@gentoo.org>
355 * aclocal.m4: New file.
356 * configure: Regenerate.
358 2011-10-19 Mike Frysinger <vapier@gentoo.org>
360 * configure: Regenerate after common/acinclude.m4 update.
362 2011-10-17 Mike Frysinger <vapier@gentoo.org>
364 * configure.ac: Change include to common/acinclude.m4.
366 2011-10-17 Mike Frysinger <vapier@gentoo.org>
368 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
369 call. Replace common.m4 include with SIM_AC_COMMON.
370 * configure: Regenerate.
372 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
374 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
376 (tmp-mach-multi): Exit early when igen fails.
378 2011-07-05 Mike Frysinger <vapier@gentoo.org>
380 * interp.c (sim_do_command): Delete.
382 2011-02-14 Mike Frysinger <vapier@gentoo.org>
384 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
385 (tx3904sio_fifo_reset): Likewise.
386 * interp.c (sim_monitor): Likewise.
388 2010-04-14 Mike Frysinger <vapier@gentoo.org>
390 * interp.c (sim_write): Add const to buffer arg.
392 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
394 * interp.c: Don't include sysdep.h
396 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
398 * configure: Regenerate.
400 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
402 * config.in: Regenerate.
403 * configure: Likewise.
405 * configure: Regenerate.
407 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
409 * configure: Regenerate to track ../common/common.m4 changes.
412 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
413 Daniel Jacobowitz <dan@codesourcery.com>
414 Joseph Myers <joseph@codesourcery.com>
416 * configure: Regenerate.
418 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
420 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
421 that unconditionally allows fmt_ps.
422 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
423 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
424 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
425 filter from 64,f to 32,f.
426 (PREFX): Change filter from 64 to 32.
427 (LDXC1, LUXC1): Provide separate mips32r2 implementations
428 that use do_load_double instead of do_load. Make both LUXC1
429 versions unpredictable if SizeFGR () != 64.
430 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
431 instead of do_store. Remove unused variable. Make both SUXC1
432 versions unpredictable if SizeFGR () != 64.
434 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
436 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
437 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
438 shifts for that case.
440 2007-09-04 Nick Clifton <nickc@redhat.com>
442 * interp.c (options enum): Add OPTION_INFO_MEMORY.
443 (display_mem_info): New static variable.
444 (mips_option_handler): Handle OPTION_INFO_MEMORY.
445 (mips_options): Add info-memory and memory-info.
446 (sim_open): After processing the command line and board
447 specification, check display_mem_info. If it is set then
448 call the real handler for the --memory-info command line
451 2007-08-24 Joel Brobecker <brobecker@adacore.com>
453 * configure.ac: Change license of multi-run.c to GPL version 3.
454 * configure: Regenerate.
456 2007-06-28 Richard Sandiford <richard@codesourcery.com>
458 * configure.ac, configure: Revert last patch.
460 2007-06-26 Richard Sandiford <richard@codesourcery.com>
462 * configure.ac (sim_mipsisa3264_configs): New variable.
463 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
464 every configuration support all four targets, using the triplet to
465 determine the default.
466 * configure: Regenerate.
468 2007-06-25 Richard Sandiford <richard@codesourcery.com>
470 * Makefile.in (m16run.o): New rule.
472 2007-05-15 Thiemo Seufer <ths@mips.com>
474 * mips3264r2.igen (DSHD): Fix compile warning.
476 2007-05-14 Thiemo Seufer <ths@mips.com>
478 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
479 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
480 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
481 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
484 2007-03-01 Thiemo Seufer <ths@mips.com>
486 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
489 2007-02-20 Thiemo Seufer <ths@mips.com>
491 * dsp.igen: Update copyright notice.
492 * dsp2.igen: Fix copyright notice.
494 2007-02-20 Thiemo Seufer <ths@mips.com>
495 Chao-Ying Fu <fu@mips.com>
497 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
498 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
499 Add dsp2 to sim_igen_machine.
500 * configure: Regenerate.
501 * dsp.igen (do_ph_op): Add MUL support when op = 2.
502 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
503 (mulq_rs.ph): Use do_ph_mulq.
504 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
505 * mips.igen: Add dsp2 model and include dsp2.igen.
506 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
507 for *mips32r2, *mips64r2, *dsp.
508 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
509 for *mips32r2, *mips64r2, *dsp2.
510 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
512 2007-02-19 Thiemo Seufer <ths@mips.com>
513 Nigel Stephens <nigel@mips.com>
515 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
516 jumps with hazard barrier.
518 2007-02-19 Thiemo Seufer <ths@mips.com>
519 Nigel Stephens <nigel@mips.com>
521 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
522 after each call to sim_io_write.
524 2007-02-19 Thiemo Seufer <ths@mips.com>
525 Nigel Stephens <nigel@mips.com>
527 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
528 supported by this simulator.
529 (decode_coproc): Recognise additional CP0 Config registers
532 2007-02-19 Thiemo Seufer <ths@mips.com>
533 Nigel Stephens <nigel@mips.com>
534 David Ung <davidu@mips.com>
536 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
537 uninterpreted formats. If fmt is one of the uninterpreted types
538 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
539 fmt_word, and fmt_uninterpreted_64 like fmt_long.
540 (store_fpr): When writing an invalid odd register, set the
541 matching even register to fmt_unknown, not the following register.
542 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
543 the the memory window at offset 0 set by --memory-size command
545 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
547 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
549 (sim_monitor): When returning the memory size to the MIPS
550 application, use the value in STATE_MEM_SIZE, not an arbitrary
552 (cop_lw): Don' mess around with FPR_STATE, just pass
553 fmt_uninterpreted_32 to StoreFPR.
555 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
557 * mips.igen (not_word_value): Single version for mips32, mips64
560 2007-02-19 Thiemo Seufer <ths@mips.com>
561 Nigel Stephens <nigel@mips.com>
563 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
566 2007-02-17 Thiemo Seufer <ths@mips.com>
568 * configure.ac (mips*-sde-elf*): Move in front of generic machine
570 * configure: Regenerate.
572 2007-02-17 Thiemo Seufer <ths@mips.com>
574 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
575 Add mdmx to sim_igen_machine.
576 (mipsisa64*-*-*): Likewise. Remove dsp.
577 (mipsisa32*-*-*): Remove dsp.
578 * configure: Regenerate.
580 2007-02-13 Thiemo Seufer <ths@mips.com>
582 * configure.ac: Add mips*-sde-elf* target.
583 * configure: Regenerate.
585 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
587 * acconfig.h: Remove.
588 * config.in, configure: Regenerate.
590 2006-11-07 Thiemo Seufer <ths@mips.com>
592 * dsp.igen (do_w_op): Fix compiler warning.
594 2006-08-29 Thiemo Seufer <ths@mips.com>
595 David Ung <davidu@mips.com>
597 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
599 * configure: Regenerate.
600 * mips.igen (model): Add smartmips.
601 (MADDU): Increment ACX if carry.
602 (do_mult): Clear ACX.
603 (ROR,RORV): Add smartmips.
604 (include): Include smartmips.igen.
605 * sim-main.h (ACX): Set to REGISTERS[89].
606 * smartmips.igen: New file.
608 2006-08-29 Thiemo Seufer <ths@mips.com>
609 David Ung <davidu@mips.com>
611 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
612 mips3264r2.igen. Add missing dependency rules.
613 * m16e.igen: Support for mips16e save/restore instructions.
615 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
617 * configure: Regenerated.
619 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
621 * configure: Regenerated.
623 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
625 * configure: Regenerated.
627 2006-05-15 Chao-ying Fu <fu@mips.com>
629 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
631 2006-04-18 Nick Clifton <nickc@redhat.com>
633 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
636 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
638 * configure: Regenerate.
640 2005-12-14 Chao-ying Fu <fu@mips.com>
642 * Makefile.in (SIM_OBJS): Add dsp.o.
643 (dsp.o): New dependency.
644 (IGEN_INCLUDE): Add dsp.igen.
645 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
646 mipsisa64*-*-*): Add dsp to sim_igen_machine.
647 * configure: Regenerate.
648 * mips.igen: Add dsp model and include dsp.igen.
649 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
650 because these instructions are extended in DSP ASE.
651 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
652 adding 6 DSP accumulator registers and 1 DSP control register.
653 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
654 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
655 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
656 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
657 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
658 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
659 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
660 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
661 DSPCR_CCOND_SMASK): New define.
662 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
663 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
665 2005-07-08 Ian Lance Taylor <ian@airs.com>
667 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
669 2005-06-16 David Ung <davidu@mips.com>
670 Nigel Stephens <nigel@mips.com>
672 * mips.igen: New mips16e model and include m16e.igen.
673 (check_u64): Add mips16e tag.
674 * m16e.igen: New file for MIPS16e instructions.
675 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
676 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
678 * configure: Regenerate.
680 2005-05-26 David Ung <davidu@mips.com>
682 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
683 tags to all instructions which are applicable to the new ISAs.
684 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
686 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
688 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
690 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
691 * configure: Regenerate.
693 2005-03-23 Mark Kettenis <kettenis@gnu.org>
695 * configure: Regenerate.
697 2005-01-14 Andrew Cagney <cagney@gnu.org>
699 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
700 explicit call to AC_CONFIG_HEADER.
701 * configure: Regenerate.
703 2005-01-12 Andrew Cagney <cagney@gnu.org>
705 * configure.ac: Update to use ../common/common.m4.
706 * configure: Re-generate.
708 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
710 * configure: Regenerated to track ../common/aclocal.m4 changes.
712 2005-01-07 Andrew Cagney <cagney@gnu.org>
714 * configure.ac: Rename configure.in, require autoconf 2.59.
715 * configure: Re-generate.
717 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
719 * configure: Regenerate for ../common/aclocal.m4 update.
721 2004-09-24 Monika Chaddha <monika@acmet.com>
723 Committed by Andrew Cagney.
724 * m16.igen (CMP, CMPI): Fix assembler.
726 2004-08-18 Chris Demetriou <cgd@broadcom.com>
728 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
729 * configure: Regenerate.
731 2004-06-25 Chris Demetriou <cgd@broadcom.com>
733 * configure.in (sim_m16_machine): Include mipsIII.
734 * configure: Regenerate.
736 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
738 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
740 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
742 2004-04-10 Chris Demetriou <cgd@broadcom.com>
744 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
746 2004-04-09 Chris Demetriou <cgd@broadcom.com>
748 * mips.igen (check_fmt): Remove.
749 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
750 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
751 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
752 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
753 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
754 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
755 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
756 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
757 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
758 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
760 2004-04-09 Chris Demetriou <cgd@broadcom.com>
762 * sb1.igen (check_sbx): New function.
763 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
765 2004-03-29 Chris Demetriou <cgd@broadcom.com>
766 Richard Sandiford <rsandifo@redhat.com>
768 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
769 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
770 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
771 separate implementations for mipsIV and mipsV. Use new macros to
772 determine whether the restrictions apply.
774 2004-01-19 Chris Demetriou <cgd@broadcom.com>
776 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
777 (check_mult_hilo): Improve comments.
778 (check_div_hilo): Likewise. Also, fork off a new version
779 to handle mips32/mips64 (since there are no hazards to check
782 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
784 * mips.igen (do_dmultx): Fix check for negative operands.
786 2003-05-16 Ian Lance Taylor <ian@airs.com>
788 * Makefile.in (SHELL): Make sure this is defined.
789 (various): Use $(SHELL) whenever we invoke move-if-change.
791 2003-05-03 Chris Demetriou <cgd@broadcom.com>
793 * cp1.c: Tweak attribution slightly.
796 * mdmx.igen: Likewise.
797 * mips3d.igen: Likewise.
798 * sb1.igen: Likewise.
800 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
802 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
805 2003-02-27 Andrew Cagney <cagney@redhat.com>
807 * interp.c (sim_open): Rename _bfd to bfd.
808 (sim_create_inferior): Ditto.
810 2003-01-14 Chris Demetriou <cgd@broadcom.com>
812 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
814 2003-01-14 Chris Demetriou <cgd@broadcom.com>
816 * mips.igen (EI, DI): Remove.
818 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
820 * Makefile.in (tmp-run-multi): Fix mips16 filter.
822 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
823 Andrew Cagney <ac131313@redhat.com>
824 Gavin Romig-Koch <gavin@redhat.com>
825 Graydon Hoare <graydon@redhat.com>
826 Aldy Hernandez <aldyh@redhat.com>
827 Dave Brolley <brolley@redhat.com>
828 Chris Demetriou <cgd@broadcom.com>
830 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
831 (sim_mach_default): New variable.
832 (mips64vr-*-*, mips64vrel-*-*): New configurations.
833 Add a new simulator generator, MULTI.
834 * configure: Regenerate.
835 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
836 (multi-run.o): New dependency.
837 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
838 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
839 (tmp-multi): Combine them.
840 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
841 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
842 (distclean-extra): New rule.
843 * sim-main.h: Include bfd.h.
844 (MIPS_MACH): New macro.
845 * mips.igen (vr4120, vr5400, vr5500): New models.
846 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
847 * vr.igen: Replace with new version.
849 2003-01-04 Chris Demetriou <cgd@broadcom.com>
851 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
852 * configure: Regenerate.
854 2002-12-31 Chris Demetriou <cgd@broadcom.com>
856 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
857 * mips.igen: Remove all invocations of check_branch_bug and
860 2002-12-16 Chris Demetriou <cgd@broadcom.com>
862 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
864 2002-07-30 Chris Demetriou <cgd@broadcom.com>
866 * mips.igen (do_load_double, do_store_double): New functions.
867 (LDC1, SDC1): Rename to...
868 (LDC1b, SDC1b): respectively.
869 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
871 2002-07-29 Michael Snyder <msnyder@redhat.com>
873 * cp1.c (fp_recip2): Modify initialization expression so that
874 GCC will recognize it as constant.
876 2002-06-18 Chris Demetriou <cgd@broadcom.com>
878 * mdmx.c (SD_): Delete.
879 (Unpredictable): Re-define, for now, to directly invoke
880 unpredictable_action().
881 (mdmx_acc_op): Fix error in .ob immediate handling.
883 2002-06-18 Andrew Cagney <cagney@redhat.com>
885 * interp.c (sim_firmware_command): Initialize `address'.
887 2002-06-16 Andrew Cagney <ac131313@redhat.com>
889 * configure: Regenerated to track ../common/aclocal.m4 changes.
891 2002-06-14 Chris Demetriou <cgd@broadcom.com>
892 Ed Satterthwaite <ehs@broadcom.com>
894 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
895 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
896 * mips.igen: Include mips3d.igen.
897 (mips3d): New model name for MIPS-3D ASE instructions.
898 (CVT.W.fmt): Don't use this instruction for word (source) format
900 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
901 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
902 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
903 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
904 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
905 (RSquareRoot1, RSquareRoot2): New macros.
906 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
907 (fp_rsqrt2): New functions.
908 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
909 * configure: Regenerate.
911 2002-06-13 Chris Demetriou <cgd@broadcom.com>
912 Ed Satterthwaite <ehs@broadcom.com>
914 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
915 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
916 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
917 (convert): Note that this function is not used for paired-single
919 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
920 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
921 (check_fmt_p): Enable paired-single support.
922 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
923 (PUU.PS): New instructions.
924 (CVT.S.fmt): Don't use this instruction for paired-single format
926 * sim-main.h (FP_formats): New value 'fmt_ps.'
927 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
928 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
930 2002-06-12 Chris Demetriou <cgd@broadcom.com>
932 * mips.igen: Fix formatting of function calls in
935 2002-06-12 Chris Demetriou <cgd@broadcom.com>
937 * mips.igen (MOVN, MOVZ): Trace result.
938 (TNEI): Print "tnei" as the opcode name in traces.
939 (CEIL.W): Add disassembly string for traces.
940 (RSQRT.fmt): Make location of disassembly string consistent
941 with other instructions.
943 2002-06-12 Chris Demetriou <cgd@broadcom.com>
945 * mips.igen (X): Delete unused function.
947 2002-06-08 Andrew Cagney <cagney@redhat.com>
949 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
951 2002-06-07 Chris Demetriou <cgd@broadcom.com>
952 Ed Satterthwaite <ehs@broadcom.com>
954 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
955 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
956 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
957 (fp_nmsub): New prototypes.
958 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
959 (NegMultiplySub): New defines.
960 * mips.igen (RSQRT.fmt): Use RSquareRoot().
961 (MADD.D, MADD.S): Replace with...
962 (MADD.fmt): New instruction.
963 (MSUB.D, MSUB.S): Replace with...
964 (MSUB.fmt): New instruction.
965 (NMADD.D, NMADD.S): Replace with...
966 (NMADD.fmt): New instruction.
967 (NMSUB.D, MSUB.S): Replace with...
968 (NMSUB.fmt): New instruction.
970 2002-06-07 Chris Demetriou <cgd@broadcom.com>
971 Ed Satterthwaite <ehs@broadcom.com>
973 * cp1.c: Fix more comment spelling and formatting.
974 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
975 (denorm_mode): New function.
976 (fpu_unary, fpu_binary): Round results after operation, collect
977 status from rounding operations, and update the FCSR.
978 (convert): Collect status from integer conversions and rounding
979 operations, and update the FCSR. Adjust NaN values that result
980 from conversions. Convert to use sim_io_eprintf rather than
981 fprintf, and remove some debugging code.
982 * cp1.h (fenr_FS): New define.
984 2002-06-07 Chris Demetriou <cgd@broadcom.com>
986 * cp1.c (convert): Remove unusable debugging code, and move MIPS
987 rounding mode to sim FP rounding mode flag conversion code into...
988 (rounding_mode): New function.
990 2002-06-07 Chris Demetriou <cgd@broadcom.com>
992 * cp1.c: Clean up formatting of a few comments.
993 (value_fpr): Reformat switch statement.
995 2002-06-06 Chris Demetriou <cgd@broadcom.com>
996 Ed Satterthwaite <ehs@broadcom.com>
999 * sim-main.h: Include cp1.h.
1000 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1001 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1002 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1003 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1004 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1005 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1006 * cp1.c: Don't include sim-fpu.h; already included by
1007 sim-main.h. Clean up formatting of some comments.
1008 (NaN, Equal, Less): Remove.
1009 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1010 (fp_cmp): New functions.
1011 * mips.igen (do_c_cond_fmt): Remove.
1012 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1013 Compare. Add result tracing.
1014 (CxC1): Remove, replace with...
1015 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1016 (DMxC1): Remove, replace with...
1017 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1018 (MxC1): Remove, replace with...
1019 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1021 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1023 * sim-main.h (FGRIDX): Remove, replace all uses with...
1024 (FGR_BASE): New macro.
1025 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1026 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1027 (NR_FGR, FGR): Likewise.
1028 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1029 * mips.igen: Likewise.
1031 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1033 * cp1.c: Add an FSF Copyright notice to this file.
1035 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1036 Ed Satterthwaite <ehs@broadcom.com>
1038 * cp1.c (Infinity): Remove.
1039 * sim-main.h (Infinity): Likewise.
1041 * cp1.c (fp_unary, fp_binary): New functions.
1042 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1043 (fp_sqrt): New functions, implemented in terms of the above.
1044 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1045 (Recip, SquareRoot): Remove (replaced by functions above).
1046 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1047 (fp_recip, fp_sqrt): New prototypes.
1048 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1049 (Recip, SquareRoot): Replace prototypes with #defines which
1050 invoke the functions above.
1052 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1054 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1055 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1056 file, remove PARAMS from prototypes.
1057 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1058 simulator state arguments.
1059 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1060 pass simulator state arguments.
1061 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1062 (store_fpr, convert): Remove 'sd' argument.
1063 (value_fpr): Likewise. Convert to use 'SD' instead.
1065 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1067 * cp1.c (Min, Max): Remove #if 0'd functions.
1068 * sim-main.h (Min, Max): Remove.
1070 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1072 * cp1.c: fix formatting of switch case and default labels.
1073 * interp.c: Likewise.
1074 * sim-main.c: Likewise.
1076 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1078 * cp1.c: Clean up comments which describe FP formats.
1079 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1081 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1082 Ed Satterthwaite <ehs@broadcom.com>
1084 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1085 Broadcom SiByte SB-1 processor configurations.
1086 * configure: Regenerate.
1087 * sb1.igen: New file.
1088 * mips.igen: Include sb1.igen.
1090 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1091 * mdmx.igen: Add "sb1" model to all appropriate functions and
1093 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1094 (ob_func, ob_acc): Reference the above.
1095 (qh_acc): Adjust to keep the same size as ob_acc.
1096 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1097 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1099 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1101 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1103 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1104 Ed Satterthwaite <ehs@broadcom.com>
1106 * mips.igen (mdmx): New (pseudo-)model.
1107 * mdmx.c, mdmx.igen: New files.
1108 * Makefile.in (SIM_OBJS): Add mdmx.o.
1109 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1111 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1112 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1113 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1114 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1115 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1116 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1117 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1118 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1119 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1120 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1121 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1122 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1123 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1124 (qh_fmtsel): New macros.
1125 (_sim_cpu): New member "acc".
1126 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1127 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1129 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1131 * interp.c: Use 'deprecated' rather than 'depreciated.'
1132 * sim-main.h: Likewise.
1134 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1136 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1137 which wouldn't compile anyway.
1138 * sim-main.h (unpredictable_action): New function prototype.
1139 (Unpredictable): Define to call igen function unpredictable().
1140 (NotWordValue): New macro to call igen function not_word_value().
1141 (UndefinedResult): Remove.
1142 * interp.c (undefined_result): Remove.
1143 (unpredictable_action): New function.
1144 * mips.igen (not_word_value, unpredictable): New functions.
1145 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1146 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1147 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1148 NotWordValue() to check for unpredictable inputs, then
1149 Unpredictable() to handle them.
1151 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1153 * mips.igen: Fix formatting of calls to Unpredictable().
1155 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1157 * interp.c (sim_open): Revert previous change.
1159 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1161 * interp.c (sim_open): Disable chunk of code that wrote code in
1162 vector table entries.
1164 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1166 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1167 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1170 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1172 * cp1.c: Fix many formatting issues.
1174 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1176 * cp1.c (fpu_format_name): New function to replace...
1177 (DOFMT): This. Delete, and update all callers.
1178 (fpu_rounding_mode_name): New function to replace...
1179 (RMMODE): This. Delete, and update all callers.
1181 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1183 * interp.c: Move FPU support routines from here to...
1184 * cp1.c: Here. New file.
1185 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1186 (cp1.o): New target.
1188 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1190 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1191 * mips.igen (mips32, mips64): New models, add to all instructions
1192 and functions as appropriate.
1193 (loadstore_ea, check_u64): New variant for model mips64.
1194 (check_fmt_p): New variant for models mipsV and mips64, remove
1195 mipsV model marking fro other variant.
1198 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1199 for mips32 and mips64.
1200 (DCLO, DCLZ): New instructions for mips64.
1202 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1204 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1205 immediate or code as a hex value with the "%#lx" format.
1206 (ANDI): Likewise, and fix printed instruction name.
1208 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1210 * sim-main.h (UndefinedResult, Unpredictable): New macros
1211 which currently do nothing.
1213 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1215 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1216 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1217 (status_CU3): New definitions.
1219 * sim-main.h (ExceptionCause): Add new values for MIPS32
1220 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1221 for DebugBreakPoint and NMIReset to note their status in
1223 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1224 (SignalExceptionCacheErr): New exception macros.
1226 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1228 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1229 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1231 (SignalExceptionCoProcessorUnusable): Take as argument the
1232 unusable coprocessor number.
1234 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1236 * mips.igen: Fix formatting of all SignalException calls.
1238 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1240 * sim-main.h (SIGNEXTEND): Remove.
1242 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1244 * mips.igen: Remove gencode comment from top of file, fix
1245 spelling in another comment.
1247 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1249 * mips.igen (check_fmt, check_fmt_p): New functions to check
1250 whether specific floating point formats are usable.
1251 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1252 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1253 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1254 Use the new functions.
1255 (do_c_cond_fmt): Remove format checks...
1256 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1258 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1260 * mips.igen: Fix formatting of check_fpu calls.
1262 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1264 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1266 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1268 * mips.igen: Remove whitespace at end of lines.
1270 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1272 * mips.igen (loadstore_ea): New function to do effective
1273 address calculations.
1274 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1275 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1276 CACHE): Use loadstore_ea to do effective address computations.
1278 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1280 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1281 * mips.igen (LL, CxC1, MxC1): Likewise.
1283 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1285 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1286 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1287 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1288 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1289 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1290 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1291 Don't split opcode fields by hand, use the opcode field values
1294 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1296 * mips.igen (do_divu): Fix spacing.
1298 * mips.igen (do_dsllv): Move to be right before DSLLV,
1299 to match the rest of the do_<shift> functions.
1301 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1303 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1304 DSRL32, do_dsrlv): Trace inputs and results.
1306 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1308 * mips.igen (CACHE): Provide instruction-printing string.
1310 * interp.c (signal_exception): Comment tokens after #endif.
1312 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1314 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1315 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1316 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1317 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1318 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1319 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1320 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1321 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1323 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1325 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1326 instruction-printing string.
1327 (LWU): Use '64' as the filter flag.
1329 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1331 * mips.igen (SDXC1): Fix instruction-printing string.
1333 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1335 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1336 filter flags "32,f".
1338 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1340 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1343 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1345 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1346 add a comma) so that it more closely match the MIPS ISA
1347 documentation opcode partitioning.
1348 (PREF): Put useful names on opcode fields, and include
1349 instruction-printing string.
1351 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1353 * mips.igen (check_u64): New function which in the future will
1354 check whether 64-bit instructions are usable and signal an
1355 exception if not. Currently a no-op.
1356 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1357 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1358 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1359 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1361 * mips.igen (check_fpu): New function which in the future will
1362 check whether FPU instructions are usable and signal an exception
1363 if not. Currently a no-op.
1364 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1365 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1366 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1367 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1368 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1369 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1370 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1371 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1373 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1375 * mips.igen (do_load_left, do_load_right): Move to be immediately
1377 (do_store_left, do_store_right): Move to be immediately following
1380 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1382 * mips.igen (mipsV): New model name. Also, add it to
1383 all instructions and functions where it is appropriate.
1385 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1387 * mips.igen: For all functions and instructions, list model
1388 names that support that instruction one per line.
1390 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1392 * mips.igen: Add some additional comments about supported
1393 models, and about which instructions go where.
1394 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1395 order as is used in the rest of the file.
1397 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1399 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1400 indicating that ALU32_END or ALU64_END are there to check
1402 (DADD): Likewise, but also remove previous comment about
1405 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1407 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1408 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1409 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1410 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1411 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1412 fields (i.e., add and move commas) so that they more closely
1413 match the MIPS ISA documentation opcode partitioning.
1415 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1417 * mips.igen (ADDI): Print immediate value.
1418 (BREAK): Print code.
1419 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1420 (SLL): Print "nop" specially, and don't run the code
1421 that does the shift for the "nop" case.
1423 2001-11-17 Fred Fish <fnf@redhat.com>
1425 * sim-main.h (float_operation): Move enum declaration outside
1426 of _sim_cpu struct declaration.
1428 2001-04-12 Jim Blandy <jimb@redhat.com>
1430 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1431 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1433 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1434 PENDING_FILL, and you can get the intended effect gracefully by
1435 calling PENDING_SCHED directly.
1437 2001-02-23 Ben Elliston <bje@redhat.com>
1439 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1440 already defined elsewhere.
1442 2001-02-19 Ben Elliston <bje@redhat.com>
1444 * sim-main.h (sim_monitor): Return an int.
1445 * interp.c (sim_monitor): Add return values.
1446 (signal_exception): Handle error conditions from sim_monitor.
1448 2001-02-08 Ben Elliston <bje@redhat.com>
1450 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1451 (store_memory): Likewise, pass cia to sim_core_write*.
1453 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1455 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1456 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1458 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1460 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1461 * Makefile.in: Don't delete *.igen when cleaning directory.
1463 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1465 * m16.igen (break): Call SignalException not sim_engine_halt.
1467 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1469 From Jason Eckhardt:
1470 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1472 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1474 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1476 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1478 * mips.igen (do_dmultx): Fix typo.
1480 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1482 * configure: Regenerated to track ../common/aclocal.m4 changes.
1484 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1486 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1488 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1490 * sim-main.h (GPR_CLEAR): Define macro.
1492 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1494 * interp.c (decode_coproc): Output long using %lx and not %s.
1496 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1498 * interp.c (sim_open): Sort & extend dummy memory regions for
1499 --board=jmr3904 for eCos.
1501 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1503 * configure: Regenerated.
1505 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1507 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1508 calls, conditional on the simulator being in verbose mode.
1510 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1512 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1513 cache don't get ReservedInstruction traps.
1515 1999-11-29 Mark Salter <msalter@cygnus.com>
1517 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1518 to clear status bits in sdisr register. This is how the hardware works.
1520 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1521 being used by cygmon.
1523 1999-11-11 Andrew Haley <aph@cygnus.com>
1525 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1528 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1530 * mips.igen (MULT): Correct previous mis-applied patch.
1532 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1534 * mips.igen (delayslot32): Handle sequence like
1535 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1536 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1537 (MULT): Actually pass the third register...
1539 1999-09-03 Mark Salter <msalter@cygnus.com>
1541 * interp.c (sim_open): Added more memory aliases for additional
1542 hardware being touched by cygmon on jmr3904 board.
1544 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1546 * configure: Regenerated to track ../common/aclocal.m4 changes.
1548 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1550 * interp.c (sim_store_register): Handle case where client - GDB -
1551 specifies that a 4 byte register is 8 bytes in size.
1552 (sim_fetch_register): Ditto.
1554 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1556 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1557 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1558 (idt_monitor_base): Base address for IDT monitor traps.
1559 (pmon_monitor_base): Ditto for PMON.
1560 (lsipmon_monitor_base): Ditto for LSI PMON.
1561 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1562 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1563 (sim_firmware_command): New function.
1564 (mips_option_handler): Call it for OPTION_FIRMWARE.
1565 (sim_open): Allocate memory for idt_monitor region. If "--board"
1566 option was given, add no monitor by default. Add BREAK hooks only if
1567 monitors are also there.
1569 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1571 * interp.c (sim_monitor): Flush output before reading input.
1573 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1575 * tconfig.in (SIM_HANDLES_LMA): Always define.
1577 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1579 From Mark Salter <msalter@cygnus.com>:
1580 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1581 (sim_open): Add setup for BSP board.
1583 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1585 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1586 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1587 them as unimplemented.
1589 1999-05-08 Felix Lee <flee@cygnus.com>
1591 * configure: Regenerated to track ../common/aclocal.m4 changes.
1593 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1595 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1597 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1599 * configure.in: Any mips64vr5*-*-* target should have
1600 -DTARGET_ENABLE_FR=1.
1601 (default_endian): Any mips64vr*el-*-* target should default to
1603 * configure: Re-generate.
1605 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1607 * mips.igen (ldl): Extend from _16_, not 32.
1609 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1611 * interp.c (sim_store_register): Force registers written to by GDB
1612 into an un-interpreted state.
1614 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1616 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1617 CPU, start periodic background I/O polls.
1618 (tx3904sio_poll): New function: periodic I/O poller.
1620 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1622 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1624 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1626 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1629 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1631 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1632 (load_word): Call SIM_CORE_SIGNAL hook on error.
1633 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1634 starting. For exception dispatching, pass PC instead of NULL_CIA.
1635 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1636 * sim-main.h (COP0_BADVADDR): Define.
1637 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1638 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1639 (_sim_cpu): Add exc_* fields to store register value snapshots.
1640 * mips.igen (*): Replace memory-related SignalException* calls
1641 with references to SIM_CORE_SIGNAL hook.
1643 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1645 * sim-main.c (*): Minor warning cleanups.
1647 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1649 * m16.igen (DADDIU5): Correct type-o.
1651 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1653 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1656 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1658 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1660 (interp.o): Add dependency on itable.h
1661 (oengine.c, gencode): Delete remaining references.
1662 (BUILT_SRC_FROM_GEN): Clean up.
1664 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1667 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1668 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1669 tmp-run-hack) : New.
1670 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1671 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1672 Drop the "64" qualifier to get the HACK generator working.
1673 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1674 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1675 qualifier to get the hack generator working.
1676 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1677 (DSLL): Use do_dsll.
1678 (DSLLV): Use do_dsllv.
1679 (DSRA): Use do_dsra.
1680 (DSRL): Use do_dsrl.
1681 (DSRLV): Use do_dsrlv.
1682 (BC1): Move *vr4100 to get the HACK generator working.
1683 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1684 get the HACK generator working.
1685 (MACC) Rename to get the HACK generator working.
1686 (DMACC,MACCS,DMACCS): Add the 64.
1688 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1690 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1691 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1693 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1695 * mips/interp.c (DEBUG): Cleanups.
1697 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1699 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1700 (tx3904sio_tickle): fflush after a stdout character output.
1702 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1704 * interp.c (sim_close): Uninstall modules.
1706 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1708 * sim-main.h, interp.c (sim_monitor): Change to global
1711 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1713 * configure.in (vr4100): Only include vr4100 instructions in
1715 * configure: Re-generate.
1716 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1718 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1720 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1721 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1724 * configure.in (sim_default_gen, sim_use_gen): Replace with
1726 (--enable-sim-igen): Delete config option. Always using IGEN.
1727 * configure: Re-generate.
1729 * Makefile.in (gencode): Kill, kill, kill.
1732 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1734 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1735 bit mips16 igen simulator.
1736 * configure: Re-generate.
1738 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1739 as part of vr4100 ISA.
1740 * vr.igen: Mark all instructions as 64 bit only.
1742 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1744 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1747 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1749 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1750 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1751 * configure: Re-generate.
1753 * m16.igen (BREAK): Define breakpoint instruction.
1754 (JALX32): Mark instruction as mips16 and not r3900.
1755 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1757 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1759 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1761 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1762 insn as a debug breakpoint.
1764 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1766 (PENDING_SCHED): Clean up trace statement.
1767 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1768 (PENDING_FILL): Delay write by only one cycle.
1769 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1771 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1773 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1775 (pending_tick): Move incrementing of index to FOR statement.
1776 (pending_tick): Only update PENDING_OUT after a write has occured.
1778 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1780 * configure: Re-generate.
1782 * interp.c (sim_engine_run OLD): Delete explicit call to
1783 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1785 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1787 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1788 interrupt level number to match changed SignalExceptionInterrupt
1791 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1793 * interp.c: #include "itable.h" if WITH_IGEN.
1794 (get_insn_name): New function.
1795 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1796 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1798 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1800 * configure: Rebuilt to inhale new common/aclocal.m4.
1802 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1804 * dv-tx3904sio.c: Include sim-assert.h.
1806 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1808 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1809 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1810 Reorganize target-specific sim-hardware checks.
1811 * configure: rebuilt.
1812 * interp.c (sim_open): For tx39 target boards, set
1813 OPERATING_ENVIRONMENT, add tx3904sio devices.
1814 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1815 ROM executables. Install dv-sockser into sim-modules list.
1817 * dv-tx3904irc.c: Compiler warning clean-up.
1818 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1819 frequent hw-trace messages.
1821 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1823 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1825 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1827 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1829 * vr.igen: New file.
1830 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1831 * mips.igen: Define vr4100 model. Include vr.igen.
1832 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1834 * mips.igen (check_mf_hilo): Correct check.
1836 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1838 * sim-main.h (interrupt_event): Add prototype.
1840 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1841 register_ptr, register_value.
1842 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1844 * sim-main.h (tracefh): Make extern.
1846 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1848 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1849 Reduce unnecessarily high timer event frequency.
1850 * dv-tx3904cpu.c: Ditto for interrupt event.
1852 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1854 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1856 (interrupt_event): Made non-static.
1858 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1859 interchange of configuration values for external vs. internal
1862 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1864 * mips.igen (BREAK): Moved code to here for
1865 simulator-reserved break instructions.
1866 * gencode.c (build_instruction): Ditto.
1867 * interp.c (signal_exception): Code moved from here. Non-
1868 reserved instructions now use exception vector, rather
1870 * sim-main.h: Moved magic constants to here.
1872 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1874 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1875 register upon non-zero interrupt event level, clear upon zero
1877 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1878 by passing zero event value.
1879 (*_io_{read,write}_buffer): Endianness fixes.
1880 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1881 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1883 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1884 serial I/O and timer module at base address 0xFFFF0000.
1886 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1888 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1891 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1893 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1895 * configure: Update.
1897 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1899 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1900 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1901 * configure.in: Include tx3904tmr in hw_device list.
1902 * configure: Rebuilt.
1903 * interp.c (sim_open): Instantiate three timer instances.
1904 Fix address typo of tx3904irc instance.
1906 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1908 * interp.c (signal_exception): SystemCall exception now uses
1909 the exception vector.
1911 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1913 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1916 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1918 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1920 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1922 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1924 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1925 sim-main.h. Declare a struct hw_descriptor instead of struct
1926 hw_device_descriptor.
1928 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1930 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1931 right bits and then re-align left hand bytes to correct byte
1932 lanes. Fix incorrect computation in do_store_left when loading
1933 bytes from second word.
1935 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1937 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1938 * interp.c (sim_open): Only create a device tree when HW is
1941 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1942 * interp.c (signal_exception): Ditto.
1944 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1946 * gencode.c: Mark BEGEZALL as LIKELY.
1948 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1950 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1951 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1953 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1955 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1956 modules. Recognize TX39 target with "mips*tx39" pattern.
1957 * configure: Rebuilt.
1958 * sim-main.h (*): Added many macros defining bits in
1959 TX39 control registers.
1960 (SignalInterrupt): Send actual PC instead of NULL.
1961 (SignalNMIReset): New exception type.
1962 * interp.c (board): New variable for future use to identify
1963 a particular board being simulated.
1964 (mips_option_handler,mips_options): Added "--board" option.
1965 (interrupt_event): Send actual PC.
1966 (sim_open): Make memory layout conditional on board setting.
1967 (signal_exception): Initial implementation of hardware interrupt
1968 handling. Accept another break instruction variant for simulator
1970 (decode_coproc): Implement RFE instruction for TX39.
1971 (mips.igen): Decode RFE instruction as such.
1972 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1973 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1974 bbegin to implement memory map.
1975 * dv-tx3904cpu.c: New file.
1976 * dv-tx3904irc.c: New file.
1978 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1980 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1982 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1984 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1985 with calls to check_div_hilo.
1987 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1989 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1990 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1991 Add special r3900 version of do_mult_hilo.
1992 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1993 with calls to check_mult_hilo.
1994 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1995 with calls to check_div_hilo.
1997 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1999 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2000 Document a replacement.
2002 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2004 * interp.c (sim_monitor): Make mon_printf work.
2006 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2008 * sim-main.h (INSN_NAME): New arg `cpu'.
2010 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2012 * configure: Regenerated to track ../common/aclocal.m4 changes.
2014 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2016 * configure: Regenerated to track ../common/aclocal.m4 changes.
2019 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2021 * acconfig.h: New file.
2022 * configure.in: Reverted change of Apr 24; use sinclude again.
2024 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2026 * configure: Regenerated to track ../common/aclocal.m4 changes.
2029 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2031 * configure.in: Don't call sinclude.
2033 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2035 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2037 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2039 * mips.igen (ERET): Implement.
2041 * interp.c (decode_coproc): Return sign-extended EPC.
2043 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2045 * interp.c (signal_exception): Do not ignore Trap.
2046 (signal_exception): On TRAP, restart at exception address.
2047 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2048 (signal_exception): Update.
2049 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2050 so that TRAP instructions are caught.
2052 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2054 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2055 contains HI/LO access history.
2056 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2057 (HIACCESS, LOACCESS): Delete, replace with
2058 (HIHISTORY, LOHISTORY): New macros.
2059 (CHECKHILO): Delete all, moved to mips.igen
2061 * gencode.c (build_instruction): Do not generate checks for
2062 correct HI/LO register usage.
2064 * interp.c (old_engine_run): Delete checks for correct HI/LO
2067 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2068 check_mf_cycles): New functions.
2069 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2070 do_divu, domultx, do_mult, do_multu): Use.
2072 * tx.igen ("madd", "maddu"): Use.
2074 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2076 * mips.igen (DSRAV): Use function do_dsrav.
2077 (SRAV): Use new function do_srav.
2079 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2080 (B): Sign extend 11 bit immediate.
2081 (EXT-B*): Shift 16 bit immediate left by 1.
2082 (ADDIU*): Don't sign extend immediate value.
2084 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2086 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2088 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2091 * mips.igen (delayslot32, nullify_next_insn): New functions.
2092 (m16.igen): Always include.
2093 (do_*): Add more tracing.
2095 * m16.igen (delayslot16): Add NIA argument, could be called by a
2096 32 bit MIPS16 instruction.
2098 * interp.c (ifetch16): Move function from here.
2099 * sim-main.c (ifetch16): To here.
2101 * sim-main.c (ifetch16, ifetch32): Update to match current
2102 implementations of LH, LW.
2103 (signal_exception): Don't print out incorrect hex value of illegal
2106 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2108 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2111 * m16.igen: Implement MIPS16 instructions.
2113 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2114 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2115 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2116 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2117 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2118 bodies of corresponding code from 32 bit insn to these. Also used
2119 by MIPS16 versions of functions.
2121 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2122 (IMEM16): Drop NR argument from macro.
2124 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2126 * Makefile.in (SIM_OBJS): Add sim-main.o.
2128 * sim-main.h (address_translation, load_memory, store_memory,
2129 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2131 (pr_addr, pr_uword64): Declare.
2132 (sim-main.c): Include when H_REVEALS_MODULE_P.
2134 * interp.c (address_translation, load_memory, store_memory,
2135 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2137 * sim-main.c: To here. Fix compilation problems.
2139 * configure.in: Enable inlining.
2140 * configure: Re-config.
2142 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2144 * configure: Regenerated to track ../common/aclocal.m4 changes.
2146 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2148 * mips.igen: Include tx.igen.
2149 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2150 * tx.igen: New file, contains MADD and MADDU.
2152 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2153 the hardwired constant `7'.
2154 (store_memory): Ditto.
2155 (LOADDRMASK): Move definition to sim-main.h.
2157 mips.igen (MTC0): Enable for r3900.
2160 mips.igen (do_load_byte): Delete.
2161 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2162 do_store_right): New functions.
2163 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2165 configure.in: Let the tx39 use igen again.
2168 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2170 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2171 not an address sized quantity. Return zero for cache sizes.
2173 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2175 * mips.igen (r3900): r3900 does not support 64 bit integer
2178 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2180 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2182 * configure : Rebuild.
2184 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2186 * configure: Regenerated to track ../common/aclocal.m4 changes.
2188 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2190 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2192 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2194 * configure: Regenerated to track ../common/aclocal.m4 changes.
2195 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2197 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2199 * configure: Regenerated to track ../common/aclocal.m4 changes.
2201 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2203 * interp.c (Max, Min): Comment out functions. Not yet used.
2205 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2207 * configure: Regenerated to track ../common/aclocal.m4 changes.
2209 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2211 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2212 configurable settings for stand-alone simulator.
2214 * configure.in: Added X11 search, just in case.
2216 * configure: Regenerated.
2218 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2220 * interp.c (sim_write, sim_read, load_memory, store_memory):
2221 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2223 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2225 * sim-main.h (GETFCC): Return an unsigned value.
2227 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2229 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2230 (DADD): Result destination is RD not RT.
2232 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2234 * sim-main.h (HIACCESS, LOACCESS): Always define.
2236 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2238 * interp.c (sim_info): Delete.
2240 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2242 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2243 (mips_option_handler): New argument `cpu'.
2244 (sim_open): Update call to sim_add_option_table.
2246 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2248 * mips.igen (CxC1): Add tracing.
2250 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2252 * sim-main.h (Max, Min): Declare.
2254 * interp.c (Max, Min): New functions.
2256 * mips.igen (BC1): Add tracing.
2258 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2260 * interp.c Added memory map for stack in vr4100
2262 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2264 * interp.c (load_memory): Add missing "break"'s.
2266 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2268 * interp.c (sim_store_register, sim_fetch_register): Pass in
2269 length parameter. Return -1.
2271 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2273 * interp.c: Added hardware init hook, fixed warnings.
2275 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2277 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2279 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2281 * interp.c (ifetch16): New function.
2283 * sim-main.h (IMEM32): Rename IMEM.
2284 (IMEM16_IMMED): Define.
2286 (DELAY_SLOT): Update.
2288 * m16run.c (sim_engine_run): New file.
2290 * m16.igen: All instructions except LB.
2291 (LB): Call do_load_byte.
2292 * mips.igen (do_load_byte): New function.
2293 (LB): Call do_load_byte.
2295 * mips.igen: Move spec for insn bit size and high bit from here.
2296 * Makefile.in (tmp-igen, tmp-m16): To here.
2298 * m16.dc: New file, decode mips16 instructions.
2300 * Makefile.in (SIM_NO_ALL): Define.
2301 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2303 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2305 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2306 point unit to 32 bit registers.
2307 * configure: Re-generate.
2309 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2311 * configure.in (sim_use_gen): Make IGEN the default simulator
2312 generator for generic 32 and 64 bit mips targets.
2313 * configure: Re-generate.
2315 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2317 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2320 * interp.c (sim_fetch_register, sim_store_register): Read/write
2321 FGR from correct location.
2322 (sim_open): Set size of FGR's according to
2323 WITH_TARGET_FLOATING_POINT_BITSIZE.
2325 * sim-main.h (FGR): Store floating point registers in a separate
2328 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2330 * configure: Regenerated to track ../common/aclocal.m4 changes.
2332 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2334 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2336 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2338 * interp.c (pending_tick): New function. Deliver pending writes.
2340 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2341 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2342 it can handle mixed sized quantites and single bits.
2344 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2346 * interp.c (oengine.h): Do not include when building with IGEN.
2347 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2348 (sim_info): Ditto for PROCESSOR_64BIT.
2349 (sim_monitor): Replace ut_reg with unsigned_word.
2350 (*): Ditto for t_reg.
2351 (LOADDRMASK): Define.
2352 (sim_open): Remove defunct check that host FP is IEEE compliant,
2353 using software to emulate floating point.
2354 (value_fpr, ...): Always compile, was conditional on HASFPU.
2356 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2358 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2361 * interp.c (SD, CPU): Define.
2362 (mips_option_handler): Set flags in each CPU.
2363 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2364 (sim_close): Do not clear STATE, deleted anyway.
2365 (sim_write, sim_read): Assume CPU zero's vm should be used for
2367 (sim_create_inferior): Set the PC for all processors.
2368 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2370 (mips16_entry): Pass correct nr of args to store_word, load_word.
2371 (ColdReset): Cold reset all cpu's.
2372 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2373 (sim_monitor, load_memory, store_memory, signal_exception): Use
2374 `CPU' instead of STATE_CPU.
2377 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2380 * sim-main.h (signal_exception): Add sim_cpu arg.
2381 (SignalException*): Pass both SD and CPU to signal_exception.
2382 * interp.c (signal_exception): Update.
2384 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2386 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2387 address_translation): Ditto
2388 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2390 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2392 * configure: Regenerated to track ../common/aclocal.m4 changes.
2394 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2396 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2398 * mips.igen (model): Map processor names onto BFD name.
2400 * sim-main.h (CPU_CIA): Delete.
2401 (SET_CIA, GET_CIA): Define
2403 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2405 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2408 * configure.in (default_endian): Configure a big-endian simulator
2410 * configure: Re-generate.
2412 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2414 * configure: Regenerated to track ../common/aclocal.m4 changes.
2416 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2418 * interp.c (sim_monitor): Handle Densan monitor outbyte
2419 and inbyte functions.
2421 1997-12-29 Felix Lee <flee@cygnus.com>
2423 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2425 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2427 * Makefile.in (tmp-igen): Arrange for $zero to always be
2428 reset to zero after every instruction.
2430 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2432 * configure: Regenerated to track ../common/aclocal.m4 changes.
2435 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2437 * mips.igen (MSUB): Fix to work like MADD.
2438 * gencode.c (MSUB): Similarly.
2440 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2442 * configure: Regenerated to track ../common/aclocal.m4 changes.
2444 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2446 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2448 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2450 * sim-main.h (sim-fpu.h): Include.
2452 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2453 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2454 using host independant sim_fpu module.
2456 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * interp.c (signal_exception): Report internal errors with SIGABRT
2461 * sim-main.h (C0_CONFIG): New register.
2462 (signal.h): No longer include.
2464 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2466 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2468 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2470 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2472 * mips.igen: Tag vr5000 instructions.
2473 (ANDI): Was missing mipsIV model, fix assembler syntax.
2474 (do_c_cond_fmt): New function.
2475 (C.cond.fmt): Handle mips I-III which do not support CC field
2477 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2478 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2480 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2481 vr5000 which saves LO in a GPR separatly.
2483 * configure.in (enable-sim-igen): For vr5000, select vr5000
2484 specific instructions.
2485 * configure: Re-generate.
2487 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2489 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2491 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2492 fmt_uninterpreted_64 bit cases to switch. Convert to
2495 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2497 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2498 as specified in IV3.2 spec.
2499 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2501 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2503 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2504 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2505 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2506 PENDING_FILL versions of instructions. Simplify.
2508 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2510 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2512 (MTHI, MFHI): Disable code checking HI-LO.
2514 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2516 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2518 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2520 * gencode.c (build_mips16_operands): Replace IPC with cia.
2522 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2523 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2525 (UndefinedResult): Replace function with macro/function
2527 (sim_engine_run): Don't save PC in IPC.
2529 * sim-main.h (IPC): Delete.
2532 * interp.c (signal_exception, store_word, load_word,
2533 address_translation, load_memory, store_memory, cache_op,
2534 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2535 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2536 current instruction address - cia - argument.
2537 (sim_read, sim_write): Call address_translation directly.
2538 (sim_engine_run): Rename variable vaddr to cia.
2539 (signal_exception): Pass cia to sim_monitor
2541 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2542 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2543 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2545 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2546 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2549 * interp.c (signal_exception): Pass restart address to
2552 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2553 idecode.o): Add dependency.
2555 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2557 (DELAY_SLOT): Update NIA not PC with branch address.
2558 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2560 * mips.igen: Use CIA not PC in branch calculations.
2561 (illegal): Call SignalException.
2562 (BEQ, ADDIU): Fix assembler.
2564 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2566 * m16.igen (JALX): Was missing.
2568 * configure.in (enable-sim-igen): New configuration option.
2569 * configure: Re-generate.
2571 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2573 * interp.c (load_memory, store_memory): Delete parameter RAW.
2574 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2575 bypassing {load,store}_memory.
2577 * sim-main.h (ByteSwapMem): Delete definition.
2579 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2581 * interp.c (sim_do_command, sim_commands): Delete mips specific
2582 commands. Handled by module sim-options.
2584 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2585 (WITH_MODULO_MEMORY): Define.
2587 * interp.c (sim_info): Delete code printing memory size.
2589 * interp.c (mips_size): Nee sim_size, delete function.
2591 (monitor, monitor_base, monitor_size): Delete global variables.
2592 (sim_open, sim_close): Delete code creating monitor and other
2593 memory regions. Use sim-memopts module, via sim_do_commandf, to
2594 manage memory regions.
2595 (load_memory, store_memory): Use sim-core for memory model.
2597 * interp.c (address_translation): Delete all memory map code
2598 except line forcing 32 bit addresses.
2600 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2602 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2605 * interp.c (logfh, logfile): Delete globals.
2606 (sim_open, sim_close): Delete code opening & closing log file.
2607 (mips_option_handler): Delete -l and -n options.
2608 (OPTION mips_options): Ditto.
2610 * interp.c (OPTION mips_options): Rename option trace to dinero.
2611 (mips_option_handler): Update.
2613 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2615 * interp.c (fetch_str): New function.
2616 (sim_monitor): Rewrite using sim_read & sim_write.
2617 (sim_open): Check magic number.
2618 (sim_open): Write monitor vectors into memory using sim_write.
2619 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2620 (sim_read, sim_write): Simplify - transfer data one byte at a
2622 (load_memory, store_memory): Clarify meaning of parameter RAW.
2624 * sim-main.h (isHOST): Defete definition.
2625 (isTARGET): Mark as depreciated.
2626 (address_translation): Delete parameter HOST.
2628 * interp.c (address_translation): Delete parameter HOST.
2630 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2634 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2635 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2637 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2639 * mips.igen: Add model filter field to records.
2641 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2643 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2645 interp.c (sim_engine_run): Do not compile function sim_engine_run
2646 when WITH_IGEN == 1.
2648 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2649 target architecture.
2651 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2652 igen. Replace with configuration variables sim_igen_flags /
2655 * m16.igen: New file. Copy mips16 insns here.
2656 * mips.igen: From here.
2658 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2660 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2662 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2664 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2666 * gencode.c (build_instruction): Follow sim_write's lead in using
2667 BigEndianMem instead of !ByteSwapMem.
2669 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2671 * configure.in (sim_gen): Dependent on target, select type of
2672 generator. Always select old style generator.
2674 configure: Re-generate.
2676 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2678 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2679 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2680 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2681 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2682 SIM_@sim_gen@_*, set by autoconf.
2684 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2686 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2688 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2689 CURRENT_FLOATING_POINT instead.
2691 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2692 (address_translation): Raise exception InstructionFetch when
2693 translation fails and isINSTRUCTION.
2695 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2696 sim_engine_run): Change type of of vaddr and paddr to
2698 (address_translation, prefetch, load_memory, store_memory,
2699 cache_op): Change type of vAddr and pAddr to address_word.
2701 * gencode.c (build_instruction): Change type of vaddr and paddr to
2704 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2706 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2707 macro to obtain result of ALU op.
2709 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2711 * interp.c (sim_info): Call profile_print.
2713 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2715 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2717 * sim-main.h (WITH_PROFILE): Do not define, defined in
2718 common/sim-config.h. Use sim-profile module.
2719 (simPROFILE): Delete defintion.
2721 * interp.c (PROFILE): Delete definition.
2722 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2723 (sim_close): Delete code writing profile histogram.
2724 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2726 (sim_engine_run): Delete code profiling the PC.
2728 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2732 * interp.c (sim_monitor): Make register pointers of type
2735 * sim-main.h: Make registers of type unsigned_word not
2738 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2740 * interp.c (sync_operation): Rename from SyncOperation, make
2741 global, add SD argument.
2742 (prefetch): Rename from Prefetch, make global, add SD argument.
2743 (decode_coproc): Make global.
2745 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2747 * gencode.c (build_instruction): Generate DecodeCoproc not
2748 decode_coproc calls.
2750 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2751 (SizeFGR): Move to sim-main.h
2752 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2753 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2754 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2756 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2757 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2758 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2759 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2760 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2761 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2763 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2765 (sim-alu.h): Include.
2766 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2767 (sim_cia): Typedef to instruction_address.
2769 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2771 * Makefile.in (interp.o): Rename generated file engine.c to
2776 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2778 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2780 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2782 * gencode.c (build_instruction): For "FPSQRT", output correct
2783 number of arguments to Recip.
2785 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2787 * Makefile.in (interp.o): Depends on sim-main.h
2789 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2791 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2792 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2793 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2794 STATE, DSSTATE): Define
2795 (GPR, FGRIDX, ..): Define.
2797 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2798 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2799 (GPR, FGRIDX, ...): Delete macros.
2801 * interp.c: Update names to match defines from sim-main.h
2803 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2805 * interp.c (sim_monitor): Add SD argument.
2806 (sim_warning): Delete. Replace calls with calls to
2808 (sim_error): Delete. Replace calls with sim_io_error.
2809 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2810 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2811 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2813 (mips_size): Rename from sim_size. Add SD argument.
2815 * interp.c (simulator): Delete global variable.
2816 (callback): Delete global variable.
2817 (mips_option_handler, sim_open, sim_write, sim_read,
2818 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2819 sim_size,sim_monitor): Use sim_io_* not callback->*.
2820 (sim_open): ZALLOC simulator struct.
2821 (PROFILE): Do not define.
2823 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2825 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2826 support.h with corresponding code.
2828 * sim-main.h (word64, uword64), support.h: Move definition to
2830 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2833 * Makefile.in: Update dependencies
2834 * interp.c: Do not include.
2836 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2838 * interp.c (address_translation, load_memory, store_memory,
2839 cache_op): Rename to from AddressTranslation et.al., make global,
2842 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2845 * interp.c (SignalException): Rename to signal_exception, make
2848 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2850 * sim-main.h (SignalException, SignalExceptionInterrupt,
2851 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2852 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2853 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2856 * interp.c, support.h: Use.
2858 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2860 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2861 to value_fpr / store_fpr. Add SD argument.
2862 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2863 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2865 * sim-main.h (ValueFPR, StoreFPR): Define.
2867 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2869 * interp.c (sim_engine_run): Check consistency between configure
2870 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2873 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2874 (mips_fpu): Configure WITH_FLOATING_POINT.
2875 (mips_endian): Configure WITH_TARGET_ENDIAN.
2876 * configure: Update.
2878 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2880 * configure: Regenerated to track ../common/aclocal.m4 changes.
2882 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2884 * configure: Regenerated.
2886 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2888 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2890 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2892 * gencode.c (print_igen_insn_models): Assume certain architectures
2893 include all mips* instructions.
2894 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2897 * Makefile.in (tmp.igen): Add target. Generate igen input from
2900 * gencode.c (FEATURE_IGEN): Define.
2901 (main): Add --igen option. Generate output in igen format.
2902 (process_instructions): Format output according to igen option.
2903 (print_igen_insn_format): New function.
2904 (print_igen_insn_models): New function.
2905 (process_instructions): Only issue warnings and ignore
2906 instructions when no FEATURE_IGEN.
2908 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2910 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2913 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2915 * configure: Regenerated to track ../common/aclocal.m4 changes.
2917 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2919 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2920 SIM_RESERVED_BITS): Delete, moved to common.
2921 (SIM_EXTRA_CFLAGS): Update.
2923 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2925 * configure.in: Configure non-strict memory alignment.
2926 * configure: Regenerated to track ../common/aclocal.m4 changes.
2928 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2930 * configure: Regenerated to track ../common/aclocal.m4 changes.
2932 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2934 * gencode.c (SDBBP,DERET): Added (3900) insns.
2935 (RFE): Turn on for 3900.
2936 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2937 (dsstate): Made global.
2938 (SUBTARGET_R3900): Added.
2939 (CANCELDELAYSLOT): New.
2940 (SignalException): Ignore SystemCall rather than ignore and
2941 terminate. Add DebugBreakPoint handling.
2942 (decode_coproc): New insns RFE, DERET; and new registers Debug
2943 and DEPC protected by SUBTARGET_R3900.
2944 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2946 * Makefile.in,configure.in: Add mips subtarget option.
2947 * configure: Update.
2949 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2951 * gencode.c: Add r3900 (tx39).
2954 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2956 * gencode.c (build_instruction): Don't need to subtract 4 for
2959 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2961 * interp.c: Correct some HASFPU problems.
2963 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2965 * configure: Regenerated to track ../common/aclocal.m4 changes.
2967 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2969 * interp.c (mips_options): Fix samples option short form, should
2972 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2974 * interp.c (sim_info): Enable info code. Was just returning.
2976 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2978 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2981 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2983 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2985 (build_instruction): Ditto for LL.
2987 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2989 * configure: Regenerated to track ../common/aclocal.m4 changes.
2991 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2993 * configure: Regenerated to track ../common/aclocal.m4 changes.
2996 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2998 * interp.c (sim_open): Add call to sim_analyze_program, update
3001 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3003 * interp.c (sim_kill): Delete.
3004 (sim_create_inferior): Add ABFD argument. Set PC from same.
3005 (sim_load): Move code initializing trap handlers from here.
3006 (sim_open): To here.
3007 (sim_load): Delete, use sim-hload.c.
3009 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3011 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3013 * configure: Regenerated to track ../common/aclocal.m4 changes.
3016 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3018 * interp.c (sim_open): Add ABFD argument.
3019 (sim_load): Move call to sim_config from here.
3020 (sim_open): To here. Check return status.
3022 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3024 * gencode.c (build_instruction): Two arg MADD should
3025 not assign result to $0.
3027 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3029 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3030 * sim/mips/configure.in: Regenerate.
3032 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3034 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3035 signed8, unsigned8 et.al. types.
3037 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3038 hosts when selecting subreg.
3040 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3042 * interp.c (sim_engine_run): Reset the ZERO register to zero
3043 regardless of FEATURE_WARN_ZERO.
3044 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3046 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3048 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3049 (SignalException): For BreakPoints ignore any mode bits and just
3051 (SignalException): Always set the CAUSE register.
3053 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3055 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3056 exception has been taken.
3058 * interp.c: Implement the ERET and mt/f sr instructions.
3060 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3062 * interp.c (SignalException): Don't bother restarting an
3065 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3067 * interp.c (SignalException): Really take an interrupt.
3068 (interrupt_event): Only deliver interrupts when enabled.
3070 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3072 * interp.c (sim_info): Only print info when verbose.
3073 (sim_info) Use sim_io_printf for output.
3075 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3077 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3080 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3082 * interp.c (sim_do_command): Check for common commands if a
3083 simulator specific command fails.
3085 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3087 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3088 and simBE when DEBUG is defined.
3090 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3092 * interp.c (interrupt_event): New function. Pass exception event
3093 onto exception handler.
3095 * configure.in: Check for stdlib.h.
3096 * configure: Regenerate.
3098 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3099 variable declaration.
3100 (build_instruction): Initialize memval1.
3101 (build_instruction): Add UNUSED attribute to byte, bigend,
3103 (build_operands): Ditto.
3105 * interp.c: Fix GCC warnings.
3106 (sim_get_quit_code): Delete.
3108 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3109 * Makefile.in: Ditto.
3110 * configure: Re-generate.
3112 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3114 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3116 * interp.c (mips_option_handler): New function parse argumes using
3118 (myname): Replace with STATE_MY_NAME.
3119 (sim_open): Delete check for host endianness - performed by
3121 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3122 (sim_open): Move much of the initialization from here.
3123 (sim_load): To here. After the image has been loaded and
3125 (sim_open): Move ColdReset from here.
3126 (sim_create_inferior): To here.
3127 (sim_open): Make FP check less dependant on host endianness.
3129 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3131 * interp.c (sim_set_callbacks): Delete.
3133 * interp.c (membank, membank_base, membank_size): Replace with
3134 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3135 (sim_open): Remove call to callback->init. gdb/run do this.
3139 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3141 * interp.c (big_endian_p): Delete, replaced by
3142 current_target_byte_order.
3144 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3146 * interp.c (host_read_long, host_read_word, host_swap_word,
3147 host_swap_long): Delete. Using common sim-endian.
3148 (sim_fetch_register, sim_store_register): Use H2T.
3149 (pipeline_ticks): Delete. Handled by sim-events.
3151 (sim_engine_run): Update.
3153 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3155 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3157 (SignalException): To here. Signal using sim_engine_halt.
3158 (sim_stop_reason): Delete, moved to common.
3160 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3162 * interp.c (sim_open): Add callback argument.
3163 (sim_set_callbacks): Delete SIM_DESC argument.
3166 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3168 * Makefile.in (SIM_OBJS): Add common modules.
3170 * interp.c (sim_set_callbacks): Also set SD callback.
3171 (set_endianness, xfer_*, swap_*): Delete.
3172 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3173 Change to functions using sim-endian macros.
3174 (control_c, sim_stop): Delete, use common version.
3175 (simulate): Convert into.
3176 (sim_engine_run): This function.
3177 (sim_resume): Delete.
3179 * interp.c (simulation): New variable - the simulator object.
3180 (sim_kind): Delete global - merged into simulation.
3181 (sim_load): Cleanup. Move PC assignment from here.
3182 (sim_create_inferior): To here.
3184 * sim-main.h: New file.
3185 * interp.c (sim-main.h): Include.
3187 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3189 * configure: Regenerated to track ../common/aclocal.m4 changes.
3191 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3193 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3195 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3197 * gencode.c (build_instruction): DIV instructions: check
3198 for division by zero and integer overflow before using
3199 host's division operation.
3201 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3203 * Makefile.in (SIM_OBJS): Add sim-load.o.
3204 * interp.c: #include bfd.h.
3205 (target_byte_order): Delete.
3206 (sim_kind, myname, big_endian_p): New static locals.
3207 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3208 after argument parsing. Recognize -E arg, set endianness accordingly.
3209 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3210 load file into simulator. Set PC from bfd.
3211 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3212 (set_endianness): Use big_endian_p instead of target_byte_order.
3214 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3216 * interp.c (sim_size): Delete prototype - conflicts with
3217 definition in remote-sim.h. Correct definition.
3219 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3221 * configure: Regenerated to track ../common/aclocal.m4 changes.
3224 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3226 * interp.c (sim_open): New arg `kind'.
3228 * configure: Regenerated to track ../common/aclocal.m4 changes.
3230 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3232 * configure: Regenerated to track ../common/aclocal.m4 changes.
3234 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3236 * interp.c (sim_open): Set optind to 0 before calling getopt.
3238 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3240 * configure: Regenerated to track ../common/aclocal.m4 changes.
3242 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3244 * interp.c : Replace uses of pr_addr with pr_uword64
3245 where the bit length is always 64 independent of SIM_ADDR.
3246 (pr_uword64) : added.
3248 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3250 * configure: Re-generate.
3252 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3254 * configure: Regenerate to track ../common/aclocal.m4 changes.
3256 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3258 * interp.c (sim_open): New SIM_DESC result. Argument is now
3260 (other sim_*): New SIM_DESC argument.
3262 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3264 * interp.c: Fix printing of addresses for non-64-bit targets.
3265 (pr_addr): Add function to print address based on size.
3267 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3269 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3271 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3273 * gencode.c (build_mips16_operands): Correct computation of base
3274 address for extended PC relative instruction.
3276 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3278 * interp.c (mips16_entry): Add support for floating point cases.
3279 (SignalException): Pass floating point cases to mips16_entry.
3280 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3282 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3284 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3285 and then set the state to fmt_uninterpreted.
3286 (COP_SW): Temporarily set the state to fmt_word while calling
3289 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3291 * gencode.c (build_instruction): The high order may be set in the
3292 comparison flags at any ISA level, not just ISA 4.
3294 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3296 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3297 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3298 * configure.in: sinclude ../common/aclocal.m4.
3299 * configure: Regenerated.
3301 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3303 * configure: Rebuild after change to aclocal.m4.
3305 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3307 * configure configure.in Makefile.in: Update to new configure
3308 scheme which is more compatible with WinGDB builds.
3309 * configure.in: Improve comment on how to run autoconf.
3310 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3311 * Makefile.in: Use autoconf substitution to install common
3314 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3316 * gencode.c (build_instruction): Use BigEndianCPU instead of
3319 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3321 * interp.c (sim_monitor): Make output to stdout visible in
3322 wingdb's I/O log window.
3324 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3326 * support.h: Undo previous change to SIGTRAP
3329 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3331 * interp.c (store_word, load_word): New static functions.
3332 (mips16_entry): New static function.
3333 (SignalException): Look for mips16 entry and exit instructions.
3334 (simulate): Use the correct index when setting fpr_state after
3335 doing a pending move.
3337 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3339 * interp.c: Fix byte-swapping code throughout to work on
3340 both little- and big-endian hosts.
3342 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3344 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3345 with gdb/config/i386/xm-windows.h.
3347 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3349 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3350 that messes up arithmetic shifts.
3352 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3354 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3355 SIGTRAP and SIGQUIT for _WIN32.
3357 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3359 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3360 force a 64 bit multiplication.
3361 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3362 destination register is 0, since that is the default mips16 nop
3365 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3367 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3368 (build_endian_shift): Don't check proc64.
3369 (build_instruction): Always set memval to uword64. Cast op2 to
3370 uword64 when shifting it left in memory instructions. Always use
3371 the same code for stores--don't special case proc64.
3373 * gencode.c (build_mips16_operands): Fix base PC value for PC
3375 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3377 * interp.c (simJALDELAYSLOT): Define.
3378 (JALDELAYSLOT): Define.
3379 (INDELAYSLOT, INJALDELAYSLOT): Define.
3380 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3382 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3384 * interp.c (sim_open): add flush_cache as a PMON routine
3385 (sim_monitor): handle flush_cache by ignoring it
3387 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3389 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3391 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3392 (BigEndianMem): Rename to ByteSwapMem and change sense.
3393 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3394 BigEndianMem references to !ByteSwapMem.
3395 (set_endianness): New function, with prototype.
3396 (sim_open): Call set_endianness.
3397 (sim_info): Use simBE instead of BigEndianMem.
3398 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3399 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3400 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3401 ifdefs, keeping the prototype declaration.
3402 (swap_word): Rewrite correctly.
3403 (ColdReset): Delete references to CONFIG. Delete endianness related
3404 code; moved to set_endianness.
3406 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3408 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3409 * interp.c (CHECKHILO): Define away.
3410 (simSIGINT): New macro.
3411 (membank_size): Increase from 1MB to 2MB.
3412 (control_c): New function.
3413 (sim_resume): Rename parameter signal to signal_number. Add local
3414 variable prev. Call signal before and after simulate.
3415 (sim_stop_reason): Add simSIGINT support.
3416 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3418 (sim_warning): Delete call to SignalException. Do call printf_filtered
3420 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3421 a call to sim_warning.
3423 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3425 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3426 16 bit instructions.
3428 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3430 Add support for mips16 (16 bit MIPS implementation):
3431 * gencode.c (inst_type): Add mips16 instruction encoding types.
3432 (GETDATASIZEINSN): Define.
3433 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3434 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3436 (MIPS16_DECODE): New table, for mips16 instructions.
3437 (bitmap_val): New static function.
3438 (struct mips16_op): Define.
3439 (mips16_op_table): New table, for mips16 operands.
3440 (build_mips16_operands): New static function.
3441 (process_instructions): If PC is odd, decode a mips16
3442 instruction. Break out instruction handling into new
3443 build_instruction function.
3444 (build_instruction): New static function, broken out of
3445 process_instructions. Check modifiers rather than flags for SHIFT
3446 bit count and m[ft]{hi,lo} direction.
3447 (usage): Pass program name to fprintf.
3448 (main): Remove unused variable this_option_optind. Change
3449 ``*loptarg++'' to ``loptarg++''.
3450 (my_strtoul): Parenthesize && within ||.
3451 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3452 (simulate): If PC is odd, fetch a 16 bit instruction, and
3453 increment PC by 2 rather than 4.
3454 * configure.in: Add case for mips16*-*-*.
3455 * configure: Rebuild.
3457 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3459 * interp.c: Allow -t to enable tracing in standalone simulator.
3460 Fix garbage output in trace file and error messages.
3462 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3464 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3465 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3466 * configure.in: Simplify using macros in ../common/aclocal.m4.
3467 * configure: Regenerated.
3468 * tconfig.in: New file.
3470 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3472 * interp.c: Fix bugs in 64-bit port.
3473 Use ansi function declarations for msvc compiler.
3474 Initialize and test file pointer in trace code.
3475 Prevent duplicate definition of LAST_EMED_REGNUM.
3477 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3479 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3481 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3483 * interp.c (SignalException): Check for explicit terminating
3485 * gencode.c: Pass instruction value through SignalException()
3486 calls for Trap, Breakpoint and Syscall.
3488 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3490 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3491 only used on those hosts that provide it.
3492 * configure.in: Add sqrt() to list of functions to be checked for.
3493 * config.in: Re-generated.
3494 * configure: Re-generated.
3496 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3498 * gencode.c (process_instructions): Call build_endian_shift when
3499 expanding STORE RIGHT, to fix swr.
3500 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3501 clear the high bits.
3502 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3503 Fix float to int conversions to produce signed values.
3505 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3507 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3508 (process_instructions): Correct handling of nor instruction.
3509 Correct shift count for 32 bit shift instructions. Correct sign
3510 extension for arithmetic shifts to not shift the number of bits in
3511 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3512 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3514 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3515 It's OK to have a mult follow a mult. What's not OK is to have a
3516 mult follow an mfhi.
3517 (Convert): Comment out incorrect rounding code.
3519 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3521 * interp.c (sim_monitor): Improved monitor printf
3522 simulation. Tidied up simulator warnings, and added "--log" option
3523 for directing warning message output.
3524 * gencode.c: Use sim_warning() rather than WARNING macro.
3526 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3528 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3529 getopt1.o, rather than on gencode.c. Link objects together.
3530 Don't link against -liberty.
3531 (gencode.o, getopt.o, getopt1.o): New targets.
3532 * gencode.c: Include <ctype.h> and "ansidecl.h".
3533 (AND): Undefine after including "ansidecl.h".
3534 (ULONG_MAX): Define if not defined.
3535 (OP_*): Don't define macros; now defined in opcode/mips.h.
3536 (main): Call my_strtoul rather than strtoul.
3537 (my_strtoul): New static function.
3539 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3541 * gencode.c (process_instructions): Generate word64 and uword64
3542 instead of `long long' and `unsigned long long' data types.
3543 * interp.c: #include sysdep.h to get signals, and define default
3545 * (Convert): Work around for Visual-C++ compiler bug with type
3547 * support.h: Make things compile under Visual-C++ by using
3548 __int64 instead of `long long'. Change many refs to long long
3549 into word64/uword64 typedefs.
3551 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3553 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3554 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3556 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3557 (AC_PROG_INSTALL): Added.
3558 (AC_PROG_CC): Moved to before configure.host call.
3559 * configure: Rebuilt.
3561 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3563 * configure.in: Define @SIMCONF@ depending on mips target.
3564 * configure: Rebuild.
3565 * Makefile.in (run): Add @SIMCONF@ to control simulator
3567 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3568 * interp.c: Remove some debugging, provide more detailed error
3569 messages, update memory accesses to use LOADDRMASK.
3571 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3573 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3574 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3576 * configure: Rebuild.
3577 * config.in: New file, generated by autoheader.
3578 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3579 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3580 HAVE_ANINT and HAVE_AINT, as appropriate.
3581 * Makefile.in (run): Use @LIBS@ rather than -lm.
3582 (interp.o): Depend upon config.h.
3583 (Makefile): Just rebuild Makefile.
3584 (clean): Remove stamp-h.
3585 (mostlyclean): Make the same as clean, not as distclean.
3586 (config.h, stamp-h): New targets.
3588 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3590 * interp.c (ColdReset): Fix boolean test. Make all simulator
3593 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3595 * interp.c (xfer_direct_word, xfer_direct_long,
3596 swap_direct_word, swap_direct_long, xfer_big_word,
3597 xfer_big_long, xfer_little_word, xfer_little_long,
3598 swap_word,swap_long): Added.
3599 * interp.c (ColdReset): Provide function indirection to
3600 host<->simulated_target transfer routines.
3601 * interp.c (sim_store_register, sim_fetch_register): Updated to
3602 make use of indirected transfer routines.
3604 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3606 * gencode.c (process_instructions): Ensure FP ABS instruction
3608 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3609 system call support.
3611 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3613 * interp.c (sim_do_command): Complain if callback structure not
3616 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3618 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3619 support for Sun hosts.
3620 * Makefile.in (gencode): Ensure the host compiler and libraries
3621 used for cross-hosted build.
3623 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3625 * interp.c, gencode.c: Some more (TODO) tidying.
3627 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3629 * gencode.c, interp.c: Replaced explicit long long references with
3630 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3631 * support.h (SET64LO, SET64HI): Macros added.
3633 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3635 * configure: Regenerate with autoconf 2.7.
3637 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3639 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3640 * support.h: Remove superfluous "1" from #if.
3641 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3643 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3645 * interp.c (StoreFPR): Control UndefinedResult() call on
3646 WARN_RESULT manifest.
3648 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3650 * gencode.c: Tidied instruction decoding, and added FP instruction
3653 * interp.c: Added dineroIII, and BSD profiling support. Also
3654 run-time FP handling.
3656 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3658 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3659 gencode.c, interp.c, support.h: created.
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