1 /* sim-main.h -- Simulator for Motorola 68HC11 & 68HC12
2 Copyright (C) 1999-2015 Free Software Foundation, Inc.
3 Written by Stephane Carrez (stcarrez@nerim.fr)
5 This file is part of GDB, the GNU debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #define WITH_MODULO_MEMORY 1
24 #define WITH_WATCHPOINTS 1
25 #define SIM_HANDLES_LMA 1
27 #include "sim-basics.h"
28 #include "sim-signal.h"
33 #include "opcode/m68hc11.h"
35 #include "gdb/callback.h"
36 #include "gdb/remote-sim.h"
37 #include "opcode/m68hc11.h"
38 #include "sim-types.h"
40 typedef unsigned8 uint8;
41 typedef unsigned16 uint16;
42 typedef signed16 int16;
43 typedef unsigned32 uint32;
44 typedef signed32 int32;
45 typedef unsigned64 uint64;
46 typedef signed64 int64;
50 #include "interrupts.h"
53 /* Specifies the level of mapping for the IO, EEprom, nvram and external
54 RAM. IO registers are mapped over everything and the external RAM
55 is last (ie, it can be hidden by everything above it in the list). */
56 enum m68hc11_map_level
81 typedef struct m6811_regs {
92 /* Description of 68HC11 IO registers. Such description is only provided
93 for the info command to display the current setting of IO registers
98 const char *short_name;
99 const char *long_name;
101 typedef struct io_reg_desc io_reg_desc;
103 extern void print_io_reg_desc (SIM_DESC sd, io_reg_desc *desc, int val,
105 extern void print_io_byte (SIM_DESC sd, const char *name,
106 io_reg_desc *desc, uint8 val, uint16 addr);
107 extern void print_io_word (SIM_DESC sd, const char *name,
108 io_reg_desc *desc, uint16 val, uint16 addr);
111 /* List of special 68HC11&68HC12 instructions that are not handled by the
112 'gencode.c' generator. These complex instructions are implemented
116 /* 68HC11 instructions. */
126 /* 68HC12 instructions. */
145 #define M6811_MAX_PORTS (0x03f+1)
146 #define M6812_MAX_PORTS (0x3ff+1)
147 #define MAX_PORTS (M6812_MAX_PORTS)
151 typedef void (* cpu_interp) (struct _sim_cpu*);
155 struct m6811_regs cpu_regs;
157 /* CPU interrupts. */
158 struct interrupts cpu_interrupts;
160 /* Pointer to the interpretor routine. */
161 cpu_interp cpu_interpretor;
163 /* Pointer to the architecture currently configured in the simulator. */
164 const struct bfd_arch_info *cpu_configured_arch;
166 /* CPU absolute cycle time. The cycle time is updated after
167 each instruction, by the number of cycles taken by the instruction.
168 It is cleared only when reset occurs. */
169 signed64 cpu_absolute_cycle;
171 /* Number of cycles to increment after the current instruction.
172 This is also the number of ticks for the generic event scheduler. */
173 uint8 cpu_current_cycle;
174 int cpu_emul_syscall;
175 int cpu_is_initialized;
177 int cpu_check_memory;
178 int cpu_stop_on_interrupt;
180 /* When this is set, start execution of program at address specified
181 in the ELF header. This is used for testing some programs that do not
182 have an interrupt table linked with them. Programs created during the
183 GCC validation are like this. A normal 68HC11 does not behave like
184 this (unless there is some OS or downloadable feature). */
185 int cpu_use_elf_start;
187 /* The starting address specified in ELF header. */
192 /* CPU frequency. This is the quartz frequency. It is divided by 4 to
193 get the cycle time. This is used for the timer rate and for the baud
195 unsigned long cpu_frequency;
197 /* The mode in which the CPU is configured (MODA and MODB pins). */
198 unsigned int cpu_mode;
199 const char* cpu_start_mode;
201 /* The cpu being configured. */
202 enum cpu_type cpu_type;
204 /* Initial value of the CONFIG register. */
206 uint8 cpu_use_local_config;
208 uint8 ios[MAX_PORTS];
210 /* Memory bank parameters which describe how the memory bank window
211 is mapped in memory and how to convert it in virtual address. */
214 address_word bank_virtual;
220 /* ... base type ... */
224 /* Returns the cpu absolute cycle time (A virtual counter incremented
225 at each 68HC11 E clock). */
226 #define cpu_current_cycle(PROC) ((PROC)->cpu_absolute_cycle)
227 #define cpu_add_cycles(PROC,T) ((PROC)->cpu_current_cycle += (signed64) (T))
228 #define cpu_is_running(PROC) ((PROC)->cpu_running)
230 /* Get the IO/RAM base addresses depending on the M6811_INIT register. */
231 #define cpu_get_io_base(PROC) \
232 (((uint16)(((PROC)->ios[M6811_INIT]) & 0x0F))<<12)
233 #define cpu_get_reg_base(PROC) \
234 (((uint16)(((PROC)->ios[M6811_INIT]) & 0xF0))<<8)
236 /* Returns the different CPU registers. */
237 #define cpu_get_ccr(PROC) ((PROC)->cpu_regs.ccr)
238 #define cpu_get_pc(PROC) ((PROC)->cpu_regs.pc)
239 #define cpu_get_d(PROC) ((PROC)->cpu_regs.d)
240 #define cpu_get_x(PROC) ((PROC)->cpu_regs.ix)
241 #define cpu_get_y(PROC) ((PROC)->cpu_regs.iy)
242 #define cpu_get_sp(PROC) ((PROC)->cpu_regs.sp)
243 #define cpu_get_a(PROC) ((PROC->cpu_regs.d >> 8) & 0x0FF)
244 #define cpu_get_b(PROC) ((PROC->cpu_regs.d) & 0x0FF)
245 #define cpu_get_page(PROC) ((PROC)->cpu_regs.page)
247 /* 68HC12 specific and Motorola internal registers. */
248 #define cpu_get_tmp3(PROC) (0)
249 #define cpu_get_tmp2(PROC) (0)
251 #define cpu_set_d(PROC,VAL) (((PROC)->cpu_regs.d) = (VAL))
252 #define cpu_set_x(PROC,VAL) (((PROC)->cpu_regs.ix) = (VAL))
253 #define cpu_set_y(PROC,VAL) (((PROC)->cpu_regs.iy) = (VAL))
254 #define cpu_set_page(PROC,VAL) (((PROC)->cpu_regs.page) = (VAL))
256 /* 68HC12 specific and Motorola internal registers. */
257 #define cpu_set_tmp3(PROC,VAL) (0)
258 #define cpu_set_tmp2(PROC,VAL) (void) (0)
261 /* This is a function in m68hc11_sim.c to keep track of the frame. */
262 #define cpu_set_sp(PROC,VAL) (((PROC)->cpu_regs.sp) = (VAL))
265 #define cpu_set_pc(PROC,VAL) (((PROC)->cpu_regs.pc) = (VAL))
267 #define cpu_set_a(PROC,VAL) \
268 cpu_set_d(PROC,((VAL) << 8) | cpu_get_b(PROC))
269 #define cpu_set_b(PROC,VAL) \
270 cpu_set_d(PROC,((cpu_get_a(PROC)) << 8)|(VAL & 0x0FF))
272 #define cpu_set_ccr(PROC,VAL) ((PROC)->cpu_regs.ccr = (VAL))
273 #define cpu_get_ccr_H(PROC) ((cpu_get_ccr(PROC) & M6811_H_BIT) ? 1: 0)
274 #define cpu_get_ccr_X(PROC) ((cpu_get_ccr(PROC) & M6811_X_BIT) ? 1: 0)
275 #define cpu_get_ccr_S(PROC) ((cpu_get_ccr(PROC) & M6811_S_BIT) ? 1: 0)
276 #define cpu_get_ccr_N(PROC) ((cpu_get_ccr(PROC) & M6811_N_BIT) ? 1: 0)
277 #define cpu_get_ccr_V(PROC) ((cpu_get_ccr(PROC) & M6811_V_BIT) ? 1: 0)
278 #define cpu_get_ccr_C(PROC) ((cpu_get_ccr(PROC) & M6811_C_BIT) ? 1: 0)
279 #define cpu_get_ccr_Z(PROC) ((cpu_get_ccr(PROC) & M6811_Z_BIT) ? 1: 0)
280 #define cpu_get_ccr_I(PROC) ((cpu_get_ccr(PROC) & M6811_I_BIT) ? 1: 0)
282 #define cpu_set_ccr_flag(S,B,V) \
283 cpu_set_ccr(S,(cpu_get_ccr(S) & ~(B)) | ((V) ? B : 0))
285 #define cpu_set_ccr_H(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_H_BIT, VAL)
286 #define cpu_set_ccr_X(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_X_BIT, VAL)
287 #define cpu_set_ccr_S(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_S_BIT, VAL)
288 #define cpu_set_ccr_N(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_N_BIT, VAL)
289 #define cpu_set_ccr_V(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_V_BIT, VAL)
290 #define cpu_set_ccr_C(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_C_BIT, VAL)
291 #define cpu_set_ccr_Z(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_Z_BIT, VAL)
292 #define cpu_set_ccr_I(PROC,VAL) cpu_set_ccr_flag(PROC, M6811_I_BIT, VAL)
295 #define inline static __inline__
297 extern void cpu_memory_exception (struct _sim_cpu *proc,
300 const char *message);
303 phys_to_virt (sim_cpu *cpu, address_word addr)
305 if (addr >= cpu->bank_start && addr < cpu->bank_end)
306 return ((address_word) (addr - cpu->bank_start)
307 + (((address_word) cpu->cpu_regs.page) << cpu->bank_shift)
308 + cpu->bank_virtual);
310 return (address_word) (addr);
314 memory_read8 (sim_cpu *cpu, uint16 addr)
318 if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
320 cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
327 memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
329 if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
331 cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
337 memory_read16 (sim_cpu *cpu, uint16 addr)
341 if (sim_core_read_buffer (CPU_STATE (cpu), cpu, 0, b, addr, 2) != 2)
343 cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
346 return (((uint16) (b[0])) << 8) | ((uint16) b[1]);
350 memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
356 if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, b, addr, 2) != 2)
358 cpu_memory_exception (cpu, SIM_SIGSEGV, addr,
363 cpu_ccr_update_tst8 (sim_cpu *proc, uint8 val);
366 cpu_ccr_update_tst16 (sim_cpu *proc, uint16 val)
368 cpu_set_ccr_V (proc, 0);
369 cpu_set_ccr_N (proc, val & 0x8000 ? 1 : 0);
370 cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
374 cpu_ccr_update_shift8 (sim_cpu *proc, uint8 val)
376 cpu_set_ccr_N (proc, val & 0x80 ? 1 : 0);
377 cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
378 cpu_set_ccr_V (proc, cpu_get_ccr_N (proc) ^ cpu_get_ccr_C (proc));
382 cpu_ccr_update_shift16 (sim_cpu *proc, uint16 val)
384 cpu_set_ccr_N (proc, val & 0x8000 ? 1 : 0);
385 cpu_set_ccr_Z (proc, val == 0 ? 1 : 0);
386 cpu_set_ccr_V (proc, cpu_get_ccr_N (proc) ^ cpu_get_ccr_C (proc));
390 cpu_ccr_update_add8 (sim_cpu *proc, uint8 r, uint8 a, uint8 b)
392 cpu_set_ccr_C (proc, ((a & b) | (b & ~r) | (a & ~r)) & 0x80 ? 1 : 0);
393 cpu_set_ccr_V (proc, ((a & b & ~r) | (~a & ~b & r)) & 0x80 ? 1 : 0);
394 cpu_set_ccr_Z (proc, r == 0);
395 cpu_set_ccr_N (proc, r & 0x80 ? 1 : 0);
400 cpu_ccr_update_sub8 (sim_cpu *proc, uint8 r, uint8 a, uint8 b)
402 cpu_set_ccr_C (proc, ((~a & b) | (b & r) | (~a & r)) & 0x80 ? 1 : 0);
403 cpu_set_ccr_V (proc, ((a & ~b & ~r) | (~a & b & r)) & 0x80 ? 1 : 0);
404 cpu_set_ccr_Z (proc, r == 0);
405 cpu_set_ccr_N (proc, r & 0x80 ? 1 : 0);
409 cpu_ccr_update_add16 (sim_cpu *proc, uint16 r, uint16 a, uint16 b)
411 cpu_set_ccr_C (proc, ((a & b) | (b & ~r) | (a & ~r)) & 0x8000 ? 1 : 0);
412 cpu_set_ccr_V (proc, ((a & b & ~r) | (~a & ~b & r)) & 0x8000 ? 1 : 0);
413 cpu_set_ccr_Z (proc, r == 0);
414 cpu_set_ccr_N (proc, r & 0x8000 ? 1 : 0);
418 cpu_ccr_update_sub16 (sim_cpu *proc, uint16 r, uint16 a, uint16 b)
420 cpu_set_ccr_C (proc, ((~a & b) | (b & r) | (~a & r)) & 0x8000 ? 1 : 0);
421 cpu_set_ccr_V (proc, ((a & ~b & ~r) | (~a & b & r)) & 0x8000 ? 1 : 0);
422 cpu_set_ccr_Z (proc, r == 0);
423 cpu_set_ccr_N (proc, r & 0x8000 ? 1 : 0);
426 /* Push and pop instructions for 68HC11 (next-available stack mode). */
428 cpu_m68hc11_push_uint8 (sim_cpu *proc, uint8 val)
430 uint16 addr = proc->cpu_regs.sp;
432 memory_write8 (proc, addr, val);
433 proc->cpu_regs.sp = addr - 1;
437 cpu_m68hc11_push_uint16 (sim_cpu *proc, uint16 val)
439 uint16 addr = proc->cpu_regs.sp - 1;
441 memory_write16 (proc, addr, val);
442 proc->cpu_regs.sp = addr - 1;
446 cpu_m68hc11_pop_uint8 (sim_cpu *proc)
448 uint16 addr = proc->cpu_regs.sp;
451 val = memory_read8 (proc, addr + 1);
452 proc->cpu_regs.sp = addr + 1;
457 cpu_m68hc11_pop_uint16 (sim_cpu *proc)
459 uint16 addr = proc->cpu_regs.sp;
462 val = memory_read16 (proc, addr + 1);
463 proc->cpu_regs.sp = addr + 2;
467 /* Push and pop instructions for 68HC12 (last-used stack mode). */
469 cpu_m68hc12_push_uint8 (sim_cpu *proc, uint8 val)
471 uint16 addr = proc->cpu_regs.sp;
474 memory_write8 (proc, addr, val);
475 proc->cpu_regs.sp = addr;
479 cpu_m68hc12_push_uint16 (sim_cpu *proc, uint16 val)
481 uint16 addr = proc->cpu_regs.sp;
484 memory_write16 (proc, addr, val);
485 proc->cpu_regs.sp = addr;
489 cpu_m68hc12_pop_uint8 (sim_cpu *proc)
491 uint16 addr = proc->cpu_regs.sp;
494 val = memory_read8 (proc, addr);
495 proc->cpu_regs.sp = addr + 1;
500 cpu_m68hc12_pop_uint16 (sim_cpu *proc)
502 uint16 addr = proc->cpu_regs.sp;
505 val = memory_read16 (proc, addr);
506 proc->cpu_regs.sp = addr + 2;
510 /* Fetch a 8/16 bit value and update the PC. */
512 cpu_fetch8 (sim_cpu *proc)
514 uint16 addr = proc->cpu_regs.pc;
517 val = memory_read8 (proc, addr);
518 proc->cpu_regs.pc = addr + 1;
523 cpu_fetch16 (sim_cpu *proc)
525 uint16 addr = proc->cpu_regs.pc;
528 val = memory_read16 (proc, addr);
529 proc->cpu_regs.pc = addr + 2;
533 extern void cpu_call (sim_cpu* proc, uint16 addr);
534 extern void cpu_exg (sim_cpu* proc, uint8 code);
535 extern void cpu_dbcc (sim_cpu* proc);
536 extern void cpu_special (sim_cpu *proc, enum M6811_Special special);
537 extern void cpu_move8 (sim_cpu *proc, uint8 op);
538 extern void cpu_move16 (sim_cpu *proc, uint8 op);
540 extern uint16 cpu_fetch_relbranch (sim_cpu *proc);
541 extern uint16 cpu_fetch_relbranch16 (sim_cpu *proc);
542 extern void cpu_push_all (sim_cpu *proc);
543 extern void cpu_single_step (sim_cpu *proc);
545 extern void cpu_info (SIM_DESC sd, sim_cpu *proc);
547 extern int cpu_initialize (SIM_DESC sd, sim_cpu *cpu);
549 /* Returns the address of a 68HC12 indexed operand.
550 Pre and post modifications are handled on the source register. */
551 extern uint16 cpu_get_indexed_operand_addr (sim_cpu *cpu, int restricted);
553 extern void cpu_return (sim_cpu *cpu);
554 extern void cpu_set_sp (sim_cpu *cpu, uint16 val);
555 extern int cpu_reset (sim_cpu *cpu);
556 extern int cpu_restart (sim_cpu *cpu);
557 extern void sim_memory_error (sim_cpu *cpu, SIM_SIGNAL excep,
558 uint16 addr, const char *message, ...);
559 extern void emul_os (int op, sim_cpu *cpu);
560 extern void cpu_interp_m6811 (sim_cpu *cpu);
561 extern void cpu_interp_m6812 (sim_cpu *cpu);
563 extern int m68hc11cpu_set_oscillator (SIM_DESC sd, const char *port,
564 double ton, double toff,
566 extern int m68hc11cpu_clear_oscillator (SIM_DESC sd, const char *port);
567 extern void m68hc11cpu_set_port (struct hw *me, sim_cpu *cpu,
568 unsigned addr, uint8 val);
570 /* The current state of the processor; registers, memory, etc. */
573 sim_cpu *cpu[MAX_NR_PROCESSORS];
578 extern void sim_board_reset (SIM_DESC sd);
580 #define PRINT_TIME 0x01
581 #define PRINT_CYCLE 0x02
582 extern const char *cycle_to_string (sim_cpu *cpu, signed64 t, int flags);