1 /* Main simulator entry points specific to the M32R.
2 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2, or (at your option)
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License along
16 with this program; if not, write to the Free Software Foundation, Inc.,
17 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
20 #include "sim-options.h"
21 #include "libiberty.h"
35 static void free_state (SIM_DESC);
36 static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
38 /* Records simulator descriptor so utilities like m32r_dump_regs can be
40 SIM_DESC current_state;
42 /* Cover function of sim_state_free to free the cpu buffers as well. */
45 free_state (SIM_DESC sd)
47 if (STATE_MODULES (sd) != NULL)
48 sim_module_uninstall (sd);
49 sim_cpu_free_all (sd);
53 /* Create an instance of the simulator. */
56 sim_open (kind, callback, abfd, argv)
58 host_callback *callback;
62 SIM_DESC sd = sim_state_alloc (kind, callback);
66 /* The cpu data is kept in a separately allocated chunk of memory. */
67 if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
73 #if 0 /* FIXME: pc is in mach-specific struct */
74 /* FIXME: watchpoints code shouldn't need this */
76 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
77 STATE_WATCHPOINTS (sd)->pc = &(PC);
78 STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
82 if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
88 #ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */
89 if (dv_sockser_install (sd) != SIM_RC_OK)
96 #if 0 /* FIXME: 'twould be nice if we could do this */
97 /* These options override any module options.
98 Obviously ambiguity should be avoided, however the caller may wish to
99 augment the meaning of an option. */
100 if (extra_options != NULL)
101 sim_add_option_table (sd, extra_options);
104 /* getopt will print the error message so we just have to exit if this fails.
105 FIXME: Hmmm... in the case of gdb we need getopt to call
107 if (sim_parse_args (sd, argv) != SIM_RC_OK)
113 /* Allocate a handler for the control registers and other devices
114 if no memory for that range has been allocated by the user.
115 All are allocated in one chunk to keep things from being
116 unnecessarily complicated. */
117 if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0)
118 sim_core_attach (sd, NULL,
122 M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/,
127 /* Allocate core managed memory if none specified by user.
128 Use address 4 here in case the user wanted address 0 unmapped. */
129 if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
130 sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
132 /* check for/establish the reference program image */
133 if (sim_analyze_program (sd,
134 (STATE_PROG_ARGV (sd) != NULL
135 ? *STATE_PROG_ARGV (sd)
143 /* Establish any remaining configuration options. */
144 if (sim_config (sd) != SIM_RC_OK)
150 if (sim_post_argv_init (sd) != SIM_RC_OK)
156 /* Open a copy of the cpu descriptor table. */
158 CGEN_CPU_DESC cd = m32r_cgen_cpu_open (STATE_ARCHITECTURE (sd)->mach,
160 for (i = 0; i < MAX_NR_PROCESSORS; ++i)
162 SIM_CPU *cpu = STATE_CPU (sd, i);
163 CPU_CPU_DESC (cpu) = cd;
164 CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
166 m32r_cgen_init_dis (cd);
169 /* Initialize various cgen things not done by common framework.
170 Must be done after m32r_cgen_cpu_open. */
173 for (c = 0; c < MAX_NR_PROCESSORS; ++c)
175 /* Only needed for profiling, but the structure member is small. */
176 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
177 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
178 /* Hook in callback for reporting these stats */
179 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
180 = print_m32r_misc_cpu;
183 /* Store in a global so things like sparc32_dump_regs can be invoked
184 from the gdb command line. */
191 sim_close (sd, quitting)
195 m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
196 sim_module_uninstall (sd);
200 sim_create_inferior (sd, abfd, argv, envp)
206 SIM_CPU *current_cpu = STATE_CPU (sd, 0);
210 addr = bfd_get_start_address (abfd);
213 sim_pc_set (current_cpu, addr);
216 STATE_ARGV (sd) = sim_copy_argv (argv);
217 STATE_ENVP (sd) = sim_copy_argv (envp);
223 /* PROFILE_CPU_CALLBACK */
226 print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
228 SIM_DESC sd = CPU_STATE (cpu);
231 if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
233 sim_io_printf (sd, "Miscellaneous Statistics\n\n");
234 sim_io_printf (sd, " %-*s %s\n\n",
235 PROFILE_LABEL_WIDTH, "Fill nops:",
236 sim_add_commas (buf, sizeof (buf),
237 CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
242 sim_do_command (sd, cmd)
251 argv = buildargv (cmd);
254 && strcasecmp (argv[0], "info") == 0
256 && strncasecmp (argv[1], "reg", 3) == 0)
260 /* We only support printing bbpsw,bbpc here as there is no equivalent
261 functionality in gdb. */
263 sim_io_eprintf (sd, "Missing register in `%s'\n", cmd);
264 else if (argv[3] != NULL)
265 sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd);
266 else if (strcasecmp (argv[2], "bbpsw") == 0)
268 val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
269 sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val);
271 else if (strcasecmp (argv[2], "bbpc") == 0)
273 val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
274 sim_io_printf (sd, "bbpc 0x%x %d\n", val, val);
277 sim_io_eprintf (sd, "Printing of register `%s' not supported with `sim info'\n",
282 if (sim_args_command (sd, cmd) != SIM_RC_OK)
283 sim_io_eprintf (sd, "Unknown sim command `%s'\n", cmd);